qcom,camcc-lemans.h 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_LEMANS_H
  6. #define _DT_BINDINGS_CLK_QCOM_CAM_CC_LEMANS_H
  7. /* CAM_CC clocks */
  8. #define CAM_CC_PLL0 0
  9. #define CAM_CC_PLL0_OUT_EVEN 1
  10. #define CAM_CC_PLL0_OUT_ODD 2
  11. #define CAM_CC_PLL2 3
  12. #define CAM_CC_PLL3 4
  13. #define CAM_CC_PLL3_OUT_EVEN 5
  14. #define CAM_CC_PLL4 6
  15. #define CAM_CC_PLL4_OUT_EVEN 7
  16. #define CAM_CC_PLL5 8
  17. #define CAM_CC_PLL5_OUT_EVEN 9
  18. #define CAM_CC_CAMNOC_AXI_CLK 10
  19. #define CAM_CC_CAMNOC_AXI_CLK_SRC 11
  20. #define CAM_CC_CAMNOC_DCD_XO_CLK 12
  21. #define CAM_CC_CAMNOC_XO_CLK 13
  22. #define CAM_CC_CCI_0_CLK 14
  23. #define CAM_CC_CCI_0_CLK_SRC 15
  24. #define CAM_CC_CCI_1_CLK 16
  25. #define CAM_CC_CCI_1_CLK_SRC 17
  26. #define CAM_CC_CCI_2_CLK 18
  27. #define CAM_CC_CCI_2_CLK_SRC 19
  28. #define CAM_CC_CCI_3_CLK 20
  29. #define CAM_CC_CCI_3_CLK_SRC 21
  30. #define CAM_CC_CORE_AHB_CLK 22
  31. #define CAM_CC_CPAS_AHB_CLK 23
  32. #define CAM_CC_CPAS_FAST_AHB_CLK 24
  33. #define CAM_CC_CPAS_IFE_0_CLK 25
  34. #define CAM_CC_CPAS_IFE_1_CLK 26
  35. #define CAM_CC_CPAS_IFE_LITE_CLK 27
  36. #define CAM_CC_CPAS_IPE_CLK 28
  37. #define CAM_CC_CPAS_SFE_LITE_0_CLK 29
  38. #define CAM_CC_CPAS_SFE_LITE_1_CLK 30
  39. #define CAM_CC_CPHY_RX_CLK_SRC 31
  40. #define CAM_CC_CSI0PHYTIMER_CLK 32
  41. #define CAM_CC_CSI0PHYTIMER_CLK_SRC 33
  42. #define CAM_CC_CSI1PHYTIMER_CLK 34
  43. #define CAM_CC_CSI1PHYTIMER_CLK_SRC 35
  44. #define CAM_CC_CSI2PHYTIMER_CLK 36
  45. #define CAM_CC_CSI2PHYTIMER_CLK_SRC 37
  46. #define CAM_CC_CSI3PHYTIMER_CLK 38
  47. #define CAM_CC_CSI3PHYTIMER_CLK_SRC 39
  48. #define CAM_CC_CSID_CLK 40
  49. #define CAM_CC_CSID_CLK_SRC 41
  50. #define CAM_CC_CSID_CSIPHY_RX_CLK 42
  51. #define CAM_CC_CSIPHY0_CLK 43
  52. #define CAM_CC_CSIPHY1_CLK 44
  53. #define CAM_CC_CSIPHY2_CLK 45
  54. #define CAM_CC_CSIPHY3_CLK 46
  55. #define CAM_CC_FAST_AHB_CLK_SRC 47
  56. #define CAM_CC_GDSC_CLK 48
  57. #define CAM_CC_ICP_AHB_CLK 49
  58. #define CAM_CC_ICP_CLK 50
  59. #define CAM_CC_ICP_CLK_SRC 51
  60. #define CAM_CC_IFE_0_CLK 52
  61. #define CAM_CC_IFE_0_CLK_SRC 53
  62. #define CAM_CC_IFE_0_FAST_AHB_CLK 54
  63. #define CAM_CC_IFE_1_CLK 55
  64. #define CAM_CC_IFE_1_CLK_SRC 56
  65. #define CAM_CC_IFE_1_FAST_AHB_CLK 57
  66. #define CAM_CC_IFE_LITE_AHB_CLK 58
  67. #define CAM_CC_IFE_LITE_CLK 59
  68. #define CAM_CC_IFE_LITE_CLK_SRC 60
  69. #define CAM_CC_IFE_LITE_CPHY_RX_CLK 61
  70. #define CAM_CC_IFE_LITE_CSID_CLK 62
  71. #define CAM_CC_IFE_LITE_CSID_CLK_SRC 63
  72. #define CAM_CC_IPE_AHB_CLK 64
  73. #define CAM_CC_IPE_CLK 65
  74. #define CAM_CC_IPE_CLK_SRC 66
  75. #define CAM_CC_IPE_FAST_AHB_CLK 67
  76. #define CAM_CC_MCLK0_CLK 68
  77. #define CAM_CC_MCLK0_CLK_SRC 69
  78. #define CAM_CC_MCLK1_CLK 70
  79. #define CAM_CC_MCLK1_CLK_SRC 71
  80. #define CAM_CC_MCLK2_CLK 72
  81. #define CAM_CC_MCLK2_CLK_SRC 73
  82. #define CAM_CC_MCLK3_CLK 74
  83. #define CAM_CC_MCLK3_CLK_SRC 75
  84. #define CAM_CC_SFE_LITE_0_CLK 76
  85. #define CAM_CC_SFE_LITE_0_FAST_AHB_CLK 77
  86. #define CAM_CC_SFE_LITE_1_CLK 78
  87. #define CAM_CC_SFE_LITE_1_FAST_AHB_CLK 79
  88. #define CAM_CC_SLEEP_CLK 80
  89. #define CAM_CC_SLEEP_CLK_SRC 81
  90. #define CAM_CC_SLOW_AHB_CLK_SRC 82
  91. #define CAM_CC_XO_CLK_SRC 83
  92. #define CAM_CC_TITAN_TOP_ACCU_SHIFT_CLK 84
  93. /* CAM_CC resets */
  94. #define CAM_CC_ICP_BCR 0
  95. #define CAM_CC_IFE_0_BCR 1
  96. #define CAM_CC_IFE_1_BCR 2
  97. #define CAM_CC_IPE_0_BCR 3
  98. #define CAM_CC_SFE_LITE_0_BCR 4
  99. #define CAM_CC_SFE_LITE_1_BCR 5
  100. #endif