qcom,camcc-kalama.h 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_KALAMA_H
  6. #define _DT_BINDINGS_CLK_QCOM_CAM_CC_KALAMA_H
  7. /* CAM_CC clocks */
  8. #define CAM_CC_BPS_AHB_CLK 0
  9. #define CAM_CC_BPS_CLK 1
  10. #define CAM_CC_BPS_CLK_SRC 2
  11. #define CAM_CC_BPS_FAST_AHB_CLK 3
  12. #define CAM_CC_CAMNOC_AXI_CLK 4
  13. #define CAM_CC_CAMNOC_AXI_CLK_SRC 5
  14. #define CAM_CC_CAMNOC_DCD_XO_CLK 6
  15. #define CAM_CC_CAMNOC_XO_CLK 7
  16. #define CAM_CC_CCI_0_CLK 8
  17. #define CAM_CC_CCI_0_CLK_SRC 9
  18. #define CAM_CC_CCI_1_CLK 10
  19. #define CAM_CC_CCI_1_CLK_SRC 11
  20. #define CAM_CC_CCI_2_CLK 12
  21. #define CAM_CC_CCI_2_CLK_SRC 13
  22. #define CAM_CC_CORE_AHB_CLK 14
  23. #define CAM_CC_CPAS_AHB_CLK 15
  24. #define CAM_CC_CPAS_BPS_CLK 16
  25. #define CAM_CC_CPAS_CRE_CLK 17
  26. #define CAM_CC_CPAS_FAST_AHB_CLK 18
  27. #define CAM_CC_CPAS_IFE_0_CLK 19
  28. #define CAM_CC_CPAS_IFE_1_CLK 20
  29. #define CAM_CC_CPAS_IFE_2_CLK 21
  30. #define CAM_CC_CPAS_IFE_LITE_CLK 22
  31. #define CAM_CC_CPAS_IPE_NPS_CLK 23
  32. #define CAM_CC_CPAS_SBI_CLK 24
  33. #define CAM_CC_CPAS_SFE_0_CLK 25
  34. #define CAM_CC_CPAS_SFE_1_CLK 26
  35. #define CAM_CC_CPHY_RX_CLK_SRC 27
  36. #define CAM_CC_CRE_AHB_CLK 28
  37. #define CAM_CC_CRE_CLK 29
  38. #define CAM_CC_CRE_CLK_SRC 30
  39. #define CAM_CC_CSI0PHYTIMER_CLK 31
  40. #define CAM_CC_CSI0PHYTIMER_CLK_SRC 32
  41. #define CAM_CC_CSI1PHYTIMER_CLK 33
  42. #define CAM_CC_CSI1PHYTIMER_CLK_SRC 34
  43. #define CAM_CC_CSI2PHYTIMER_CLK 35
  44. #define CAM_CC_CSI2PHYTIMER_CLK_SRC 36
  45. #define CAM_CC_CSI3PHYTIMER_CLK 37
  46. #define CAM_CC_CSI3PHYTIMER_CLK_SRC 38
  47. #define CAM_CC_CSI4PHYTIMER_CLK 39
  48. #define CAM_CC_CSI4PHYTIMER_CLK_SRC 40
  49. #define CAM_CC_CSI5PHYTIMER_CLK 41
  50. #define CAM_CC_CSI5PHYTIMER_CLK_SRC 42
  51. #define CAM_CC_CSI6PHYTIMER_CLK 43
  52. #define CAM_CC_CSI6PHYTIMER_CLK_SRC 44
  53. #define CAM_CC_CSI7PHYTIMER_CLK 45
  54. #define CAM_CC_CSI7PHYTIMER_CLK_SRC 46
  55. #define CAM_CC_CSID_CLK 47
  56. #define CAM_CC_CSID_CLK_SRC 48
  57. #define CAM_CC_CSID_CSIPHY_RX_CLK 49
  58. #define CAM_CC_CSIPHY0_CLK 50
  59. #define CAM_CC_CSIPHY1_CLK 51
  60. #define CAM_CC_CSIPHY2_CLK 52
  61. #define CAM_CC_CSIPHY3_CLK 53
  62. #define CAM_CC_CSIPHY4_CLK 54
  63. #define CAM_CC_CSIPHY5_CLK 55
  64. #define CAM_CC_CSIPHY6_CLK 56
  65. #define CAM_CC_CSIPHY7_CLK 57
  66. #define CAM_CC_DRV_AHB_CLK 58
  67. #define CAM_CC_DRV_XO_CLK 59
  68. #define CAM_CC_FAST_AHB_CLK_SRC 60
  69. #define CAM_CC_GDSC_CLK 61
  70. #define CAM_CC_ICP_AHB_CLK 62
  71. #define CAM_CC_ICP_CLK 63
  72. #define CAM_CC_ICP_CLK_SRC 64
  73. #define CAM_CC_IFE_0_CLK 65
  74. #define CAM_CC_IFE_0_CLK_SRC 66
  75. #define CAM_CC_IFE_0_DSP_CLK 67
  76. #define CAM_CC_IFE_0_DSP_CLK_SRC 68
  77. #define CAM_CC_IFE_0_FAST_AHB_CLK 69
  78. #define CAM_CC_IFE_1_CLK 70
  79. #define CAM_CC_IFE_1_CLK_SRC 71
  80. #define CAM_CC_IFE_1_DSP_CLK 72
  81. #define CAM_CC_IFE_1_DSP_CLK_SRC 73
  82. #define CAM_CC_IFE_1_FAST_AHB_CLK 74
  83. #define CAM_CC_IFE_2_CLK 75
  84. #define CAM_CC_IFE_2_CLK_SRC 76
  85. #define CAM_CC_IFE_2_DSP_CLK 77
  86. #define CAM_CC_IFE_2_DSP_CLK_SRC 78
  87. #define CAM_CC_IFE_2_FAST_AHB_CLK 79
  88. #define CAM_CC_IFE_LITE_AHB_CLK 80
  89. #define CAM_CC_IFE_LITE_CLK 81
  90. #define CAM_CC_IFE_LITE_CLK_SRC 82
  91. #define CAM_CC_IFE_LITE_CPHY_RX_CLK 83
  92. #define CAM_CC_IFE_LITE_CSID_CLK 84
  93. #define CAM_CC_IFE_LITE_CSID_CLK_SRC 85
  94. #define CAM_CC_IPE_NPS_AHB_CLK 86
  95. #define CAM_CC_IPE_NPS_CLK 87
  96. #define CAM_CC_IPE_NPS_CLK_SRC 88
  97. #define CAM_CC_IPE_NPS_FAST_AHB_CLK 89
  98. #define CAM_CC_IPE_PPS_CLK 90
  99. #define CAM_CC_IPE_PPS_FAST_AHB_CLK 91
  100. #define CAM_CC_JPEG_1_CLK 92
  101. #define CAM_CC_JPEG_CLK 93
  102. #define CAM_CC_JPEG_CLK_SRC 94
  103. #define CAM_CC_MCLK0_CLK 95
  104. #define CAM_CC_MCLK0_CLK_SRC 96
  105. #define CAM_CC_MCLK1_CLK 97
  106. #define CAM_CC_MCLK1_CLK_SRC 98
  107. #define CAM_CC_MCLK2_CLK 99
  108. #define CAM_CC_MCLK2_CLK_SRC 100
  109. #define CAM_CC_MCLK3_CLK 101
  110. #define CAM_CC_MCLK3_CLK_SRC 102
  111. #define CAM_CC_MCLK4_CLK 103
  112. #define CAM_CC_MCLK4_CLK_SRC 104
  113. #define CAM_CC_MCLK5_CLK 105
  114. #define CAM_CC_MCLK5_CLK_SRC 106
  115. #define CAM_CC_MCLK6_CLK 107
  116. #define CAM_CC_MCLK6_CLK_SRC 108
  117. #define CAM_CC_MCLK7_CLK 109
  118. #define CAM_CC_MCLK7_CLK_SRC 110
  119. #define CAM_CC_PLL0 111
  120. #define CAM_CC_PLL0_OUT_EVEN 112
  121. #define CAM_CC_PLL0_OUT_ODD 113
  122. #define CAM_CC_PLL1 114
  123. #define CAM_CC_PLL10 115
  124. #define CAM_CC_PLL10_OUT_EVEN 116
  125. #define CAM_CC_PLL11 117
  126. #define CAM_CC_PLL11_OUT_EVEN 118
  127. #define CAM_CC_PLL12 119
  128. #define CAM_CC_PLL12_OUT_EVEN 120
  129. #define CAM_CC_PLL1_OUT_EVEN 121
  130. #define CAM_CC_PLL2 122
  131. #define CAM_CC_PLL3 123
  132. #define CAM_CC_PLL3_OUT_EVEN 124
  133. #define CAM_CC_PLL4 125
  134. #define CAM_CC_PLL4_OUT_EVEN 126
  135. #define CAM_CC_PLL5 127
  136. #define CAM_CC_PLL5_OUT_EVEN 128
  137. #define CAM_CC_PLL6 129
  138. #define CAM_CC_PLL6_OUT_EVEN 130
  139. #define CAM_CC_PLL7 131
  140. #define CAM_CC_PLL7_OUT_EVEN 132
  141. #define CAM_CC_PLL8 133
  142. #define CAM_CC_PLL8_OUT_EVEN 134
  143. #define CAM_CC_PLL9 135
  144. #define CAM_CC_PLL9_OUT_EVEN 136
  145. #define CAM_CC_QDSS_DEBUG_CLK 137
  146. #define CAM_CC_QDSS_DEBUG_CLK_SRC 138
  147. #define CAM_CC_QDSS_DEBUG_XO_CLK 139
  148. #define CAM_CC_SBI_CLK 140
  149. #define CAM_CC_SBI_FAST_AHB_CLK 141
  150. #define CAM_CC_SFE_0_CLK 142
  151. #define CAM_CC_SFE_0_CLK_SRC 143
  152. #define CAM_CC_SFE_0_FAST_AHB_CLK 144
  153. #define CAM_CC_SFE_1_CLK 145
  154. #define CAM_CC_SFE_1_CLK_SRC 146
  155. #define CAM_CC_SFE_1_FAST_AHB_CLK 147
  156. #define CAM_CC_SLEEP_CLK 148
  157. #define CAM_CC_SLEEP_CLK_SRC 149
  158. #define CAM_CC_SLOW_AHB_CLK_SRC 150
  159. #define CAM_CC_XO_CLK_SRC 151
  160. /* CAM_CC resets */
  161. #define CAM_CC_BPS_BCR 0
  162. #define CAM_CC_DRV_BCR 1
  163. #define CAM_CC_ICP_BCR 2
  164. #define CAM_CC_IFE_0_BCR 3
  165. #define CAM_CC_IFE_1_BCR 4
  166. #define CAM_CC_IFE_2_BCR 5
  167. #define CAM_CC_IPE_0_BCR 6
  168. #define CAM_CC_QDSS_DEBUG_BCR 7
  169. #define CAM_CC_SBI_BCR 8
  170. #define CAM_CC_SFE_0_BCR 9
  171. #define CAM_CC_SFE_1_BCR 10
  172. #endif