android_kernel_samsung_sm8650_ksu/include/dt-bindings/clock/qcom,camcc-anorak.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_ANORAK_H
#define _DT_BINDINGS_CLK_QCOM_CAM_CC_ANORAK_H

/* CAM_CC clocks */
#define CAM_CC_PLL0						0
#define CAM_CC_PLL0_OUT_EVEN					1
#define CAM_CC_PLL0_OUT_ODD					2
#define CAM_CC_PLL1						3
#define CAM_CC_PLL1_OUT_EVEN					4
#define CAM_CC_PLL2						5
#define CAM_CC_PLL2_OUT_EVEN					6
#define CAM_CC_PLL3						7
#define CAM_CC_PLL3_OUT_EVEN					8
#define CAM_CC_PLL4						9
#define CAM_CC_PLL4_OUT_EVEN					10
#define CAM_CC_PLL5						11
#define CAM_CC_PLL5_OUT_EVEN					12
#define CAM_CC_PLL6						13
#define CAM_CC_PLL6_OUT_EVEN					14
#define CAM_CC_PLL6_OUT_ODD					15
#define CAM_CC_BPS_AHB_CLK					16
#define CAM_CC_BPS_CLK						17
#define CAM_CC_BPS_CLK_SRC					18
#define CAM_CC_BPS_FAST_AHB_CLK					19
#define CAM_CC_CAMNOC_AHB_CLK					20
#define CAM_CC_CAMNOC_AXI_NRT_CLK				21
#define CAM_CC_CAMNOC_AXI_RT_CLK				22
#define CAM_CC_CAMNOC_AXI_RT_CLK_SRC				23
#define CAM_CC_CAMNOC_DCD_XO_CLK				24
#define CAM_CC_CAMNOC_XO_CLK					25
#define CAM_CC_CCI_0_CLK					26
#define CAM_CC_CCI_0_CLK_SRC					27
#define CAM_CC_CCI_1_CLK					28
#define CAM_CC_CCI_1_CLK_SRC					29
#define CAM_CC_CCI_2_CLK					30
#define CAM_CC_CCI_2_CLK_SRC					31
#define CAM_CC_CCI_3_CLK					32
#define CAM_CC_CCI_3_CLK_SRC					33
#define CAM_CC_CCI_4_CLK					34
#define CAM_CC_CCI_4_CLK_SRC					35
#define CAM_CC_CCI_5_CLK					36
#define CAM_CC_CCI_5_CLK_SRC					37
#define CAM_CC_CORE_AHB_CLK					38
#define CAM_CC_CPAS_AHB_CLK					39
#define CAM_CC_CPAS_BPS_CLK					40
#define CAM_CC_CPAS_FAST_AHB_CLK				41
#define CAM_CC_CPAS_IFE_0_CLK					42
#define CAM_CC_CPAS_IFE_1_CLK					43
#define CAM_CC_CPAS_IFE_LITE_CLK				44
#define CAM_CC_CPAS_IPE_NPS_CLK					45
#define CAM_CC_CPHY_RX_CLK_SRC					46
#define CAM_CC_CSI0PHYTIMER_CLK					47
#define CAM_CC_CSI0PHYTIMER_CLK_SRC				48
#define CAM_CC_CSI1PHYTIMER_CLK					49
#define CAM_CC_CSI1PHYTIMER_CLK_SRC				50
#define CAM_CC_CSI2PHYTIMER_CLK					51
#define CAM_CC_CSI2PHYTIMER_CLK_SRC				52
#define CAM_CC_CSI3PHYTIMER_CLK					53
#define CAM_CC_CSI3PHYTIMER_CLK_SRC				54
#define CAM_CC_CSI4PHYTIMER_CLK					55
#define CAM_CC_CSI4PHYTIMER_CLK_SRC				56
#define CAM_CC_CSI5PHYTIMER_CLK					57
#define CAM_CC_CSI5PHYTIMER_CLK_SRC				58
#define CAM_CC_CSI6PHYTIMER_CLK					59
#define CAM_CC_CSI6PHYTIMER_CLK_SRC				60
#define CAM_CC_CSID_CLK						61
#define CAM_CC_CSID_CLK_SRC					62
#define CAM_CC_CSID_CSIPHY_RX_CLK				63
#define CAM_CC_CSIPHY0_CLK					64
#define CAM_CC_CSIPHY1_CLK					65
#define CAM_CC_CSIPHY2_CLK					66
#define CAM_CC_CSIPHY3_CLK					67
#define CAM_CC_CSIPHY4_CLK					68
#define CAM_CC_CSIPHY5_CLK					69
#define CAM_CC_CSIPHY6_CLK					70
#define CAM_CC_DRV_AHB_CLK					71
#define CAM_CC_DRV_XO_CLK					72
#define CAM_CC_FAST_AHB_CLK_SRC					73
#define CAM_CC_GDSC_CLK						74
#define CAM_CC_ICP_AHB_CLK					75
#define CAM_CC_ICP_CLK						76
#define CAM_CC_ICP_CLK_SRC					77
#define CAM_CC_IFE_0_CLK					78
#define CAM_CC_IFE_0_CLK_SRC					79
#define CAM_CC_IFE_0_DSP_CLK					80
#define CAM_CC_IFE_0_FAST_AHB_CLK				81
#define CAM_CC_IFE_1_CLK					82
#define CAM_CC_IFE_1_CLK_SRC					83
#define CAM_CC_IFE_1_DSP_CLK					84
#define CAM_CC_IFE_1_FAST_AHB_CLK				85
#define CAM_CC_IFE_LITE_AHB_CLK					86
#define CAM_CC_IFE_LITE_CLK					87
#define CAM_CC_IFE_LITE_CLK_SRC					88
#define CAM_CC_IFE_LITE_CPHY_RX_CLK				89
#define CAM_CC_IFE_LITE_CSID_CLK				90
#define CAM_CC_IFE_LITE_CSID_CLK_SRC				91
#define CAM_CC_IPE_NPS_AHB_CLK					92
#define CAM_CC_IPE_NPS_CLK					93
#define CAM_CC_IPE_NPS_CLK_SRC					94
#define CAM_CC_IPE_NPS_FAST_AHB_CLK				95
#define CAM_CC_IPE_PPS_CLK					96
#define CAM_CC_IPE_PPS_FAST_AHB_CLK				97
#define CAM_CC_JPEG_1_CLK					98
#define CAM_CC_JPEG_2_CLK					99
#define CAM_CC_JPEG_CLK						100
#define CAM_CC_JPEG_CLK_SRC					101
#define CAM_CC_MCLK0_CLK					102
#define CAM_CC_MCLK0_CLK_SRC					103
#define CAM_CC_MCLK10_CLK					104
#define CAM_CC_MCLK10_CLK_SRC					105
#define CAM_CC_MCLK11_CLK					106
#define CAM_CC_MCLK11_CLK_SRC					107
#define CAM_CC_MCLK1_CLK					108
#define CAM_CC_MCLK1_CLK_SRC					109
#define CAM_CC_MCLK2_CLK					110
#define CAM_CC_MCLK2_CLK_SRC					111
#define CAM_CC_MCLK3_CLK					112
#define CAM_CC_MCLK3_CLK_SRC					113
#define CAM_CC_MCLK4_CLK					114
#define CAM_CC_MCLK4_CLK_SRC					115
#define CAM_CC_MCLK5_CLK					116
#define CAM_CC_MCLK5_CLK_SRC					117
#define CAM_CC_MCLK6_CLK					118
#define CAM_CC_MCLK6_CLK_SRC					119
#define CAM_CC_MCLK7_CLK					120
#define CAM_CC_MCLK7_CLK_SRC					121
#define CAM_CC_MCLK8_CLK					122
#define CAM_CC_MCLK8_CLK_SRC					123
#define CAM_CC_MCLK9_CLK					124
#define CAM_CC_MCLK9_CLK_SRC					125
#define CAM_CC_QDSS_DEBUG_CLK					126
#define CAM_CC_QDSS_DEBUG_CLK_SRC				127
#define CAM_CC_QDSS_DEBUG_XO_CLK				128
#define CAM_CC_SLEEP_CLK					129
#define CAM_CC_SLEEP_CLK_SRC					130
#define CAM_CC_SLOW_AHB_CLK_SRC					131
#define CAM_CC_XO_CLK_SRC					132

/* CAM_CC resets */
#define CAM_CC_BPS_BCR						0
#define CAM_CC_DRV_BCR						1
#define CAM_CC_ICP_BCR						2
#define CAM_CC_IFE_0_BCR					3
#define CAM_CC_IFE_1_BCR					4
#define CAM_CC_IPE_0_BCR					5
#define CAM_CC_QDSS_DEBUG_BCR					6

#endif