nuvoton,npcm845-clk.h 1.3 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2. /*
  3. * Copyright (C) 2021 Nuvoton Technologies.
  4. * Author: Tomer Maimon <[email protected]>
  5. *
  6. * Device Tree binding constants for NPCM8XX clock controller.
  7. */
  8. #ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H
  9. #define __DT_BINDINGS_CLOCK_NPCM8XX_H
  10. #define NPCM8XX_CLK_CPU 0
  11. #define NPCM8XX_CLK_GFX_PIXEL 1
  12. #define NPCM8XX_CLK_MC 2
  13. #define NPCM8XX_CLK_ADC 3
  14. #define NPCM8XX_CLK_AHB 4
  15. #define NPCM8XX_CLK_TIMER 5
  16. #define NPCM8XX_CLK_UART 6
  17. #define NPCM8XX_CLK_UART2 7
  18. #define NPCM8XX_CLK_MMC 8
  19. #define NPCM8XX_CLK_SPI3 9
  20. #define NPCM8XX_CLK_PCI 10
  21. #define NPCM8XX_CLK_AXI 11
  22. #define NPCM8XX_CLK_APB4 12
  23. #define NPCM8XX_CLK_APB3 13
  24. #define NPCM8XX_CLK_APB2 14
  25. #define NPCM8XX_CLK_APB1 15
  26. #define NPCM8XX_CLK_APB5 16
  27. #define NPCM8XX_CLK_CLKOUT 17
  28. #define NPCM8XX_CLK_GFX 18
  29. #define NPCM8XX_CLK_SU 19
  30. #define NPCM8XX_CLK_SU48 20
  31. #define NPCM8XX_CLK_SDHC 21
  32. #define NPCM8XX_CLK_SPI0 22
  33. #define NPCM8XX_CLK_SPI1 23
  34. #define NPCM8XX_CLK_SPIX 24
  35. #define NPCM8XX_CLK_RG 25
  36. #define NPCM8XX_CLK_RCP 26
  37. #define NPCM8XX_CLK_PRE_ADC 27
  38. #define NPCM8XX_CLK_ATB 28
  39. #define NPCM8XX_CLK_PRE_CLK 29
  40. #define NPCM8XX_CLK_TH 30
  41. #define NPCM8XX_CLK_REFCLK 31
  42. #define NPCM8XX_CLK_SYSBYPCK 32
  43. #define NPCM8XX_CLK_MCBYPCK 33
  44. #define NPCM8XX_NUM_CLOCKS (NPCM8XX_CLK_MCBYPCK + 1)
  45. #endif