i915_pciids.h 23 KB

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  1. /*
  2. * Copyright 2013 Intel Corporation
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial portions
  15. * of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. */
  25. #ifndef _I915_PCIIDS_H
  26. #define _I915_PCIIDS_H
  27. /*
  28. * A pci_device_id struct {
  29. * __u32 vendor, device;
  30. * __u32 subvendor, subdevice;
  31. * __u32 class, class_mask;
  32. * kernel_ulong_t driver_data;
  33. * };
  34. * Don't use C99 here because "class" is reserved and we want to
  35. * give userspace flexibility.
  36. */
  37. #define INTEL_VGA_DEVICE(id, info) { \
  38. 0x8086, id, \
  39. ~0, ~0, \
  40. 0x030000, 0xff0000, \
  41. (unsigned long) info }
  42. #define INTEL_QUANTA_VGA_DEVICE(info) { \
  43. 0x8086, 0x16a, \
  44. 0x152d, 0x8990, \
  45. 0x030000, 0xff0000, \
  46. (unsigned long) info }
  47. #define INTEL_I810_IDS(info) \
  48. INTEL_VGA_DEVICE(0x7121, info), /* I810 */ \
  49. INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */ \
  50. INTEL_VGA_DEVICE(0x7125, info) /* I810_E */
  51. #define INTEL_I815_IDS(info) \
  52. INTEL_VGA_DEVICE(0x1132, info) /* I815*/
  53. #define INTEL_I830_IDS(info) \
  54. INTEL_VGA_DEVICE(0x3577, info)
  55. #define INTEL_I845G_IDS(info) \
  56. INTEL_VGA_DEVICE(0x2562, info)
  57. #define INTEL_I85X_IDS(info) \
  58. INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
  59. INTEL_VGA_DEVICE(0x358e, info)
  60. #define INTEL_I865G_IDS(info) \
  61. INTEL_VGA_DEVICE(0x2572, info) /* I865_G */
  62. #define INTEL_I915G_IDS(info) \
  63. INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
  64. INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */
  65. #define INTEL_I915GM_IDS(info) \
  66. INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */
  67. #define INTEL_I945G_IDS(info) \
  68. INTEL_VGA_DEVICE(0x2772, info) /* I945_G */
  69. #define INTEL_I945GM_IDS(info) \
  70. INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
  71. INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */
  72. #define INTEL_I965G_IDS(info) \
  73. INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \
  74. INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \
  75. INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \
  76. INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */
  77. #define INTEL_G33_IDS(info) \
  78. INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
  79. INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \
  80. INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */
  81. #define INTEL_I965GM_IDS(info) \
  82. INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \
  83. INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */
  84. #define INTEL_GM45_IDS(info) \
  85. INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */
  86. #define INTEL_G45_IDS(info) \
  87. INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
  88. INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
  89. INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
  90. INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
  91. INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
  92. INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */
  93. #define INTEL_PINEVIEW_G_IDS(info) \
  94. INTEL_VGA_DEVICE(0xa001, info)
  95. #define INTEL_PINEVIEW_M_IDS(info) \
  96. INTEL_VGA_DEVICE(0xa011, info)
  97. #define INTEL_IRONLAKE_D_IDS(info) \
  98. INTEL_VGA_DEVICE(0x0042, info)
  99. #define INTEL_IRONLAKE_M_IDS(info) \
  100. INTEL_VGA_DEVICE(0x0046, info)
  101. #define INTEL_SNB_D_GT1_IDS(info) \
  102. INTEL_VGA_DEVICE(0x0102, info), \
  103. INTEL_VGA_DEVICE(0x010A, info)
  104. #define INTEL_SNB_D_GT2_IDS(info) \
  105. INTEL_VGA_DEVICE(0x0112, info), \
  106. INTEL_VGA_DEVICE(0x0122, info)
  107. #define INTEL_SNB_D_IDS(info) \
  108. INTEL_SNB_D_GT1_IDS(info), \
  109. INTEL_SNB_D_GT2_IDS(info)
  110. #define INTEL_SNB_M_GT1_IDS(info) \
  111. INTEL_VGA_DEVICE(0x0106, info)
  112. #define INTEL_SNB_M_GT2_IDS(info) \
  113. INTEL_VGA_DEVICE(0x0116, info), \
  114. INTEL_VGA_DEVICE(0x0126, info)
  115. #define INTEL_SNB_M_IDS(info) \
  116. INTEL_SNB_M_GT1_IDS(info), \
  117. INTEL_SNB_M_GT2_IDS(info)
  118. #define INTEL_IVB_M_GT1_IDS(info) \
  119. INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
  120. #define INTEL_IVB_M_GT2_IDS(info) \
  121. INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */
  122. #define INTEL_IVB_M_IDS(info) \
  123. INTEL_IVB_M_GT1_IDS(info), \
  124. INTEL_IVB_M_GT2_IDS(info)
  125. #define INTEL_IVB_D_GT1_IDS(info) \
  126. INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
  127. INTEL_VGA_DEVICE(0x015a, info) /* GT1 server */
  128. #define INTEL_IVB_D_GT2_IDS(info) \
  129. INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
  130. INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */
  131. #define INTEL_IVB_D_IDS(info) \
  132. INTEL_IVB_D_GT1_IDS(info), \
  133. INTEL_IVB_D_GT2_IDS(info)
  134. #define INTEL_IVB_Q_IDS(info) \
  135. INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
  136. #define INTEL_HSW_ULT_GT1_IDS(info) \
  137. INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
  138. INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
  139. INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
  140. INTEL_VGA_DEVICE(0x0A0B, info) /* ULT GT1 reserved */
  141. #define INTEL_HSW_ULX_GT1_IDS(info) \
  142. INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
  143. #define INTEL_HSW_GT1_IDS(info) \
  144. INTEL_HSW_ULT_GT1_IDS(info), \
  145. INTEL_HSW_ULX_GT1_IDS(info), \
  146. INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
  147. INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
  148. INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
  149. INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
  150. INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
  151. INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
  152. INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
  153. INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
  154. INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
  155. INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
  156. INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
  157. INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
  158. INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
  159. INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
  160. INTEL_VGA_DEVICE(0x0D0E, info) /* CRW GT1 reserved */
  161. #define INTEL_HSW_ULT_GT2_IDS(info) \
  162. INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
  163. INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
  164. INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
  165. INTEL_VGA_DEVICE(0x0A1B, info) /* ULT GT2 reserved */ \
  166. #define INTEL_HSW_ULX_GT2_IDS(info) \
  167. INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
  168. #define INTEL_HSW_GT2_IDS(info) \
  169. INTEL_HSW_ULT_GT2_IDS(info), \
  170. INTEL_HSW_ULX_GT2_IDS(info), \
  171. INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
  172. INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
  173. INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
  174. INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
  175. INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
  176. INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
  177. INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
  178. INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
  179. INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
  180. INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
  181. INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
  182. INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
  183. INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
  184. INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
  185. INTEL_VGA_DEVICE(0x0D1E, info) /* CRW GT2 reserved */
  186. #define INTEL_HSW_ULT_GT3_IDS(info) \
  187. INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
  188. INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
  189. INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
  190. INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
  191. INTEL_VGA_DEVICE(0x0A2E, info) /* ULT GT3 reserved */
  192. #define INTEL_HSW_GT3_IDS(info) \
  193. INTEL_HSW_ULT_GT3_IDS(info), \
  194. INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
  195. INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
  196. INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
  197. INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
  198. INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
  199. INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
  200. INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
  201. INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
  202. INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
  203. INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
  204. INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
  205. INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
  206. INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
  207. INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
  208. INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */
  209. #define INTEL_HSW_IDS(info) \
  210. INTEL_HSW_GT1_IDS(info), \
  211. INTEL_HSW_GT2_IDS(info), \
  212. INTEL_HSW_GT3_IDS(info)
  213. #define INTEL_VLV_IDS(info) \
  214. INTEL_VGA_DEVICE(0x0f30, info), \
  215. INTEL_VGA_DEVICE(0x0f31, info), \
  216. INTEL_VGA_DEVICE(0x0f32, info), \
  217. INTEL_VGA_DEVICE(0x0f33, info)
  218. #define INTEL_BDW_ULT_GT1_IDS(info) \
  219. INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
  220. INTEL_VGA_DEVICE(0x160B, info) /* GT1 Iris */
  221. #define INTEL_BDW_ULX_GT1_IDS(info) \
  222. INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
  223. #define INTEL_BDW_GT1_IDS(info) \
  224. INTEL_BDW_ULT_GT1_IDS(info), \
  225. INTEL_BDW_ULX_GT1_IDS(info), \
  226. INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
  227. INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
  228. INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */
  229. #define INTEL_BDW_ULT_GT2_IDS(info) \
  230. INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
  231. INTEL_VGA_DEVICE(0x161B, info) /* GT2 ULT */
  232. #define INTEL_BDW_ULX_GT2_IDS(info) \
  233. INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
  234. #define INTEL_BDW_GT2_IDS(info) \
  235. INTEL_BDW_ULT_GT2_IDS(info), \
  236. INTEL_BDW_ULX_GT2_IDS(info), \
  237. INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
  238. INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
  239. INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
  240. #define INTEL_BDW_ULT_GT3_IDS(info) \
  241. INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
  242. INTEL_VGA_DEVICE(0x162B, info) /* Iris */ \
  243. #define INTEL_BDW_ULX_GT3_IDS(info) \
  244. INTEL_VGA_DEVICE(0x162E, info) /* ULX */
  245. #define INTEL_BDW_GT3_IDS(info) \
  246. INTEL_BDW_ULT_GT3_IDS(info), \
  247. INTEL_BDW_ULX_GT3_IDS(info), \
  248. INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
  249. INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
  250. INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
  251. #define INTEL_BDW_ULT_RSVD_IDS(info) \
  252. INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
  253. INTEL_VGA_DEVICE(0x163B, info) /* Iris */
  254. #define INTEL_BDW_ULX_RSVD_IDS(info) \
  255. INTEL_VGA_DEVICE(0x163E, info) /* ULX */
  256. #define INTEL_BDW_RSVD_IDS(info) \
  257. INTEL_BDW_ULT_RSVD_IDS(info), \
  258. INTEL_BDW_ULX_RSVD_IDS(info), \
  259. INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
  260. INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
  261. INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
  262. #define INTEL_BDW_IDS(info) \
  263. INTEL_BDW_GT1_IDS(info), \
  264. INTEL_BDW_GT2_IDS(info), \
  265. INTEL_BDW_GT3_IDS(info), \
  266. INTEL_BDW_RSVD_IDS(info)
  267. #define INTEL_CHV_IDS(info) \
  268. INTEL_VGA_DEVICE(0x22b0, info), \
  269. INTEL_VGA_DEVICE(0x22b1, info), \
  270. INTEL_VGA_DEVICE(0x22b2, info), \
  271. INTEL_VGA_DEVICE(0x22b3, info)
  272. #define INTEL_SKL_ULT_GT1_IDS(info) \
  273. INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
  274. INTEL_VGA_DEVICE(0x1913, info) /* ULT GT1.5 */
  275. #define INTEL_SKL_ULX_GT1_IDS(info) \
  276. INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
  277. INTEL_VGA_DEVICE(0x1915, info) /* ULX GT1.5 */
  278. #define INTEL_SKL_GT1_IDS(info) \
  279. INTEL_SKL_ULT_GT1_IDS(info), \
  280. INTEL_SKL_ULX_GT1_IDS(info), \
  281. INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \
  282. INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
  283. INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
  284. INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */
  285. #define INTEL_SKL_ULT_GT2_IDS(info) \
  286. INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
  287. INTEL_VGA_DEVICE(0x1921, info) /* ULT GT2F */
  288. #define INTEL_SKL_ULX_GT2_IDS(info) \
  289. INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
  290. #define INTEL_SKL_GT2_IDS(info) \
  291. INTEL_SKL_ULT_GT2_IDS(info), \
  292. INTEL_SKL_ULX_GT2_IDS(info), \
  293. INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \
  294. INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
  295. INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
  296. INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */
  297. #define INTEL_SKL_ULT_GT3_IDS(info) \
  298. INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
  299. INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \
  300. INTEL_VGA_DEVICE(0x1927, info) /* ULT GT3e */
  301. #define INTEL_SKL_GT3_IDS(info) \
  302. INTEL_SKL_ULT_GT3_IDS(info), \
  303. INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
  304. INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \
  305. INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3e */
  306. #define INTEL_SKL_GT4_IDS(info) \
  307. INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
  308. INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
  309. INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
  310. INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
  311. #define INTEL_SKL_IDS(info) \
  312. INTEL_SKL_GT1_IDS(info), \
  313. INTEL_SKL_GT2_IDS(info), \
  314. INTEL_SKL_GT3_IDS(info), \
  315. INTEL_SKL_GT4_IDS(info)
  316. #define INTEL_BXT_IDS(info) \
  317. INTEL_VGA_DEVICE(0x0A84, info), \
  318. INTEL_VGA_DEVICE(0x1A84, info), \
  319. INTEL_VGA_DEVICE(0x1A85, info), \
  320. INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
  321. INTEL_VGA_DEVICE(0x5A85, info) /* APL HD Graphics 500 */
  322. #define INTEL_GLK_IDS(info) \
  323. INTEL_VGA_DEVICE(0x3184, info), \
  324. INTEL_VGA_DEVICE(0x3185, info)
  325. #define INTEL_KBL_ULT_GT1_IDS(info) \
  326. INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
  327. INTEL_VGA_DEVICE(0x5913, info) /* ULT GT1.5 */
  328. #define INTEL_KBL_ULX_GT1_IDS(info) \
  329. INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
  330. INTEL_VGA_DEVICE(0x5915, info) /* ULX GT1.5 */
  331. #define INTEL_KBL_GT1_IDS(info) \
  332. INTEL_KBL_ULT_GT1_IDS(info), \
  333. INTEL_KBL_ULX_GT1_IDS(info), \
  334. INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \
  335. INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
  336. INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \
  337. INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */
  338. #define INTEL_KBL_ULT_GT2_IDS(info) \
  339. INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
  340. INTEL_VGA_DEVICE(0x5921, info) /* ULT GT2F */
  341. #define INTEL_KBL_ULX_GT2_IDS(info) \
  342. INTEL_VGA_DEVICE(0x591E, info) /* ULX GT2 */
  343. #define INTEL_KBL_GT2_IDS(info) \
  344. INTEL_KBL_ULT_GT2_IDS(info), \
  345. INTEL_KBL_ULX_GT2_IDS(info), \
  346. INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \
  347. INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
  348. INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
  349. INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
  350. INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
  351. #define INTEL_KBL_ULT_GT3_IDS(info) \
  352. INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
  353. #define INTEL_KBL_GT3_IDS(info) \
  354. INTEL_KBL_ULT_GT3_IDS(info), \
  355. INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
  356. INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
  357. #define INTEL_KBL_GT4_IDS(info) \
  358. INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
  359. /* AML/KBL Y GT2 */
  360. #define INTEL_AML_KBL_GT2_IDS(info) \
  361. INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
  362. INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
  363. /* AML/CFL Y GT2 */
  364. #define INTEL_AML_CFL_GT2_IDS(info) \
  365. INTEL_VGA_DEVICE(0x87CA, info)
  366. /* CML GT1 */
  367. #define INTEL_CML_GT1_IDS(info) \
  368. INTEL_VGA_DEVICE(0x9BA2, info), \
  369. INTEL_VGA_DEVICE(0x9BA4, info), \
  370. INTEL_VGA_DEVICE(0x9BA5, info), \
  371. INTEL_VGA_DEVICE(0x9BA8, info)
  372. #define INTEL_CML_U_GT1_IDS(info) \
  373. INTEL_VGA_DEVICE(0x9B21, info), \
  374. INTEL_VGA_DEVICE(0x9BAA, info), \
  375. INTEL_VGA_DEVICE(0x9BAC, info)
  376. /* CML GT2 */
  377. #define INTEL_CML_GT2_IDS(info) \
  378. INTEL_VGA_DEVICE(0x9BC2, info), \
  379. INTEL_VGA_DEVICE(0x9BC4, info), \
  380. INTEL_VGA_DEVICE(0x9BC5, info), \
  381. INTEL_VGA_DEVICE(0x9BC6, info), \
  382. INTEL_VGA_DEVICE(0x9BC8, info), \
  383. INTEL_VGA_DEVICE(0x9BE6, info), \
  384. INTEL_VGA_DEVICE(0x9BF6, info)
  385. #define INTEL_CML_U_GT2_IDS(info) \
  386. INTEL_VGA_DEVICE(0x9B41, info), \
  387. INTEL_VGA_DEVICE(0x9BCA, info), \
  388. INTEL_VGA_DEVICE(0x9BCC, info)
  389. #define INTEL_KBL_IDS(info) \
  390. INTEL_KBL_GT1_IDS(info), \
  391. INTEL_KBL_GT2_IDS(info), \
  392. INTEL_KBL_GT3_IDS(info), \
  393. INTEL_KBL_GT4_IDS(info), \
  394. INTEL_AML_KBL_GT2_IDS(info)
  395. /* CFL S */
  396. #define INTEL_CFL_S_GT1_IDS(info) \
  397. INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
  398. INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
  399. INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */
  400. #define INTEL_CFL_S_GT2_IDS(info) \
  401. INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
  402. INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
  403. INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
  404. INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
  405. INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
  406. /* CFL H */
  407. #define INTEL_CFL_H_GT1_IDS(info) \
  408. INTEL_VGA_DEVICE(0x3E9C, info)
  409. #define INTEL_CFL_H_GT2_IDS(info) \
  410. INTEL_VGA_DEVICE(0x3E94, info), /* Halo GT2 */ \
  411. INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */
  412. /* CFL U GT2 */
  413. #define INTEL_CFL_U_GT2_IDS(info) \
  414. INTEL_VGA_DEVICE(0x3EA9, info)
  415. /* CFL U GT3 */
  416. #define INTEL_CFL_U_GT3_IDS(info) \
  417. INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
  418. INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
  419. INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
  420. INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
  421. /* WHL/CFL U GT1 */
  422. #define INTEL_WHL_U_GT1_IDS(info) \
  423. INTEL_VGA_DEVICE(0x3EA1, info), \
  424. INTEL_VGA_DEVICE(0x3EA4, info)
  425. /* WHL/CFL U GT2 */
  426. #define INTEL_WHL_U_GT2_IDS(info) \
  427. INTEL_VGA_DEVICE(0x3EA0, info), \
  428. INTEL_VGA_DEVICE(0x3EA3, info)
  429. /* WHL/CFL U GT3 */
  430. #define INTEL_WHL_U_GT3_IDS(info) \
  431. INTEL_VGA_DEVICE(0x3EA2, info)
  432. #define INTEL_CFL_IDS(info) \
  433. INTEL_CFL_S_GT1_IDS(info), \
  434. INTEL_CFL_S_GT2_IDS(info), \
  435. INTEL_CFL_H_GT1_IDS(info), \
  436. INTEL_CFL_H_GT2_IDS(info), \
  437. INTEL_CFL_U_GT2_IDS(info), \
  438. INTEL_CFL_U_GT3_IDS(info), \
  439. INTEL_WHL_U_GT1_IDS(info), \
  440. INTEL_WHL_U_GT2_IDS(info), \
  441. INTEL_WHL_U_GT3_IDS(info), \
  442. INTEL_AML_CFL_GT2_IDS(info), \
  443. INTEL_CML_GT1_IDS(info), \
  444. INTEL_CML_GT2_IDS(info), \
  445. INTEL_CML_U_GT1_IDS(info), \
  446. INTEL_CML_U_GT2_IDS(info)
  447. /* CNL */
  448. #define INTEL_CNL_PORT_F_IDS(info) \
  449. INTEL_VGA_DEVICE(0x5A44, info), \
  450. INTEL_VGA_DEVICE(0x5A4C, info), \
  451. INTEL_VGA_DEVICE(0x5A54, info), \
  452. INTEL_VGA_DEVICE(0x5A5C, info)
  453. #define INTEL_CNL_IDS(info) \
  454. INTEL_CNL_PORT_F_IDS(info), \
  455. INTEL_VGA_DEVICE(0x5A40, info), \
  456. INTEL_VGA_DEVICE(0x5A41, info), \
  457. INTEL_VGA_DEVICE(0x5A42, info), \
  458. INTEL_VGA_DEVICE(0x5A49, info), \
  459. INTEL_VGA_DEVICE(0x5A4A, info), \
  460. INTEL_VGA_DEVICE(0x5A50, info), \
  461. INTEL_VGA_DEVICE(0x5A51, info), \
  462. INTEL_VGA_DEVICE(0x5A52, info), \
  463. INTEL_VGA_DEVICE(0x5A59, info), \
  464. INTEL_VGA_DEVICE(0x5A5A, info)
  465. /* ICL */
  466. #define INTEL_ICL_PORT_F_IDS(info) \
  467. INTEL_VGA_DEVICE(0x8A50, info), \
  468. INTEL_VGA_DEVICE(0x8A52, info), \
  469. INTEL_VGA_DEVICE(0x8A53, info), \
  470. INTEL_VGA_DEVICE(0x8A54, info), \
  471. INTEL_VGA_DEVICE(0x8A56, info), \
  472. INTEL_VGA_DEVICE(0x8A57, info), \
  473. INTEL_VGA_DEVICE(0x8A58, info), \
  474. INTEL_VGA_DEVICE(0x8A59, info), \
  475. INTEL_VGA_DEVICE(0x8A5A, info), \
  476. INTEL_VGA_DEVICE(0x8A5B, info), \
  477. INTEL_VGA_DEVICE(0x8A5C, info), \
  478. INTEL_VGA_DEVICE(0x8A70, info), \
  479. INTEL_VGA_DEVICE(0x8A71, info)
  480. #define INTEL_ICL_11_IDS(info) \
  481. INTEL_ICL_PORT_F_IDS(info), \
  482. INTEL_VGA_DEVICE(0x8A51, info), \
  483. INTEL_VGA_DEVICE(0x8A5D, info)
  484. /* EHL */
  485. #define INTEL_EHL_IDS(info) \
  486. INTEL_VGA_DEVICE(0x4541, info), \
  487. INTEL_VGA_DEVICE(0x4551, info), \
  488. INTEL_VGA_DEVICE(0x4555, info), \
  489. INTEL_VGA_DEVICE(0x4557, info), \
  490. INTEL_VGA_DEVICE(0x4571, info)
  491. /* JSL */
  492. #define INTEL_JSL_IDS(info) \
  493. INTEL_VGA_DEVICE(0x4E51, info), \
  494. INTEL_VGA_DEVICE(0x4E55, info), \
  495. INTEL_VGA_DEVICE(0x4E57, info), \
  496. INTEL_VGA_DEVICE(0x4E61, info), \
  497. INTEL_VGA_DEVICE(0x4E71, info)
  498. /* TGL */
  499. #define INTEL_TGL_12_GT1_IDS(info) \
  500. INTEL_VGA_DEVICE(0x9A60, info), \
  501. INTEL_VGA_DEVICE(0x9A68, info), \
  502. INTEL_VGA_DEVICE(0x9A70, info)
  503. #define INTEL_TGL_12_GT2_IDS(info) \
  504. INTEL_VGA_DEVICE(0x9A40, info), \
  505. INTEL_VGA_DEVICE(0x9A49, info), \
  506. INTEL_VGA_DEVICE(0x9A59, info), \
  507. INTEL_VGA_DEVICE(0x9A78, info), \
  508. INTEL_VGA_DEVICE(0x9AC0, info), \
  509. INTEL_VGA_DEVICE(0x9AC9, info), \
  510. INTEL_VGA_DEVICE(0x9AD9, info), \
  511. INTEL_VGA_DEVICE(0x9AF8, info)
  512. #define INTEL_TGL_12_IDS(info) \
  513. INTEL_TGL_12_GT1_IDS(info), \
  514. INTEL_TGL_12_GT2_IDS(info)
  515. /* RKL */
  516. #define INTEL_RKL_IDS(info) \
  517. INTEL_VGA_DEVICE(0x4C80, info), \
  518. INTEL_VGA_DEVICE(0x4C8A, info), \
  519. INTEL_VGA_DEVICE(0x4C8B, info), \
  520. INTEL_VGA_DEVICE(0x4C8C, info), \
  521. INTEL_VGA_DEVICE(0x4C90, info), \
  522. INTEL_VGA_DEVICE(0x4C9A, info)
  523. /* DG1 */
  524. #define INTEL_DG1_IDS(info) \
  525. INTEL_VGA_DEVICE(0x4905, info), \
  526. INTEL_VGA_DEVICE(0x4906, info), \
  527. INTEL_VGA_DEVICE(0x4907, info), \
  528. INTEL_VGA_DEVICE(0x4908, info), \
  529. INTEL_VGA_DEVICE(0x4909, info)
  530. /* ADL-S */
  531. #define INTEL_ADLS_IDS(info) \
  532. INTEL_VGA_DEVICE(0x4680, info), \
  533. INTEL_VGA_DEVICE(0x4682, info), \
  534. INTEL_VGA_DEVICE(0x4688, info), \
  535. INTEL_VGA_DEVICE(0x468A, info), \
  536. INTEL_VGA_DEVICE(0x468B, info), \
  537. INTEL_VGA_DEVICE(0x4690, info), \
  538. INTEL_VGA_DEVICE(0x4692, info), \
  539. INTEL_VGA_DEVICE(0x4693, info)
  540. /* ADL-P */
  541. #define INTEL_ADLP_IDS(info) \
  542. INTEL_VGA_DEVICE(0x46A0, info), \
  543. INTEL_VGA_DEVICE(0x46A1, info), \
  544. INTEL_VGA_DEVICE(0x46A2, info), \
  545. INTEL_VGA_DEVICE(0x46A3, info), \
  546. INTEL_VGA_DEVICE(0x46A6, info), \
  547. INTEL_VGA_DEVICE(0x46A8, info), \
  548. INTEL_VGA_DEVICE(0x46AA, info), \
  549. INTEL_VGA_DEVICE(0x462A, info), \
  550. INTEL_VGA_DEVICE(0x4626, info), \
  551. INTEL_VGA_DEVICE(0x4628, info), \
  552. INTEL_VGA_DEVICE(0x46B0, info), \
  553. INTEL_VGA_DEVICE(0x46B1, info), \
  554. INTEL_VGA_DEVICE(0x46B2, info), \
  555. INTEL_VGA_DEVICE(0x46B3, info), \
  556. INTEL_VGA_DEVICE(0x46C0, info), \
  557. INTEL_VGA_DEVICE(0x46C1, info), \
  558. INTEL_VGA_DEVICE(0x46C2, info), \
  559. INTEL_VGA_DEVICE(0x46C3, info)
  560. /* ADL-N */
  561. #define INTEL_ADLN_IDS(info) \
  562. INTEL_VGA_DEVICE(0x46D0, info), \
  563. INTEL_VGA_DEVICE(0x46D1, info), \
  564. INTEL_VGA_DEVICE(0x46D2, info)
  565. /* RPL-S */
  566. #define INTEL_RPLS_IDS(info) \
  567. INTEL_VGA_DEVICE(0xA780, info), \
  568. INTEL_VGA_DEVICE(0xA781, info), \
  569. INTEL_VGA_DEVICE(0xA782, info), \
  570. INTEL_VGA_DEVICE(0xA783, info), \
  571. INTEL_VGA_DEVICE(0xA788, info), \
  572. INTEL_VGA_DEVICE(0xA789, info), \
  573. INTEL_VGA_DEVICE(0xA78A, info), \
  574. INTEL_VGA_DEVICE(0xA78B, info)
  575. /* RPL-P */
  576. #define INTEL_RPLP_IDS(info) \
  577. INTEL_VGA_DEVICE(0xA720, info), \
  578. INTEL_VGA_DEVICE(0xA721, info), \
  579. INTEL_VGA_DEVICE(0xA7A0, info), \
  580. INTEL_VGA_DEVICE(0xA7A1, info), \
  581. INTEL_VGA_DEVICE(0xA7A8, info), \
  582. INTEL_VGA_DEVICE(0xA7A9, info)
  583. /* DG2 */
  584. #define INTEL_DG2_G10_IDS(info) \
  585. INTEL_VGA_DEVICE(0x5690, info), \
  586. INTEL_VGA_DEVICE(0x5691, info), \
  587. INTEL_VGA_DEVICE(0x5692, info), \
  588. INTEL_VGA_DEVICE(0x56A0, info), \
  589. INTEL_VGA_DEVICE(0x56A1, info), \
  590. INTEL_VGA_DEVICE(0x56A2, info)
  591. #define INTEL_DG2_G11_IDS(info) \
  592. INTEL_VGA_DEVICE(0x5693, info), \
  593. INTEL_VGA_DEVICE(0x5694, info), \
  594. INTEL_VGA_DEVICE(0x5695, info), \
  595. INTEL_VGA_DEVICE(0x56A5, info), \
  596. INTEL_VGA_DEVICE(0x56A6, info), \
  597. INTEL_VGA_DEVICE(0x56B0, info), \
  598. INTEL_VGA_DEVICE(0x56B1, info)
  599. #define INTEL_DG2_G12_IDS(info) \
  600. INTEL_VGA_DEVICE(0x5696, info), \
  601. INTEL_VGA_DEVICE(0x5697, info), \
  602. INTEL_VGA_DEVICE(0x56A3, info), \
  603. INTEL_VGA_DEVICE(0x56A4, info), \
  604. INTEL_VGA_DEVICE(0x56B2, info), \
  605. INTEL_VGA_DEVICE(0x56B3, info)
  606. #define INTEL_DG2_IDS(info) \
  607. INTEL_DG2_G10_IDS(info), \
  608. INTEL_DG2_G11_IDS(info), \
  609. INTEL_DG2_G12_IDS(info)
  610. #define INTEL_ATS_M150_IDS(info) \
  611. INTEL_VGA_DEVICE(0x56C0, info)
  612. #define INTEL_ATS_M75_IDS(info) \
  613. INTEL_VGA_DEVICE(0x56C1, info)
  614. #define INTEL_ATS_M_IDS(info) \
  615. INTEL_ATS_M150_IDS(info), \
  616. INTEL_ATS_M75_IDS(info)
  617. /* MTL */
  618. #define INTEL_MTL_M_IDS(info) \
  619. INTEL_VGA_DEVICE(0x7D40, info), \
  620. INTEL_VGA_DEVICE(0x7D60, info)
  621. #define INTEL_MTL_P_IDS(info) \
  622. INTEL_VGA_DEVICE(0x7D45, info), \
  623. INTEL_VGA_DEVICE(0x7D55, info), \
  624. INTEL_VGA_DEVICE(0x7DD5, info)
  625. #define INTEL_MTL_IDS(info) \
  626. INTEL_MTL_M_IDS(info), \
  627. INTEL_MTL_P_IDS(info)
  628. #endif /* _I915_PCIIDS_H */