isp1760-udc.c 38 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the NXP ISP1761 device controller
  4. *
  5. * Copyright 2021 Linaro, Rui Miguel Silva
  6. * Copyright 2014 Ideas on Board Oy
  7. *
  8. * Contacts:
  9. * Laurent Pinchart <[email protected]>
  10. * Rui Miguel Silva <[email protected]>
  11. */
  12. #include <linux/interrupt.h>
  13. #include <linux/io.h>
  14. #include <linux/kernel.h>
  15. #include <linux/list.h>
  16. #include <linux/module.h>
  17. #include <linux/slab.h>
  18. #include <linux/timer.h>
  19. #include <linux/usb.h>
  20. #include "isp1760-core.h"
  21. #include "isp1760-regs.h"
  22. #include "isp1760-udc.h"
  23. #define ISP1760_VBUS_POLL_INTERVAL msecs_to_jiffies(500)
  24. struct isp1760_request {
  25. struct usb_request req;
  26. struct list_head queue;
  27. struct isp1760_ep *ep;
  28. unsigned int packet_size;
  29. };
  30. static inline struct isp1760_udc *gadget_to_udc(struct usb_gadget *gadget)
  31. {
  32. return container_of(gadget, struct isp1760_udc, gadget);
  33. }
  34. static inline struct isp1760_ep *ep_to_udc_ep(struct usb_ep *ep)
  35. {
  36. return container_of(ep, struct isp1760_ep, ep);
  37. }
  38. static inline struct isp1760_request *req_to_udc_req(struct usb_request *req)
  39. {
  40. return container_of(req, struct isp1760_request, req);
  41. }
  42. static u32 isp1760_udc_read(struct isp1760_udc *udc, u16 field)
  43. {
  44. return isp1760_field_read(udc->fields, field);
  45. }
  46. static void isp1760_udc_write(struct isp1760_udc *udc, u16 field, u32 val)
  47. {
  48. isp1760_field_write(udc->fields, field, val);
  49. }
  50. static u32 isp1760_udc_read_raw(struct isp1760_udc *udc, u16 reg)
  51. {
  52. __le32 val;
  53. regmap_raw_read(udc->regs, reg, &val, 4);
  54. return le32_to_cpu(val);
  55. }
  56. static u16 isp1760_udc_read_raw16(struct isp1760_udc *udc, u16 reg)
  57. {
  58. __le16 val;
  59. regmap_raw_read(udc->regs, reg, &val, 2);
  60. return le16_to_cpu(val);
  61. }
  62. static void isp1760_udc_write_raw(struct isp1760_udc *udc, u16 reg, u32 val)
  63. {
  64. __le32 val_le = cpu_to_le32(val);
  65. regmap_raw_write(udc->regs, reg, &val_le, 4);
  66. }
  67. static void isp1760_udc_write_raw16(struct isp1760_udc *udc, u16 reg, u16 val)
  68. {
  69. __le16 val_le = cpu_to_le16(val);
  70. regmap_raw_write(udc->regs, reg, &val_le, 2);
  71. }
  72. static void isp1760_udc_set(struct isp1760_udc *udc, u32 field)
  73. {
  74. isp1760_udc_write(udc, field, 0xFFFFFFFF);
  75. }
  76. static void isp1760_udc_clear(struct isp1760_udc *udc, u32 field)
  77. {
  78. isp1760_udc_write(udc, field, 0);
  79. }
  80. static bool isp1760_udc_is_set(struct isp1760_udc *udc, u32 field)
  81. {
  82. return !!isp1760_udc_read(udc, field);
  83. }
  84. /* -----------------------------------------------------------------------------
  85. * Endpoint Management
  86. */
  87. static struct isp1760_ep *isp1760_udc_find_ep(struct isp1760_udc *udc,
  88. u16 index)
  89. {
  90. unsigned int i;
  91. if (index == 0)
  92. return &udc->ep[0];
  93. for (i = 1; i < ARRAY_SIZE(udc->ep); ++i) {
  94. if (udc->ep[i].addr == index)
  95. return udc->ep[i].desc ? &udc->ep[i] : NULL;
  96. }
  97. return NULL;
  98. }
  99. static void __isp1760_udc_select_ep(struct isp1760_udc *udc,
  100. struct isp1760_ep *ep, int dir)
  101. {
  102. isp1760_udc_write(udc, DC_ENDPIDX, ep->addr & USB_ENDPOINT_NUMBER_MASK);
  103. if (dir == USB_DIR_IN)
  104. isp1760_udc_set(udc, DC_EPDIR);
  105. else
  106. isp1760_udc_clear(udc, DC_EPDIR);
  107. }
  108. /**
  109. * isp1760_udc_select_ep - Select an endpoint for register access
  110. * @ep: The endpoint
  111. * @udc: Reference to the device controller
  112. *
  113. * The ISP1761 endpoint registers are banked. This function selects the target
  114. * endpoint for banked register access. The selection remains valid until the
  115. * next call to this function, the next direct access to the EPINDEX register
  116. * or the next reset, whichever comes first.
  117. *
  118. * Called with the UDC spinlock held.
  119. */
  120. static void isp1760_udc_select_ep(struct isp1760_udc *udc,
  121. struct isp1760_ep *ep)
  122. {
  123. __isp1760_udc_select_ep(udc, ep, ep->addr & USB_ENDPOINT_DIR_MASK);
  124. }
  125. /* Called with the UDC spinlock held. */
  126. static void isp1760_udc_ctrl_send_status(struct isp1760_ep *ep, int dir)
  127. {
  128. struct isp1760_udc *udc = ep->udc;
  129. /*
  130. * Proceed to the status stage. The status stage data packet flows in
  131. * the direction opposite to the data stage data packets, we thus need
  132. * to select the OUT/IN endpoint for IN/OUT transfers.
  133. */
  134. if (dir == USB_DIR_IN)
  135. isp1760_udc_clear(udc, DC_EPDIR);
  136. else
  137. isp1760_udc_set(udc, DC_EPDIR);
  138. isp1760_udc_write(udc, DC_ENDPIDX, 1);
  139. isp1760_udc_set(udc, DC_STATUS);
  140. /*
  141. * The hardware will terminate the request automatically and go back to
  142. * the setup stage without notifying us.
  143. */
  144. udc->ep0_state = ISP1760_CTRL_SETUP;
  145. }
  146. /* Called without the UDC spinlock held. */
  147. static void isp1760_udc_request_complete(struct isp1760_ep *ep,
  148. struct isp1760_request *req,
  149. int status)
  150. {
  151. struct isp1760_udc *udc = ep->udc;
  152. unsigned long flags;
  153. dev_dbg(ep->udc->isp->dev, "completing request %p with status %d\n",
  154. req, status);
  155. req->ep = NULL;
  156. req->req.status = status;
  157. req->req.complete(&ep->ep, &req->req);
  158. spin_lock_irqsave(&udc->lock, flags);
  159. /*
  160. * When completing control OUT requests, move to the status stage after
  161. * calling the request complete callback. This gives the gadget an
  162. * opportunity to stall the control transfer if needed.
  163. */
  164. if (status == 0 && ep->addr == 0 && udc->ep0_dir == USB_DIR_OUT)
  165. isp1760_udc_ctrl_send_status(ep, USB_DIR_OUT);
  166. spin_unlock_irqrestore(&udc->lock, flags);
  167. }
  168. static void isp1760_udc_ctrl_send_stall(struct isp1760_ep *ep)
  169. {
  170. struct isp1760_udc *udc = ep->udc;
  171. unsigned long flags;
  172. dev_dbg(ep->udc->isp->dev, "%s(ep%02x)\n", __func__, ep->addr);
  173. spin_lock_irqsave(&udc->lock, flags);
  174. /* Stall both the IN and OUT endpoints. */
  175. __isp1760_udc_select_ep(udc, ep, USB_DIR_OUT);
  176. isp1760_udc_set(udc, DC_STALL);
  177. __isp1760_udc_select_ep(udc, ep, USB_DIR_IN);
  178. isp1760_udc_set(udc, DC_STALL);
  179. /* A protocol stall completes the control transaction. */
  180. udc->ep0_state = ISP1760_CTRL_SETUP;
  181. spin_unlock_irqrestore(&udc->lock, flags);
  182. }
  183. /* -----------------------------------------------------------------------------
  184. * Data Endpoints
  185. */
  186. /* Called with the UDC spinlock held. */
  187. static bool isp1760_udc_receive(struct isp1760_ep *ep,
  188. struct isp1760_request *req)
  189. {
  190. struct isp1760_udc *udc = ep->udc;
  191. unsigned int len;
  192. u32 *buf;
  193. int i;
  194. isp1760_udc_select_ep(udc, ep);
  195. len = isp1760_udc_read(udc, DC_BUFLEN);
  196. dev_dbg(udc->isp->dev, "%s: received %u bytes (%u/%u done)\n",
  197. __func__, len, req->req.actual, req->req.length);
  198. len = min(len, req->req.length - req->req.actual);
  199. if (!len) {
  200. /*
  201. * There's no data to be read from the FIFO, acknowledge the RX
  202. * interrupt by clearing the buffer.
  203. *
  204. * TODO: What if another packet arrives in the meantime ? The
  205. * datasheet doesn't clearly document how this should be
  206. * handled.
  207. */
  208. isp1760_udc_set(udc, DC_CLBUF);
  209. return false;
  210. }
  211. buf = req->req.buf + req->req.actual;
  212. /*
  213. * Make sure not to read more than one extra byte, otherwise data from
  214. * the next packet might be removed from the FIFO.
  215. */
  216. for (i = len; i > 2; i -= 4, ++buf)
  217. *buf = isp1760_udc_read_raw(udc, ISP176x_DC_DATAPORT);
  218. if (i > 0)
  219. *(u16 *)buf = isp1760_udc_read_raw16(udc, ISP176x_DC_DATAPORT);
  220. req->req.actual += len;
  221. /*
  222. * TODO: The short_not_ok flag isn't supported yet, but isn't used by
  223. * any gadget driver either.
  224. */
  225. dev_dbg(udc->isp->dev,
  226. "%s: req %p actual/length %u/%u maxpacket %u packet size %u\n",
  227. __func__, req, req->req.actual, req->req.length, ep->maxpacket,
  228. len);
  229. ep->rx_pending = false;
  230. /*
  231. * Complete the request if all data has been received or if a short
  232. * packet has been received.
  233. */
  234. if (req->req.actual == req->req.length || len < ep->maxpacket) {
  235. list_del(&req->queue);
  236. return true;
  237. }
  238. return false;
  239. }
  240. static void isp1760_udc_transmit(struct isp1760_ep *ep,
  241. struct isp1760_request *req)
  242. {
  243. struct isp1760_udc *udc = ep->udc;
  244. u32 *buf = req->req.buf + req->req.actual;
  245. int i;
  246. req->packet_size = min(req->req.length - req->req.actual,
  247. ep->maxpacket);
  248. dev_dbg(udc->isp->dev, "%s: transferring %u bytes (%u/%u done)\n",
  249. __func__, req->packet_size, req->req.actual,
  250. req->req.length);
  251. __isp1760_udc_select_ep(udc, ep, USB_DIR_IN);
  252. if (req->packet_size)
  253. isp1760_udc_write(udc, DC_BUFLEN, req->packet_size);
  254. /*
  255. * Make sure not to write more than one extra byte, otherwise extra data
  256. * will stay in the FIFO and will be transmitted during the next control
  257. * request. The endpoint control CLBUF bit is supposed to allow flushing
  258. * the FIFO for this kind of conditions, but doesn't seem to work.
  259. */
  260. for (i = req->packet_size; i > 2; i -= 4, ++buf)
  261. isp1760_udc_write_raw(udc, ISP176x_DC_DATAPORT, *buf);
  262. if (i > 0)
  263. isp1760_udc_write_raw16(udc, ISP176x_DC_DATAPORT, *(u16 *)buf);
  264. if (ep->addr == 0)
  265. isp1760_udc_set(udc, DC_DSEN);
  266. if (!req->packet_size)
  267. isp1760_udc_set(udc, DC_VENDP);
  268. }
  269. static void isp1760_ep_rx_ready(struct isp1760_ep *ep)
  270. {
  271. struct isp1760_udc *udc = ep->udc;
  272. struct isp1760_request *req;
  273. bool complete;
  274. spin_lock(&udc->lock);
  275. if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_OUT) {
  276. spin_unlock(&udc->lock);
  277. dev_dbg(udc->isp->dev, "%s: invalid ep0 state %u\n", __func__,
  278. udc->ep0_state);
  279. return;
  280. }
  281. if (ep->addr != 0 && !ep->desc) {
  282. spin_unlock(&udc->lock);
  283. dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
  284. ep->addr);
  285. return;
  286. }
  287. if (list_empty(&ep->queue)) {
  288. ep->rx_pending = true;
  289. spin_unlock(&udc->lock);
  290. dev_dbg(udc->isp->dev, "%s: ep%02x (%p) has no request queued\n",
  291. __func__, ep->addr, ep);
  292. return;
  293. }
  294. req = list_first_entry(&ep->queue, struct isp1760_request,
  295. queue);
  296. complete = isp1760_udc_receive(ep, req);
  297. spin_unlock(&udc->lock);
  298. if (complete)
  299. isp1760_udc_request_complete(ep, req, 0);
  300. }
  301. static void isp1760_ep_tx_complete(struct isp1760_ep *ep)
  302. {
  303. struct isp1760_udc *udc = ep->udc;
  304. struct isp1760_request *complete = NULL;
  305. struct isp1760_request *req;
  306. bool need_zlp;
  307. spin_lock(&udc->lock);
  308. if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_IN) {
  309. spin_unlock(&udc->lock);
  310. dev_dbg(udc->isp->dev, "TX IRQ: invalid endpoint state %u\n",
  311. udc->ep0_state);
  312. return;
  313. }
  314. if (list_empty(&ep->queue)) {
  315. /*
  316. * This can happen for the control endpoint when the reply to
  317. * the GET_STATUS IN control request is sent directly by the
  318. * setup IRQ handler. Just proceed to the status stage.
  319. */
  320. if (ep->addr == 0) {
  321. isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
  322. spin_unlock(&udc->lock);
  323. return;
  324. }
  325. spin_unlock(&udc->lock);
  326. dev_dbg(udc->isp->dev, "%s: ep%02x has no request queued\n",
  327. __func__, ep->addr);
  328. return;
  329. }
  330. req = list_first_entry(&ep->queue, struct isp1760_request,
  331. queue);
  332. req->req.actual += req->packet_size;
  333. need_zlp = req->req.actual == req->req.length &&
  334. !(req->req.length % ep->maxpacket) &&
  335. req->packet_size && req->req.zero;
  336. dev_dbg(udc->isp->dev,
  337. "TX IRQ: req %p actual/length %u/%u maxpacket %u packet size %u zero %u need zlp %u\n",
  338. req, req->req.actual, req->req.length, ep->maxpacket,
  339. req->packet_size, req->req.zero, need_zlp);
  340. /*
  341. * Complete the request if all data has been sent and we don't need to
  342. * transmit a zero length packet.
  343. */
  344. if (req->req.actual == req->req.length && !need_zlp) {
  345. complete = req;
  346. list_del(&req->queue);
  347. if (ep->addr == 0)
  348. isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
  349. if (!list_empty(&ep->queue))
  350. req = list_first_entry(&ep->queue,
  351. struct isp1760_request, queue);
  352. else
  353. req = NULL;
  354. }
  355. /*
  356. * Transmit the next packet or start the next request, if any.
  357. *
  358. * TODO: If the endpoint is stalled the next request shouldn't be
  359. * started, but what about the next packet ?
  360. */
  361. if (req)
  362. isp1760_udc_transmit(ep, req);
  363. spin_unlock(&udc->lock);
  364. if (complete)
  365. isp1760_udc_request_complete(ep, complete, 0);
  366. }
  367. static int __isp1760_udc_set_halt(struct isp1760_ep *ep, bool halt)
  368. {
  369. struct isp1760_udc *udc = ep->udc;
  370. dev_dbg(udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
  371. halt ? "set" : "clear", ep->addr);
  372. if (ep->desc && usb_endpoint_xfer_isoc(ep->desc)) {
  373. dev_dbg(udc->isp->dev, "%s: ep%02x is isochronous\n", __func__,
  374. ep->addr);
  375. return -EINVAL;
  376. }
  377. isp1760_udc_select_ep(udc, ep);
  378. if (halt)
  379. isp1760_udc_set(udc, DC_STALL);
  380. else
  381. isp1760_udc_clear(udc, DC_STALL);
  382. if (ep->addr == 0) {
  383. /* When halting the control endpoint, stall both IN and OUT. */
  384. __isp1760_udc_select_ep(udc, ep, USB_DIR_IN);
  385. if (halt)
  386. isp1760_udc_set(udc, DC_STALL);
  387. else
  388. isp1760_udc_clear(udc, DC_STALL);
  389. } else if (!halt) {
  390. /* Reset the data PID by cycling the endpoint enable bit. */
  391. isp1760_udc_clear(udc, DC_EPENABLE);
  392. isp1760_udc_set(udc, DC_EPENABLE);
  393. /*
  394. * Disabling the endpoint emptied the transmit FIFO, fill it
  395. * again if a request is pending.
  396. *
  397. * TODO: Does the gadget framework require synchronizatino with
  398. * the TX IRQ handler ?
  399. */
  400. if ((ep->addr & USB_DIR_IN) && !list_empty(&ep->queue)) {
  401. struct isp1760_request *req;
  402. req = list_first_entry(&ep->queue,
  403. struct isp1760_request, queue);
  404. isp1760_udc_transmit(ep, req);
  405. }
  406. }
  407. ep->halted = halt;
  408. return 0;
  409. }
  410. /* -----------------------------------------------------------------------------
  411. * Control Endpoint
  412. */
  413. static int isp1760_udc_get_status(struct isp1760_udc *udc,
  414. const struct usb_ctrlrequest *req)
  415. {
  416. struct isp1760_ep *ep;
  417. u16 status;
  418. if (req->wLength != cpu_to_le16(2) || req->wValue != cpu_to_le16(0))
  419. return -EINVAL;
  420. switch (req->bRequestType) {
  421. case USB_DIR_IN | USB_RECIP_DEVICE:
  422. status = udc->devstatus;
  423. break;
  424. case USB_DIR_IN | USB_RECIP_INTERFACE:
  425. status = 0;
  426. break;
  427. case USB_DIR_IN | USB_RECIP_ENDPOINT:
  428. ep = isp1760_udc_find_ep(udc, le16_to_cpu(req->wIndex));
  429. if (!ep)
  430. return -EINVAL;
  431. status = 0;
  432. if (ep->halted)
  433. status |= 1 << USB_ENDPOINT_HALT;
  434. break;
  435. default:
  436. return -EINVAL;
  437. }
  438. isp1760_udc_set(udc, DC_EPDIR);
  439. isp1760_udc_write(udc, DC_ENDPIDX, 1);
  440. isp1760_udc_write(udc, DC_BUFLEN, 2);
  441. isp1760_udc_write_raw16(udc, ISP176x_DC_DATAPORT, status);
  442. isp1760_udc_set(udc, DC_DSEN);
  443. dev_dbg(udc->isp->dev, "%s: status 0x%04x\n", __func__, status);
  444. return 0;
  445. }
  446. static int isp1760_udc_set_address(struct isp1760_udc *udc, u16 addr)
  447. {
  448. if (addr > 127) {
  449. dev_dbg(udc->isp->dev, "invalid device address %u\n", addr);
  450. return -EINVAL;
  451. }
  452. if (udc->gadget.state != USB_STATE_DEFAULT &&
  453. udc->gadget.state != USB_STATE_ADDRESS) {
  454. dev_dbg(udc->isp->dev, "can't set address in state %u\n",
  455. udc->gadget.state);
  456. return -EINVAL;
  457. }
  458. usb_gadget_set_state(&udc->gadget, addr ? USB_STATE_ADDRESS :
  459. USB_STATE_DEFAULT);
  460. isp1760_udc_write(udc, DC_DEVADDR, addr);
  461. isp1760_udc_set(udc, DC_DEVEN);
  462. spin_lock(&udc->lock);
  463. isp1760_udc_ctrl_send_status(&udc->ep[0], USB_DIR_OUT);
  464. spin_unlock(&udc->lock);
  465. return 0;
  466. }
  467. static bool isp1760_ep0_setup_standard(struct isp1760_udc *udc,
  468. struct usb_ctrlrequest *req)
  469. {
  470. bool stall;
  471. switch (req->bRequest) {
  472. case USB_REQ_GET_STATUS:
  473. return isp1760_udc_get_status(udc, req);
  474. case USB_REQ_CLEAR_FEATURE:
  475. switch (req->bRequestType) {
  476. case USB_DIR_OUT | USB_RECIP_DEVICE: {
  477. /* TODO: Handle remote wakeup feature. */
  478. return true;
  479. }
  480. case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
  481. u16 index = le16_to_cpu(req->wIndex);
  482. struct isp1760_ep *ep;
  483. if (req->wLength != cpu_to_le16(0) ||
  484. req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
  485. return true;
  486. ep = isp1760_udc_find_ep(udc, index);
  487. if (!ep)
  488. return true;
  489. spin_lock(&udc->lock);
  490. /*
  491. * If the endpoint is wedged only the gadget can clear
  492. * the halt feature. Pretend success in that case, but
  493. * keep the endpoint halted.
  494. */
  495. if (!ep->wedged)
  496. stall = __isp1760_udc_set_halt(ep, false);
  497. else
  498. stall = false;
  499. if (!stall)
  500. isp1760_udc_ctrl_send_status(&udc->ep[0],
  501. USB_DIR_OUT);
  502. spin_unlock(&udc->lock);
  503. return stall;
  504. }
  505. default:
  506. return true;
  507. }
  508. break;
  509. case USB_REQ_SET_FEATURE:
  510. switch (req->bRequestType) {
  511. case USB_DIR_OUT | USB_RECIP_DEVICE: {
  512. /* TODO: Handle remote wakeup and test mode features */
  513. return true;
  514. }
  515. case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
  516. u16 index = le16_to_cpu(req->wIndex);
  517. struct isp1760_ep *ep;
  518. if (req->wLength != cpu_to_le16(0) ||
  519. req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
  520. return true;
  521. ep = isp1760_udc_find_ep(udc, index);
  522. if (!ep)
  523. return true;
  524. spin_lock(&udc->lock);
  525. stall = __isp1760_udc_set_halt(ep, true);
  526. if (!stall)
  527. isp1760_udc_ctrl_send_status(&udc->ep[0],
  528. USB_DIR_OUT);
  529. spin_unlock(&udc->lock);
  530. return stall;
  531. }
  532. default:
  533. return true;
  534. }
  535. break;
  536. case USB_REQ_SET_ADDRESS:
  537. if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  538. return true;
  539. return isp1760_udc_set_address(udc, le16_to_cpu(req->wValue));
  540. case USB_REQ_SET_CONFIGURATION:
  541. if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  542. return true;
  543. if (udc->gadget.state != USB_STATE_ADDRESS &&
  544. udc->gadget.state != USB_STATE_CONFIGURED)
  545. return true;
  546. stall = udc->driver->setup(&udc->gadget, req) < 0;
  547. if (stall)
  548. return true;
  549. usb_gadget_set_state(&udc->gadget, req->wValue ?
  550. USB_STATE_CONFIGURED : USB_STATE_ADDRESS);
  551. /*
  552. * SET_CONFIGURATION (and SET_INTERFACE) must reset the halt
  553. * feature on all endpoints. There is however no need to do so
  554. * explicitly here as the gadget driver will disable and
  555. * reenable endpoints, clearing the halt feature.
  556. */
  557. return false;
  558. default:
  559. return udc->driver->setup(&udc->gadget, req) < 0;
  560. }
  561. }
  562. static void isp1760_ep0_setup(struct isp1760_udc *udc)
  563. {
  564. union {
  565. struct usb_ctrlrequest r;
  566. u32 data[2];
  567. } req;
  568. unsigned int count;
  569. bool stall = false;
  570. spin_lock(&udc->lock);
  571. isp1760_udc_set(udc, DC_EP0SETUP);
  572. count = isp1760_udc_read(udc, DC_BUFLEN);
  573. if (count != sizeof(req)) {
  574. spin_unlock(&udc->lock);
  575. dev_err(udc->isp->dev, "invalid length %u for setup packet\n",
  576. count);
  577. isp1760_udc_ctrl_send_stall(&udc->ep[0]);
  578. return;
  579. }
  580. req.data[0] = isp1760_udc_read_raw(udc, ISP176x_DC_DATAPORT);
  581. req.data[1] = isp1760_udc_read_raw(udc, ISP176x_DC_DATAPORT);
  582. if (udc->ep0_state != ISP1760_CTRL_SETUP) {
  583. spin_unlock(&udc->lock);
  584. dev_dbg(udc->isp->dev, "unexpected SETUP packet\n");
  585. return;
  586. }
  587. /* Move to the data stage. */
  588. if (!req.r.wLength)
  589. udc->ep0_state = ISP1760_CTRL_STATUS;
  590. else if (req.r.bRequestType & USB_DIR_IN)
  591. udc->ep0_state = ISP1760_CTRL_DATA_IN;
  592. else
  593. udc->ep0_state = ISP1760_CTRL_DATA_OUT;
  594. udc->ep0_dir = req.r.bRequestType & USB_DIR_IN;
  595. udc->ep0_length = le16_to_cpu(req.r.wLength);
  596. spin_unlock(&udc->lock);
  597. dev_dbg(udc->isp->dev,
  598. "%s: bRequestType 0x%02x bRequest 0x%02x wValue 0x%04x wIndex 0x%04x wLength 0x%04x\n",
  599. __func__, req.r.bRequestType, req.r.bRequest,
  600. le16_to_cpu(req.r.wValue), le16_to_cpu(req.r.wIndex),
  601. le16_to_cpu(req.r.wLength));
  602. if ((req.r.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
  603. stall = isp1760_ep0_setup_standard(udc, &req.r);
  604. else
  605. stall = udc->driver->setup(&udc->gadget, &req.r) < 0;
  606. if (stall)
  607. isp1760_udc_ctrl_send_stall(&udc->ep[0]);
  608. }
  609. /* -----------------------------------------------------------------------------
  610. * Gadget Endpoint Operations
  611. */
  612. static int isp1760_ep_enable(struct usb_ep *ep,
  613. const struct usb_endpoint_descriptor *desc)
  614. {
  615. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  616. struct isp1760_udc *udc = uep->udc;
  617. unsigned long flags;
  618. unsigned int type;
  619. dev_dbg(uep->udc->isp->dev, "%s\n", __func__);
  620. /*
  621. * Validate the descriptor. The control endpoint can't be enabled
  622. * manually.
  623. */
  624. if (desc->bDescriptorType != USB_DT_ENDPOINT ||
  625. desc->bEndpointAddress == 0 ||
  626. desc->bEndpointAddress != uep->addr ||
  627. le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket) {
  628. dev_dbg(udc->isp->dev,
  629. "%s: invalid descriptor type %u addr %02x ep addr %02x max packet size %u/%u\n",
  630. __func__, desc->bDescriptorType,
  631. desc->bEndpointAddress, uep->addr,
  632. le16_to_cpu(desc->wMaxPacketSize), ep->maxpacket);
  633. return -EINVAL;
  634. }
  635. switch (usb_endpoint_type(desc)) {
  636. case USB_ENDPOINT_XFER_ISOC:
  637. type = ISP176x_DC_ENDPTYP_ISOC;
  638. break;
  639. case USB_ENDPOINT_XFER_BULK:
  640. type = ISP176x_DC_ENDPTYP_BULK;
  641. break;
  642. case USB_ENDPOINT_XFER_INT:
  643. type = ISP176x_DC_ENDPTYP_INTERRUPT;
  644. break;
  645. case USB_ENDPOINT_XFER_CONTROL:
  646. default:
  647. dev_dbg(udc->isp->dev, "%s: control endpoints unsupported\n",
  648. __func__);
  649. return -EINVAL;
  650. }
  651. spin_lock_irqsave(&udc->lock, flags);
  652. uep->desc = desc;
  653. uep->maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  654. uep->rx_pending = false;
  655. uep->halted = false;
  656. uep->wedged = false;
  657. isp1760_udc_select_ep(udc, uep);
  658. isp1760_udc_write(udc, DC_FFOSZ, uep->maxpacket);
  659. isp1760_udc_write(udc, DC_BUFLEN, uep->maxpacket);
  660. isp1760_udc_write(udc, DC_ENDPTYP, type);
  661. isp1760_udc_set(udc, DC_EPENABLE);
  662. spin_unlock_irqrestore(&udc->lock, flags);
  663. return 0;
  664. }
  665. static int isp1760_ep_disable(struct usb_ep *ep)
  666. {
  667. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  668. struct isp1760_udc *udc = uep->udc;
  669. struct isp1760_request *req, *nreq;
  670. LIST_HEAD(req_list);
  671. unsigned long flags;
  672. dev_dbg(udc->isp->dev, "%s\n", __func__);
  673. spin_lock_irqsave(&udc->lock, flags);
  674. if (!uep->desc) {
  675. dev_dbg(udc->isp->dev, "%s: endpoint not enabled\n", __func__);
  676. spin_unlock_irqrestore(&udc->lock, flags);
  677. return -EINVAL;
  678. }
  679. uep->desc = NULL;
  680. uep->maxpacket = 0;
  681. isp1760_udc_select_ep(udc, uep);
  682. isp1760_udc_clear(udc, DC_EPENABLE);
  683. isp1760_udc_clear(udc, DC_ENDPTYP);
  684. /* TODO Synchronize with the IRQ handler */
  685. list_splice_init(&uep->queue, &req_list);
  686. spin_unlock_irqrestore(&udc->lock, flags);
  687. list_for_each_entry_safe(req, nreq, &req_list, queue) {
  688. list_del(&req->queue);
  689. isp1760_udc_request_complete(uep, req, -ESHUTDOWN);
  690. }
  691. return 0;
  692. }
  693. static struct usb_request *isp1760_ep_alloc_request(struct usb_ep *ep,
  694. gfp_t gfp_flags)
  695. {
  696. struct isp1760_request *req;
  697. req = kzalloc(sizeof(*req), gfp_flags);
  698. if (!req)
  699. return NULL;
  700. return &req->req;
  701. }
  702. static void isp1760_ep_free_request(struct usb_ep *ep, struct usb_request *_req)
  703. {
  704. struct isp1760_request *req = req_to_udc_req(_req);
  705. kfree(req);
  706. }
  707. static int isp1760_ep_queue(struct usb_ep *ep, struct usb_request *_req,
  708. gfp_t gfp_flags)
  709. {
  710. struct isp1760_request *req = req_to_udc_req(_req);
  711. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  712. struct isp1760_udc *udc = uep->udc;
  713. bool complete = false;
  714. unsigned long flags;
  715. int ret = 0;
  716. _req->status = -EINPROGRESS;
  717. _req->actual = 0;
  718. spin_lock_irqsave(&udc->lock, flags);
  719. dev_dbg(udc->isp->dev,
  720. "%s: req %p (%u bytes%s) ep %p(0x%02x)\n", __func__, _req,
  721. _req->length, _req->zero ? " (zlp)" : "", uep, uep->addr);
  722. req->ep = uep;
  723. if (uep->addr == 0) {
  724. if (_req->length != udc->ep0_length &&
  725. udc->ep0_state != ISP1760_CTRL_DATA_IN) {
  726. dev_dbg(udc->isp->dev,
  727. "%s: invalid length %u for req %p\n",
  728. __func__, _req->length, req);
  729. ret = -EINVAL;
  730. goto done;
  731. }
  732. switch (udc->ep0_state) {
  733. case ISP1760_CTRL_DATA_IN:
  734. dev_dbg(udc->isp->dev, "%s: transmitting req %p\n",
  735. __func__, req);
  736. list_add_tail(&req->queue, &uep->queue);
  737. isp1760_udc_transmit(uep, req);
  738. break;
  739. case ISP1760_CTRL_DATA_OUT:
  740. list_add_tail(&req->queue, &uep->queue);
  741. __isp1760_udc_select_ep(udc, uep, USB_DIR_OUT);
  742. isp1760_udc_set(udc, DC_DSEN);
  743. break;
  744. case ISP1760_CTRL_STATUS:
  745. complete = true;
  746. break;
  747. default:
  748. dev_dbg(udc->isp->dev, "%s: invalid ep0 state\n",
  749. __func__);
  750. ret = -EINVAL;
  751. break;
  752. }
  753. } else if (uep->desc) {
  754. bool empty = list_empty(&uep->queue);
  755. list_add_tail(&req->queue, &uep->queue);
  756. if ((uep->addr & USB_DIR_IN) && !uep->halted && empty)
  757. isp1760_udc_transmit(uep, req);
  758. else if (!(uep->addr & USB_DIR_IN) && uep->rx_pending)
  759. complete = isp1760_udc_receive(uep, req);
  760. } else {
  761. dev_dbg(udc->isp->dev,
  762. "%s: can't queue request to disabled ep%02x\n",
  763. __func__, uep->addr);
  764. ret = -ESHUTDOWN;
  765. }
  766. done:
  767. if (ret < 0)
  768. req->ep = NULL;
  769. spin_unlock_irqrestore(&udc->lock, flags);
  770. if (complete)
  771. isp1760_udc_request_complete(uep, req, 0);
  772. return ret;
  773. }
  774. static int isp1760_ep_dequeue(struct usb_ep *ep, struct usb_request *_req)
  775. {
  776. struct isp1760_request *req = req_to_udc_req(_req);
  777. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  778. struct isp1760_udc *udc = uep->udc;
  779. unsigned long flags;
  780. dev_dbg(uep->udc->isp->dev, "%s(ep%02x)\n", __func__, uep->addr);
  781. spin_lock_irqsave(&udc->lock, flags);
  782. if (req->ep != uep)
  783. req = NULL;
  784. else
  785. list_del(&req->queue);
  786. spin_unlock_irqrestore(&udc->lock, flags);
  787. if (!req)
  788. return -EINVAL;
  789. isp1760_udc_request_complete(uep, req, -ECONNRESET);
  790. return 0;
  791. }
  792. static int __isp1760_ep_set_halt(struct isp1760_ep *uep, bool stall, bool wedge)
  793. {
  794. struct isp1760_udc *udc = uep->udc;
  795. int ret;
  796. if (!uep->addr) {
  797. /*
  798. * Halting the control endpoint is only valid as a delayed error
  799. * response to a SETUP packet. Make sure EP0 is in the right
  800. * stage and that the gadget isn't trying to clear the halt
  801. * condition.
  802. */
  803. if (WARN_ON(udc->ep0_state == ISP1760_CTRL_SETUP || !stall ||
  804. wedge)) {
  805. return -EINVAL;
  806. }
  807. }
  808. if (uep->addr && !uep->desc) {
  809. dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
  810. uep->addr);
  811. return -EINVAL;
  812. }
  813. if (uep->addr & USB_DIR_IN) {
  814. /* Refuse to halt IN endpoints with active transfers. */
  815. if (!list_empty(&uep->queue)) {
  816. dev_dbg(udc->isp->dev,
  817. "%s: ep%02x has request pending\n", __func__,
  818. uep->addr);
  819. return -EAGAIN;
  820. }
  821. }
  822. ret = __isp1760_udc_set_halt(uep, stall);
  823. if (ret < 0)
  824. return ret;
  825. if (!uep->addr) {
  826. /*
  827. * Stalling EP0 completes the control transaction, move back to
  828. * the SETUP state.
  829. */
  830. udc->ep0_state = ISP1760_CTRL_SETUP;
  831. return 0;
  832. }
  833. if (wedge)
  834. uep->wedged = true;
  835. else if (!stall)
  836. uep->wedged = false;
  837. return 0;
  838. }
  839. static int isp1760_ep_set_halt(struct usb_ep *ep, int value)
  840. {
  841. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  842. unsigned long flags;
  843. int ret;
  844. dev_dbg(uep->udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
  845. value ? "set" : "clear", uep->addr);
  846. spin_lock_irqsave(&uep->udc->lock, flags);
  847. ret = __isp1760_ep_set_halt(uep, value, false);
  848. spin_unlock_irqrestore(&uep->udc->lock, flags);
  849. return ret;
  850. }
  851. static int isp1760_ep_set_wedge(struct usb_ep *ep)
  852. {
  853. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  854. unsigned long flags;
  855. int ret;
  856. dev_dbg(uep->udc->isp->dev, "%s: set wedge on ep%02x)\n", __func__,
  857. uep->addr);
  858. spin_lock_irqsave(&uep->udc->lock, flags);
  859. ret = __isp1760_ep_set_halt(uep, true, true);
  860. spin_unlock_irqrestore(&uep->udc->lock, flags);
  861. return ret;
  862. }
  863. static void isp1760_ep_fifo_flush(struct usb_ep *ep)
  864. {
  865. struct isp1760_ep *uep = ep_to_udc_ep(ep);
  866. struct isp1760_udc *udc = uep->udc;
  867. unsigned long flags;
  868. spin_lock_irqsave(&udc->lock, flags);
  869. isp1760_udc_select_ep(udc, uep);
  870. /*
  871. * Set the CLBUF bit twice to flush both buffers in case double
  872. * buffering is enabled.
  873. */
  874. isp1760_udc_set(udc, DC_CLBUF);
  875. isp1760_udc_set(udc, DC_CLBUF);
  876. spin_unlock_irqrestore(&udc->lock, flags);
  877. }
  878. static const struct usb_ep_ops isp1760_ep_ops = {
  879. .enable = isp1760_ep_enable,
  880. .disable = isp1760_ep_disable,
  881. .alloc_request = isp1760_ep_alloc_request,
  882. .free_request = isp1760_ep_free_request,
  883. .queue = isp1760_ep_queue,
  884. .dequeue = isp1760_ep_dequeue,
  885. .set_halt = isp1760_ep_set_halt,
  886. .set_wedge = isp1760_ep_set_wedge,
  887. .fifo_flush = isp1760_ep_fifo_flush,
  888. };
  889. /* -----------------------------------------------------------------------------
  890. * Device States
  891. */
  892. /* Called with the UDC spinlock held. */
  893. static void isp1760_udc_connect(struct isp1760_udc *udc)
  894. {
  895. usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
  896. mod_timer(&udc->vbus_timer, jiffies + ISP1760_VBUS_POLL_INTERVAL);
  897. }
  898. /* Called with the UDC spinlock held. */
  899. static void isp1760_udc_disconnect(struct isp1760_udc *udc)
  900. {
  901. if (udc->gadget.state < USB_STATE_POWERED)
  902. return;
  903. dev_dbg(udc->isp->dev, "Device disconnected in state %u\n",
  904. udc->gadget.state);
  905. udc->gadget.speed = USB_SPEED_UNKNOWN;
  906. usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
  907. if (udc->driver->disconnect)
  908. udc->driver->disconnect(&udc->gadget);
  909. del_timer(&udc->vbus_timer);
  910. /* TODO Reset all endpoints ? */
  911. }
  912. static void isp1760_udc_init_hw(struct isp1760_udc *udc)
  913. {
  914. u32 intconf = udc->is_isp1763 ? ISP1763_DC_INTCONF : ISP176x_DC_INTCONF;
  915. u32 intena = udc->is_isp1763 ? ISP1763_DC_INTENABLE :
  916. ISP176x_DC_INTENABLE;
  917. /*
  918. * The device controller currently shares its interrupt with the host
  919. * controller, the DC_IRQ polarity and signaling mode are ignored. Set
  920. * the to active-low level-triggered.
  921. *
  922. * Configure the control, in and out pipes to generate interrupts on
  923. * ACK tokens only (and NYET for the out pipe). The default
  924. * configuration also generates an interrupt on the first NACK token.
  925. */
  926. isp1760_reg_write(udc->regs, intconf,
  927. ISP176x_DC_CDBGMOD_ACK | ISP176x_DC_DDBGMODIN_ACK |
  928. ISP176x_DC_DDBGMODOUT_ACK);
  929. isp1760_reg_write(udc->regs, intena, DC_IEPRXTX(7) |
  930. DC_IEPRXTX(6) | DC_IEPRXTX(5) | DC_IEPRXTX(4) |
  931. DC_IEPRXTX(3) | DC_IEPRXTX(2) | DC_IEPRXTX(1) |
  932. DC_IEPRXTX(0) | ISP176x_DC_IEP0SETUP |
  933. ISP176x_DC_IEVBUS | ISP176x_DC_IERESM |
  934. ISP176x_DC_IESUSP | ISP176x_DC_IEHS_STA |
  935. ISP176x_DC_IEBRST);
  936. if (udc->connected)
  937. isp1760_set_pullup(udc->isp, true);
  938. isp1760_udc_set(udc, DC_DEVEN);
  939. }
  940. static void isp1760_udc_reset(struct isp1760_udc *udc)
  941. {
  942. unsigned long flags;
  943. spin_lock_irqsave(&udc->lock, flags);
  944. /*
  945. * The bus reset has reset most registers to their default value,
  946. * reinitialize the UDC hardware.
  947. */
  948. isp1760_udc_init_hw(udc);
  949. udc->ep0_state = ISP1760_CTRL_SETUP;
  950. udc->gadget.speed = USB_SPEED_FULL;
  951. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  952. spin_unlock_irqrestore(&udc->lock, flags);
  953. }
  954. static void isp1760_udc_suspend(struct isp1760_udc *udc)
  955. {
  956. if (udc->gadget.state < USB_STATE_DEFAULT)
  957. return;
  958. if (udc->driver->suspend)
  959. udc->driver->suspend(&udc->gadget);
  960. }
  961. static void isp1760_udc_resume(struct isp1760_udc *udc)
  962. {
  963. if (udc->gadget.state < USB_STATE_DEFAULT)
  964. return;
  965. if (udc->driver->resume)
  966. udc->driver->resume(&udc->gadget);
  967. }
  968. /* -----------------------------------------------------------------------------
  969. * Gadget Operations
  970. */
  971. static int isp1760_udc_get_frame(struct usb_gadget *gadget)
  972. {
  973. struct isp1760_udc *udc = gadget_to_udc(gadget);
  974. return isp1760_udc_read(udc, DC_FRAMENUM);
  975. }
  976. static int isp1760_udc_wakeup(struct usb_gadget *gadget)
  977. {
  978. struct isp1760_udc *udc = gadget_to_udc(gadget);
  979. dev_dbg(udc->isp->dev, "%s\n", __func__);
  980. return -ENOTSUPP;
  981. }
  982. static int isp1760_udc_set_selfpowered(struct usb_gadget *gadget,
  983. int is_selfpowered)
  984. {
  985. struct isp1760_udc *udc = gadget_to_udc(gadget);
  986. if (is_selfpowered)
  987. udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
  988. else
  989. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  990. return 0;
  991. }
  992. static int isp1760_udc_pullup(struct usb_gadget *gadget, int is_on)
  993. {
  994. struct isp1760_udc *udc = gadget_to_udc(gadget);
  995. isp1760_set_pullup(udc->isp, is_on);
  996. udc->connected = is_on;
  997. return 0;
  998. }
  999. static int isp1760_udc_start(struct usb_gadget *gadget,
  1000. struct usb_gadget_driver *driver)
  1001. {
  1002. struct isp1760_udc *udc = gadget_to_udc(gadget);
  1003. unsigned long flags;
  1004. /* The hardware doesn't support low speed. */
  1005. if (driver->max_speed < USB_SPEED_FULL) {
  1006. dev_err(udc->isp->dev, "Invalid gadget driver\n");
  1007. return -EINVAL;
  1008. }
  1009. spin_lock_irqsave(&udc->lock, flags);
  1010. if (udc->driver) {
  1011. dev_err(udc->isp->dev, "UDC already has a gadget driver\n");
  1012. spin_unlock_irqrestore(&udc->lock, flags);
  1013. return -EBUSY;
  1014. }
  1015. udc->driver = driver;
  1016. spin_unlock_irqrestore(&udc->lock, flags);
  1017. dev_dbg(udc->isp->dev, "starting UDC with driver %s\n",
  1018. driver->function);
  1019. udc->devstatus = 0;
  1020. udc->connected = true;
  1021. usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
  1022. /* DMA isn't supported yet, don't enable the DMA clock. */
  1023. isp1760_udc_set(udc, DC_GLINTENA);
  1024. isp1760_udc_init_hw(udc);
  1025. dev_dbg(udc->isp->dev, "UDC started with driver %s\n",
  1026. driver->function);
  1027. return 0;
  1028. }
  1029. static int isp1760_udc_stop(struct usb_gadget *gadget)
  1030. {
  1031. struct isp1760_udc *udc = gadget_to_udc(gadget);
  1032. u32 mode_reg = udc->is_isp1763 ? ISP1763_DC_MODE : ISP176x_DC_MODE;
  1033. unsigned long flags;
  1034. dev_dbg(udc->isp->dev, "%s\n", __func__);
  1035. del_timer_sync(&udc->vbus_timer);
  1036. isp1760_reg_write(udc->regs, mode_reg, 0);
  1037. spin_lock_irqsave(&udc->lock, flags);
  1038. udc->driver = NULL;
  1039. spin_unlock_irqrestore(&udc->lock, flags);
  1040. return 0;
  1041. }
  1042. static const struct usb_gadget_ops isp1760_udc_ops = {
  1043. .get_frame = isp1760_udc_get_frame,
  1044. .wakeup = isp1760_udc_wakeup,
  1045. .set_selfpowered = isp1760_udc_set_selfpowered,
  1046. .pullup = isp1760_udc_pullup,
  1047. .udc_start = isp1760_udc_start,
  1048. .udc_stop = isp1760_udc_stop,
  1049. };
  1050. /* -----------------------------------------------------------------------------
  1051. * Interrupt Handling
  1052. */
  1053. static u32 isp1760_udc_irq_get_status(struct isp1760_udc *udc)
  1054. {
  1055. u32 status;
  1056. if (udc->is_isp1763) {
  1057. status = isp1760_reg_read(udc->regs, ISP1763_DC_INTERRUPT)
  1058. & isp1760_reg_read(udc->regs, ISP1763_DC_INTENABLE);
  1059. isp1760_reg_write(udc->regs, ISP1763_DC_INTERRUPT, status);
  1060. } else {
  1061. status = isp1760_reg_read(udc->regs, ISP176x_DC_INTERRUPT)
  1062. & isp1760_reg_read(udc->regs, ISP176x_DC_INTENABLE);
  1063. isp1760_reg_write(udc->regs, ISP176x_DC_INTERRUPT, status);
  1064. }
  1065. return status;
  1066. }
  1067. static irqreturn_t isp1760_udc_irq(int irq, void *dev)
  1068. {
  1069. struct isp1760_udc *udc = dev;
  1070. unsigned int i;
  1071. u32 status;
  1072. status = isp1760_udc_irq_get_status(udc);
  1073. if (status & ISP176x_DC_IEVBUS) {
  1074. dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__);
  1075. /* The VBUS interrupt is only triggered when VBUS appears. */
  1076. spin_lock(&udc->lock);
  1077. isp1760_udc_connect(udc);
  1078. spin_unlock(&udc->lock);
  1079. }
  1080. if (status & ISP176x_DC_IEBRST) {
  1081. dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__);
  1082. isp1760_udc_reset(udc);
  1083. }
  1084. for (i = 0; i <= 7; ++i) {
  1085. struct isp1760_ep *ep = &udc->ep[i*2];
  1086. if (status & DC_IEPTX(i)) {
  1087. dev_dbg(udc->isp->dev, "%s(EPTX%u)\n", __func__, i);
  1088. isp1760_ep_tx_complete(ep);
  1089. }
  1090. if (status & DC_IEPRX(i)) {
  1091. dev_dbg(udc->isp->dev, "%s(EPRX%u)\n", __func__, i);
  1092. isp1760_ep_rx_ready(i ? ep - 1 : ep);
  1093. }
  1094. }
  1095. if (status & ISP176x_DC_IEP0SETUP) {
  1096. dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__);
  1097. isp1760_ep0_setup(udc);
  1098. }
  1099. if (status & ISP176x_DC_IERESM) {
  1100. dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__);
  1101. isp1760_udc_resume(udc);
  1102. }
  1103. if (status & ISP176x_DC_IESUSP) {
  1104. dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__);
  1105. spin_lock(&udc->lock);
  1106. if (!isp1760_udc_is_set(udc, DC_VBUSSTAT))
  1107. isp1760_udc_disconnect(udc);
  1108. else
  1109. isp1760_udc_suspend(udc);
  1110. spin_unlock(&udc->lock);
  1111. }
  1112. if (status & ISP176x_DC_IEHS_STA) {
  1113. dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__);
  1114. udc->gadget.speed = USB_SPEED_HIGH;
  1115. }
  1116. return status ? IRQ_HANDLED : IRQ_NONE;
  1117. }
  1118. static void isp1760_udc_vbus_poll(struct timer_list *t)
  1119. {
  1120. struct isp1760_udc *udc = from_timer(udc, t, vbus_timer);
  1121. unsigned long flags;
  1122. spin_lock_irqsave(&udc->lock, flags);
  1123. if (!(isp1760_udc_is_set(udc, DC_VBUSSTAT)))
  1124. isp1760_udc_disconnect(udc);
  1125. else if (udc->gadget.state >= USB_STATE_POWERED)
  1126. mod_timer(&udc->vbus_timer,
  1127. jiffies + ISP1760_VBUS_POLL_INTERVAL);
  1128. spin_unlock_irqrestore(&udc->lock, flags);
  1129. }
  1130. /* -----------------------------------------------------------------------------
  1131. * Registration
  1132. */
  1133. static void isp1760_udc_init_eps(struct isp1760_udc *udc)
  1134. {
  1135. unsigned int i;
  1136. INIT_LIST_HEAD(&udc->gadget.ep_list);
  1137. for (i = 0; i < ARRAY_SIZE(udc->ep); ++i) {
  1138. struct isp1760_ep *ep = &udc->ep[i];
  1139. unsigned int ep_num = (i + 1) / 2;
  1140. bool is_in = !(i & 1);
  1141. ep->udc = udc;
  1142. INIT_LIST_HEAD(&ep->queue);
  1143. ep->addr = (ep_num && is_in ? USB_DIR_IN : USB_DIR_OUT)
  1144. | ep_num;
  1145. ep->desc = NULL;
  1146. sprintf(ep->name, "ep%u%s", ep_num,
  1147. ep_num ? (is_in ? "in" : "out") : "");
  1148. ep->ep.ops = &isp1760_ep_ops;
  1149. ep->ep.name = ep->name;
  1150. /*
  1151. * Hardcode the maximum packet sizes for now, to 64 bytes for
  1152. * the control endpoint and 512 bytes for all other endpoints.
  1153. * This fits in the 8kB FIFO without double-buffering.
  1154. */
  1155. if (ep_num == 0) {
  1156. usb_ep_set_maxpacket_limit(&ep->ep, 64);
  1157. ep->ep.caps.type_control = true;
  1158. ep->ep.caps.dir_in = true;
  1159. ep->ep.caps.dir_out = true;
  1160. ep->maxpacket = 64;
  1161. udc->gadget.ep0 = &ep->ep;
  1162. } else {
  1163. usb_ep_set_maxpacket_limit(&ep->ep, 512);
  1164. ep->ep.caps.type_iso = true;
  1165. ep->ep.caps.type_bulk = true;
  1166. ep->ep.caps.type_int = true;
  1167. ep->maxpacket = 0;
  1168. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1169. }
  1170. if (is_in)
  1171. ep->ep.caps.dir_in = true;
  1172. else
  1173. ep->ep.caps.dir_out = true;
  1174. }
  1175. }
  1176. static int isp1760_udc_init(struct isp1760_udc *udc)
  1177. {
  1178. u32 mode_reg = udc->is_isp1763 ? ISP1763_DC_MODE : ISP176x_DC_MODE;
  1179. u16 scratch;
  1180. u32 chipid;
  1181. /*
  1182. * Check that the controller is present by writing to the scratch
  1183. * register, modifying the bus pattern by reading from the chip ID
  1184. * register, and reading the scratch register value back. The chip ID
  1185. * and scratch register contents must match the expected values.
  1186. */
  1187. isp1760_udc_write(udc, DC_SCRATCH, 0xbabe);
  1188. chipid = isp1760_udc_read(udc, DC_CHIP_ID_HIGH) << 16;
  1189. chipid |= isp1760_udc_read(udc, DC_CHIP_ID_LOW);
  1190. scratch = isp1760_udc_read(udc, DC_SCRATCH);
  1191. if (scratch != 0xbabe) {
  1192. dev_err(udc->isp->dev,
  1193. "udc: scratch test failed (0x%04x/0x%08x)\n",
  1194. scratch, chipid);
  1195. return -ENODEV;
  1196. }
  1197. if (chipid != 0x00011582 && chipid != 0x00158210 &&
  1198. chipid != 0x00176320) {
  1199. dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid);
  1200. return -ENODEV;
  1201. }
  1202. /* Reset the device controller. */
  1203. isp1760_udc_set(udc, DC_SFRESET);
  1204. usleep_range(10000, 11000);
  1205. isp1760_reg_write(udc->regs, mode_reg, 0);
  1206. usleep_range(10000, 11000);
  1207. return 0;
  1208. }
  1209. int isp1760_udc_register(struct isp1760_device *isp, int irq,
  1210. unsigned long irqflags)
  1211. {
  1212. struct isp1760_udc *udc = &isp->udc;
  1213. int ret;
  1214. udc->irq = -1;
  1215. udc->isp = isp;
  1216. spin_lock_init(&udc->lock);
  1217. timer_setup(&udc->vbus_timer, isp1760_udc_vbus_poll, 0);
  1218. ret = isp1760_udc_init(udc);
  1219. if (ret < 0)
  1220. return ret;
  1221. udc->irqname = kasprintf(GFP_KERNEL, "%s (udc)", dev_name(isp->dev));
  1222. if (!udc->irqname)
  1223. return -ENOMEM;
  1224. ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | irqflags,
  1225. udc->irqname, udc);
  1226. if (ret < 0)
  1227. goto error;
  1228. udc->irq = irq;
  1229. /*
  1230. * Initialize the gadget static fields and register its device. Gadget
  1231. * fields that vary during the life time of the gadget are initialized
  1232. * by the UDC core.
  1233. */
  1234. udc->gadget.ops = &isp1760_udc_ops;
  1235. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1236. udc->gadget.max_speed = USB_SPEED_HIGH;
  1237. udc->gadget.name = "isp1761_udc";
  1238. isp1760_udc_init_eps(udc);
  1239. ret = usb_add_gadget_udc(isp->dev, &udc->gadget);
  1240. if (ret < 0)
  1241. goto error;
  1242. return 0;
  1243. error:
  1244. if (udc->irq >= 0)
  1245. free_irq(udc->irq, udc);
  1246. kfree(udc->irqname);
  1247. return ret;
  1248. }
  1249. void isp1760_udc_unregister(struct isp1760_device *isp)
  1250. {
  1251. struct isp1760_udc *udc = &isp->udc;
  1252. if (!udc->isp)
  1253. return;
  1254. usb_del_gadget_udc(&udc->gadget);
  1255. free_irq(udc->irq, udc);
  1256. kfree(udc->irqname);
  1257. }