uhci-pci.c 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * UHCI HCD (Host Controller Driver) PCI Bus Glue.
  4. *
  5. * Extracted from uhci-hcd.c:
  6. * Maintainer: Alan Stern <[email protected]>
  7. *
  8. * (C) Copyright 1999 Linus Torvalds
  9. * (C) Copyright 1999-2002 Johannes Erdfelt, [email protected]
  10. * (C) Copyright 1999 Randy Dunlap
  11. * (C) Copyright 1999 Georg Acher, [email protected]
  12. * (C) Copyright 1999 Deti Fliegl, [email protected]
  13. * (C) Copyright 1999 Thomas Sailer, [email protected]
  14. * (C) Copyright 1999 Roman Weissgaerber, [email protected]
  15. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  16. * support from usb-ohci.c by Adam Richter, [email protected]).
  17. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  18. * (C) Copyright 2004-2007 Alan Stern, [email protected]
  19. */
  20. #include "pci-quirks.h"
  21. /*
  22. * Make sure the controller is completely inactive, unable to
  23. * generate interrupts or do DMA.
  24. */
  25. static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
  26. {
  27. uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
  28. }
  29. /*
  30. * Initialize a controller that was newly discovered or has just been
  31. * resumed. In either case we can't be sure of its previous state.
  32. *
  33. * Returns: 1 if the controller was reset, 0 otherwise.
  34. */
  35. static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
  36. {
  37. return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
  38. uhci->io_addr);
  39. }
  40. /*
  41. * Store the basic register settings needed by the controller.
  42. * This function is called at the end of configure_hc in uhci-hcd.c.
  43. */
  44. static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
  47. /* Enable PIRQ */
  48. pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
  49. /* Disable platform-specific non-PME# wakeup */
  50. if (pdev->vendor == PCI_VENDOR_ID_INTEL)
  51. pci_write_config_byte(pdev, USBRES_INTEL, 0);
  52. }
  53. static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
  54. {
  55. int port;
  56. switch (to_pci_dev(uhci_dev(uhci))->vendor) {
  57. default:
  58. break;
  59. case PCI_VENDOR_ID_GENESYS:
  60. /* Genesys Logic's GL880S controllers don't generate
  61. * resume-detect interrupts.
  62. */
  63. return 1;
  64. case PCI_VENDOR_ID_INTEL:
  65. /* Some of Intel's USB controllers have a bug that causes
  66. * resume-detect interrupts if any port has an over-current
  67. * condition. To make matters worse, some motherboards
  68. * hardwire unused USB ports' over-current inputs active!
  69. * To prevent problems, we will not enable resume-detect
  70. * interrupts if any ports are OC.
  71. */
  72. for (port = 0; port < uhci->rh_numports; ++port) {
  73. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  74. USBPORTSC_OC)
  75. return 1;
  76. }
  77. break;
  78. }
  79. return 0;
  80. }
  81. static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
  82. {
  83. int port;
  84. const char *sys_info;
  85. static const char bad_Asus_board[] = "A7V8X";
  86. /* One of Asus's motherboards has a bug which causes it to
  87. * wake up immediately from suspend-to-RAM if any of the ports
  88. * are connected. In such cases we will not set EGSM.
  89. */
  90. sys_info = dmi_get_system_info(DMI_BOARD_NAME);
  91. if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
  92. for (port = 0; port < uhci->rh_numports; ++port) {
  93. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  94. USBPORTSC_CCS)
  95. return 1;
  96. }
  97. }
  98. return 0;
  99. }
  100. static int uhci_pci_init(struct usb_hcd *hcd)
  101. {
  102. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  103. uhci->io_addr = (unsigned long) hcd->rsrc_start;
  104. uhci->rh_numports = uhci_count_ports(hcd);
  105. /*
  106. * Intel controllers report the OverCurrent bit active on. VIA
  107. * and ZHAOXIN controllers report it active off, so we'll adjust
  108. * the bit value. (It's not standardized in the UHCI spec.)
  109. */
  110. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA ||
  111. to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_ZHAOXIN)
  112. uhci->oc_low = 1;
  113. /* HP's server management chip requires a longer port reset delay. */
  114. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
  115. uhci->wait_for_hp = 1;
  116. /* Intel controllers use non-PME wakeup signalling */
  117. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
  118. device_set_wakeup_capable(uhci_dev(uhci), true);
  119. /* Set up pointers to PCI-specific functions */
  120. uhci->reset_hc = uhci_pci_reset_hc;
  121. uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
  122. uhci->configure_hc = uhci_pci_configure_hc;
  123. uhci->resume_detect_interrupts_are_broken =
  124. uhci_pci_resume_detect_interrupts_are_broken;
  125. uhci->global_suspend_mode_is_broken =
  126. uhci_pci_global_suspend_mode_is_broken;
  127. /* Kick BIOS off this hardware and reset if the controller
  128. * isn't already safely quiescent.
  129. */
  130. check_and_reset_hc(uhci);
  131. return 0;
  132. }
  133. /* Make sure the controller is quiescent and that we're not using it
  134. * any more. This is mainly for the benefit of programs which, like kexec,
  135. * expect the hardware to be idle: not doing DMA or generating IRQs.
  136. *
  137. * This routine may be called in a damaged or failing kernel. Hence we
  138. * do not acquire the spinlock before shutting down the controller.
  139. */
  140. static void uhci_shutdown(struct pci_dev *pdev)
  141. {
  142. struct usb_hcd *hcd = pci_get_drvdata(pdev);
  143. uhci_hc_died(hcd_to_uhci(hcd));
  144. }
  145. #ifdef CONFIG_PM
  146. static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
  147. static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
  148. {
  149. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  150. struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
  151. int rc = 0;
  152. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  153. spin_lock_irq(&uhci->lock);
  154. if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
  155. goto done_okay; /* Already suspended or dead */
  156. /* All PCI host controllers are required to disable IRQ generation
  157. * at the source, so we must turn off PIRQ.
  158. */
  159. pci_write_config_word(pdev, USBLEGSUP, 0);
  160. clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  161. /* Enable platform-specific non-PME# wakeup */
  162. if (do_wakeup) {
  163. if (pdev->vendor == PCI_VENDOR_ID_INTEL)
  164. pci_write_config_byte(pdev, USBRES_INTEL,
  165. USBPORT1EN | USBPORT2EN);
  166. }
  167. done_okay:
  168. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  169. spin_unlock_irq(&uhci->lock);
  170. synchronize_irq(hcd->irq);
  171. /* Check for race with a wakeup request */
  172. if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
  173. uhci_pci_resume(hcd, false);
  174. rc = -EBUSY;
  175. }
  176. return rc;
  177. }
  178. static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
  179. {
  180. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  181. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  182. /* Since we aren't in D3 any more, it's safe to set this flag
  183. * even if the controller was dead.
  184. */
  185. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  186. spin_lock_irq(&uhci->lock);
  187. /* Make sure resume from hibernation re-enumerates everything */
  188. if (hibernated) {
  189. uhci->reset_hc(uhci);
  190. finish_reset(uhci);
  191. }
  192. /* The firmware may have changed the controller settings during
  193. * a system wakeup. Check it and reconfigure to avoid problems.
  194. */
  195. else {
  196. check_and_reset_hc(uhci);
  197. }
  198. configure_hc(uhci);
  199. /* Tell the core if the controller had to be reset */
  200. if (uhci->rh_state == UHCI_RH_RESET)
  201. usb_root_hub_lost_power(hcd->self.root_hub);
  202. spin_unlock_irq(&uhci->lock);
  203. /* If interrupts don't work and remote wakeup is enabled then
  204. * the suspended root hub needs to be polled.
  205. */
  206. if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
  207. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  208. /* Does the root hub have a port wakeup pending? */
  209. usb_hcd_poll_rh_status(hcd);
  210. return 0;
  211. }
  212. #endif
  213. static const struct hc_driver uhci_driver = {
  214. .description = hcd_name,
  215. .product_desc = "UHCI Host Controller",
  216. .hcd_priv_size = sizeof(struct uhci_hcd),
  217. /* Generic hardware linkage */
  218. .irq = uhci_irq,
  219. .flags = HCD_DMA | HCD_USB11,
  220. /* Basic lifecycle operations */
  221. .reset = uhci_pci_init,
  222. .start = uhci_start,
  223. #ifdef CONFIG_PM
  224. .pci_suspend = uhci_pci_suspend,
  225. .pci_resume = uhci_pci_resume,
  226. .bus_suspend = uhci_rh_suspend,
  227. .bus_resume = uhci_rh_resume,
  228. #endif
  229. .stop = uhci_stop,
  230. .urb_enqueue = uhci_urb_enqueue,
  231. .urb_dequeue = uhci_urb_dequeue,
  232. .endpoint_disable = uhci_hcd_endpoint_disable,
  233. .get_frame_number = uhci_hcd_get_frame_number,
  234. .hub_status_data = uhci_hub_status_data,
  235. .hub_control = uhci_hub_control,
  236. };
  237. static const struct pci_device_id uhci_pci_ids[] = { {
  238. /* handle any USB UHCI controller */
  239. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
  240. }, { /* end: all zeroes */ }
  241. };
  242. MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
  243. static int uhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  244. {
  245. return usb_hcd_pci_probe(dev, &uhci_driver);
  246. }
  247. static struct pci_driver uhci_pci_driver = {
  248. .name = hcd_name,
  249. .id_table = uhci_pci_ids,
  250. .probe = uhci_pci_probe,
  251. .remove = usb_hcd_pci_remove,
  252. .shutdown = uhci_shutdown,
  253. #ifdef CONFIG_PM
  254. .driver = {
  255. .pm = &usb_hcd_pci_pm_ops
  256. },
  257. #endif
  258. };
  259. MODULE_SOFTDEP("pre: ehci_pci");