ohci-tmio.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * OHCI HCD(Host Controller Driver) for USB.
  4. *
  5. *(C) Copyright 1999 Roman Weissgaerber <[email protected]>
  6. *(C) Copyright 2000-2002 David Brownell <[email protected]>
  7. *(C) Copyright 2002 Hewlett-Packard Company
  8. *
  9. * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
  10. * (C) Copyright 2005 Chris Humbert <[email protected]>
  11. * (C) Copyright 2007, 2008 Dmitry Baryshkov <[email protected]>
  12. *
  13. * This is known to work with the following variants:
  14. * TC6393XB revision 3 (32kB SRAM)
  15. *
  16. * The TMIO's OHCI core DMAs through a small internal buffer that
  17. * is directly addressable by the CPU.
  18. *
  19. * Written from sparse documentation from Toshiba and Sharp's driver
  20. * for the 2.4 kernel,
  21. * usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/core.h>
  25. #include <linux/mfd/tmio.h>
  26. #include <linux/dma-mapping.h>
  27. /*-------------------------------------------------------------------------*/
  28. /*
  29. * USB Host Controller Configuration Register
  30. */
  31. #define CCR_REVID 0x08 /* b Revision ID */
  32. #define CCR_BASE 0x10 /* l USB Control Register Base Address Low */
  33. #define CCR_ILME 0x40 /* b Internal Local Memory Enable */
  34. #define CCR_PM 0x4c /* w Power Management */
  35. #define CCR_INTC 0x50 /* b INT Control */
  36. #define CCR_LMW1L 0x54 /* w Local Memory Window 1 LMADRS Low */
  37. #define CCR_LMW1H 0x56 /* w Local Memory Window 1 LMADRS High */
  38. #define CCR_LMW1BL 0x58 /* w Local Memory Window 1 Base Address Low */
  39. #define CCR_LMW1BH 0x5A /* w Local Memory Window 1 Base Address High */
  40. #define CCR_LMW2L 0x5C /* w Local Memory Window 2 LMADRS Low */
  41. #define CCR_LMW2H 0x5E /* w Local Memory Window 2 LMADRS High */
  42. #define CCR_LMW2BL 0x60 /* w Local Memory Window 2 Base Address Low */
  43. #define CCR_LMW2BH 0x62 /* w Local Memory Window 2 Base Address High */
  44. #define CCR_MISC 0xFC /* b MISC */
  45. #define CCR_PM_GKEN 0x0001
  46. #define CCR_PM_CKRNEN 0x0002
  47. #define CCR_PM_USBPW1 0x0004
  48. #define CCR_PM_USBPW2 0x0008
  49. #define CCR_PM_USBPW3 0x0010
  50. #define CCR_PM_PMEE 0x0100
  51. #define CCR_PM_PMES 0x8000
  52. /*-------------------------------------------------------------------------*/
  53. struct tmio_hcd {
  54. void __iomem *ccr;
  55. spinlock_t lock; /* protects RMW cycles */
  56. };
  57. #define hcd_to_tmio(hcd) ((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
  58. /*-------------------------------------------------------------------------*/
  59. static void tmio_write_pm(struct platform_device *dev)
  60. {
  61. struct usb_hcd *hcd = platform_get_drvdata(dev);
  62. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  63. u16 pm;
  64. unsigned long flags;
  65. spin_lock_irqsave(&tmio->lock, flags);
  66. pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
  67. CCR_PM_PMEE | CCR_PM_PMES;
  68. tmio_iowrite16(pm, tmio->ccr + CCR_PM);
  69. spin_unlock_irqrestore(&tmio->lock, flags);
  70. }
  71. static void tmio_stop_hc(struct platform_device *dev)
  72. {
  73. struct usb_hcd *hcd = platform_get_drvdata(dev);
  74. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  75. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  76. u16 pm;
  77. pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
  78. switch (ohci->num_ports) {
  79. default:
  80. dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
  81. fallthrough;
  82. case 3:
  83. pm |= CCR_PM_USBPW3;
  84. fallthrough;
  85. case 2:
  86. pm |= CCR_PM_USBPW2;
  87. fallthrough;
  88. case 1:
  89. pm |= CCR_PM_USBPW1;
  90. }
  91. tmio_iowrite8(0, tmio->ccr + CCR_INTC);
  92. tmio_iowrite8(0, tmio->ccr + CCR_ILME);
  93. tmio_iowrite16(0, tmio->ccr + CCR_BASE);
  94. tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
  95. tmio_iowrite16(pm, tmio->ccr + CCR_PM);
  96. }
  97. static void tmio_start_hc(struct platform_device *dev)
  98. {
  99. struct usb_hcd *hcd = platform_get_drvdata(dev);
  100. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  101. unsigned long base = hcd->rsrc_start;
  102. tmio_write_pm(dev);
  103. tmio_iowrite16(base, tmio->ccr + CCR_BASE);
  104. tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
  105. tmio_iowrite8(1, tmio->ccr + CCR_ILME);
  106. tmio_iowrite8(2, tmio->ccr + CCR_INTC);
  107. dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
  108. tmio_ioread8(tmio->ccr + CCR_REVID),
  109. (u64) hcd->rsrc_start, hcd->irq);
  110. }
  111. static int ohci_tmio_start(struct usb_hcd *hcd)
  112. {
  113. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  114. int ret;
  115. if ((ret = ohci_init(ohci)) < 0)
  116. return ret;
  117. if ((ret = ohci_run(ohci)) < 0) {
  118. dev_err(hcd->self.controller, "can't start %s\n",
  119. hcd->self.bus_name);
  120. ohci_stop(hcd);
  121. return ret;
  122. }
  123. return 0;
  124. }
  125. static const struct hc_driver ohci_tmio_hc_driver = {
  126. .description = hcd_name,
  127. .product_desc = "TMIO OHCI USB Host Controller",
  128. .hcd_priv_size = sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
  129. /* generic hardware linkage */
  130. .irq = ohci_irq,
  131. .flags = HCD_USB11 | HCD_MEMORY,
  132. /* basic lifecycle operations */
  133. .start = ohci_tmio_start,
  134. .stop = ohci_stop,
  135. .shutdown = ohci_shutdown,
  136. /* managing i/o requests and associated device resources */
  137. .urb_enqueue = ohci_urb_enqueue,
  138. .urb_dequeue = ohci_urb_dequeue,
  139. .endpoint_disable = ohci_endpoint_disable,
  140. /* scheduling support */
  141. .get_frame_number = ohci_get_frame,
  142. /* root hub support */
  143. .hub_status_data = ohci_hub_status_data,
  144. .hub_control = ohci_hub_control,
  145. #ifdef CONFIG_PM
  146. .bus_suspend = ohci_bus_suspend,
  147. .bus_resume = ohci_bus_resume,
  148. #endif
  149. .start_port_reset = ohci_start_port_reset,
  150. };
  151. /*-------------------------------------------------------------------------*/
  152. static struct platform_driver ohci_hcd_tmio_driver;
  153. static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
  154. {
  155. const struct mfd_cell *cell = mfd_get_cell(dev);
  156. struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
  157. struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
  158. struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
  159. int irq = platform_get_irq(dev, 0);
  160. struct tmio_hcd *tmio;
  161. struct ohci_hcd *ohci;
  162. struct usb_hcd *hcd;
  163. int ret;
  164. if (usb_disabled())
  165. return -ENODEV;
  166. if (!cell || !regs || !config || !sram)
  167. return -EINVAL;
  168. if (irq < 0)
  169. return irq;
  170. hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
  171. if (!hcd) {
  172. ret = -ENOMEM;
  173. goto err_usb_create_hcd;
  174. }
  175. hcd->rsrc_start = regs->start;
  176. hcd->rsrc_len = resource_size(regs);
  177. tmio = hcd_to_tmio(hcd);
  178. spin_lock_init(&tmio->lock);
  179. tmio->ccr = ioremap(config->start, resource_size(config));
  180. if (!tmio->ccr) {
  181. ret = -ENOMEM;
  182. goto err_ioremap_ccr;
  183. }
  184. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  185. if (!hcd->regs) {
  186. ret = -ENOMEM;
  187. goto err_ioremap_regs;
  188. }
  189. if (cell->enable) {
  190. ret = cell->enable(dev);
  191. if (ret)
  192. goto err_enable;
  193. }
  194. tmio_start_hc(dev);
  195. ohci = hcd_to_ohci(hcd);
  196. ohci_hcd_init(ohci);
  197. ret = usb_hcd_setup_local_mem(hcd, sram->start, sram->start,
  198. resource_size(sram));
  199. if (ret < 0)
  200. goto err_enable;
  201. ret = usb_add_hcd(hcd, irq, 0);
  202. if (ret)
  203. goto err_add_hcd;
  204. device_wakeup_enable(hcd->self.controller);
  205. if (ret == 0)
  206. return ret;
  207. usb_remove_hcd(hcd);
  208. err_add_hcd:
  209. tmio_stop_hc(dev);
  210. if (cell->disable)
  211. cell->disable(dev);
  212. err_enable:
  213. iounmap(hcd->regs);
  214. err_ioremap_regs:
  215. iounmap(tmio->ccr);
  216. err_ioremap_ccr:
  217. usb_put_hcd(hcd);
  218. err_usb_create_hcd:
  219. return ret;
  220. }
  221. static int ohci_hcd_tmio_drv_remove(struct platform_device *dev)
  222. {
  223. struct usb_hcd *hcd = platform_get_drvdata(dev);
  224. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  225. const struct mfd_cell *cell = mfd_get_cell(dev);
  226. usb_remove_hcd(hcd);
  227. tmio_stop_hc(dev);
  228. if (cell->disable)
  229. cell->disable(dev);
  230. iounmap(hcd->regs);
  231. iounmap(tmio->ccr);
  232. usb_put_hcd(hcd);
  233. return 0;
  234. }
  235. #ifdef CONFIG_PM
  236. static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
  237. {
  238. const struct mfd_cell *cell = mfd_get_cell(dev);
  239. struct usb_hcd *hcd = platform_get_drvdata(dev);
  240. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  241. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  242. unsigned long flags;
  243. u8 misc;
  244. int ret;
  245. if (time_before(jiffies, ohci->next_statechange))
  246. msleep(5);
  247. ohci->next_statechange = jiffies;
  248. spin_lock_irqsave(&tmio->lock, flags);
  249. misc = tmio_ioread8(tmio->ccr + CCR_MISC);
  250. misc |= 1 << 3; /* USSUSP */
  251. tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
  252. spin_unlock_irqrestore(&tmio->lock, flags);
  253. if (cell->suspend) {
  254. ret = cell->suspend(dev);
  255. if (ret)
  256. return ret;
  257. }
  258. return 0;
  259. }
  260. static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
  261. {
  262. const struct mfd_cell *cell = mfd_get_cell(dev);
  263. struct usb_hcd *hcd = platform_get_drvdata(dev);
  264. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  265. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  266. unsigned long flags;
  267. u8 misc;
  268. int ret;
  269. if (time_before(jiffies, ohci->next_statechange))
  270. msleep(5);
  271. ohci->next_statechange = jiffies;
  272. if (cell->resume) {
  273. ret = cell->resume(dev);
  274. if (ret)
  275. return ret;
  276. }
  277. tmio_start_hc(dev);
  278. spin_lock_irqsave(&tmio->lock, flags);
  279. misc = tmio_ioread8(tmio->ccr + CCR_MISC);
  280. misc &= ~(1 << 3); /* USSUSP */
  281. tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
  282. spin_unlock_irqrestore(&tmio->lock, flags);
  283. ohci_resume(hcd, false);
  284. return 0;
  285. }
  286. #else
  287. #define ohci_hcd_tmio_drv_suspend NULL
  288. #define ohci_hcd_tmio_drv_resume NULL
  289. #endif
  290. static struct platform_driver ohci_hcd_tmio_driver = {
  291. .probe = ohci_hcd_tmio_drv_probe,
  292. .remove = ohci_hcd_tmio_drv_remove,
  293. .shutdown = usb_hcd_platform_shutdown,
  294. .suspend = ohci_hcd_tmio_drv_suspend,
  295. .resume = ohci_hcd_tmio_drv_resume,
  296. .driver = {
  297. .name = "tmio-ohci",
  298. },
  299. };