ehci-hub.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2001-2004 by David Brownell
  4. */
  5. /* this file is part of ehci-hcd.c */
  6. /*-------------------------------------------------------------------------*/
  7. /*
  8. * EHCI Root Hub ... the nonsharable stuff
  9. *
  10. * Registers don't need cpu_to_le32, that happens transparently
  11. */
  12. /*-------------------------------------------------------------------------*/
  13. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  14. #ifdef CONFIG_PM
  15. static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
  16. static int persist_enabled_on_companion(struct usb_device *udev, void *unused)
  17. {
  18. return !udev->maxchild && udev->persist_enabled &&
  19. udev->bus->root_hub->speed < USB_SPEED_HIGH;
  20. }
  21. /* After a power loss, ports that were owned by the companion must be
  22. * reset so that the companion can still own them.
  23. */
  24. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  25. {
  26. u32 __iomem *reg;
  27. u32 status;
  28. int port;
  29. __le32 buf;
  30. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  31. if (!ehci->owned_ports)
  32. return;
  33. /*
  34. * USB 1.1 devices are mostly HIDs, which don't need to persist across
  35. * suspends. If we ensure that none of our companion's devices have
  36. * persist_enabled (by looking through all USB 1.1 buses in the system),
  37. * we can skip this and avoid slowing resume down. Devices without
  38. * persist will just get reenumerated shortly after resume anyway.
  39. */
  40. if (!usb_for_each_dev(NULL, persist_enabled_on_companion))
  41. return;
  42. /* Make sure the ports are powered */
  43. port = HCS_N_PORTS(ehci->hcs_params);
  44. while (port--) {
  45. if (test_bit(port, &ehci->owned_ports)) {
  46. reg = &ehci->regs->port_status[port];
  47. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  48. if (!(status & PORT_POWER))
  49. ehci_port_power(ehci, port, true);
  50. }
  51. }
  52. /* Give the connections some time to appear */
  53. msleep(20);
  54. spin_lock_irq(&ehci->lock);
  55. port = HCS_N_PORTS(ehci->hcs_params);
  56. while (port--) {
  57. if (test_bit(port, &ehci->owned_ports)) {
  58. reg = &ehci->regs->port_status[port];
  59. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  60. /* Port already owned by companion? */
  61. if (status & PORT_OWNER)
  62. clear_bit(port, &ehci->owned_ports);
  63. else if (test_bit(port, &ehci->companion_ports))
  64. ehci_writel(ehci, status & ~PORT_PE, reg);
  65. else {
  66. spin_unlock_irq(&ehci->lock);
  67. ehci_hub_control(hcd, SetPortFeature,
  68. USB_PORT_FEAT_RESET, port + 1,
  69. NULL, 0);
  70. spin_lock_irq(&ehci->lock);
  71. }
  72. }
  73. }
  74. spin_unlock_irq(&ehci->lock);
  75. if (!ehci->owned_ports)
  76. return;
  77. msleep(90); /* Wait for resets to complete */
  78. spin_lock_irq(&ehci->lock);
  79. port = HCS_N_PORTS(ehci->hcs_params);
  80. while (port--) {
  81. if (test_bit(port, &ehci->owned_ports)) {
  82. spin_unlock_irq(&ehci->lock);
  83. ehci_hub_control(hcd, GetPortStatus,
  84. 0, port + 1,
  85. (char *) &buf, sizeof(buf));
  86. spin_lock_irq(&ehci->lock);
  87. /* The companion should now own the port,
  88. * but if something went wrong the port must not
  89. * remain enabled.
  90. */
  91. reg = &ehci->regs->port_status[port];
  92. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  93. if (status & PORT_OWNER)
  94. ehci_writel(ehci, status | PORT_CSC, reg);
  95. else {
  96. ehci_dbg(ehci, "failed handover port %d: %x\n",
  97. port + 1, status);
  98. ehci_writel(ehci, status & ~PORT_PE, reg);
  99. }
  100. }
  101. }
  102. ehci->owned_ports = 0;
  103. spin_unlock_irq(&ehci->lock);
  104. }
  105. static int ehci_port_change(struct ehci_hcd *ehci)
  106. {
  107. int i = HCS_N_PORTS(ehci->hcs_params);
  108. /* First check if the controller indicates a change event */
  109. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  110. return 1;
  111. /*
  112. * Not all controllers appear to update this while going from D3 to D0,
  113. * so check the individual port status registers as well
  114. */
  115. while (i--)
  116. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  117. return 1;
  118. return 0;
  119. }
  120. void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  121. bool suspending, bool do_wakeup)
  122. {
  123. int port;
  124. u32 temp;
  125. /* If remote wakeup is enabled for the root hub but disabled
  126. * for the controller, we must adjust all the port wakeup flags
  127. * when the controller is suspended or resumed. In all other
  128. * cases they don't need to be changed.
  129. */
  130. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  131. return;
  132. spin_lock_irq(&ehci->lock);
  133. /* clear phy low-power mode before changing wakeup flags */
  134. if (ehci->has_tdi_phy_lpm) {
  135. port = HCS_N_PORTS(ehci->hcs_params);
  136. while (port--) {
  137. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  138. temp = ehci_readl(ehci, hostpc_reg);
  139. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  140. }
  141. spin_unlock_irq(&ehci->lock);
  142. msleep(5);
  143. spin_lock_irq(&ehci->lock);
  144. }
  145. port = HCS_N_PORTS(ehci->hcs_params);
  146. while (port--) {
  147. u32 __iomem *reg = &ehci->regs->port_status[port];
  148. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  149. u32 t2 = t1 & ~PORT_WAKE_BITS;
  150. /* If we are suspending the controller, clear the flags.
  151. * If we are resuming the controller, set the wakeup flags.
  152. */
  153. if (!suspending) {
  154. if (t1 & PORT_CONNECT)
  155. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  156. else
  157. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  158. }
  159. ehci_writel(ehci, t2, reg);
  160. }
  161. /* enter phy low-power mode again */
  162. if (ehci->has_tdi_phy_lpm) {
  163. port = HCS_N_PORTS(ehci->hcs_params);
  164. while (port--) {
  165. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  166. temp = ehci_readl(ehci, hostpc_reg);
  167. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  168. }
  169. }
  170. /* Does the root hub have a port wakeup pending? */
  171. if (!suspending && ehci_port_change(ehci))
  172. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  173. spin_unlock_irq(&ehci->lock);
  174. }
  175. EXPORT_SYMBOL_GPL(ehci_adjust_port_wakeup_flags);
  176. static int ehci_bus_suspend (struct usb_hcd *hcd)
  177. {
  178. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  179. int port;
  180. int mask;
  181. int changed;
  182. bool fs_idle_delay;
  183. ehci_dbg(ehci, "suspend root hub\n");
  184. if (time_before (jiffies, ehci->next_statechange))
  185. msleep(5);
  186. /* stop the schedules */
  187. ehci_quiesce(ehci);
  188. spin_lock_irq (&ehci->lock);
  189. if (ehci->rh_state < EHCI_RH_RUNNING)
  190. goto done;
  191. /* Once the controller is stopped, port resumes that are already
  192. * in progress won't complete. Hence if remote wakeup is enabled
  193. * for the root hub and any ports are in the middle of a resume or
  194. * remote wakeup, we must fail the suspend.
  195. */
  196. if (hcd->self.root_hub->do_remote_wakeup) {
  197. if (ehci->resuming_ports) {
  198. spin_unlock_irq(&ehci->lock);
  199. ehci_dbg(ehci, "suspend failed because a port is resuming\n");
  200. return -EBUSY;
  201. }
  202. }
  203. /* Unlike other USB host controller types, EHCI doesn't have
  204. * any notion of "global" or bus-wide suspend. The driver has
  205. * to manually suspend all the active unsuspended ports, and
  206. * then manually resume them in the bus_resume() routine.
  207. */
  208. ehci->bus_suspended = 0;
  209. ehci->owned_ports = 0;
  210. changed = 0;
  211. fs_idle_delay = false;
  212. port = HCS_N_PORTS(ehci->hcs_params);
  213. while (port--) {
  214. u32 __iomem *reg = &ehci->regs->port_status [port];
  215. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  216. u32 t2 = t1 & ~PORT_WAKE_BITS;
  217. /* keep track of which ports we suspend */
  218. if (t1 & PORT_OWNER)
  219. set_bit(port, &ehci->owned_ports);
  220. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  221. t2 |= PORT_SUSPEND;
  222. set_bit(port, &ehci->bus_suspended);
  223. }
  224. /* enable remote wakeup on all ports, if told to do so */
  225. if (hcd->self.root_hub->do_remote_wakeup) {
  226. /* only enable appropriate wake bits, otherwise the
  227. * hardware can not go phy low power mode. If a race
  228. * condition happens here(connection change during bits
  229. * set), the port change detection will finally fix it.
  230. */
  231. if (t1 & PORT_CONNECT)
  232. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  233. else
  234. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  235. }
  236. if (t1 != t2) {
  237. /*
  238. * On some controllers, Wake-On-Disconnect will
  239. * generate false wakeup signals until the bus
  240. * switches over to full-speed idle. For their
  241. * sake, add a delay if we need one.
  242. */
  243. if ((t2 & PORT_WKDISC_E) &&
  244. ehci_port_speed(ehci, t2) ==
  245. USB_PORT_STAT_HIGH_SPEED)
  246. fs_idle_delay = true;
  247. ehci_writel(ehci, t2, reg);
  248. changed = 1;
  249. }
  250. }
  251. spin_unlock_irq(&ehci->lock);
  252. if (changed && ehci_has_fsl_susp_errata(ehci))
  253. /*
  254. * Wait for at least 10 millisecondes to ensure the controller
  255. * enter the suspend status before initiating a port resume
  256. * using the Force Port Resume bit (Not-EHCI compatible).
  257. */
  258. usleep_range(10000, 20000);
  259. if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) {
  260. /*
  261. * Wait for HCD to enter low-power mode or for the bus
  262. * to switch to full-speed idle.
  263. */
  264. usleep_range(5000, 5500);
  265. }
  266. if (changed && ehci->has_tdi_phy_lpm) {
  267. spin_lock_irq(&ehci->lock);
  268. port = HCS_N_PORTS(ehci->hcs_params);
  269. while (port--) {
  270. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  271. u32 t3;
  272. t3 = ehci_readl(ehci, hostpc_reg);
  273. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  274. t3 = ehci_readl(ehci, hostpc_reg);
  275. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  276. port, (t3 & HOSTPC_PHCD) ?
  277. "succeeded" : "failed");
  278. }
  279. spin_unlock_irq(&ehci->lock);
  280. }
  281. /* Apparently some devices need a >= 1-uframe delay here */
  282. if (ehci->bus_suspended)
  283. udelay(150);
  284. /* turn off now-idle HC */
  285. ehci_halt (ehci);
  286. spin_lock_irq(&ehci->lock);
  287. if (ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_POLL_DEAD))
  288. ehci_handle_controller_death(ehci);
  289. if (ehci->rh_state != EHCI_RH_RUNNING)
  290. goto done;
  291. ehci->rh_state = EHCI_RH_SUSPENDED;
  292. unlink_empty_async_suspended(ehci);
  293. /* Some Synopsys controllers mistakenly leave IAA turned on */
  294. ehci_writel(ehci, STS_IAA, &ehci->regs->status);
  295. /* Any IAA cycle that started before the suspend is now invalid */
  296. end_iaa_cycle(ehci);
  297. ehci_handle_start_intr_unlinks(ehci);
  298. ehci_handle_intr_unlinks(ehci);
  299. end_free_itds(ehci);
  300. /* allow remote wakeup */
  301. mask = INTR_MASK;
  302. if (!hcd->self.root_hub->do_remote_wakeup)
  303. mask &= ~STS_PCD;
  304. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  305. ehci_readl(ehci, &ehci->regs->intr_enable);
  306. done:
  307. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  308. ehci->enabled_hrtimer_events = 0;
  309. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  310. spin_unlock_irq (&ehci->lock);
  311. hrtimer_cancel(&ehci->hrtimer);
  312. return 0;
  313. }
  314. /* caller has locked the root hub, and should reset/reinit on error */
  315. static int ehci_bus_resume (struct usb_hcd *hcd)
  316. {
  317. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  318. u32 temp;
  319. u32 power_okay;
  320. int i;
  321. unsigned long resume_needed = 0;
  322. if (time_before (jiffies, ehci->next_statechange))
  323. msleep(5);
  324. spin_lock_irq (&ehci->lock);
  325. if (!HCD_HW_ACCESSIBLE(hcd) || ehci->shutdown)
  326. goto shutdown;
  327. if (unlikely(ehci->debug)) {
  328. if (!dbgp_reset_prep(hcd))
  329. ehci->debug = NULL;
  330. else
  331. dbgp_external_startup(hcd);
  332. }
  333. /* Ideally and we've got a real resume here, and no port's power
  334. * was lost. (For PCI, that means Vaux was maintained.) But we
  335. * could instead be restoring a swsusp snapshot -- so that BIOS was
  336. * the last user of the controller, not reset/pm hardware keeping
  337. * state we gave to it.
  338. */
  339. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  340. ehci_dbg(ehci, "resume root hub%s\n",
  341. power_okay ? "" : " after power loss");
  342. /* at least some APM implementations will try to deliver
  343. * IRQs right away, so delay them until we're ready.
  344. */
  345. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  346. /* re-init operational registers */
  347. ehci_writel(ehci, 0, &ehci->regs->segment);
  348. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  349. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  350. /* restore CMD_RUN, framelist size, and irq threshold */
  351. ehci->command |= CMD_RUN;
  352. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  353. ehci->rh_state = EHCI_RH_RUNNING;
  354. /*
  355. * According to Bugzilla #8190, the port status for some controllers
  356. * will be wrong without a delay. At their wrong status, the port
  357. * is enabled, but not suspended neither resumed.
  358. */
  359. i = HCS_N_PORTS(ehci->hcs_params);
  360. while (i--) {
  361. temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
  362. if ((temp & PORT_PE) &&
  363. !(temp & (PORT_SUSPEND | PORT_RESUME))) {
  364. ehci_dbg(ehci, "Port status(0x%x) is wrong\n", temp);
  365. spin_unlock_irq(&ehci->lock);
  366. msleep(8);
  367. spin_lock_irq(&ehci->lock);
  368. break;
  369. }
  370. }
  371. if (ehci->shutdown)
  372. goto shutdown;
  373. /* clear phy low-power mode before resume */
  374. if (ehci->bus_suspended && ehci->has_tdi_phy_lpm) {
  375. i = HCS_N_PORTS(ehci->hcs_params);
  376. while (i--) {
  377. if (test_bit(i, &ehci->bus_suspended)) {
  378. u32 __iomem *hostpc_reg =
  379. &ehci->regs->hostpc[i];
  380. temp = ehci_readl(ehci, hostpc_reg);
  381. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  382. hostpc_reg);
  383. }
  384. }
  385. spin_unlock_irq(&ehci->lock);
  386. msleep(5);
  387. spin_lock_irq(&ehci->lock);
  388. if (ehci->shutdown)
  389. goto shutdown;
  390. }
  391. /* manually resume the ports we suspended during bus_suspend() */
  392. i = HCS_N_PORTS (ehci->hcs_params);
  393. while (i--) {
  394. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  395. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  396. if (test_bit(i, &ehci->bus_suspended) &&
  397. (temp & PORT_SUSPEND)) {
  398. temp |= PORT_RESUME;
  399. set_bit(i, &resume_needed);
  400. }
  401. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  402. }
  403. /*
  404. * msleep for USB_RESUME_TIMEOUT ms only if code is trying to resume
  405. * port
  406. */
  407. if (resume_needed) {
  408. spin_unlock_irq(&ehci->lock);
  409. msleep(USB_RESUME_TIMEOUT);
  410. spin_lock_irq(&ehci->lock);
  411. if (ehci->shutdown)
  412. goto shutdown;
  413. }
  414. i = HCS_N_PORTS (ehci->hcs_params);
  415. while (i--) {
  416. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  417. if (test_bit(i, &resume_needed)) {
  418. temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME);
  419. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  420. }
  421. }
  422. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  423. spin_unlock_irq(&ehci->lock);
  424. ehci_handover_companion_ports(ehci);
  425. /* Now we can safely re-enable irqs */
  426. spin_lock_irq(&ehci->lock);
  427. if (ehci->shutdown)
  428. goto shutdown;
  429. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  430. (void) ehci_readl(ehci, &ehci->regs->intr_enable);
  431. spin_unlock_irq(&ehci->lock);
  432. return 0;
  433. shutdown:
  434. spin_unlock_irq(&ehci->lock);
  435. return -ESHUTDOWN;
  436. }
  437. static unsigned long ehci_get_resuming_ports(struct usb_hcd *hcd)
  438. {
  439. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  440. return ehci->resuming_ports;
  441. }
  442. #else
  443. #define ehci_bus_suspend NULL
  444. #define ehci_bus_resume NULL
  445. #define ehci_get_resuming_ports NULL
  446. #endif /* CONFIG_PM */
  447. /*-------------------------------------------------------------------------*/
  448. /*
  449. * Sets the owner of a port
  450. */
  451. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  452. {
  453. u32 __iomem *status_reg;
  454. u32 port_status;
  455. int try;
  456. status_reg = &ehci->regs->port_status[portnum];
  457. /*
  458. * The controller won't set the OWNER bit if the port is
  459. * enabled, so this loop will sometimes require at least two
  460. * iterations: one to disable the port and one to set OWNER.
  461. */
  462. for (try = 4; try > 0; --try) {
  463. spin_lock_irq(&ehci->lock);
  464. port_status = ehci_readl(ehci, status_reg);
  465. if ((port_status & PORT_OWNER) == new_owner
  466. || (port_status & (PORT_OWNER | PORT_CONNECT))
  467. == 0)
  468. try = 0;
  469. else {
  470. port_status ^= PORT_OWNER;
  471. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  472. ehci_writel(ehci, port_status, status_reg);
  473. }
  474. spin_unlock_irq(&ehci->lock);
  475. if (try > 1)
  476. msleep(5);
  477. }
  478. }
  479. /*-------------------------------------------------------------------------*/
  480. static int check_reset_complete (
  481. struct ehci_hcd *ehci,
  482. int index,
  483. u32 __iomem *status_reg,
  484. int port_status
  485. ) {
  486. if (!(port_status & PORT_CONNECT))
  487. return port_status;
  488. /* if reset finished and it's still not enabled -- handoff */
  489. if (!(port_status & PORT_PE)) {
  490. /* with integrated TT, there's nobody to hand it to! */
  491. if (ehci_is_TDI(ehci)) {
  492. ehci_dbg (ehci,
  493. "Failed to enable port %d on root hub TT\n",
  494. index+1);
  495. return port_status;
  496. }
  497. ehci_dbg (ehci, "port %d full speed --> companion\n",
  498. index + 1);
  499. // what happens if HCS_N_CC(params) == 0 ?
  500. port_status |= PORT_OWNER;
  501. port_status &= ~PORT_RWC_BITS;
  502. ehci_writel(ehci, port_status, status_reg);
  503. /* ensure 440EPX ohci controller state is operational */
  504. if (ehci->has_amcc_usb23)
  505. set_ohci_hcfs(ehci, 1);
  506. } else {
  507. ehci_dbg(ehci, "port %d reset complete, port enabled\n",
  508. index + 1);
  509. /* ensure 440EPx ohci controller state is suspended */
  510. if (ehci->has_amcc_usb23)
  511. set_ohci_hcfs(ehci, 0);
  512. }
  513. return port_status;
  514. }
  515. /*-------------------------------------------------------------------------*/
  516. /* build "status change" packet (one or two bytes) from HC registers */
  517. static int
  518. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  519. {
  520. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  521. u32 temp, status;
  522. u32 mask;
  523. int ports, i, retval = 1;
  524. unsigned long flags;
  525. u32 ppcd = ~0;
  526. /* init status to no-changes */
  527. buf [0] = 0;
  528. ports = HCS_N_PORTS (ehci->hcs_params);
  529. if (ports > 7) {
  530. buf [1] = 0;
  531. retval++;
  532. }
  533. /* Inform the core about resumes-in-progress by returning
  534. * a non-zero value even if there are no status changes.
  535. */
  536. status = ehci->resuming_ports;
  537. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  538. * causing massive log spam unless we completely ignore them. It
  539. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  540. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  541. * PORT_POWER; that's surprising, but maybe within-spec.
  542. */
  543. if (!ignore_oc && !ehci->spurious_oc)
  544. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  545. else
  546. mask = PORT_CSC | PORT_PEC;
  547. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  548. /* no hub change reports (bit 0) for now (power, ...) */
  549. /* port N changes (bit N)? */
  550. spin_lock_irqsave (&ehci->lock, flags);
  551. /* get per-port change detect bits */
  552. if (ehci->has_ppcd)
  553. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  554. for (i = 0; i < ports; i++) {
  555. /* leverage per-port change bits feature */
  556. if (ppcd & (1 << i))
  557. temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
  558. else
  559. temp = 0;
  560. /*
  561. * Return status information even for ports with OWNER set.
  562. * Otherwise hub_wq wouldn't see the disconnect event when a
  563. * high-speed device is switched over to the companion
  564. * controller by the user.
  565. */
  566. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  567. || (ehci->reset_done[i] && time_after_eq(
  568. jiffies, ehci->reset_done[i]))
  569. || ehci_has_ci_pec_bug(ehci, temp)) {
  570. if (i < 7)
  571. buf [0] |= 1 << (i + 1);
  572. else
  573. buf [1] |= 1 << (i - 7);
  574. status = STS_PCD;
  575. }
  576. }
  577. /* If a resume is in progress, make sure it can finish */
  578. if (ehci->resuming_ports)
  579. mod_timer(&hcd->rh_timer, jiffies + msecs_to_jiffies(25));
  580. spin_unlock_irqrestore (&ehci->lock, flags);
  581. return status ? retval : 0;
  582. }
  583. /*-------------------------------------------------------------------------*/
  584. static void
  585. ehci_hub_descriptor (
  586. struct ehci_hcd *ehci,
  587. struct usb_hub_descriptor *desc
  588. ) {
  589. int ports = HCS_N_PORTS (ehci->hcs_params);
  590. u16 temp;
  591. desc->bDescriptorType = USB_DT_HUB;
  592. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  593. desc->bHubContrCurrent = 0;
  594. desc->bNbrPorts = ports;
  595. temp = 1 + (ports / 8);
  596. desc->bDescLength = 7 + 2 * temp;
  597. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  598. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  599. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  600. temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
  601. if (HCS_PPC (ehci->hcs_params))
  602. temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
  603. else
  604. temp |= HUB_CHAR_NO_LPSM; /* no power switching */
  605. #if 0
  606. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  607. if (HCS_INDICATOR (ehci->hcs_params))
  608. temp |= HUB_CHAR_PORTIND; /* per-port indicators (LEDs) */
  609. #endif
  610. desc->wHubCharacteristics = cpu_to_le16(temp);
  611. }
  612. /*-------------------------------------------------------------------------*/
  613. int ehci_hub_control(
  614. struct usb_hcd *hcd,
  615. u16 typeReq,
  616. u16 wValue,
  617. u16 wIndex,
  618. char *buf,
  619. u16 wLength
  620. ) {
  621. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  622. int ports = HCS_N_PORTS (ehci->hcs_params);
  623. u32 __iomem *status_reg, *hostpc_reg;
  624. u32 temp, temp1, status;
  625. unsigned long flags;
  626. int retval = 0;
  627. unsigned selector;
  628. /*
  629. * Avoid out-of-bounds values while calculating the port index
  630. * from wIndex. The compiler doesn't like pointers to invalid
  631. * addresses, even if they are never used.
  632. */
  633. temp = (wIndex - 1) & 0xff;
  634. if (temp >= HCS_N_PORTS_MAX)
  635. temp = 0;
  636. status_reg = &ehci->regs->port_status[temp];
  637. hostpc_reg = &ehci->regs->hostpc[temp];
  638. /*
  639. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  640. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  641. * (track current state ourselves) ... blink for diagnostics,
  642. * power, "this is the one", etc. EHCI spec supports this.
  643. */
  644. spin_lock_irqsave (&ehci->lock, flags);
  645. switch (typeReq) {
  646. case ClearHubFeature:
  647. switch (wValue) {
  648. case C_HUB_LOCAL_POWER:
  649. case C_HUB_OVER_CURRENT:
  650. /* no hub-wide feature/status flags */
  651. break;
  652. default:
  653. goto error;
  654. }
  655. break;
  656. case ClearPortFeature:
  657. if (!wIndex || wIndex > ports)
  658. goto error;
  659. wIndex--;
  660. temp = ehci_readl(ehci, status_reg);
  661. temp &= ~PORT_RWC_BITS;
  662. /*
  663. * Even if OWNER is set, so the port is owned by the
  664. * companion controller, hub_wq needs to be able to clear
  665. * the port-change status bits (especially
  666. * USB_PORT_STAT_C_CONNECTION).
  667. */
  668. switch (wValue) {
  669. case USB_PORT_FEAT_ENABLE:
  670. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  671. break;
  672. case USB_PORT_FEAT_C_ENABLE:
  673. ehci_writel(ehci, temp | PORT_PEC, status_reg);
  674. break;
  675. case USB_PORT_FEAT_SUSPEND:
  676. if (temp & PORT_RESET)
  677. goto error;
  678. if (ehci->no_selective_suspend)
  679. break;
  680. #ifdef CONFIG_USB_OTG
  681. if ((hcd->self.otg_port == (wIndex + 1))
  682. && hcd->self.b_hnp_enable) {
  683. otg_start_hnp(hcd->usb_phy->otg);
  684. break;
  685. }
  686. #endif
  687. if (!(temp & PORT_SUSPEND))
  688. break;
  689. if ((temp & PORT_PE) == 0)
  690. goto error;
  691. /* clear phy low-power mode before resume */
  692. if (ehci->has_tdi_phy_lpm) {
  693. temp1 = ehci_readl(ehci, hostpc_reg);
  694. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  695. hostpc_reg);
  696. spin_unlock_irqrestore(&ehci->lock, flags);
  697. msleep(5);/* wait to leave low-power mode */
  698. spin_lock_irqsave(&ehci->lock, flags);
  699. }
  700. /* resume signaling for 20 msec */
  701. temp &= ~PORT_WAKE_BITS;
  702. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  703. ehci->reset_done[wIndex] = jiffies
  704. + msecs_to_jiffies(USB_RESUME_TIMEOUT);
  705. set_bit(wIndex, &ehci->resuming_ports);
  706. usb_hcd_start_port_resume(&hcd->self, wIndex);
  707. break;
  708. case USB_PORT_FEAT_C_SUSPEND:
  709. clear_bit(wIndex, &ehci->port_c_suspend);
  710. break;
  711. case USB_PORT_FEAT_POWER:
  712. if (HCS_PPC(ehci->hcs_params)) {
  713. spin_unlock_irqrestore(&ehci->lock, flags);
  714. ehci_port_power(ehci, wIndex, false);
  715. spin_lock_irqsave(&ehci->lock, flags);
  716. }
  717. break;
  718. case USB_PORT_FEAT_C_CONNECTION:
  719. ehci_writel(ehci, temp | PORT_CSC, status_reg);
  720. break;
  721. case USB_PORT_FEAT_C_OVER_CURRENT:
  722. ehci_writel(ehci, temp | PORT_OCC, status_reg);
  723. break;
  724. case USB_PORT_FEAT_C_RESET:
  725. /* GetPortStatus clears reset */
  726. break;
  727. default:
  728. goto error;
  729. }
  730. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  731. break;
  732. case GetHubDescriptor:
  733. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  734. buf);
  735. break;
  736. case GetHubStatus:
  737. /* no hub-wide feature/status flags */
  738. memset (buf, 0, 4);
  739. //cpu_to_le32s ((u32 *) buf);
  740. break;
  741. case GetPortStatus:
  742. if (!wIndex || wIndex > ports)
  743. goto error;
  744. wIndex--;
  745. status = 0;
  746. temp = ehci_readl(ehci, status_reg);
  747. // wPortChange bits
  748. if (temp & PORT_CSC)
  749. status |= USB_PORT_STAT_C_CONNECTION << 16;
  750. if (temp & PORT_PEC)
  751. status |= USB_PORT_STAT_C_ENABLE << 16;
  752. if (ehci_has_ci_pec_bug(ehci, temp)) {
  753. status |= USB_PORT_STAT_C_ENABLE << 16;
  754. ehci_info(ehci,
  755. "PE is cleared by HW port:%d PORTSC:%08x\n",
  756. wIndex + 1, temp);
  757. }
  758. if ((temp & PORT_OCC) && (!ignore_oc && !ehci->spurious_oc)){
  759. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  760. /*
  761. * Hubs should disable port power on over-current.
  762. * However, not all EHCI implementations do this
  763. * automatically, even if they _do_ support per-port
  764. * power switching; they're allowed to just limit the
  765. * current. hub_wq will turn the power back on.
  766. */
  767. if (((temp & PORT_OC) || (ehci->need_oc_pp_cycle))
  768. && HCS_PPC(ehci->hcs_params)) {
  769. spin_unlock_irqrestore(&ehci->lock, flags);
  770. ehci_port_power(ehci, wIndex, false);
  771. spin_lock_irqsave(&ehci->lock, flags);
  772. temp = ehci_readl(ehci, status_reg);
  773. }
  774. }
  775. /* no reset or resume pending */
  776. if (!ehci->reset_done[wIndex]) {
  777. /* Remote Wakeup received? */
  778. if (temp & PORT_RESUME) {
  779. /* resume signaling for 20 msec */
  780. ehci->reset_done[wIndex] = jiffies
  781. + msecs_to_jiffies(20);
  782. usb_hcd_start_port_resume(&hcd->self, wIndex);
  783. set_bit(wIndex, &ehci->resuming_ports);
  784. /* check the port again */
  785. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  786. ehci->reset_done[wIndex]);
  787. }
  788. /* reset or resume not yet complete */
  789. } else if (!time_after_eq(jiffies, ehci->reset_done[wIndex])) {
  790. ; /* wait until it is complete */
  791. /* resume completed */
  792. } else if (test_bit(wIndex, &ehci->resuming_ports)) {
  793. clear_bit(wIndex, &ehci->suspended_ports);
  794. set_bit(wIndex, &ehci->port_c_suspend);
  795. ehci->reset_done[wIndex] = 0;
  796. usb_hcd_end_port_resume(&hcd->self, wIndex);
  797. /* stop resume signaling */
  798. temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME);
  799. ehci_writel(ehci, temp, status_reg);
  800. clear_bit(wIndex, &ehci->resuming_ports);
  801. retval = ehci_handshake(ehci, status_reg,
  802. PORT_RESUME, 0, 2000 /* 2msec */);
  803. if (retval != 0) {
  804. ehci_err(ehci, "port %d resume error %d\n",
  805. wIndex + 1, retval);
  806. goto error;
  807. }
  808. temp = ehci_readl(ehci, status_reg);
  809. /* whoever resets must GetPortStatus to complete it!! */
  810. } else {
  811. status |= USB_PORT_STAT_C_RESET << 16;
  812. ehci->reset_done [wIndex] = 0;
  813. /* force reset to complete */
  814. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  815. status_reg);
  816. /* REVISIT: some hardware needs 550+ usec to clear
  817. * this bit; seems too long to spin routinely...
  818. */
  819. retval = ehci_handshake(ehci, status_reg,
  820. PORT_RESET, 0, 1000);
  821. if (retval != 0) {
  822. ehci_err (ehci, "port %d reset error %d\n",
  823. wIndex + 1, retval);
  824. goto error;
  825. }
  826. /* see what we found out */
  827. temp = check_reset_complete (ehci, wIndex, status_reg,
  828. ehci_readl(ehci, status_reg));
  829. }
  830. /* transfer dedicated ports to the companion hc */
  831. if ((temp & PORT_CONNECT) &&
  832. test_bit(wIndex, &ehci->companion_ports)) {
  833. temp &= ~PORT_RWC_BITS;
  834. temp |= PORT_OWNER;
  835. ehci_writel(ehci, temp, status_reg);
  836. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  837. temp = ehci_readl(ehci, status_reg);
  838. }
  839. /*
  840. * Even if OWNER is set, there's no harm letting hub_wq
  841. * see the wPortStatus values (they should all be 0 except
  842. * for PORT_POWER anyway).
  843. */
  844. if (temp & PORT_CONNECT) {
  845. status |= USB_PORT_STAT_CONNECTION;
  846. // status may be from integrated TT
  847. if (ehci->has_hostpc) {
  848. temp1 = ehci_readl(ehci, hostpc_reg);
  849. status |= ehci_port_speed(ehci, temp1);
  850. } else
  851. status |= ehci_port_speed(ehci, temp);
  852. }
  853. if (temp & PORT_PE)
  854. status |= USB_PORT_STAT_ENABLE;
  855. /* maybe the port was unsuspended without our knowledge */
  856. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  857. status |= USB_PORT_STAT_SUSPEND;
  858. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  859. clear_bit(wIndex, &ehci->suspended_ports);
  860. clear_bit(wIndex, &ehci->resuming_ports);
  861. ehci->reset_done[wIndex] = 0;
  862. if (temp & PORT_PE)
  863. set_bit(wIndex, &ehci->port_c_suspend);
  864. usb_hcd_end_port_resume(&hcd->self, wIndex);
  865. }
  866. if (temp & PORT_OC)
  867. status |= USB_PORT_STAT_OVERCURRENT;
  868. if (temp & PORT_RESET)
  869. status |= USB_PORT_STAT_RESET;
  870. if (temp & PORT_POWER)
  871. status |= USB_PORT_STAT_POWER;
  872. if (test_bit(wIndex, &ehci->port_c_suspend))
  873. status |= USB_PORT_STAT_C_SUSPEND << 16;
  874. if (status & ~0xffff) /* only if wPortChange is interesting */
  875. dbg_port(ehci, "GetStatus", wIndex + 1, temp);
  876. put_unaligned_le32(status, buf);
  877. break;
  878. case SetHubFeature:
  879. switch (wValue) {
  880. case C_HUB_LOCAL_POWER:
  881. case C_HUB_OVER_CURRENT:
  882. /* no hub-wide feature/status flags */
  883. break;
  884. default:
  885. goto error;
  886. }
  887. break;
  888. case SetPortFeature:
  889. selector = wIndex >> 8;
  890. wIndex &= 0xff;
  891. if (unlikely(ehci->debug)) {
  892. /* If the debug port is active any port
  893. * feature requests should get denied */
  894. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  895. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  896. retval = -ENODEV;
  897. goto error_exit;
  898. }
  899. }
  900. if (!wIndex || wIndex > ports)
  901. goto error;
  902. wIndex--;
  903. temp = ehci_readl(ehci, status_reg);
  904. if (temp & PORT_OWNER)
  905. break;
  906. temp &= ~PORT_RWC_BITS;
  907. switch (wValue) {
  908. case USB_PORT_FEAT_SUSPEND:
  909. if (ehci->no_selective_suspend)
  910. break;
  911. if ((temp & PORT_PE) == 0
  912. || (temp & PORT_RESET) != 0)
  913. goto error;
  914. /* After above check the port must be connected.
  915. * Set appropriate bit thus could put phy into low power
  916. * mode if we have tdi_phy_lpm feature
  917. */
  918. temp &= ~PORT_WKCONN_E;
  919. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  920. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  921. if (ehci->has_tdi_phy_lpm) {
  922. spin_unlock_irqrestore(&ehci->lock, flags);
  923. msleep(5);/* 5ms for HCD enter low pwr mode */
  924. spin_lock_irqsave(&ehci->lock, flags);
  925. temp1 = ehci_readl(ehci, hostpc_reg);
  926. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  927. hostpc_reg);
  928. temp1 = ehci_readl(ehci, hostpc_reg);
  929. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  930. wIndex, (temp1 & HOSTPC_PHCD) ?
  931. "succeeded" : "failed");
  932. }
  933. if (ehci_has_fsl_susp_errata(ehci)) {
  934. /* 10ms for HCD enter suspend */
  935. spin_unlock_irqrestore(&ehci->lock, flags);
  936. usleep_range(10000, 20000);
  937. spin_lock_irqsave(&ehci->lock, flags);
  938. }
  939. set_bit(wIndex, &ehci->suspended_ports);
  940. break;
  941. case USB_PORT_FEAT_POWER:
  942. if (HCS_PPC(ehci->hcs_params)) {
  943. spin_unlock_irqrestore(&ehci->lock, flags);
  944. ehci_port_power(ehci, wIndex, true);
  945. spin_lock_irqsave(&ehci->lock, flags);
  946. }
  947. break;
  948. case USB_PORT_FEAT_RESET:
  949. if (temp & (PORT_SUSPEND|PORT_RESUME))
  950. goto error;
  951. /* line status bits may report this as low speed,
  952. * which can be fine if this root hub has a
  953. * transaction translator built in.
  954. */
  955. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  956. && !ehci_is_TDI(ehci)
  957. && PORT_USB11 (temp)) {
  958. ehci_dbg (ehci,
  959. "port %d low speed --> companion\n",
  960. wIndex + 1);
  961. temp |= PORT_OWNER;
  962. } else {
  963. temp |= PORT_RESET;
  964. temp &= ~PORT_PE;
  965. /*
  966. * caller must wait, then call GetPortStatus
  967. * usb 2.0 spec says 50 ms resets on root
  968. */
  969. ehci->reset_done [wIndex] = jiffies
  970. + msecs_to_jiffies (50);
  971. /*
  972. * Force full-speed connect for FSL high-speed
  973. * erratum; disable HS Chirp by setting PFSC bit
  974. */
  975. if (ehci_has_fsl_hs_errata(ehci))
  976. temp |= (1 << PORTSC_FSL_PFSC);
  977. }
  978. ehci_writel(ehci, temp, status_reg);
  979. break;
  980. /* For downstream facing ports (these): one hub port is put
  981. * into test mode according to USB2 11.24.2.13, then the hub
  982. * must be reset (which for root hub now means rmmod+modprobe,
  983. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  984. * about the EHCI-specific stuff.
  985. */
  986. case USB_PORT_FEAT_TEST:
  987. #ifdef CONFIG_USB_HCD_TEST_MODE
  988. if (selector == EHSET_TEST_SINGLE_STEP_SET_FEATURE) {
  989. spin_unlock_irqrestore(&ehci->lock, flags);
  990. retval = ehset_single_step_set_feature(hcd,
  991. wIndex + 1);
  992. spin_lock_irqsave(&ehci->lock, flags);
  993. break;
  994. }
  995. #endif
  996. if (!selector || selector > 5)
  997. goto error;
  998. spin_unlock_irqrestore(&ehci->lock, flags);
  999. ehci_quiesce(ehci);
  1000. spin_lock_irqsave(&ehci->lock, flags);
  1001. /* Put all enabled ports into suspend */
  1002. while (ports--) {
  1003. u32 __iomem *sreg =
  1004. &ehci->regs->port_status[ports];
  1005. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  1006. if (temp & PORT_PE)
  1007. ehci_writel(ehci, temp | PORT_SUSPEND,
  1008. sreg);
  1009. }
  1010. spin_unlock_irqrestore(&ehci->lock, flags);
  1011. ehci_halt(ehci);
  1012. spin_lock_irqsave(&ehci->lock, flags);
  1013. temp = ehci_readl(ehci, status_reg);
  1014. temp |= selector << 16;
  1015. ehci_writel(ehci, temp, status_reg);
  1016. break;
  1017. default:
  1018. goto error;
  1019. }
  1020. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  1021. break;
  1022. default:
  1023. error:
  1024. /* "stall" on error */
  1025. retval = -EPIPE;
  1026. }
  1027. error_exit:
  1028. spin_unlock_irqrestore (&ehci->lock, flags);
  1029. return retval;
  1030. }
  1031. EXPORT_SYMBOL_GPL(ehci_hub_control);
  1032. static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum)
  1033. {
  1034. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1035. if (ehci_is_TDI(ehci))
  1036. return;
  1037. set_owner(ehci, --portnum, PORT_OWNER);
  1038. }
  1039. static int ehci_port_handed_over(struct usb_hcd *hcd, int portnum)
  1040. {
  1041. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1042. u32 __iomem *reg;
  1043. if (ehci_is_TDI(ehci))
  1044. return 0;
  1045. reg = &ehci->regs->port_status[portnum - 1];
  1046. return ehci_readl(ehci, reg) & PORT_OWNER;
  1047. }
  1048. static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable)
  1049. {
  1050. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  1051. u32 __iomem *status_reg = &ehci->regs->port_status[portnum];
  1052. u32 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;
  1053. if (enable)
  1054. ehci_writel(ehci, temp | PORT_POWER, status_reg);
  1055. else
  1056. ehci_writel(ehci, temp & ~PORT_POWER, status_reg);
  1057. if (hcd->driver->port_power)
  1058. hcd->driver->port_power(hcd, portnum, enable);
  1059. return 0;
  1060. }