net2280.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for the PLX NET2280 USB device controller.
  4. * Specs and errata are available from <http://www.plxtech.com>.
  5. *
  6. * PLX Technology Inc. (formerly NetChip Technology) supported the
  7. * development of this driver.
  8. *
  9. *
  10. * CODE STATUS HIGHLIGHTS
  11. *
  12. * This driver should work well with most "gadget" drivers, including
  13. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  14. * as well as Gadget Zero and Gadgetfs.
  15. *
  16. * DMA is enabled by default.
  17. *
  18. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  19. * be enabled.
  20. *
  21. * Note that almost all the errata workarounds here are only needed for
  22. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  23. */
  24. /*
  25. * Copyright (C) 2003 David Brownell
  26. * Copyright (C) 2003-2005 PLX Technology, Inc.
  27. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  28. *
  29. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  30. * with 2282 chip
  31. *
  32. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  33. * with usb 338x chip. Based on PLX driver
  34. */
  35. #include <linux/module.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/kernel.h>
  39. #include <linux/delay.h>
  40. #include <linux/ioport.h>
  41. #include <linux/slab.h>
  42. #include <linux/errno.h>
  43. #include <linux/init.h>
  44. #include <linux/timer.h>
  45. #include <linux/list.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/moduleparam.h>
  48. #include <linux/device.h>
  49. #include <linux/usb/ch9.h>
  50. #include <linux/usb/gadget.h>
  51. #include <linux/prefetch.h>
  52. #include <linux/io.h>
  53. #include <linux/iopoll.h>
  54. #include <asm/byteorder.h>
  55. #include <asm/irq.h>
  56. #include <asm/unaligned.h>
  57. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  58. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  59. #define EP_DONTUSE 13 /* nonzero */
  60. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  61. static const char driver_name[] = "net2280";
  62. static const char driver_desc[] = DRIVER_DESC;
  63. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  64. static const char ep0name[] = "ep0";
  65. #define EP_INFO(_name, _caps) \
  66. { \
  67. .name = _name, \
  68. .caps = _caps, \
  69. }
  70. static const struct {
  71. const char *name;
  72. const struct usb_ep_caps caps;
  73. } ep_info_dft[] = { /* Default endpoint configuration */
  74. EP_INFO(ep0name,
  75. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  76. EP_INFO("ep-a",
  77. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  78. EP_INFO("ep-b",
  79. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  80. EP_INFO("ep-c",
  81. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  82. EP_INFO("ep-d",
  83. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  84. EP_INFO("ep-e",
  85. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  86. EP_INFO("ep-f",
  87. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  88. EP_INFO("ep-g",
  89. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  90. EP_INFO("ep-h",
  91. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  92. }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
  93. EP_INFO(ep0name,
  94. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  95. EP_INFO("ep1in",
  96. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  97. EP_INFO("ep2out",
  98. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  99. EP_INFO("ep3in",
  100. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  101. EP_INFO("ep4out",
  102. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  103. EP_INFO("ep1out",
  104. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  105. EP_INFO("ep2in",
  106. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  107. EP_INFO("ep3out",
  108. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  109. EP_INFO("ep4in",
  110. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  111. };
  112. #undef EP_INFO
  113. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  114. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  115. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  116. */
  117. static ushort fifo_mode;
  118. /* "modprobe net2280 fifo_mode=1" etc */
  119. module_param(fifo_mode, ushort, 0644);
  120. /* enable_suspend -- When enabled, the driver will respond to
  121. * USB suspend requests by powering down the NET2280. Otherwise,
  122. * USB suspend requests will be ignored. This is acceptable for
  123. * self-powered devices
  124. */
  125. static bool enable_suspend;
  126. /* "modprobe net2280 enable_suspend=1" etc */
  127. module_param(enable_suspend, bool, 0444);
  128. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  129. static char *type_string(u8 bmAttributes)
  130. {
  131. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  132. case USB_ENDPOINT_XFER_BULK: return "bulk";
  133. case USB_ENDPOINT_XFER_ISOC: return "iso";
  134. case USB_ENDPOINT_XFER_INT: return "intr";
  135. }
  136. return "control";
  137. }
  138. #include "net2280.h"
  139. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  140. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  141. static void ep_clear_seqnum(struct net2280_ep *ep);
  142. static void stop_activity(struct net2280 *dev,
  143. struct usb_gadget_driver *driver);
  144. static void ep0_start(struct net2280 *dev);
  145. /*-------------------------------------------------------------------------*/
  146. static inline void enable_pciirqenb(struct net2280_ep *ep)
  147. {
  148. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  149. if (ep->dev->quirks & PLX_LEGACY)
  150. tmp |= BIT(ep->num);
  151. else
  152. tmp |= BIT(ep_bit[ep->num]);
  153. writel(tmp, &ep->dev->regs->pciirqenb0);
  154. return;
  155. }
  156. static int
  157. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  158. {
  159. struct net2280 *dev;
  160. struct net2280_ep *ep;
  161. u32 max;
  162. u32 tmp = 0;
  163. u32 type;
  164. unsigned long flags;
  165. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  166. int ret = 0;
  167. ep = container_of(_ep, struct net2280_ep, ep);
  168. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  169. desc->bDescriptorType != USB_DT_ENDPOINT) {
  170. pr_err("%s: failed at line=%d\n", __func__, __LINE__);
  171. return -EINVAL;
  172. }
  173. dev = ep->dev;
  174. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  175. ret = -ESHUTDOWN;
  176. goto print_err;
  177. }
  178. /* erratum 0119 workaround ties up an endpoint number */
  179. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
  180. ret = -EDOM;
  181. goto print_err;
  182. }
  183. if (dev->quirks & PLX_PCIE) {
  184. if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
  185. ret = -EDOM;
  186. goto print_err;
  187. }
  188. ep->is_in = !!usb_endpoint_dir_in(desc);
  189. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
  190. ret = -EINVAL;
  191. goto print_err;
  192. }
  193. }
  194. /* sanity check ep-e/ep-f since their fifos are small */
  195. max = usb_endpoint_maxp(desc);
  196. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
  197. ret = -ERANGE;
  198. goto print_err;
  199. }
  200. spin_lock_irqsave(&dev->lock, flags);
  201. _ep->maxpacket = max;
  202. ep->desc = desc;
  203. /* ep_reset() has already been called */
  204. ep->stopped = 0;
  205. ep->wedged = 0;
  206. ep->out_overflow = 0;
  207. /* set speed-dependent max packet; may kick in high bandwidth */
  208. set_max_speed(ep, max);
  209. /* set type, direction, address; reset fifo counters */
  210. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  211. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  212. tmp = readl(&ep->cfg->ep_cfg);
  213. /* If USB ep number doesn't match hardware ep number */
  214. if ((tmp & 0xf) != usb_endpoint_num(desc)) {
  215. ret = -EINVAL;
  216. spin_unlock_irqrestore(&dev->lock, flags);
  217. goto print_err;
  218. }
  219. if (ep->is_in)
  220. tmp &= ~USB3380_EP_CFG_MASK_IN;
  221. else
  222. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  223. }
  224. type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  225. if (type == USB_ENDPOINT_XFER_INT) {
  226. /* erratum 0105 workaround prevents hs NYET */
  227. if (dev->chiprev == 0100 &&
  228. dev->gadget.speed == USB_SPEED_HIGH &&
  229. !(desc->bEndpointAddress & USB_DIR_IN))
  230. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  231. &ep->regs->ep_rsp);
  232. } else if (type == USB_ENDPOINT_XFER_BULK) {
  233. /* catch some particularly blatant driver bugs */
  234. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  235. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  236. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  237. spin_unlock_irqrestore(&dev->lock, flags);
  238. ret = -ERANGE;
  239. goto print_err;
  240. }
  241. }
  242. ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
  243. /* Enable this endpoint */
  244. if (dev->quirks & PLX_LEGACY) {
  245. tmp |= type << ENDPOINT_TYPE;
  246. tmp |= desc->bEndpointAddress;
  247. /* default full fifo lines */
  248. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  249. tmp |= BIT(ENDPOINT_ENABLE);
  250. ep->is_in = (tmp & USB_DIR_IN) != 0;
  251. } else {
  252. /* In Legacy mode, only OUT endpoints are used */
  253. if (dev->enhanced_mode && ep->is_in) {
  254. tmp |= type << IN_ENDPOINT_TYPE;
  255. tmp |= BIT(IN_ENDPOINT_ENABLE);
  256. } else {
  257. tmp |= type << OUT_ENDPOINT_TYPE;
  258. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  259. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  260. }
  261. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  262. if (!dev->enhanced_mode)
  263. tmp |= usb_endpoint_num(desc);
  264. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  265. }
  266. /* Make sure all the registers are written before ep_rsp*/
  267. wmb();
  268. /* for OUT transfers, block the rx fifo until a read is posted */
  269. if (!ep->is_in)
  270. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  271. else if (!(dev->quirks & PLX_2280)) {
  272. /* Added for 2282, Don't use nak packets on an in endpoint,
  273. * this was ignored on 2280
  274. */
  275. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  276. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  277. }
  278. if (dev->quirks & PLX_PCIE)
  279. ep_clear_seqnum(ep);
  280. writel(tmp, &ep->cfg->ep_cfg);
  281. /* enable irqs */
  282. if (!ep->dma) { /* pio, per-packet */
  283. enable_pciirqenb(ep);
  284. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  285. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  286. if (dev->quirks & PLX_2280)
  287. tmp |= readl(&ep->regs->ep_irqenb);
  288. writel(tmp, &ep->regs->ep_irqenb);
  289. } else { /* dma, per-request */
  290. tmp = BIT((8 + ep->num)); /* completion */
  291. tmp |= readl(&dev->regs->pciirqenb1);
  292. writel(tmp, &dev->regs->pciirqenb1);
  293. /* for short OUT transfers, dma completions can't
  294. * advance the queue; do it pio-style, by hand.
  295. * NOTE erratum 0112 workaround #2
  296. */
  297. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  298. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  299. writel(tmp, &ep->regs->ep_irqenb);
  300. enable_pciirqenb(ep);
  301. }
  302. }
  303. tmp = desc->bEndpointAddress;
  304. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  305. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  306. type_string(desc->bmAttributes),
  307. ep->dma ? "dma" : "pio", max);
  308. /* pci writes may still be posted */
  309. spin_unlock_irqrestore(&dev->lock, flags);
  310. return ret;
  311. print_err:
  312. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  313. return ret;
  314. }
  315. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  316. {
  317. u32 result;
  318. int ret;
  319. ret = readl_poll_timeout_atomic(ptr, result,
  320. ((result & mask) == done ||
  321. result == U32_MAX),
  322. 1, usec);
  323. if (result == U32_MAX) /* device unplugged */
  324. return -ENODEV;
  325. return ret;
  326. }
  327. static const struct usb_ep_ops net2280_ep_ops;
  328. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  329. struct net2280_ep *ep)
  330. {
  331. u32 tmp;
  332. ep->desc = NULL;
  333. INIT_LIST_HEAD(&ep->queue);
  334. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  335. ep->ep.ops = &net2280_ep_ops;
  336. /* disable the dma, irqs, endpoint... */
  337. if (ep->dma) {
  338. writel(0, &ep->dma->dmactl);
  339. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  340. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  341. BIT(DMA_ABORT),
  342. &ep->dma->dmastat);
  343. tmp = readl(&regs->pciirqenb0);
  344. tmp &= ~BIT(ep->num);
  345. writel(tmp, &regs->pciirqenb0);
  346. } else {
  347. tmp = readl(&regs->pciirqenb1);
  348. tmp &= ~BIT((8 + ep->num)); /* completion */
  349. writel(tmp, &regs->pciirqenb1);
  350. }
  351. writel(0, &ep->regs->ep_irqenb);
  352. /* init to our chosen defaults, notably so that we NAK OUT
  353. * packets until the driver queues a read (+note erratum 0112)
  354. */
  355. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  356. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  357. BIT(SET_NAK_OUT_PACKETS) |
  358. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  359. BIT(CLEAR_INTERRUPT_MODE);
  360. } else {
  361. /* added for 2282 */
  362. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  363. BIT(CLEAR_NAK_OUT_PACKETS) |
  364. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  365. BIT(CLEAR_INTERRUPT_MODE);
  366. }
  367. if (ep->num != 0) {
  368. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  369. BIT(CLEAR_ENDPOINT_HALT);
  370. }
  371. writel(tmp, &ep->regs->ep_rsp);
  372. /* scrub most status bits, and flush any fifo state */
  373. if (ep->dev->quirks & PLX_2280)
  374. tmp = BIT(FIFO_OVERFLOW) |
  375. BIT(FIFO_UNDERFLOW);
  376. else
  377. tmp = 0;
  378. writel(tmp | BIT(TIMEOUT) |
  379. BIT(USB_STALL_SENT) |
  380. BIT(USB_IN_NAK_SENT) |
  381. BIT(USB_IN_ACK_RCVD) |
  382. BIT(USB_OUT_PING_NAK_SENT) |
  383. BIT(USB_OUT_ACK_SENT) |
  384. BIT(FIFO_FLUSH) |
  385. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  386. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  387. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  388. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  389. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  390. BIT(DATA_IN_TOKEN_INTERRUPT),
  391. &ep->regs->ep_stat);
  392. /* fifo size is handled separately */
  393. }
  394. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  395. struct net2280_ep *ep)
  396. {
  397. u32 tmp, dmastat;
  398. ep->desc = NULL;
  399. INIT_LIST_HEAD(&ep->queue);
  400. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  401. ep->ep.ops = &net2280_ep_ops;
  402. /* disable the dma, irqs, endpoint... */
  403. if (ep->dma) {
  404. writel(0, &ep->dma->dmactl);
  405. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  406. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  407. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  408. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  409. /* | BIT(DMA_ABORT), */
  410. &ep->dma->dmastat);
  411. dmastat = readl(&ep->dma->dmastat);
  412. if (dmastat == 0x5002) {
  413. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  414. dmastat);
  415. writel(0x5a, &ep->dma->dmastat);
  416. }
  417. tmp = readl(&regs->pciirqenb0);
  418. tmp &= ~BIT(ep_bit[ep->num]);
  419. writel(tmp, &regs->pciirqenb0);
  420. } else {
  421. if (ep->num < 5) {
  422. tmp = readl(&regs->pciirqenb1);
  423. tmp &= ~BIT((8 + ep->num)); /* completion */
  424. writel(tmp, &regs->pciirqenb1);
  425. }
  426. }
  427. writel(0, &ep->regs->ep_irqenb);
  428. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  429. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  430. BIT(FIFO_OVERFLOW) |
  431. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  432. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  433. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  434. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  435. tmp = readl(&ep->cfg->ep_cfg);
  436. if (ep->is_in)
  437. tmp &= ~USB3380_EP_CFG_MASK_IN;
  438. else
  439. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  440. writel(tmp, &ep->cfg->ep_cfg);
  441. }
  442. static void nuke(struct net2280_ep *);
  443. static int net2280_disable(struct usb_ep *_ep)
  444. {
  445. struct net2280_ep *ep;
  446. unsigned long flags;
  447. ep = container_of(_ep, struct net2280_ep, ep);
  448. if (!_ep || _ep->name == ep0name) {
  449. pr_err("%s: Invalid ep=%p\n", __func__, _ep);
  450. return -EINVAL;
  451. }
  452. spin_lock_irqsave(&ep->dev->lock, flags);
  453. nuke(ep);
  454. if (ep->dev->quirks & PLX_PCIE)
  455. ep_reset_338x(ep->dev->regs, ep);
  456. else
  457. ep_reset_228x(ep->dev->regs, ep);
  458. ep_vdbg(ep->dev, "disabled %s %s\n",
  459. ep->dma ? "dma" : "pio", _ep->name);
  460. /* synch memory views with the device */
  461. (void)readl(&ep->cfg->ep_cfg);
  462. if (!ep->dma && ep->num >= 1 && ep->num <= 4)
  463. ep->dma = &ep->dev->dma[ep->num - 1];
  464. spin_unlock_irqrestore(&ep->dev->lock, flags);
  465. return 0;
  466. }
  467. /*-------------------------------------------------------------------------*/
  468. static struct usb_request
  469. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  470. {
  471. struct net2280_ep *ep;
  472. struct net2280_request *req;
  473. if (!_ep) {
  474. pr_err("%s: Invalid ep\n", __func__);
  475. return NULL;
  476. }
  477. ep = container_of(_ep, struct net2280_ep, ep);
  478. req = kzalloc(sizeof(*req), gfp_flags);
  479. if (!req)
  480. return NULL;
  481. INIT_LIST_HEAD(&req->queue);
  482. /* this dma descriptor may be swapped with the previous dummy */
  483. if (ep->dma) {
  484. struct net2280_dma *td;
  485. td = dma_pool_alloc(ep->dev->requests, gfp_flags,
  486. &req->td_dma);
  487. if (!td) {
  488. kfree(req);
  489. return NULL;
  490. }
  491. td->dmacount = 0; /* not VALID */
  492. td->dmadesc = td->dmaaddr;
  493. req->td = td;
  494. }
  495. return &req->req;
  496. }
  497. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  498. {
  499. struct net2280_ep *ep;
  500. struct net2280_request *req;
  501. ep = container_of(_ep, struct net2280_ep, ep);
  502. if (!_ep || !_req) {
  503. dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n",
  504. __func__, _ep, _req);
  505. return;
  506. }
  507. req = container_of(_req, struct net2280_request, req);
  508. WARN_ON(!list_empty(&req->queue));
  509. if (req->td)
  510. dma_pool_free(ep->dev->requests, req->td, req->td_dma);
  511. kfree(req);
  512. }
  513. /*-------------------------------------------------------------------------*/
  514. /* load a packet into the fifo we use for usb IN transfers.
  515. * works for all endpoints.
  516. *
  517. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  518. * at a time, but this code is simpler because it knows it only writes
  519. * one packet. ep-a..ep-d should use dma instead.
  520. */
  521. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  522. {
  523. struct net2280_ep_regs __iomem *regs = ep->regs;
  524. u8 *buf;
  525. u32 tmp;
  526. unsigned count, total;
  527. /* INVARIANT: fifo is currently empty. (testable) */
  528. if (req) {
  529. buf = req->buf + req->actual;
  530. prefetch(buf);
  531. total = req->length - req->actual;
  532. } else {
  533. total = 0;
  534. buf = NULL;
  535. }
  536. /* write just one packet at a time */
  537. count = ep->ep.maxpacket;
  538. if (count > total) /* min() cannot be used on a bitfield */
  539. count = total;
  540. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  541. ep->ep.name, count,
  542. (count != ep->ep.maxpacket) ? " (short)" : "",
  543. req);
  544. while (count >= 4) {
  545. /* NOTE be careful if you try to align these. fifo lines
  546. * should normally be full (4 bytes) and successive partial
  547. * lines are ok only in certain cases.
  548. */
  549. tmp = get_unaligned((u32 *)buf);
  550. cpu_to_le32s(&tmp);
  551. writel(tmp, &regs->ep_data);
  552. buf += 4;
  553. count -= 4;
  554. }
  555. /* last fifo entry is "short" unless we wrote a full packet.
  556. * also explicitly validate last word in (periodic) transfers
  557. * when maxpacket is not a multiple of 4 bytes.
  558. */
  559. if (count || total < ep->ep.maxpacket) {
  560. tmp = count ? get_unaligned((u32 *)buf) : count;
  561. cpu_to_le32s(&tmp);
  562. set_fifo_bytecount(ep, count & 0x03);
  563. writel(tmp, &regs->ep_data);
  564. }
  565. /* pci writes may still be posted */
  566. }
  567. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  568. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  569. * there's no real data in the fifo.
  570. *
  571. * NOTE: also used in cases where that erratum doesn't apply:
  572. * where the host wrote "too much" data to us.
  573. */
  574. static void out_flush(struct net2280_ep *ep)
  575. {
  576. u32 __iomem *statp;
  577. u32 tmp;
  578. statp = &ep->regs->ep_stat;
  579. tmp = readl(statp);
  580. if (tmp & BIT(NAK_OUT_PACKETS)) {
  581. ep_dbg(ep->dev, "%s %s %08x !NAK\n",
  582. ep->ep.name, __func__, tmp);
  583. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  584. }
  585. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  586. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  587. statp);
  588. writel(BIT(FIFO_FLUSH), statp);
  589. /* Make sure that stap is written */
  590. mb();
  591. tmp = readl(statp);
  592. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  593. /* high speed did bulk NYET; fifo isn't filling */
  594. ep->dev->gadget.speed == USB_SPEED_FULL) {
  595. unsigned usec;
  596. usec = 50; /* 64 byte bulk/interrupt */
  597. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  598. BIT(USB_OUT_PING_NAK_SENT), usec);
  599. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  600. }
  601. }
  602. /* unload packet(s) from the fifo we use for usb OUT transfers.
  603. * returns true iff the request completed, because of short packet
  604. * or the request buffer having filled with full packets.
  605. *
  606. * for ep-a..ep-d this will read multiple packets out when they
  607. * have been accepted.
  608. */
  609. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  610. {
  611. struct net2280_ep_regs __iomem *regs = ep->regs;
  612. u8 *buf = req->req.buf + req->req.actual;
  613. unsigned count, tmp, is_short;
  614. unsigned cleanup = 0, prevent = 0;
  615. /* erratum 0106 ... packets coming in during fifo reads might
  616. * be incompletely rejected. not all cases have workarounds.
  617. */
  618. if (ep->dev->chiprev == 0x0100 &&
  619. ep->dev->gadget.speed == USB_SPEED_FULL) {
  620. udelay(1);
  621. tmp = readl(&ep->regs->ep_stat);
  622. if ((tmp & BIT(NAK_OUT_PACKETS)))
  623. cleanup = 1;
  624. else if ((tmp & BIT(FIFO_FULL))) {
  625. start_out_naking(ep);
  626. prevent = 1;
  627. }
  628. /* else: hope we don't see the problem */
  629. }
  630. /* never overflow the rx buffer. the fifo reads packets until
  631. * it sees a short one; we might not be ready for them all.
  632. */
  633. prefetchw(buf);
  634. count = readl(&regs->ep_avail);
  635. if (unlikely(count == 0)) {
  636. udelay(1);
  637. tmp = readl(&ep->regs->ep_stat);
  638. count = readl(&regs->ep_avail);
  639. /* handled that data already? */
  640. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  641. return 0;
  642. }
  643. tmp = req->req.length - req->req.actual;
  644. if (count > tmp) {
  645. /* as with DMA, data overflow gets flushed */
  646. if ((tmp % ep->ep.maxpacket) != 0) {
  647. ep_err(ep->dev,
  648. "%s out fifo %d bytes, expected %d\n",
  649. ep->ep.name, count, tmp);
  650. req->req.status = -EOVERFLOW;
  651. cleanup = 1;
  652. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  653. * the next read will start with the next packet
  654. */
  655. } /* else it's a ZLP, no worries */
  656. count = tmp;
  657. }
  658. req->req.actual += count;
  659. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  660. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  661. ep->ep.name, count, is_short ? " (short)" : "",
  662. cleanup ? " flush" : "", prevent ? " nak" : "",
  663. req, req->req.actual, req->req.length);
  664. while (count >= 4) {
  665. tmp = readl(&regs->ep_data);
  666. cpu_to_le32s(&tmp);
  667. put_unaligned(tmp, (u32 *)buf);
  668. buf += 4;
  669. count -= 4;
  670. }
  671. if (count) {
  672. tmp = readl(&regs->ep_data);
  673. /* LE conversion is implicit here: */
  674. do {
  675. *buf++ = (u8) tmp;
  676. tmp >>= 8;
  677. } while (--count);
  678. }
  679. if (cleanup)
  680. out_flush(ep);
  681. if (prevent) {
  682. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  683. (void) readl(&ep->regs->ep_rsp);
  684. }
  685. return is_short || req->req.actual == req->req.length;
  686. }
  687. /* fill out dma descriptor to match a given request */
  688. static void fill_dma_desc(struct net2280_ep *ep,
  689. struct net2280_request *req, int valid)
  690. {
  691. struct net2280_dma *td = req->td;
  692. u32 dmacount = req->req.length;
  693. /* don't let DMA continue after a short OUT packet,
  694. * so overruns can't affect the next transfer.
  695. * in case of overruns on max-size packets, we can't
  696. * stop the fifo from filling but we can flush it.
  697. */
  698. if (ep->is_in)
  699. dmacount |= BIT(DMA_DIRECTION);
  700. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  701. !(ep->dev->quirks & PLX_2280))
  702. dmacount |= BIT(END_OF_CHAIN);
  703. req->valid = valid;
  704. if (valid)
  705. dmacount |= BIT(VALID_BIT);
  706. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  707. /* td->dmadesc = previously set by caller */
  708. td->dmaaddr = cpu_to_le32 (req->req.dma);
  709. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  710. wmb();
  711. td->dmacount = cpu_to_le32(dmacount);
  712. }
  713. static const u32 dmactl_default =
  714. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  715. BIT(DMA_CLEAR_COUNT_ENABLE) |
  716. /* erratum 0116 workaround part 1 (use POLLING) */
  717. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  718. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  719. BIT(DMA_VALID_BIT_ENABLE) |
  720. BIT(DMA_SCATTER_GATHER_ENABLE) |
  721. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  722. BIT(DMA_ENABLE);
  723. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  724. {
  725. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  726. }
  727. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  728. {
  729. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  730. spin_stop_dma(dma);
  731. }
  732. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  733. {
  734. struct net2280_dma_regs __iomem *dma = ep->dma;
  735. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  736. if (!(ep->dev->quirks & PLX_2280))
  737. tmp |= BIT(END_OF_CHAIN);
  738. writel(tmp, &dma->dmacount);
  739. writel(readl(&dma->dmastat), &dma->dmastat);
  740. writel(td_dma, &dma->dmadesc);
  741. if (ep->dev->quirks & PLX_PCIE)
  742. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  743. writel(dmactl, &dma->dmactl);
  744. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  745. (void) readl(&ep->dev->pci->pcimstctl);
  746. writel(BIT(DMA_START), &dma->dmastat);
  747. }
  748. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  749. {
  750. u32 tmp;
  751. struct net2280_dma_regs __iomem *dma = ep->dma;
  752. /* FIXME can't use DMA for ZLPs */
  753. /* on this path we "know" there's no dma active (yet) */
  754. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  755. writel(0, &ep->dma->dmactl);
  756. /* previous OUT packet might have been short */
  757. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  758. BIT(NAK_OUT_PACKETS))) {
  759. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  760. &ep->regs->ep_stat);
  761. tmp = readl(&ep->regs->ep_avail);
  762. if (tmp) {
  763. writel(readl(&dma->dmastat), &dma->dmastat);
  764. /* transfer all/some fifo data */
  765. writel(req->req.dma, &dma->dmaaddr);
  766. tmp = min(tmp, req->req.length);
  767. /* dma irq, faking scatterlist status */
  768. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  769. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  770. &dma->dmacount);
  771. req->td->dmadesc = 0;
  772. req->valid = 1;
  773. writel(BIT(DMA_ENABLE), &dma->dmactl);
  774. writel(BIT(DMA_START), &dma->dmastat);
  775. return;
  776. }
  777. stop_out_naking(ep);
  778. }
  779. tmp = dmactl_default;
  780. /* force packet boundaries between dma requests, but prevent the
  781. * controller from automagically writing a last "short" packet
  782. * (zero length) unless the driver explicitly said to do that.
  783. */
  784. if (ep->is_in) {
  785. if (likely((req->req.length % ep->ep.maxpacket) ||
  786. req->req.zero)){
  787. tmp |= BIT(DMA_FIFO_VALIDATE);
  788. ep->in_fifo_validate = 1;
  789. } else
  790. ep->in_fifo_validate = 0;
  791. }
  792. /* init req->td, pointing to the current dummy */
  793. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  794. fill_dma_desc(ep, req, 1);
  795. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  796. start_queue(ep, tmp, req->td_dma);
  797. }
  798. static inline void
  799. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  800. {
  801. /* swap new dummy for old, link; fill and maybe activate */
  802. swap(ep->dummy, req->td);
  803. swap(ep->td_dma, req->td_dma);
  804. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  805. fill_dma_desc(ep, req, valid);
  806. }
  807. static void
  808. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  809. {
  810. struct net2280 *dev;
  811. unsigned stopped = ep->stopped;
  812. list_del_init(&req->queue);
  813. if (req->req.status == -EINPROGRESS)
  814. req->req.status = status;
  815. else
  816. status = req->req.status;
  817. dev = ep->dev;
  818. if (ep->dma)
  819. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  820. if (status && status != -ESHUTDOWN)
  821. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  822. ep->ep.name, &req->req, status,
  823. req->req.actual, req->req.length);
  824. /* don't modify queue heads during completion callback */
  825. ep->stopped = 1;
  826. spin_unlock(&dev->lock);
  827. usb_gadget_giveback_request(&ep->ep, &req->req);
  828. spin_lock(&dev->lock);
  829. ep->stopped = stopped;
  830. }
  831. /*-------------------------------------------------------------------------*/
  832. static int
  833. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  834. {
  835. struct net2280_request *req;
  836. struct net2280_ep *ep;
  837. struct net2280 *dev;
  838. unsigned long flags;
  839. int ret = 0;
  840. /* we always require a cpu-view buffer, so that we can
  841. * always use pio (as fallback or whatever).
  842. */
  843. ep = container_of(_ep, struct net2280_ep, ep);
  844. if (!_ep || (!ep->desc && ep->num != 0)) {
  845. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  846. return -EINVAL;
  847. }
  848. req = container_of(_req, struct net2280_request, req);
  849. if (!_req || !_req->complete || !_req->buf ||
  850. !list_empty(&req->queue)) {
  851. ret = -EINVAL;
  852. goto print_err;
  853. }
  854. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
  855. ret = -EDOM;
  856. goto print_err;
  857. }
  858. dev = ep->dev;
  859. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  860. ret = -ESHUTDOWN;
  861. goto print_err;
  862. }
  863. /* FIXME implement PIO fallback for ZLPs with DMA */
  864. if (ep->dma && _req->length == 0) {
  865. ret = -EOPNOTSUPP;
  866. goto print_err;
  867. }
  868. /* set up dma mapping in case the caller didn't */
  869. if (ep->dma) {
  870. ret = usb_gadget_map_request(&dev->gadget, _req,
  871. ep->is_in);
  872. if (ret)
  873. goto print_err;
  874. }
  875. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  876. _ep->name, _req, _req->length, _req->buf);
  877. spin_lock_irqsave(&dev->lock, flags);
  878. _req->status = -EINPROGRESS;
  879. _req->actual = 0;
  880. /* kickstart this i/o queue? */
  881. if (list_empty(&ep->queue) && !ep->stopped &&
  882. !((dev->quirks & PLX_PCIE) && ep->dma &&
  883. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
  884. /* use DMA if the endpoint supports it, else pio */
  885. if (ep->dma)
  886. start_dma(ep, req);
  887. else {
  888. /* maybe there's no control data, just status ack */
  889. if (ep->num == 0 && _req->length == 0) {
  890. allow_status(ep);
  891. done(ep, req, 0);
  892. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  893. goto done;
  894. }
  895. /* PIO ... stuff the fifo, or unblock it. */
  896. if (ep->is_in)
  897. write_fifo(ep, _req);
  898. else {
  899. u32 s;
  900. /* OUT FIFO might have packet(s) buffered */
  901. s = readl(&ep->regs->ep_stat);
  902. if ((s & BIT(FIFO_EMPTY)) == 0) {
  903. /* note: _req->short_not_ok is
  904. * ignored here since PIO _always_
  905. * stops queue advance here, and
  906. * _req->status doesn't change for
  907. * short reads (only _req->actual)
  908. */
  909. if (read_fifo(ep, req) &&
  910. ep->num == 0) {
  911. done(ep, req, 0);
  912. allow_status(ep);
  913. /* don't queue it */
  914. req = NULL;
  915. } else if (read_fifo(ep, req) &&
  916. ep->num != 0) {
  917. done(ep, req, 0);
  918. req = NULL;
  919. } else
  920. s = readl(&ep->regs->ep_stat);
  921. }
  922. /* don't NAK, let the fifo fill */
  923. if (req && (s & BIT(NAK_OUT_PACKETS)))
  924. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  925. &ep->regs->ep_rsp);
  926. }
  927. }
  928. } else if (ep->dma) {
  929. int valid = 1;
  930. if (ep->is_in) {
  931. int expect;
  932. /* preventing magic zlps is per-engine state, not
  933. * per-transfer; irq logic must recover hiccups.
  934. */
  935. expect = likely(req->req.zero ||
  936. (req->req.length % ep->ep.maxpacket));
  937. if (expect != ep->in_fifo_validate)
  938. valid = 0;
  939. }
  940. queue_dma(ep, req, valid);
  941. } /* else the irq handler advances the queue. */
  942. ep->responded = 1;
  943. if (req)
  944. list_add_tail(&req->queue, &ep->queue);
  945. done:
  946. spin_unlock_irqrestore(&dev->lock, flags);
  947. /* pci writes may still be posted */
  948. return ret;
  949. print_err:
  950. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  951. return ret;
  952. }
  953. static inline void
  954. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  955. int status)
  956. {
  957. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  958. done(ep, req, status);
  959. }
  960. static int scan_dma_completions(struct net2280_ep *ep)
  961. {
  962. int num_completed = 0;
  963. /* only look at descriptors that were "naturally" retired,
  964. * so fifo and list head state won't matter
  965. */
  966. while (!list_empty(&ep->queue)) {
  967. struct net2280_request *req;
  968. u32 req_dma_count;
  969. req = list_entry(ep->queue.next,
  970. struct net2280_request, queue);
  971. if (!req->valid)
  972. break;
  973. rmb();
  974. req_dma_count = le32_to_cpup(&req->td->dmacount);
  975. if ((req_dma_count & BIT(VALID_BIT)) != 0)
  976. break;
  977. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  978. * cases where DMA must be aborted; this code handles
  979. * all non-abort DMA completions.
  980. */
  981. if (unlikely(req->td->dmadesc == 0)) {
  982. /* paranoia */
  983. u32 const ep_dmacount = readl(&ep->dma->dmacount);
  984. if (ep_dmacount & DMA_BYTE_COUNT_MASK)
  985. break;
  986. /* single transfer mode */
  987. dma_done(ep, req, req_dma_count, 0);
  988. num_completed++;
  989. break;
  990. } else if (!ep->is_in &&
  991. (req->req.length % ep->ep.maxpacket) &&
  992. !(ep->dev->quirks & PLX_PCIE)) {
  993. u32 const ep_stat = readl(&ep->regs->ep_stat);
  994. /* AVOID TROUBLE HERE by not issuing short reads from
  995. * your gadget driver. That helps avoids errata 0121,
  996. * 0122, and 0124; not all cases trigger the warning.
  997. */
  998. if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) {
  999. ep_warn(ep->dev, "%s lost packet sync!\n",
  1000. ep->ep.name);
  1001. req->req.status = -EOVERFLOW;
  1002. } else {
  1003. u32 const ep_avail = readl(&ep->regs->ep_avail);
  1004. if (ep_avail) {
  1005. /* fifo gets flushed later */
  1006. ep->out_overflow = 1;
  1007. ep_dbg(ep->dev,
  1008. "%s dma, discard %d len %d\n",
  1009. ep->ep.name, ep_avail,
  1010. req->req.length);
  1011. req->req.status = -EOVERFLOW;
  1012. }
  1013. }
  1014. }
  1015. dma_done(ep, req, req_dma_count, 0);
  1016. num_completed++;
  1017. }
  1018. return num_completed;
  1019. }
  1020. static void restart_dma(struct net2280_ep *ep)
  1021. {
  1022. struct net2280_request *req;
  1023. if (ep->stopped)
  1024. return;
  1025. req = list_entry(ep->queue.next, struct net2280_request, queue);
  1026. start_dma(ep, req);
  1027. }
  1028. static void abort_dma(struct net2280_ep *ep)
  1029. {
  1030. /* abort the current transfer */
  1031. if (likely(!list_empty(&ep->queue))) {
  1032. /* FIXME work around errata 0121, 0122, 0124 */
  1033. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1034. spin_stop_dma(ep->dma);
  1035. } else
  1036. stop_dma(ep->dma);
  1037. scan_dma_completions(ep);
  1038. }
  1039. /* dequeue ALL requests */
  1040. static void nuke(struct net2280_ep *ep)
  1041. {
  1042. struct net2280_request *req;
  1043. /* called with spinlock held */
  1044. ep->stopped = 1;
  1045. if (ep->dma)
  1046. abort_dma(ep);
  1047. while (!list_empty(&ep->queue)) {
  1048. req = list_entry(ep->queue.next,
  1049. struct net2280_request,
  1050. queue);
  1051. done(ep, req, -ESHUTDOWN);
  1052. }
  1053. }
  1054. /* dequeue JUST ONE request */
  1055. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1056. {
  1057. struct net2280_ep *ep;
  1058. struct net2280_request *req = NULL;
  1059. struct net2280_request *iter;
  1060. unsigned long flags;
  1061. u32 dmactl;
  1062. int stopped;
  1063. ep = container_of(_ep, struct net2280_ep, ep);
  1064. if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
  1065. pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
  1066. __func__, _ep, _req);
  1067. return -EINVAL;
  1068. }
  1069. spin_lock_irqsave(&ep->dev->lock, flags);
  1070. stopped = ep->stopped;
  1071. /* quiesce dma while we patch the queue */
  1072. dmactl = 0;
  1073. ep->stopped = 1;
  1074. if (ep->dma) {
  1075. dmactl = readl(&ep->dma->dmactl);
  1076. /* WARNING erratum 0127 may kick in ... */
  1077. stop_dma(ep->dma);
  1078. scan_dma_completions(ep);
  1079. }
  1080. /* make sure it's still queued on this endpoint */
  1081. list_for_each_entry(iter, &ep->queue, queue) {
  1082. if (&iter->req != _req)
  1083. continue;
  1084. req = iter;
  1085. break;
  1086. }
  1087. if (!req) {
  1088. ep->stopped = stopped;
  1089. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1090. ep_dbg(ep->dev, "%s: Request mismatch\n", __func__);
  1091. return -EINVAL;
  1092. }
  1093. /* queue head may be partially complete. */
  1094. if (ep->queue.next == &req->queue) {
  1095. if (ep->dma) {
  1096. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1097. _req->status = -ECONNRESET;
  1098. abort_dma(ep);
  1099. if (likely(ep->queue.next == &req->queue)) {
  1100. /* NOTE: misreports single-transfer mode*/
  1101. req->td->dmacount = 0; /* invalidate */
  1102. dma_done(ep, req,
  1103. readl(&ep->dma->dmacount),
  1104. -ECONNRESET);
  1105. }
  1106. } else {
  1107. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1108. done(ep, req, -ECONNRESET);
  1109. }
  1110. req = NULL;
  1111. }
  1112. if (req)
  1113. done(ep, req, -ECONNRESET);
  1114. ep->stopped = stopped;
  1115. if (ep->dma) {
  1116. /* turn off dma on inactive queues */
  1117. if (list_empty(&ep->queue))
  1118. stop_dma(ep->dma);
  1119. else if (!ep->stopped) {
  1120. /* resume current request, or start new one */
  1121. if (req)
  1122. writel(dmactl, &ep->dma->dmactl);
  1123. else
  1124. start_dma(ep, list_entry(ep->queue.next,
  1125. struct net2280_request, queue));
  1126. }
  1127. }
  1128. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1129. return 0;
  1130. }
  1131. /*-------------------------------------------------------------------------*/
  1132. static int net2280_fifo_status(struct usb_ep *_ep);
  1133. static int
  1134. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1135. {
  1136. struct net2280_ep *ep;
  1137. unsigned long flags;
  1138. int retval = 0;
  1139. ep = container_of(_ep, struct net2280_ep, ep);
  1140. if (!_ep || (!ep->desc && ep->num != 0)) {
  1141. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1142. return -EINVAL;
  1143. }
  1144. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1145. retval = -ESHUTDOWN;
  1146. goto print_err;
  1147. }
  1148. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1149. == USB_ENDPOINT_XFER_ISOC) {
  1150. retval = -EINVAL;
  1151. goto print_err;
  1152. }
  1153. spin_lock_irqsave(&ep->dev->lock, flags);
  1154. if (!list_empty(&ep->queue)) {
  1155. retval = -EAGAIN;
  1156. goto print_unlock;
  1157. } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
  1158. retval = -EAGAIN;
  1159. goto print_unlock;
  1160. } else {
  1161. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1162. value ? "set" : "clear",
  1163. wedged ? "wedge" : "halt");
  1164. /* set/clear, then synch memory views with the device */
  1165. if (value) {
  1166. if (ep->num == 0)
  1167. ep->dev->protocol_stall = 1;
  1168. else
  1169. set_halt(ep);
  1170. if (wedged)
  1171. ep->wedged = 1;
  1172. } else {
  1173. clear_halt(ep);
  1174. if (ep->dev->quirks & PLX_PCIE &&
  1175. !list_empty(&ep->queue) && ep->td_dma)
  1176. restart_dma(ep);
  1177. ep->wedged = 0;
  1178. }
  1179. (void) readl(&ep->regs->ep_rsp);
  1180. }
  1181. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1182. return retval;
  1183. print_unlock:
  1184. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1185. print_err:
  1186. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
  1187. return retval;
  1188. }
  1189. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1190. {
  1191. return net2280_set_halt_and_wedge(_ep, value, 0);
  1192. }
  1193. static int net2280_set_wedge(struct usb_ep *_ep)
  1194. {
  1195. if (!_ep || _ep->name == ep0name) {
  1196. pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
  1197. return -EINVAL;
  1198. }
  1199. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1200. }
  1201. static int net2280_fifo_status(struct usb_ep *_ep)
  1202. {
  1203. struct net2280_ep *ep;
  1204. u32 avail;
  1205. ep = container_of(_ep, struct net2280_ep, ep);
  1206. if (!_ep || (!ep->desc && ep->num != 0)) {
  1207. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1208. return -ENODEV;
  1209. }
  1210. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1211. dev_err(&ep->dev->pdev->dev,
  1212. "%s: Invalid driver=%p or speed=%d\n",
  1213. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1214. return -ESHUTDOWN;
  1215. }
  1216. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1217. if (avail > ep->fifo_size) {
  1218. dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
  1219. return -EOVERFLOW;
  1220. }
  1221. if (ep->is_in)
  1222. avail = ep->fifo_size - avail;
  1223. return avail;
  1224. }
  1225. static void net2280_fifo_flush(struct usb_ep *_ep)
  1226. {
  1227. struct net2280_ep *ep;
  1228. ep = container_of(_ep, struct net2280_ep, ep);
  1229. if (!_ep || (!ep->desc && ep->num != 0)) {
  1230. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1231. return;
  1232. }
  1233. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1234. dev_err(&ep->dev->pdev->dev,
  1235. "%s: Invalid driver=%p or speed=%d\n",
  1236. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1237. return;
  1238. }
  1239. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1240. (void) readl(&ep->regs->ep_rsp);
  1241. }
  1242. static const struct usb_ep_ops net2280_ep_ops = {
  1243. .enable = net2280_enable,
  1244. .disable = net2280_disable,
  1245. .alloc_request = net2280_alloc_request,
  1246. .free_request = net2280_free_request,
  1247. .queue = net2280_queue,
  1248. .dequeue = net2280_dequeue,
  1249. .set_halt = net2280_set_halt,
  1250. .set_wedge = net2280_set_wedge,
  1251. .fifo_status = net2280_fifo_status,
  1252. .fifo_flush = net2280_fifo_flush,
  1253. };
  1254. /*-------------------------------------------------------------------------*/
  1255. static int net2280_get_frame(struct usb_gadget *_gadget)
  1256. {
  1257. struct net2280 *dev;
  1258. unsigned long flags;
  1259. u16 retval;
  1260. if (!_gadget)
  1261. return -ENODEV;
  1262. dev = container_of(_gadget, struct net2280, gadget);
  1263. spin_lock_irqsave(&dev->lock, flags);
  1264. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1265. spin_unlock_irqrestore(&dev->lock, flags);
  1266. return retval;
  1267. }
  1268. static int net2280_wakeup(struct usb_gadget *_gadget)
  1269. {
  1270. struct net2280 *dev;
  1271. u32 tmp;
  1272. unsigned long flags;
  1273. if (!_gadget)
  1274. return 0;
  1275. dev = container_of(_gadget, struct net2280, gadget);
  1276. spin_lock_irqsave(&dev->lock, flags);
  1277. tmp = readl(&dev->usb->usbctl);
  1278. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1279. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1280. spin_unlock_irqrestore(&dev->lock, flags);
  1281. /* pci writes may still be posted */
  1282. return 0;
  1283. }
  1284. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1285. {
  1286. struct net2280 *dev;
  1287. u32 tmp;
  1288. unsigned long flags;
  1289. if (!_gadget)
  1290. return 0;
  1291. dev = container_of(_gadget, struct net2280, gadget);
  1292. spin_lock_irqsave(&dev->lock, flags);
  1293. tmp = readl(&dev->usb->usbctl);
  1294. if (value) {
  1295. tmp |= BIT(SELF_POWERED_STATUS);
  1296. _gadget->is_selfpowered = 1;
  1297. } else {
  1298. tmp &= ~BIT(SELF_POWERED_STATUS);
  1299. _gadget->is_selfpowered = 0;
  1300. }
  1301. writel(tmp, &dev->usb->usbctl);
  1302. spin_unlock_irqrestore(&dev->lock, flags);
  1303. return 0;
  1304. }
  1305. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1306. {
  1307. struct net2280 *dev;
  1308. u32 tmp;
  1309. unsigned long flags;
  1310. if (!_gadget)
  1311. return -ENODEV;
  1312. dev = container_of(_gadget, struct net2280, gadget);
  1313. spin_lock_irqsave(&dev->lock, flags);
  1314. tmp = readl(&dev->usb->usbctl);
  1315. dev->softconnect = (is_on != 0);
  1316. if (is_on) {
  1317. ep0_start(dev);
  1318. writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1319. } else {
  1320. writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1321. stop_activity(dev, NULL);
  1322. }
  1323. spin_unlock_irqrestore(&dev->lock, flags);
  1324. return 0;
  1325. }
  1326. static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
  1327. struct usb_endpoint_descriptor *desc,
  1328. struct usb_ss_ep_comp_descriptor *ep_comp)
  1329. {
  1330. char name[8];
  1331. struct usb_ep *ep;
  1332. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
  1333. /* ep-e, ep-f are PIO with only 64 byte fifos */
  1334. ep = gadget_find_ep_by_name(_gadget, "ep-e");
  1335. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1336. return ep;
  1337. ep = gadget_find_ep_by_name(_gadget, "ep-f");
  1338. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1339. return ep;
  1340. }
  1341. /* USB3380: Only first four endpoints have DMA channels. Allocate
  1342. * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc
  1343. * endpoints use DMA hw endpoints.
  1344. */
  1345. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1346. usb_endpoint_dir_in(desc)) {
  1347. ep = gadget_find_ep_by_name(_gadget, "ep2in");
  1348. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1349. return ep;
  1350. ep = gadget_find_ep_by_name(_gadget, "ep4in");
  1351. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1352. return ep;
  1353. } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1354. !usb_endpoint_dir_in(desc)) {
  1355. ep = gadget_find_ep_by_name(_gadget, "ep1out");
  1356. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1357. return ep;
  1358. ep = gadget_find_ep_by_name(_gadget, "ep3out");
  1359. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1360. return ep;
  1361. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1362. usb_endpoint_dir_in(desc)) {
  1363. ep = gadget_find_ep_by_name(_gadget, "ep1in");
  1364. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1365. return ep;
  1366. ep = gadget_find_ep_by_name(_gadget, "ep3in");
  1367. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1368. return ep;
  1369. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1370. !usb_endpoint_dir_in(desc)) {
  1371. ep = gadget_find_ep_by_name(_gadget, "ep2out");
  1372. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1373. return ep;
  1374. ep = gadget_find_ep_by_name(_gadget, "ep4out");
  1375. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1376. return ep;
  1377. }
  1378. /* USB3380: use same address for usb and hardware endpoints */
  1379. snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
  1380. usb_endpoint_dir_in(desc) ? "in" : "out");
  1381. ep = gadget_find_ep_by_name(_gadget, name);
  1382. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1383. return ep;
  1384. return NULL;
  1385. }
  1386. static int net2280_start(struct usb_gadget *_gadget,
  1387. struct usb_gadget_driver *driver);
  1388. static int net2280_stop(struct usb_gadget *_gadget);
  1389. static void net2280_async_callbacks(struct usb_gadget *_gadget, bool enable);
  1390. static const struct usb_gadget_ops net2280_ops = {
  1391. .get_frame = net2280_get_frame,
  1392. .wakeup = net2280_wakeup,
  1393. .set_selfpowered = net2280_set_selfpowered,
  1394. .pullup = net2280_pullup,
  1395. .udc_start = net2280_start,
  1396. .udc_stop = net2280_stop,
  1397. .udc_async_callbacks = net2280_async_callbacks,
  1398. .match_ep = net2280_match_ep,
  1399. };
  1400. /*-------------------------------------------------------------------------*/
  1401. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1402. /* FIXME move these into procfs, and use seq_file.
  1403. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1404. * and also doesn't help products using this with 2.4 kernels.
  1405. */
  1406. /* "function" sysfs attribute */
  1407. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1408. char *buf)
  1409. {
  1410. struct net2280 *dev = dev_get_drvdata(_dev);
  1411. if (!dev->driver || !dev->driver->function ||
  1412. strlen(dev->driver->function) > PAGE_SIZE)
  1413. return 0;
  1414. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1415. }
  1416. static DEVICE_ATTR_RO(function);
  1417. static ssize_t registers_show(struct device *_dev,
  1418. struct device_attribute *attr, char *buf)
  1419. {
  1420. struct net2280 *dev;
  1421. char *next;
  1422. unsigned size, t;
  1423. unsigned long flags;
  1424. int i;
  1425. u32 t1, t2;
  1426. const char *s;
  1427. dev = dev_get_drvdata(_dev);
  1428. next = buf;
  1429. size = PAGE_SIZE;
  1430. spin_lock_irqsave(&dev->lock, flags);
  1431. if (dev->driver)
  1432. s = dev->driver->driver.name;
  1433. else
  1434. s = "(none)";
  1435. /* Main Control Registers */
  1436. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1437. ", chiprev %04x\n\n"
  1438. "devinit %03x fifoctl %08x gadget '%s'\n"
  1439. "pci irqenb0 %02x irqenb1 %08x "
  1440. "irqstat0 %04x irqstat1 %08x\n",
  1441. driver_name, dev->chiprev,
  1442. readl(&dev->regs->devinit),
  1443. readl(&dev->regs->fifoctl),
  1444. s,
  1445. readl(&dev->regs->pciirqenb0),
  1446. readl(&dev->regs->pciirqenb1),
  1447. readl(&dev->regs->irqstat0),
  1448. readl(&dev->regs->irqstat1));
  1449. size -= t;
  1450. next += t;
  1451. /* USB Control Registers */
  1452. t1 = readl(&dev->usb->usbctl);
  1453. t2 = readl(&dev->usb->usbstat);
  1454. if (t1 & BIT(VBUS_PIN)) {
  1455. if (t2 & BIT(HIGH_SPEED))
  1456. s = "high speed";
  1457. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1458. s = "powered";
  1459. else
  1460. s = "full speed";
  1461. /* full speed bit (6) not working?? */
  1462. } else
  1463. s = "not attached";
  1464. t = scnprintf(next, size,
  1465. "stdrsp %08x usbctl %08x usbstat %08x "
  1466. "addr 0x%02x (%s)\n",
  1467. readl(&dev->usb->stdrsp), t1, t2,
  1468. readl(&dev->usb->ouraddr), s);
  1469. size -= t;
  1470. next += t;
  1471. /* PCI Master Control Registers */
  1472. /* DMA Control Registers */
  1473. /* Configurable EP Control Registers */
  1474. for (i = 0; i < dev->n_ep; i++) {
  1475. struct net2280_ep *ep;
  1476. ep = &dev->ep[i];
  1477. if (i && !ep->desc)
  1478. continue;
  1479. t1 = readl(&ep->cfg->ep_cfg);
  1480. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1481. t = scnprintf(next, size,
  1482. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1483. "irqenb %02x\n",
  1484. ep->ep.name, t1, t2,
  1485. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1486. ? "NAK " : "",
  1487. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1488. ? "hide " : "",
  1489. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1490. ? "CRC " : "",
  1491. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1492. ? "interrupt " : "",
  1493. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1494. ? "status " : "",
  1495. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1496. ? "NAKmode " : "",
  1497. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1498. ? "DATA1 " : "DATA0 ",
  1499. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1500. ? "HALT " : "",
  1501. readl(&ep->regs->ep_irqenb));
  1502. size -= t;
  1503. next += t;
  1504. t = scnprintf(next, size,
  1505. "\tstat %08x avail %04x "
  1506. "(ep%d%s-%s)%s\n",
  1507. readl(&ep->regs->ep_stat),
  1508. readl(&ep->regs->ep_avail),
  1509. t1 & 0x0f, DIR_STRING(t1),
  1510. type_string(t1 >> 8),
  1511. ep->stopped ? "*" : "");
  1512. size -= t;
  1513. next += t;
  1514. if (!ep->dma)
  1515. continue;
  1516. t = scnprintf(next, size,
  1517. " dma\tctl %08x stat %08x count %08x\n"
  1518. "\taddr %08x desc %08x\n",
  1519. readl(&ep->dma->dmactl),
  1520. readl(&ep->dma->dmastat),
  1521. readl(&ep->dma->dmacount),
  1522. readl(&ep->dma->dmaaddr),
  1523. readl(&ep->dma->dmadesc));
  1524. size -= t;
  1525. next += t;
  1526. }
  1527. /* Indexed Registers (none yet) */
  1528. /* Statistics */
  1529. t = scnprintf(next, size, "\nirqs: ");
  1530. size -= t;
  1531. next += t;
  1532. for (i = 0; i < dev->n_ep; i++) {
  1533. struct net2280_ep *ep;
  1534. ep = &dev->ep[i];
  1535. if (i && !ep->irqs)
  1536. continue;
  1537. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1538. size -= t;
  1539. next += t;
  1540. }
  1541. t = scnprintf(next, size, "\n");
  1542. size -= t;
  1543. next += t;
  1544. spin_unlock_irqrestore(&dev->lock, flags);
  1545. return PAGE_SIZE - size;
  1546. }
  1547. static DEVICE_ATTR_RO(registers);
  1548. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1549. char *buf)
  1550. {
  1551. struct net2280 *dev;
  1552. char *next;
  1553. unsigned size;
  1554. unsigned long flags;
  1555. int i;
  1556. dev = dev_get_drvdata(_dev);
  1557. next = buf;
  1558. size = PAGE_SIZE;
  1559. spin_lock_irqsave(&dev->lock, flags);
  1560. for (i = 0; i < dev->n_ep; i++) {
  1561. struct net2280_ep *ep = &dev->ep[i];
  1562. struct net2280_request *req;
  1563. int t;
  1564. if (i != 0) {
  1565. const struct usb_endpoint_descriptor *d;
  1566. d = ep->desc;
  1567. if (!d)
  1568. continue;
  1569. t = d->bEndpointAddress;
  1570. t = scnprintf(next, size,
  1571. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1572. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1573. (t & USB_DIR_IN) ? "in" : "out",
  1574. type_string(d->bmAttributes),
  1575. usb_endpoint_maxp(d),
  1576. ep->dma ? "dma" : "pio", ep->fifo_size
  1577. );
  1578. } else /* ep0 should only have one transfer queued */
  1579. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1580. ep->is_in ? "in" : "out");
  1581. if (t <= 0 || t > size)
  1582. goto done;
  1583. size -= t;
  1584. next += t;
  1585. if (list_empty(&ep->queue)) {
  1586. t = scnprintf(next, size, "\t(nothing queued)\n");
  1587. if (t <= 0 || t > size)
  1588. goto done;
  1589. size -= t;
  1590. next += t;
  1591. continue;
  1592. }
  1593. list_for_each_entry(req, &ep->queue, queue) {
  1594. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1595. t = scnprintf(next, size,
  1596. "\treq %p len %d/%d "
  1597. "buf %p (dmacount %08x)\n",
  1598. &req->req, req->req.actual,
  1599. req->req.length, req->req.buf,
  1600. readl(&ep->dma->dmacount));
  1601. else
  1602. t = scnprintf(next, size,
  1603. "\treq %p len %d/%d buf %p\n",
  1604. &req->req, req->req.actual,
  1605. req->req.length, req->req.buf);
  1606. if (t <= 0 || t > size)
  1607. goto done;
  1608. size -= t;
  1609. next += t;
  1610. if (ep->dma) {
  1611. struct net2280_dma *td;
  1612. td = req->td;
  1613. t = scnprintf(next, size, "\t td %08x "
  1614. " count %08x buf %08x desc %08x\n",
  1615. (u32) req->td_dma,
  1616. le32_to_cpu(td->dmacount),
  1617. le32_to_cpu(td->dmaaddr),
  1618. le32_to_cpu(td->dmadesc));
  1619. if (t <= 0 || t > size)
  1620. goto done;
  1621. size -= t;
  1622. next += t;
  1623. }
  1624. }
  1625. }
  1626. done:
  1627. spin_unlock_irqrestore(&dev->lock, flags);
  1628. return PAGE_SIZE - size;
  1629. }
  1630. static DEVICE_ATTR_RO(queues);
  1631. #else
  1632. #define device_create_file(a, b) (0)
  1633. #define device_remove_file(a, b) do { } while (0)
  1634. #endif
  1635. /*-------------------------------------------------------------------------*/
  1636. /* another driver-specific mode might be a request type doing dma
  1637. * to/from another device fifo instead of to/from memory.
  1638. */
  1639. static void set_fifo_mode(struct net2280 *dev, int mode)
  1640. {
  1641. /* keeping high bits preserves BAR2 */
  1642. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1643. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1644. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1645. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1646. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1647. switch (mode) {
  1648. case 0:
  1649. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1650. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1651. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1652. break;
  1653. case 1:
  1654. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1655. break;
  1656. case 2:
  1657. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1658. dev->ep[1].fifo_size = 2048;
  1659. dev->ep[2].fifo_size = 1024;
  1660. break;
  1661. }
  1662. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1663. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1664. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1665. }
  1666. static void defect7374_disable_data_eps(struct net2280 *dev)
  1667. {
  1668. /*
  1669. * For Defect 7374, disable data EPs (and more):
  1670. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1671. * returing ep regs back to normal.
  1672. */
  1673. struct net2280_ep *ep;
  1674. int i;
  1675. unsigned char ep_sel;
  1676. u32 tmp_reg;
  1677. for (i = 1; i < 5; i++) {
  1678. ep = &dev->ep[i];
  1679. writel(i, &ep->cfg->ep_cfg);
  1680. }
  1681. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1682. for (i = 0; i < 6; i++)
  1683. writel(0, &dev->dep[i].dep_cfg);
  1684. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1685. /* Select an endpoint for subsequent operations: */
  1686. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1687. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1688. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1689. ep_sel == 18 || ep_sel == 20)
  1690. continue;
  1691. /* Change settings on some selected endpoints */
  1692. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1693. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1694. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1695. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1696. tmp_reg |= BIT(EP_INITIALIZED);
  1697. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1698. }
  1699. }
  1700. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1701. {
  1702. u32 tmp = 0, tmp_reg;
  1703. u32 scratch;
  1704. int i;
  1705. unsigned char ep_sel;
  1706. scratch = get_idx_reg(dev->regs, SCRATCH);
  1707. WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
  1708. == DEFECT7374_FSM_SS_CONTROL_READ);
  1709. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1710. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1711. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1712. /*GPEPs:*/
  1713. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1714. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1715. ((dev->enhanced_mode) ?
  1716. BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
  1717. BIT(ENDPOINT_ENABLE)));
  1718. for (i = 1; i < 5; i++)
  1719. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1720. /* CSRIN, PCIIN, STATIN, RCIN*/
  1721. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1722. writel(tmp, &dev->dep[1].dep_cfg);
  1723. writel(tmp, &dev->dep[3].dep_cfg);
  1724. writel(tmp, &dev->dep[4].dep_cfg);
  1725. writel(tmp, &dev->dep[5].dep_cfg);
  1726. /*Implemented for development and debug.
  1727. * Can be refined/tuned later.*/
  1728. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1729. /* Select an endpoint for subsequent operations: */
  1730. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1731. writel(((tmp_reg & ~0x1f) | ep_sel),
  1732. &dev->plregs->pl_ep_ctrl);
  1733. if (ep_sel == 1) {
  1734. tmp =
  1735. (readl(&dev->plregs->pl_ep_ctrl) |
  1736. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1737. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1738. continue;
  1739. }
  1740. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1741. ep_sel == 18 || ep_sel == 20)
  1742. continue;
  1743. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1744. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1745. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1746. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1747. ~BIT(EP_INITIALIZED);
  1748. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1749. }
  1750. /* Set FSM to focus on the first Control Read:
  1751. * - Tip: Connection speed is known upon the first
  1752. * setup request.*/
  1753. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1754. set_idx_reg(dev->regs, SCRATCH, scratch);
  1755. }
  1756. /* keeping it simple:
  1757. * - one bus driver, initted first;
  1758. * - one function driver, initted second
  1759. *
  1760. * most of the work to support multiple net2280 controllers would
  1761. * be to associate this gadget driver (yes?) with all of them, or
  1762. * perhaps to bind specific drivers to specific devices.
  1763. */
  1764. static void usb_reset_228x(struct net2280 *dev)
  1765. {
  1766. u32 tmp;
  1767. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1768. (void) readl(&dev->usb->usbctl);
  1769. net2280_led_init(dev);
  1770. /* disable automatic responses, and irqs */
  1771. writel(0, &dev->usb->stdrsp);
  1772. writel(0, &dev->regs->pciirqenb0);
  1773. writel(0, &dev->regs->pciirqenb1);
  1774. /* clear old dma and irq state */
  1775. for (tmp = 0; tmp < 4; tmp++) {
  1776. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1777. if (ep->dma)
  1778. abort_dma(ep);
  1779. }
  1780. writel(~0, &dev->regs->irqstat0),
  1781. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1782. /* reset, and enable pci */
  1783. tmp = readl(&dev->regs->devinit) |
  1784. BIT(PCI_ENABLE) |
  1785. BIT(FIFO_SOFT_RESET) |
  1786. BIT(USB_SOFT_RESET) |
  1787. BIT(M8051_RESET);
  1788. writel(tmp, &dev->regs->devinit);
  1789. /* standard fifo and endpoint allocations */
  1790. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1791. }
  1792. static void usb_reset_338x(struct net2280 *dev)
  1793. {
  1794. u32 tmp;
  1795. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1796. (void)readl(&dev->usb->usbctl);
  1797. net2280_led_init(dev);
  1798. if (dev->bug7734_patched) {
  1799. /* disable automatic responses, and irqs */
  1800. writel(0, &dev->usb->stdrsp);
  1801. writel(0, &dev->regs->pciirqenb0);
  1802. writel(0, &dev->regs->pciirqenb1);
  1803. }
  1804. /* clear old dma and irq state */
  1805. for (tmp = 0; tmp < 4; tmp++) {
  1806. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1807. struct net2280_dma_regs __iomem *dma;
  1808. if (ep->dma) {
  1809. abort_dma(ep);
  1810. } else {
  1811. dma = &dev->dma[tmp];
  1812. writel(BIT(DMA_ABORT), &dma->dmastat);
  1813. writel(0, &dma->dmactl);
  1814. }
  1815. }
  1816. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1817. if (dev->bug7734_patched) {
  1818. /* reset, and enable pci */
  1819. tmp = readl(&dev->regs->devinit) |
  1820. BIT(PCI_ENABLE) |
  1821. BIT(FIFO_SOFT_RESET) |
  1822. BIT(USB_SOFT_RESET) |
  1823. BIT(M8051_RESET);
  1824. writel(tmp, &dev->regs->devinit);
  1825. }
  1826. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1827. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1828. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1829. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1830. }
  1831. static void usb_reset(struct net2280 *dev)
  1832. {
  1833. if (dev->quirks & PLX_LEGACY)
  1834. return usb_reset_228x(dev);
  1835. return usb_reset_338x(dev);
  1836. }
  1837. static void usb_reinit_228x(struct net2280 *dev)
  1838. {
  1839. u32 tmp;
  1840. /* basic endpoint init */
  1841. for (tmp = 0; tmp < 7; tmp++) {
  1842. struct net2280_ep *ep = &dev->ep[tmp];
  1843. ep->ep.name = ep_info_dft[tmp].name;
  1844. ep->ep.caps = ep_info_dft[tmp].caps;
  1845. ep->dev = dev;
  1846. ep->num = tmp;
  1847. if (tmp > 0 && tmp <= 4) {
  1848. ep->fifo_size = 1024;
  1849. ep->dma = &dev->dma[tmp - 1];
  1850. } else
  1851. ep->fifo_size = 64;
  1852. ep->regs = &dev->epregs[tmp];
  1853. ep->cfg = &dev->epregs[tmp];
  1854. ep_reset_228x(dev->regs, ep);
  1855. }
  1856. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1857. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1858. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1859. dev->gadget.ep0 = &dev->ep[0].ep;
  1860. dev->ep[0].stopped = 0;
  1861. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1862. /* we want to prevent lowlevel/insecure access from the USB host,
  1863. * but erratum 0119 means this enable bit is ignored
  1864. */
  1865. for (tmp = 0; tmp < 5; tmp++)
  1866. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1867. }
  1868. static void usb_reinit_338x(struct net2280 *dev)
  1869. {
  1870. int i;
  1871. u32 tmp, val;
  1872. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1873. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1874. 0x00, 0xC0, 0x00, 0xC0 };
  1875. /* basic endpoint init */
  1876. for (i = 0; i < dev->n_ep; i++) {
  1877. struct net2280_ep *ep = &dev->ep[i];
  1878. ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
  1879. ep_info_dft[i].name;
  1880. ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
  1881. ep_info_dft[i].caps;
  1882. ep->dev = dev;
  1883. ep->num = i;
  1884. if (i > 0 && i <= 4)
  1885. ep->dma = &dev->dma[i - 1];
  1886. if (dev->enhanced_mode) {
  1887. ep->cfg = &dev->epregs[ne[i]];
  1888. /*
  1889. * Set USB endpoint number, hardware allows same number
  1890. * in both directions.
  1891. */
  1892. if (i > 0 && i < 5)
  1893. writel(ne[i], &ep->cfg->ep_cfg);
  1894. ep->regs = (struct net2280_ep_regs __iomem *)
  1895. (((void __iomem *)&dev->epregs[ne[i]]) +
  1896. ep_reg_addr[i]);
  1897. } else {
  1898. ep->cfg = &dev->epregs[i];
  1899. ep->regs = &dev->epregs[i];
  1900. }
  1901. ep->fifo_size = (i != 0) ? 2048 : 512;
  1902. ep_reset_338x(dev->regs, ep);
  1903. }
  1904. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1905. dev->gadget.ep0 = &dev->ep[0].ep;
  1906. dev->ep[0].stopped = 0;
  1907. /* Link layer set up */
  1908. if (dev->bug7734_patched) {
  1909. tmp = readl(&dev->usb_ext->usbctl2) &
  1910. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1911. writel(tmp, &dev->usb_ext->usbctl2);
  1912. }
  1913. /* Hardware Defect and Workaround */
  1914. val = readl(&dev->llregs->ll_lfps_5);
  1915. val &= ~(0xf << TIMER_LFPS_6US);
  1916. val |= 0x5 << TIMER_LFPS_6US;
  1917. writel(val, &dev->llregs->ll_lfps_5);
  1918. val = readl(&dev->llregs->ll_lfps_6);
  1919. val &= ~(0xffff << TIMER_LFPS_80US);
  1920. val |= 0x0100 << TIMER_LFPS_80US;
  1921. writel(val, &dev->llregs->ll_lfps_6);
  1922. /*
  1923. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1924. * Hot Reset Exit Handshake may Fail in Specific Case using
  1925. * Default Register Settings. Workaround for Enumeration test.
  1926. */
  1927. val = readl(&dev->llregs->ll_tsn_counters_2);
  1928. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1929. val |= 0x10 << HOT_TX_NORESET_TS2;
  1930. writel(val, &dev->llregs->ll_tsn_counters_2);
  1931. val = readl(&dev->llregs->ll_tsn_counters_3);
  1932. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1933. val |= 0x3 << HOT_RX_RESET_TS2;
  1934. writel(val, &dev->llregs->ll_tsn_counters_3);
  1935. /*
  1936. * AB errata. Errata 11. Workaround for Default Duration of LFPS
  1937. * Handshake Signaling for Device-Initiated U1 Exit is too short.
  1938. * Without this, various enumeration failures observed with
  1939. * modern superspeed hosts.
  1940. */
  1941. val = readl(&dev->llregs->ll_lfps_timers_2);
  1942. writel((val & 0xffff0000) | LFPS_TIMERS_2_WORKAROUND_VALUE,
  1943. &dev->llregs->ll_lfps_timers_2);
  1944. /*
  1945. * Set Recovery Idle to Recover bit:
  1946. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1947. * link robustness with various hosts and hubs.
  1948. * - It is safe to set for all connection speeds; all chip revisions.
  1949. * - R-M-W to leave other bits undisturbed.
  1950. * - Reference PLX TT-7372
  1951. */
  1952. val = readl(&dev->llregs->ll_tsn_chicken_bit);
  1953. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1954. writel(val, &dev->llregs->ll_tsn_chicken_bit);
  1955. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1956. /* disable dedicated endpoints */
  1957. writel(0x0D, &dev->dep[0].dep_cfg);
  1958. writel(0x0D, &dev->dep[1].dep_cfg);
  1959. writel(0x0E, &dev->dep[2].dep_cfg);
  1960. writel(0x0E, &dev->dep[3].dep_cfg);
  1961. writel(0x0F, &dev->dep[4].dep_cfg);
  1962. writel(0x0C, &dev->dep[5].dep_cfg);
  1963. }
  1964. static void usb_reinit(struct net2280 *dev)
  1965. {
  1966. if (dev->quirks & PLX_LEGACY)
  1967. return usb_reinit_228x(dev);
  1968. return usb_reinit_338x(dev);
  1969. }
  1970. static void ep0_start_228x(struct net2280 *dev)
  1971. {
  1972. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1973. BIT(CLEAR_NAK_OUT_PACKETS) |
  1974. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1975. &dev->epregs[0].ep_rsp);
  1976. /*
  1977. * hardware optionally handles a bunch of standard requests
  1978. * that the API hides from drivers anyway. have it do so.
  1979. * endpoint status/features are handled in software, to
  1980. * help pass tests for some dubious behavior.
  1981. */
  1982. writel(BIT(SET_TEST_MODE) |
  1983. BIT(SET_ADDRESS) |
  1984. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1985. BIT(GET_DEVICE_STATUS) |
  1986. BIT(GET_INTERFACE_STATUS),
  1987. &dev->usb->stdrsp);
  1988. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1989. BIT(SELF_POWERED_USB_DEVICE) |
  1990. BIT(REMOTE_WAKEUP_SUPPORT) |
  1991. (dev->softconnect << USB_DETECT_ENABLE) |
  1992. BIT(SELF_POWERED_STATUS),
  1993. &dev->usb->usbctl);
  1994. /* enable irqs so we can see ep0 and general operation */
  1995. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1996. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1997. &dev->regs->pciirqenb0);
  1998. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1999. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  2000. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  2001. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  2002. BIT(VBUS_INTERRUPT_ENABLE) |
  2003. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2004. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  2005. &dev->regs->pciirqenb1);
  2006. /* don't leave any writes posted */
  2007. (void) readl(&dev->usb->usbctl);
  2008. }
  2009. static void ep0_start_338x(struct net2280 *dev)
  2010. {
  2011. if (dev->bug7734_patched)
  2012. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  2013. BIT(SET_EP_HIDE_STATUS_PHASE),
  2014. &dev->epregs[0].ep_rsp);
  2015. /*
  2016. * hardware optionally handles a bunch of standard requests
  2017. * that the API hides from drivers anyway. have it do so.
  2018. * endpoint status/features are handled in software, to
  2019. * help pass tests for some dubious behavior.
  2020. */
  2021. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  2022. BIT(SET_SEL) |
  2023. BIT(SET_TEST_MODE) |
  2024. BIT(SET_ADDRESS) |
  2025. BIT(GET_INTERFACE_STATUS) |
  2026. BIT(GET_DEVICE_STATUS),
  2027. &dev->usb->stdrsp);
  2028. dev->wakeup_enable = 1;
  2029. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  2030. (dev->softconnect << USB_DETECT_ENABLE) |
  2031. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2032. &dev->usb->usbctl);
  2033. /* enable irqs so we can see ep0 and general operation */
  2034. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  2035. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  2036. &dev->regs->pciirqenb0);
  2037. writel(BIT(PCI_INTERRUPT_ENABLE) |
  2038. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2039. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  2040. BIT(VBUS_INTERRUPT_ENABLE),
  2041. &dev->regs->pciirqenb1);
  2042. /* don't leave any writes posted */
  2043. (void)readl(&dev->usb->usbctl);
  2044. }
  2045. static void ep0_start(struct net2280 *dev)
  2046. {
  2047. if (dev->quirks & PLX_LEGACY)
  2048. return ep0_start_228x(dev);
  2049. return ep0_start_338x(dev);
  2050. }
  2051. /* when a driver is successfully registered, it will receive
  2052. * control requests including set_configuration(), which enables
  2053. * non-control requests. then usb traffic follows until a
  2054. * disconnect is reported. then a host may connect again, or
  2055. * the driver might get unbound.
  2056. */
  2057. static int net2280_start(struct usb_gadget *_gadget,
  2058. struct usb_gadget_driver *driver)
  2059. {
  2060. struct net2280 *dev;
  2061. int retval;
  2062. unsigned i;
  2063. /* insist on high speed support from the driver, since
  2064. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  2065. * "must not be used in normal operation"
  2066. */
  2067. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  2068. !driver->setup)
  2069. return -EINVAL;
  2070. dev = container_of(_gadget, struct net2280, gadget);
  2071. for (i = 0; i < dev->n_ep; i++)
  2072. dev->ep[i].irqs = 0;
  2073. /* hook up the driver ... */
  2074. dev->driver = driver;
  2075. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  2076. if (retval)
  2077. goto err_unbind;
  2078. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  2079. if (retval)
  2080. goto err_func;
  2081. /* enable host detection and ep0; and we're ready
  2082. * for set_configuration as well as eventual disconnect.
  2083. */
  2084. net2280_led_active(dev, 1);
  2085. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2086. defect7374_enable_data_eps_zero(dev);
  2087. ep0_start(dev);
  2088. /* pci writes may still be posted */
  2089. return 0;
  2090. err_func:
  2091. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2092. err_unbind:
  2093. dev->driver = NULL;
  2094. return retval;
  2095. }
  2096. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  2097. {
  2098. int i;
  2099. /* don't disconnect if it's not connected */
  2100. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  2101. driver = NULL;
  2102. /* stop hardware; prevent new request submissions;
  2103. * and kill any outstanding requests.
  2104. */
  2105. usb_reset(dev);
  2106. for (i = 0; i < dev->n_ep; i++)
  2107. nuke(&dev->ep[i]);
  2108. /* report disconnect; the driver is already quiesced */
  2109. if (dev->async_callbacks && driver) {
  2110. spin_unlock(&dev->lock);
  2111. driver->disconnect(&dev->gadget);
  2112. spin_lock(&dev->lock);
  2113. }
  2114. usb_reinit(dev);
  2115. }
  2116. static int net2280_stop(struct usb_gadget *_gadget)
  2117. {
  2118. struct net2280 *dev;
  2119. unsigned long flags;
  2120. dev = container_of(_gadget, struct net2280, gadget);
  2121. spin_lock_irqsave(&dev->lock, flags);
  2122. stop_activity(dev, NULL);
  2123. spin_unlock_irqrestore(&dev->lock, flags);
  2124. net2280_led_active(dev, 0);
  2125. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2126. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2127. dev->driver = NULL;
  2128. return 0;
  2129. }
  2130. static void net2280_async_callbacks(struct usb_gadget *_gadget, bool enable)
  2131. {
  2132. struct net2280 *dev = container_of(_gadget, struct net2280, gadget);
  2133. spin_lock_irq(&dev->lock);
  2134. dev->async_callbacks = enable;
  2135. spin_unlock_irq(&dev->lock);
  2136. }
  2137. /*-------------------------------------------------------------------------*/
  2138. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2139. * also works for dma-capable endpoints, in pio mode or just
  2140. * to manually advance the queue after short OUT transfers.
  2141. */
  2142. static void handle_ep_small(struct net2280_ep *ep)
  2143. {
  2144. struct net2280_request *req;
  2145. u32 t;
  2146. /* 0 error, 1 mid-data, 2 done */
  2147. int mode = 1;
  2148. if (!list_empty(&ep->queue))
  2149. req = list_entry(ep->queue.next,
  2150. struct net2280_request, queue);
  2151. else
  2152. req = NULL;
  2153. /* ack all, and handle what we care about */
  2154. t = readl(&ep->regs->ep_stat);
  2155. ep->irqs++;
  2156. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2157. ep->ep.name, t, req ? &req->req : NULL);
  2158. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2159. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2160. else
  2161. /* Added for 2282 */
  2162. writel(t, &ep->regs->ep_stat);
  2163. /* for ep0, monitor token irqs to catch data stage length errors
  2164. * and to synchronize on status.
  2165. *
  2166. * also, to defer reporting of protocol stalls ... here's where
  2167. * data or status first appears, handling stalls here should never
  2168. * cause trouble on the host side..
  2169. *
  2170. * control requests could be slightly faster without token synch for
  2171. * status, but status can jam up that way.
  2172. */
  2173. if (unlikely(ep->num == 0)) {
  2174. if (ep->is_in) {
  2175. /* status; stop NAKing */
  2176. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2177. if (ep->dev->protocol_stall) {
  2178. ep->stopped = 1;
  2179. set_halt(ep);
  2180. }
  2181. if (!req)
  2182. allow_status(ep);
  2183. mode = 2;
  2184. /* reply to extra IN data tokens with a zlp */
  2185. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2186. if (ep->dev->protocol_stall) {
  2187. ep->stopped = 1;
  2188. set_halt(ep);
  2189. mode = 2;
  2190. } else if (ep->responded &&
  2191. !req && !ep->stopped)
  2192. write_fifo(ep, NULL);
  2193. }
  2194. } else {
  2195. /* status; stop NAKing */
  2196. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2197. if (ep->dev->protocol_stall) {
  2198. ep->stopped = 1;
  2199. set_halt(ep);
  2200. }
  2201. mode = 2;
  2202. /* an extra OUT token is an error */
  2203. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2204. req &&
  2205. req->req.actual == req->req.length) ||
  2206. (ep->responded && !req)) {
  2207. ep->dev->protocol_stall = 1;
  2208. set_halt(ep);
  2209. ep->stopped = 1;
  2210. if (req)
  2211. done(ep, req, -EOVERFLOW);
  2212. req = NULL;
  2213. }
  2214. }
  2215. }
  2216. if (unlikely(!req))
  2217. return;
  2218. /* manual DMA queue advance after short OUT */
  2219. if (likely(ep->dma)) {
  2220. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2221. struct net2280_request *stuck_req = NULL;
  2222. int stopped = ep->stopped;
  2223. int num_completed;
  2224. int stuck = 0;
  2225. u32 count;
  2226. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2227. * we expect (N <= maxpacket) bytes; host wrote M.
  2228. * iff (M < N) we won't ever see a DMA interrupt.
  2229. */
  2230. ep->stopped = 1;
  2231. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2232. /* any preceding dma transfers must finish.
  2233. * dma handles (M >= N), may empty the queue
  2234. */
  2235. num_completed = scan_dma_completions(ep);
  2236. if (unlikely(list_empty(&ep->queue) ||
  2237. ep->out_overflow)) {
  2238. req = NULL;
  2239. break;
  2240. }
  2241. req = list_entry(ep->queue.next,
  2242. struct net2280_request, queue);
  2243. /* here either (M < N), a "real" short rx;
  2244. * or (M == N) and the queue didn't empty
  2245. */
  2246. if (likely(t & BIT(FIFO_EMPTY))) {
  2247. count = readl(&ep->dma->dmacount);
  2248. count &= DMA_BYTE_COUNT_MASK;
  2249. if (readl(&ep->dma->dmadesc)
  2250. != req->td_dma)
  2251. req = NULL;
  2252. break;
  2253. }
  2254. /* Escape loop if no dma transfers completed
  2255. * after few retries.
  2256. */
  2257. if (num_completed == 0) {
  2258. if (stuck_req == req &&
  2259. readl(&ep->dma->dmadesc) !=
  2260. req->td_dma && stuck++ > 5) {
  2261. count = readl(
  2262. &ep->dma->dmacount);
  2263. count &= DMA_BYTE_COUNT_MASK;
  2264. req = NULL;
  2265. ep_dbg(ep->dev, "%s escape stuck %d, count %u\n",
  2266. ep->ep.name, stuck,
  2267. count);
  2268. break;
  2269. } else if (stuck_req != req) {
  2270. stuck_req = req;
  2271. stuck = 0;
  2272. }
  2273. } else {
  2274. stuck_req = NULL;
  2275. stuck = 0;
  2276. }
  2277. udelay(1);
  2278. }
  2279. /* stop DMA, leave ep NAKing */
  2280. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2281. spin_stop_dma(ep->dma);
  2282. if (likely(req)) {
  2283. req->td->dmacount = 0;
  2284. t = readl(&ep->regs->ep_avail);
  2285. dma_done(ep, req, count,
  2286. (ep->out_overflow || t)
  2287. ? -EOVERFLOW : 0);
  2288. }
  2289. /* also flush to prevent erratum 0106 trouble */
  2290. if (unlikely(ep->out_overflow ||
  2291. (ep->dev->chiprev == 0x0100 &&
  2292. ep->dev->gadget.speed
  2293. == USB_SPEED_FULL))) {
  2294. out_flush(ep);
  2295. ep->out_overflow = 0;
  2296. }
  2297. /* (re)start dma if needed, stop NAKing */
  2298. ep->stopped = stopped;
  2299. if (!list_empty(&ep->queue))
  2300. restart_dma(ep);
  2301. } else
  2302. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2303. ep->ep.name, t);
  2304. return;
  2305. /* data packet(s) received (in the fifo, OUT) */
  2306. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2307. if (read_fifo(ep, req) && ep->num != 0)
  2308. mode = 2;
  2309. /* data packet(s) transmitted (IN) */
  2310. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2311. unsigned len;
  2312. len = req->req.length - req->req.actual;
  2313. if (len > ep->ep.maxpacket)
  2314. len = ep->ep.maxpacket;
  2315. req->req.actual += len;
  2316. /* if we wrote it all, we're usually done */
  2317. /* send zlps until the status stage */
  2318. if ((req->req.actual == req->req.length) &&
  2319. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2320. mode = 2;
  2321. /* there was nothing to do ... */
  2322. } else if (mode == 1)
  2323. return;
  2324. /* done */
  2325. if (mode == 2) {
  2326. /* stream endpoints often resubmit/unlink in completion */
  2327. done(ep, req, 0);
  2328. /* maybe advance queue to next request */
  2329. if (ep->num == 0) {
  2330. /* NOTE: net2280 could let gadget driver start the
  2331. * status stage later. since not all controllers let
  2332. * them control that, the api doesn't (yet) allow it.
  2333. */
  2334. if (!ep->stopped)
  2335. allow_status(ep);
  2336. req = NULL;
  2337. } else {
  2338. if (!list_empty(&ep->queue) && !ep->stopped)
  2339. req = list_entry(ep->queue.next,
  2340. struct net2280_request, queue);
  2341. else
  2342. req = NULL;
  2343. if (req && !ep->is_in)
  2344. stop_out_naking(ep);
  2345. }
  2346. }
  2347. /* is there a buffer for the next packet?
  2348. * for best streaming performance, make sure there is one.
  2349. */
  2350. if (req && !ep->stopped) {
  2351. /* load IN fifo with next packet (may be zlp) */
  2352. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2353. write_fifo(ep, &req->req);
  2354. }
  2355. }
  2356. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2357. {
  2358. struct net2280_ep *ep;
  2359. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2360. return &dev->ep[0];
  2361. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2362. u8 bEndpointAddress;
  2363. if (!ep->desc)
  2364. continue;
  2365. bEndpointAddress = ep->desc->bEndpointAddress;
  2366. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2367. continue;
  2368. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2369. return ep;
  2370. }
  2371. return NULL;
  2372. }
  2373. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2374. {
  2375. u32 scratch, fsmvalue;
  2376. u32 ack_wait_timeout, state;
  2377. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2378. scratch = get_idx_reg(dev->regs, SCRATCH);
  2379. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2380. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2381. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2382. (r.bRequestType & USB_DIR_IN)))
  2383. return;
  2384. /* This is the first Control Read for this connection: */
  2385. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2386. /*
  2387. * Connection is NOT SS:
  2388. * - Connection must be FS or HS.
  2389. * - This FSM state should allow workaround software to
  2390. * run after the next USB connection.
  2391. */
  2392. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2393. dev->bug7734_patched = 1;
  2394. goto restore_data_eps;
  2395. }
  2396. /* Connection is SS: */
  2397. for (ack_wait_timeout = 0;
  2398. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2399. ack_wait_timeout++) {
  2400. state = readl(&dev->plregs->pl_ep_status_1)
  2401. & (0xff << STATE);
  2402. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2403. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2404. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2405. dev->bug7734_patched = 1;
  2406. break;
  2407. }
  2408. /*
  2409. * We have not yet received host's Data Phase ACK
  2410. * - Wait and try again.
  2411. */
  2412. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2413. }
  2414. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2415. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2416. "to detect SS host's data phase ACK.");
  2417. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2418. "got 0x%2.2x.\n", state >> STATE);
  2419. } else {
  2420. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2421. "%duSec for Control Read Data Phase ACK\n",
  2422. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2423. }
  2424. restore_data_eps:
  2425. /*
  2426. * Restore data EPs to their pre-workaround settings (disabled,
  2427. * initialized, and other details).
  2428. */
  2429. defect7374_disable_data_eps(dev);
  2430. set_idx_reg(dev->regs, SCRATCH, scratch);
  2431. return;
  2432. }
  2433. static void ep_clear_seqnum(struct net2280_ep *ep)
  2434. {
  2435. struct net2280 *dev = ep->dev;
  2436. u32 val;
  2437. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2438. val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
  2439. val |= ep_pl[ep->num];
  2440. writel(val, &dev->plregs->pl_ep_ctrl);
  2441. val |= BIT(SEQUENCE_NUMBER_RESET);
  2442. writel(val, &dev->plregs->pl_ep_ctrl);
  2443. return;
  2444. }
  2445. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2446. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2447. {
  2448. struct net2280_ep *e;
  2449. u16 status;
  2450. int tmp = 0;
  2451. #define w_value le16_to_cpu(r.wValue)
  2452. #define w_index le16_to_cpu(r.wIndex)
  2453. #define w_length le16_to_cpu(r.wLength)
  2454. switch (r.bRequest) {
  2455. case USB_REQ_SET_CONFIGURATION:
  2456. dev->addressed_state = !w_value;
  2457. goto usb3_delegate;
  2458. case USB_REQ_GET_STATUS:
  2459. switch (r.bRequestType) {
  2460. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2461. status = dev->wakeup_enable ? 0x02 : 0x00;
  2462. if (dev->gadget.is_selfpowered)
  2463. status |= BIT(0);
  2464. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2465. dev->ltm_enable << 4);
  2466. writel(0, &dev->epregs[0].ep_irqenb);
  2467. set_fifo_bytecount(ep, sizeof(status));
  2468. writel((__force u32) status, &dev->epregs[0].ep_data);
  2469. allow_status_338x(ep);
  2470. break;
  2471. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2472. e = get_ep_by_addr(dev, w_index);
  2473. if (!e)
  2474. goto do_stall3;
  2475. status = readl(&e->regs->ep_rsp) &
  2476. BIT(CLEAR_ENDPOINT_HALT);
  2477. writel(0, &dev->epregs[0].ep_irqenb);
  2478. set_fifo_bytecount(ep, sizeof(status));
  2479. writel((__force u32) status, &dev->epregs[0].ep_data);
  2480. allow_status_338x(ep);
  2481. break;
  2482. default:
  2483. goto usb3_delegate;
  2484. }
  2485. break;
  2486. case USB_REQ_CLEAR_FEATURE:
  2487. switch (r.bRequestType) {
  2488. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2489. if (!dev->addressed_state) {
  2490. switch (w_value) {
  2491. case USB_DEVICE_U1_ENABLE:
  2492. dev->u1_enable = 0;
  2493. writel(readl(&dev->usb_ext->usbctl2) &
  2494. ~BIT(U1_ENABLE),
  2495. &dev->usb_ext->usbctl2);
  2496. allow_status_338x(ep);
  2497. goto next_endpoints3;
  2498. case USB_DEVICE_U2_ENABLE:
  2499. dev->u2_enable = 0;
  2500. writel(readl(&dev->usb_ext->usbctl2) &
  2501. ~BIT(U2_ENABLE),
  2502. &dev->usb_ext->usbctl2);
  2503. allow_status_338x(ep);
  2504. goto next_endpoints3;
  2505. case USB_DEVICE_LTM_ENABLE:
  2506. dev->ltm_enable = 0;
  2507. writel(readl(&dev->usb_ext->usbctl2) &
  2508. ~BIT(LTM_ENABLE),
  2509. &dev->usb_ext->usbctl2);
  2510. allow_status_338x(ep);
  2511. goto next_endpoints3;
  2512. default:
  2513. break;
  2514. }
  2515. }
  2516. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2517. dev->wakeup_enable = 0;
  2518. writel(readl(&dev->usb->usbctl) &
  2519. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2520. &dev->usb->usbctl);
  2521. allow_status_338x(ep);
  2522. break;
  2523. }
  2524. goto usb3_delegate;
  2525. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2526. e = get_ep_by_addr(dev, w_index);
  2527. if (!e)
  2528. goto do_stall3;
  2529. if (w_value != USB_ENDPOINT_HALT)
  2530. goto do_stall3;
  2531. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2532. /*
  2533. * Workaround for SS SeqNum not cleared via
  2534. * Endpoint Halt (Clear) bit. select endpoint
  2535. */
  2536. ep_clear_seqnum(e);
  2537. clear_halt(e);
  2538. if (!list_empty(&e->queue) && e->td_dma)
  2539. restart_dma(e);
  2540. allow_status(ep);
  2541. ep->stopped = 1;
  2542. break;
  2543. default:
  2544. goto usb3_delegate;
  2545. }
  2546. break;
  2547. case USB_REQ_SET_FEATURE:
  2548. switch (r.bRequestType) {
  2549. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2550. if (!dev->addressed_state) {
  2551. switch (w_value) {
  2552. case USB_DEVICE_U1_ENABLE:
  2553. dev->u1_enable = 1;
  2554. writel(readl(&dev->usb_ext->usbctl2) |
  2555. BIT(U1_ENABLE),
  2556. &dev->usb_ext->usbctl2);
  2557. allow_status_338x(ep);
  2558. goto next_endpoints3;
  2559. case USB_DEVICE_U2_ENABLE:
  2560. dev->u2_enable = 1;
  2561. writel(readl(&dev->usb_ext->usbctl2) |
  2562. BIT(U2_ENABLE),
  2563. &dev->usb_ext->usbctl2);
  2564. allow_status_338x(ep);
  2565. goto next_endpoints3;
  2566. case USB_DEVICE_LTM_ENABLE:
  2567. dev->ltm_enable = 1;
  2568. writel(readl(&dev->usb_ext->usbctl2) |
  2569. BIT(LTM_ENABLE),
  2570. &dev->usb_ext->usbctl2);
  2571. allow_status_338x(ep);
  2572. goto next_endpoints3;
  2573. default:
  2574. break;
  2575. }
  2576. }
  2577. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2578. dev->wakeup_enable = 1;
  2579. writel(readl(&dev->usb->usbctl) |
  2580. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2581. &dev->usb->usbctl);
  2582. allow_status_338x(ep);
  2583. break;
  2584. }
  2585. goto usb3_delegate;
  2586. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2587. e = get_ep_by_addr(dev, w_index);
  2588. if (!e || (w_value != USB_ENDPOINT_HALT))
  2589. goto do_stall3;
  2590. ep->stopped = 1;
  2591. if (ep->num == 0)
  2592. ep->dev->protocol_stall = 1;
  2593. else {
  2594. if (ep->dma)
  2595. abort_dma(ep);
  2596. set_halt(ep);
  2597. }
  2598. allow_status_338x(ep);
  2599. break;
  2600. default:
  2601. goto usb3_delegate;
  2602. }
  2603. break;
  2604. default:
  2605. usb3_delegate:
  2606. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2607. r.bRequestType, r.bRequest,
  2608. w_value, w_index, w_length,
  2609. readl(&ep->cfg->ep_cfg));
  2610. ep->responded = 0;
  2611. if (dev->async_callbacks) {
  2612. spin_unlock(&dev->lock);
  2613. tmp = dev->driver->setup(&dev->gadget, &r);
  2614. spin_lock(&dev->lock);
  2615. }
  2616. }
  2617. do_stall3:
  2618. if (tmp < 0) {
  2619. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2620. r.bRequestType, r.bRequest, tmp);
  2621. dev->protocol_stall = 1;
  2622. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2623. set_halt(ep);
  2624. }
  2625. next_endpoints3:
  2626. #undef w_value
  2627. #undef w_index
  2628. #undef w_length
  2629. return;
  2630. }
  2631. static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
  2632. {
  2633. u32 index;
  2634. u32 bit;
  2635. for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
  2636. bit = BIT(ep_bit[index]);
  2637. if (!stat0)
  2638. break;
  2639. if (!(stat0 & bit))
  2640. continue;
  2641. stat0 &= ~bit;
  2642. handle_ep_small(&dev->ep[index]);
  2643. }
  2644. }
  2645. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2646. {
  2647. struct net2280_ep *ep;
  2648. u32 num, scratch;
  2649. /* most of these don't need individual acks */
  2650. stat &= ~BIT(INTA_ASSERTED);
  2651. if (!stat)
  2652. return;
  2653. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2654. /* starting a control request? */
  2655. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2656. union {
  2657. u32 raw[2];
  2658. struct usb_ctrlrequest r;
  2659. } u;
  2660. int tmp;
  2661. struct net2280_request *req;
  2662. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2663. u32 val = readl(&dev->usb->usbstat);
  2664. if (val & BIT(SUPER_SPEED)) {
  2665. dev->gadget.speed = USB_SPEED_SUPER;
  2666. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2667. EP0_SS_MAX_PACKET_SIZE);
  2668. } else if (val & BIT(HIGH_SPEED)) {
  2669. dev->gadget.speed = USB_SPEED_HIGH;
  2670. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2671. EP0_HS_MAX_PACKET_SIZE);
  2672. } else {
  2673. dev->gadget.speed = USB_SPEED_FULL;
  2674. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2675. EP0_HS_MAX_PACKET_SIZE);
  2676. }
  2677. net2280_led_speed(dev, dev->gadget.speed);
  2678. ep_dbg(dev, "%s\n",
  2679. usb_speed_string(dev->gadget.speed));
  2680. }
  2681. ep = &dev->ep[0];
  2682. ep->irqs++;
  2683. /* make sure any leftover request state is cleared */
  2684. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2685. while (!list_empty(&ep->queue)) {
  2686. req = list_entry(ep->queue.next,
  2687. struct net2280_request, queue);
  2688. done(ep, req, (req->req.actual == req->req.length)
  2689. ? 0 : -EPROTO);
  2690. }
  2691. ep->stopped = 0;
  2692. dev->protocol_stall = 0;
  2693. if (!(dev->quirks & PLX_PCIE)) {
  2694. if (ep->dev->quirks & PLX_2280)
  2695. tmp = BIT(FIFO_OVERFLOW) |
  2696. BIT(FIFO_UNDERFLOW);
  2697. else
  2698. tmp = 0;
  2699. writel(tmp | BIT(TIMEOUT) |
  2700. BIT(USB_STALL_SENT) |
  2701. BIT(USB_IN_NAK_SENT) |
  2702. BIT(USB_IN_ACK_RCVD) |
  2703. BIT(USB_OUT_PING_NAK_SENT) |
  2704. BIT(USB_OUT_ACK_SENT) |
  2705. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2706. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2707. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2708. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2709. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2710. BIT(DATA_IN_TOKEN_INTERRUPT),
  2711. &ep->regs->ep_stat);
  2712. }
  2713. u.raw[0] = readl(&dev->usb->setup0123);
  2714. u.raw[1] = readl(&dev->usb->setup4567);
  2715. cpu_to_le32s(&u.raw[0]);
  2716. cpu_to_le32s(&u.raw[1]);
  2717. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2718. defect7374_workaround(dev, u.r);
  2719. tmp = 0;
  2720. #define w_value le16_to_cpu(u.r.wValue)
  2721. #define w_index le16_to_cpu(u.r.wIndex)
  2722. #define w_length le16_to_cpu(u.r.wLength)
  2723. /* ack the irq */
  2724. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2725. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2726. /* watch control traffic at the token level, and force
  2727. * synchronization before letting the status stage happen.
  2728. * FIXME ignore tokens we'll NAK, until driver responds.
  2729. * that'll mean a lot less irqs for some drivers.
  2730. */
  2731. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2732. if (ep->is_in) {
  2733. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2734. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2735. BIT(DATA_IN_TOKEN_INTERRUPT);
  2736. stop_out_naking(ep);
  2737. } else
  2738. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2739. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2740. BIT(DATA_IN_TOKEN_INTERRUPT);
  2741. writel(scratch, &dev->epregs[0].ep_irqenb);
  2742. /* we made the hardware handle most lowlevel requests;
  2743. * everything else goes uplevel to the gadget code.
  2744. */
  2745. ep->responded = 1;
  2746. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2747. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2748. goto next_endpoints;
  2749. }
  2750. switch (u.r.bRequest) {
  2751. case USB_REQ_GET_STATUS: {
  2752. struct net2280_ep *e;
  2753. __le32 status;
  2754. /* hw handles device and interface status */
  2755. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2756. goto delegate;
  2757. e = get_ep_by_addr(dev, w_index);
  2758. if (!e || w_length > 2)
  2759. goto do_stall;
  2760. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2761. status = cpu_to_le32(1);
  2762. else
  2763. status = cpu_to_le32(0);
  2764. /* don't bother with a request object! */
  2765. writel(0, &dev->epregs[0].ep_irqenb);
  2766. set_fifo_bytecount(ep, w_length);
  2767. writel((__force u32)status, &dev->epregs[0].ep_data);
  2768. allow_status(ep);
  2769. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2770. goto next_endpoints;
  2771. }
  2772. break;
  2773. case USB_REQ_CLEAR_FEATURE: {
  2774. struct net2280_ep *e;
  2775. /* hw handles device features */
  2776. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2777. goto delegate;
  2778. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2779. goto do_stall;
  2780. e = get_ep_by_addr(dev, w_index);
  2781. if (!e)
  2782. goto do_stall;
  2783. if (e->wedged) {
  2784. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2785. ep->ep.name);
  2786. } else {
  2787. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2788. clear_halt(e);
  2789. if ((ep->dev->quirks & PLX_PCIE) &&
  2790. !list_empty(&e->queue) && e->td_dma)
  2791. restart_dma(e);
  2792. }
  2793. allow_status(ep);
  2794. goto next_endpoints;
  2795. }
  2796. break;
  2797. case USB_REQ_SET_FEATURE: {
  2798. struct net2280_ep *e;
  2799. /* hw handles device features */
  2800. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2801. goto delegate;
  2802. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2803. goto do_stall;
  2804. e = get_ep_by_addr(dev, w_index);
  2805. if (!e)
  2806. goto do_stall;
  2807. if (e->ep.name == ep0name)
  2808. goto do_stall;
  2809. set_halt(e);
  2810. if ((dev->quirks & PLX_PCIE) && e->dma)
  2811. abort_dma(e);
  2812. allow_status(ep);
  2813. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2814. goto next_endpoints;
  2815. }
  2816. break;
  2817. default:
  2818. delegate:
  2819. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2820. "ep_cfg %08x\n",
  2821. u.r.bRequestType, u.r.bRequest,
  2822. w_value, w_index, w_length,
  2823. readl(&ep->cfg->ep_cfg));
  2824. ep->responded = 0;
  2825. if (dev->async_callbacks) {
  2826. spin_unlock(&dev->lock);
  2827. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2828. spin_lock(&dev->lock);
  2829. }
  2830. }
  2831. /* stall ep0 on error */
  2832. if (tmp < 0) {
  2833. do_stall:
  2834. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2835. u.r.bRequestType, u.r.bRequest, tmp);
  2836. dev->protocol_stall = 1;
  2837. }
  2838. /* some in/out token irq should follow; maybe stall then.
  2839. * driver must queue a request (even zlp) or halt ep0
  2840. * before the host times out.
  2841. */
  2842. }
  2843. #undef w_value
  2844. #undef w_index
  2845. #undef w_length
  2846. next_endpoints:
  2847. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  2848. u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
  2849. USB3380_IRQSTAT0_EP_INTR_MASK_IN |
  2850. USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
  2851. if (stat & mask) {
  2852. usb338x_handle_ep_intr(dev, stat & mask);
  2853. stat &= ~mask;
  2854. }
  2855. } else {
  2856. /* endpoint data irq ? */
  2857. scratch = stat & 0x7f;
  2858. stat &= ~0x7f;
  2859. for (num = 0; scratch; num++) {
  2860. u32 t;
  2861. /* do this endpoint's FIFO and queue need tending? */
  2862. t = BIT(num);
  2863. if ((scratch & t) == 0)
  2864. continue;
  2865. scratch ^= t;
  2866. ep = &dev->ep[num];
  2867. handle_ep_small(ep);
  2868. }
  2869. }
  2870. if (stat)
  2871. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2872. }
  2873. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2874. BIT(DMA_C_INTERRUPT) | \
  2875. BIT(DMA_B_INTERRUPT) | \
  2876. BIT(DMA_A_INTERRUPT))
  2877. #define PCI_ERROR_INTERRUPTS ( \
  2878. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2879. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2880. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2881. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2882. __releases(dev->lock)
  2883. __acquires(dev->lock)
  2884. {
  2885. struct net2280_ep *ep;
  2886. u32 tmp, num, mask, scratch;
  2887. /* after disconnect there's nothing else to do! */
  2888. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2889. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2890. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2891. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2892. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2893. * only indicates a change in the reset state).
  2894. */
  2895. if (stat & tmp) {
  2896. bool reset = false;
  2897. bool disconnect = false;
  2898. /*
  2899. * Ignore disconnects and resets if the speed hasn't been set.
  2900. * VBUS can bounce and there's always an initial reset.
  2901. */
  2902. writel(tmp, &dev->regs->irqstat1);
  2903. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2904. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2905. (readl(&dev->usb->usbctl) &
  2906. BIT(VBUS_PIN)) == 0) {
  2907. disconnect = true;
  2908. ep_dbg(dev, "disconnect %s\n",
  2909. dev->driver->driver.name);
  2910. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2911. (readl(&dev->usb->usbstat) & mask)
  2912. == 0) {
  2913. reset = true;
  2914. ep_dbg(dev, "reset %s\n",
  2915. dev->driver->driver.name);
  2916. }
  2917. if (disconnect || reset) {
  2918. stop_activity(dev, dev->driver);
  2919. ep0_start(dev);
  2920. if (dev->async_callbacks) {
  2921. spin_unlock(&dev->lock);
  2922. if (reset)
  2923. usb_gadget_udc_reset(&dev->gadget, dev->driver);
  2924. else
  2925. (dev->driver->disconnect)(&dev->gadget);
  2926. spin_lock(&dev->lock);
  2927. }
  2928. return;
  2929. }
  2930. }
  2931. stat &= ~tmp;
  2932. /* vBUS can bounce ... one of many reasons to ignore the
  2933. * notion of hotplug events on bus connect/disconnect!
  2934. */
  2935. if (!stat)
  2936. return;
  2937. }
  2938. /* NOTE: chip stays in PCI D0 state for now, but it could
  2939. * enter D1 to save more power
  2940. */
  2941. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2942. if (stat & tmp) {
  2943. writel(tmp, &dev->regs->irqstat1);
  2944. spin_unlock(&dev->lock);
  2945. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2946. if (dev->async_callbacks && dev->driver->suspend)
  2947. dev->driver->suspend(&dev->gadget);
  2948. if (!enable_suspend)
  2949. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2950. } else {
  2951. if (dev->async_callbacks && dev->driver->resume)
  2952. dev->driver->resume(&dev->gadget);
  2953. /* at high speed, note erratum 0133 */
  2954. }
  2955. spin_lock(&dev->lock);
  2956. stat &= ~tmp;
  2957. }
  2958. /* clear any other status/irqs */
  2959. if (stat)
  2960. writel(stat, &dev->regs->irqstat1);
  2961. /* some status we can just ignore */
  2962. if (dev->quirks & PLX_2280)
  2963. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2964. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2965. BIT(RESUME_INTERRUPT) |
  2966. BIT(SOF_INTERRUPT));
  2967. else
  2968. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2969. BIT(RESUME_INTERRUPT) |
  2970. BIT(SOF_DOWN_INTERRUPT) |
  2971. BIT(SOF_INTERRUPT));
  2972. if (!stat)
  2973. return;
  2974. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2975. /* DMA status, for ep-{a,b,c,d} */
  2976. scratch = stat & DMA_INTERRUPTS;
  2977. stat &= ~DMA_INTERRUPTS;
  2978. scratch >>= 9;
  2979. for (num = 0; scratch; num++) {
  2980. struct net2280_dma_regs __iomem *dma;
  2981. tmp = BIT(num);
  2982. if ((tmp & scratch) == 0)
  2983. continue;
  2984. scratch ^= tmp;
  2985. ep = &dev->ep[num + 1];
  2986. dma = ep->dma;
  2987. if (!dma)
  2988. continue;
  2989. /* clear ep's dma status */
  2990. tmp = readl(&dma->dmastat);
  2991. writel(tmp, &dma->dmastat);
  2992. /* dma sync*/
  2993. if (dev->quirks & PLX_PCIE) {
  2994. u32 r_dmacount = readl(&dma->dmacount);
  2995. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2996. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2997. continue;
  2998. }
  2999. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  3000. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  3001. ep->ep.name, tmp);
  3002. continue;
  3003. }
  3004. stop_dma(ep->dma);
  3005. /* OUT transfers terminate when the data from the
  3006. * host is in our memory. Process whatever's done.
  3007. * On this path, we know transfer's last packet wasn't
  3008. * less than req->length. NAK_OUT_PACKETS may be set,
  3009. * or the FIFO may already be holding new packets.
  3010. *
  3011. * IN transfers can linger in the FIFO for a very
  3012. * long time ... we ignore that for now, accounting
  3013. * precisely (like PIO does) needs per-packet irqs
  3014. */
  3015. scan_dma_completions(ep);
  3016. /* disable dma on inactive queues; else maybe restart */
  3017. if (!list_empty(&ep->queue)) {
  3018. tmp = readl(&dma->dmactl);
  3019. restart_dma(ep);
  3020. }
  3021. ep->irqs++;
  3022. }
  3023. /* NOTE: there are other PCI errors we might usefully notice.
  3024. * if they appear very often, here's where to try recovering.
  3025. */
  3026. if (stat & PCI_ERROR_INTERRUPTS) {
  3027. ep_err(dev, "pci dma error; stat %08x\n", stat);
  3028. stat &= ~PCI_ERROR_INTERRUPTS;
  3029. /* these are fatal errors, but "maybe" they won't
  3030. * happen again ...
  3031. */
  3032. stop_activity(dev, dev->driver);
  3033. ep0_start(dev);
  3034. stat = 0;
  3035. }
  3036. if (stat)
  3037. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  3038. }
  3039. static irqreturn_t net2280_irq(int irq, void *_dev)
  3040. {
  3041. struct net2280 *dev = _dev;
  3042. /* shared interrupt, not ours */
  3043. if ((dev->quirks & PLX_LEGACY) &&
  3044. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  3045. return IRQ_NONE;
  3046. spin_lock(&dev->lock);
  3047. /* handle disconnect, dma, and more */
  3048. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  3049. /* control requests and PIO */
  3050. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  3051. if (dev->quirks & PLX_PCIE) {
  3052. /* re-enable interrupt to trigger any possible new interrupt */
  3053. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  3054. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  3055. writel(pciirqenb1, &dev->regs->pciirqenb1);
  3056. }
  3057. spin_unlock(&dev->lock);
  3058. return IRQ_HANDLED;
  3059. }
  3060. /*-------------------------------------------------------------------------*/
  3061. static void gadget_release(struct device *_dev)
  3062. {
  3063. struct net2280 *dev = container_of(_dev, struct net2280, gadget.dev);
  3064. kfree(dev);
  3065. }
  3066. /* tear down the binding between this driver and the pci device */
  3067. static void net2280_remove(struct pci_dev *pdev)
  3068. {
  3069. struct net2280 *dev = pci_get_drvdata(pdev);
  3070. if (dev->added)
  3071. usb_del_gadget(&dev->gadget);
  3072. BUG_ON(dev->driver);
  3073. /* then clean up the resources we allocated during probe() */
  3074. if (dev->requests) {
  3075. int i;
  3076. for (i = 1; i < 5; i++) {
  3077. if (!dev->ep[i].dummy)
  3078. continue;
  3079. dma_pool_free(dev->requests, dev->ep[i].dummy,
  3080. dev->ep[i].td_dma);
  3081. }
  3082. dma_pool_destroy(dev->requests);
  3083. }
  3084. if (dev->got_irq)
  3085. free_irq(pdev->irq, dev);
  3086. if (dev->quirks & PLX_PCIE)
  3087. pci_disable_msi(pdev);
  3088. if (dev->regs) {
  3089. net2280_led_shutdown(dev);
  3090. iounmap(dev->regs);
  3091. }
  3092. if (dev->region)
  3093. release_mem_region(pci_resource_start(pdev, 0),
  3094. pci_resource_len(pdev, 0));
  3095. if (dev->enabled)
  3096. pci_disable_device(pdev);
  3097. device_remove_file(&pdev->dev, &dev_attr_registers);
  3098. ep_info(dev, "unbind\n");
  3099. usb_put_gadget(&dev->gadget);
  3100. }
  3101. /* wrap this driver around the specified device, but
  3102. * don't respond over USB until a gadget driver binds to us.
  3103. */
  3104. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  3105. {
  3106. struct net2280 *dev;
  3107. unsigned long resource, len;
  3108. void __iomem *base = NULL;
  3109. int retval, i;
  3110. /* alloc, and start init */
  3111. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  3112. if (dev == NULL) {
  3113. retval = -ENOMEM;
  3114. goto done;
  3115. }
  3116. pci_set_drvdata(pdev, dev);
  3117. usb_initialize_gadget(&pdev->dev, &dev->gadget, gadget_release);
  3118. spin_lock_init(&dev->lock);
  3119. dev->quirks = id->driver_data;
  3120. dev->pdev = pdev;
  3121. dev->gadget.ops = &net2280_ops;
  3122. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  3123. USB_SPEED_SUPER : USB_SPEED_HIGH;
  3124. /* the "gadget" abstracts/virtualizes the controller */
  3125. dev->gadget.name = driver_name;
  3126. /* now all the pci goodies ... */
  3127. if (pci_enable_device(pdev) < 0) {
  3128. retval = -ENODEV;
  3129. goto done;
  3130. }
  3131. dev->enabled = 1;
  3132. /* BAR 0 holds all the registers
  3133. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  3134. * BAR 2 is fifo memory; unused here
  3135. */
  3136. resource = pci_resource_start(pdev, 0);
  3137. len = pci_resource_len(pdev, 0);
  3138. if (!request_mem_region(resource, len, driver_name)) {
  3139. ep_dbg(dev, "controller already in use\n");
  3140. retval = -EBUSY;
  3141. goto done;
  3142. }
  3143. dev->region = 1;
  3144. /* FIXME provide firmware download interface to put
  3145. * 8051 code into the chip, e.g. to turn on PCI PM.
  3146. */
  3147. base = ioremap(resource, len);
  3148. if (base == NULL) {
  3149. ep_dbg(dev, "can't map memory\n");
  3150. retval = -EFAULT;
  3151. goto done;
  3152. }
  3153. dev->regs = (struct net2280_regs __iomem *) base;
  3154. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3155. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3156. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3157. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3158. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3159. if (dev->quirks & PLX_PCIE) {
  3160. u32 fsmvalue;
  3161. u32 usbstat;
  3162. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3163. (base + 0x00b4);
  3164. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3165. (base + 0x0700);
  3166. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3167. (base + 0x0800);
  3168. usbstat = readl(&dev->usb->usbstat);
  3169. dev->enhanced_mode = !!(usbstat & BIT(11));
  3170. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3171. /* put into initial config, link up all endpoints */
  3172. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3173. (0xf << DEFECT7374_FSM_FIELD);
  3174. /* See if firmware needs to set up for workaround: */
  3175. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  3176. dev->bug7734_patched = 1;
  3177. writel(0, &dev->usb->usbctl);
  3178. } else
  3179. dev->bug7734_patched = 0;
  3180. } else {
  3181. dev->enhanced_mode = 0;
  3182. dev->n_ep = 7;
  3183. /* put into initial config, link up all endpoints */
  3184. writel(0, &dev->usb->usbctl);
  3185. }
  3186. usb_reset(dev);
  3187. usb_reinit(dev);
  3188. /* irq setup after old hardware is cleaned up */
  3189. if (!pdev->irq) {
  3190. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3191. retval = -ENODEV;
  3192. goto done;
  3193. }
  3194. if (dev->quirks & PLX_PCIE)
  3195. if (pci_enable_msi(pdev))
  3196. ep_err(dev, "Failed to enable MSI mode\n");
  3197. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3198. driver_name, dev)) {
  3199. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3200. retval = -EBUSY;
  3201. goto done;
  3202. }
  3203. dev->got_irq = 1;
  3204. /* DMA setup */
  3205. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3206. dev->requests = dma_pool_create("requests", &pdev->dev,
  3207. sizeof(struct net2280_dma),
  3208. 0 /* no alignment requirements */,
  3209. 0 /* or page-crossing issues */);
  3210. if (!dev->requests) {
  3211. ep_dbg(dev, "can't get request pool\n");
  3212. retval = -ENOMEM;
  3213. goto done;
  3214. }
  3215. for (i = 1; i < 5; i++) {
  3216. struct net2280_dma *td;
  3217. td = dma_pool_alloc(dev->requests, GFP_KERNEL,
  3218. &dev->ep[i].td_dma);
  3219. if (!td) {
  3220. ep_dbg(dev, "can't get dummy %d\n", i);
  3221. retval = -ENOMEM;
  3222. goto done;
  3223. }
  3224. td->dmacount = 0; /* not VALID */
  3225. td->dmadesc = td->dmaaddr;
  3226. dev->ep[i].dummy = td;
  3227. }
  3228. /* enable lower-overhead pci memory bursts during DMA */
  3229. if (dev->quirks & PLX_LEGACY)
  3230. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3231. /*
  3232. * 256 write retries may not be enough...
  3233. BIT(PCI_RETRY_ABORT_ENABLE) |
  3234. */
  3235. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3236. BIT(DMA_READ_LINE_ENABLE),
  3237. &dev->pci->pcimstctl);
  3238. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3239. pci_set_master(pdev);
  3240. pci_try_set_mwi(pdev);
  3241. /* ... also flushes any posted pci writes */
  3242. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3243. /* done */
  3244. ep_info(dev, "%s\n", driver_desc);
  3245. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3246. pdev->irq, base, dev->chiprev);
  3247. ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
  3248. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3249. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3250. if (retval)
  3251. goto done;
  3252. retval = usb_add_gadget(&dev->gadget);
  3253. if (retval)
  3254. goto done;
  3255. dev->added = 1;
  3256. return 0;
  3257. done:
  3258. if (dev) {
  3259. net2280_remove(pdev);
  3260. kfree(dev);
  3261. }
  3262. return retval;
  3263. }
  3264. /* make sure the board is quiescent; otherwise it will continue
  3265. * generating IRQs across the upcoming reboot.
  3266. */
  3267. static void net2280_shutdown(struct pci_dev *pdev)
  3268. {
  3269. struct net2280 *dev = pci_get_drvdata(pdev);
  3270. /* disable IRQs */
  3271. writel(0, &dev->regs->pciirqenb0);
  3272. writel(0, &dev->regs->pciirqenb1);
  3273. /* disable the pullup so the host will think we're gone */
  3274. writel(0, &dev->usb->usbctl);
  3275. }
  3276. /*-------------------------------------------------------------------------*/
  3277. static const struct pci_device_id pci_ids[] = { {
  3278. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3279. .class_mask = ~0,
  3280. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3281. .device = 0x2280,
  3282. .subvendor = PCI_ANY_ID,
  3283. .subdevice = PCI_ANY_ID,
  3284. .driver_data = PLX_LEGACY | PLX_2280,
  3285. }, {
  3286. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3287. .class_mask = ~0,
  3288. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3289. .device = 0x2282,
  3290. .subvendor = PCI_ANY_ID,
  3291. .subdevice = PCI_ANY_ID,
  3292. .driver_data = PLX_LEGACY,
  3293. },
  3294. {
  3295. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3296. .class_mask = ~0,
  3297. .vendor = PCI_VENDOR_ID_PLX,
  3298. .device = 0x2380,
  3299. .subvendor = PCI_ANY_ID,
  3300. .subdevice = PCI_ANY_ID,
  3301. .driver_data = PLX_PCIE,
  3302. },
  3303. {
  3304. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3305. .class_mask = ~0,
  3306. .vendor = PCI_VENDOR_ID_PLX,
  3307. .device = 0x3380,
  3308. .subvendor = PCI_ANY_ID,
  3309. .subdevice = PCI_ANY_ID,
  3310. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3311. },
  3312. {
  3313. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3314. .class_mask = ~0,
  3315. .vendor = PCI_VENDOR_ID_PLX,
  3316. .device = 0x3382,
  3317. .subvendor = PCI_ANY_ID,
  3318. .subdevice = PCI_ANY_ID,
  3319. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3320. },
  3321. { /* end: all zeroes */ }
  3322. };
  3323. MODULE_DEVICE_TABLE(pci, pci_ids);
  3324. /* pci driver glue; this is a "new style" PCI driver module */
  3325. static struct pci_driver net2280_pci_driver = {
  3326. .name = driver_name,
  3327. .id_table = pci_ids,
  3328. .probe = net2280_probe,
  3329. .remove = net2280_remove,
  3330. .shutdown = net2280_shutdown,
  3331. /* FIXME add power management support */
  3332. };
  3333. module_pci_driver(net2280_pci_driver);
  3334. MODULE_DESCRIPTION(DRIVER_DESC);
  3335. MODULE_AUTHOR("David Brownell");
  3336. MODULE_LICENSE("GPL");