fotg210-udc.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * FOTG210 UDC Driver supports Bulk transfer so far
  4. *
  5. * Copyright (C) 2013 Faraday Technology Corporation
  6. *
  7. * Author : Yuan-Hsin Chen <[email protected]>
  8. */
  9. #include <linux/dma-mapping.h>
  10. #include <linux/err.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/io.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/usb/ch9.h>
  16. #include <linux/usb/gadget.h>
  17. #include "fotg210.h"
  18. #define DRIVER_DESC "FOTG210 USB Device Controller Driver"
  19. #define DRIVER_VERSION "30-April-2013"
  20. static const char udc_name[] = "fotg210_udc";
  21. static const char * const fotg210_ep_name[] = {
  22. "ep0", "ep1", "ep2", "ep3", "ep4"};
  23. static void fotg210_disable_fifo_int(struct fotg210_ep *ep)
  24. {
  25. u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
  26. if (ep->dir_in)
  27. value |= DMISGR1_MF_IN_INT(ep->epnum - 1);
  28. else
  29. value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
  30. iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
  31. }
  32. static void fotg210_enable_fifo_int(struct fotg210_ep *ep)
  33. {
  34. u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
  35. if (ep->dir_in)
  36. value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1);
  37. else
  38. value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
  39. iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
  40. }
  41. static void fotg210_set_cxdone(struct fotg210_udc *fotg210)
  42. {
  43. u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
  44. value |= DCFESR_CX_DONE;
  45. iowrite32(value, fotg210->reg + FOTG210_DCFESR);
  46. }
  47. static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req,
  48. int status)
  49. {
  50. list_del_init(&req->queue);
  51. /* don't modify queue heads during completion callback */
  52. if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
  53. req->req.status = -ESHUTDOWN;
  54. else
  55. req->req.status = status;
  56. spin_unlock(&ep->fotg210->lock);
  57. usb_gadget_giveback_request(&ep->ep, &req->req);
  58. spin_lock(&ep->fotg210->lock);
  59. if (ep->epnum) {
  60. if (list_empty(&ep->queue))
  61. fotg210_disable_fifo_int(ep);
  62. } else {
  63. fotg210_set_cxdone(ep->fotg210);
  64. }
  65. }
  66. static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum,
  67. u32 dir_in)
  68. {
  69. struct fotg210_udc *fotg210 = ep->fotg210;
  70. u32 val;
  71. /* Driver should map an ep to a fifo and then map the fifo
  72. * to the ep. What a brain-damaged design!
  73. */
  74. /* map a fifo to an ep */
  75. val = ioread32(fotg210->reg + FOTG210_EPMAP);
  76. val &= ~EPMAP_FIFONOMSK(epnum, dir_in);
  77. val |= EPMAP_FIFONO(epnum, dir_in);
  78. iowrite32(val, fotg210->reg + FOTG210_EPMAP);
  79. /* map the ep to the fifo */
  80. val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
  81. val &= ~FIFOMAP_EPNOMSK(epnum);
  82. val |= FIFOMAP_EPNO(epnum);
  83. iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
  84. /* enable fifo */
  85. val = ioread32(fotg210->reg + FOTG210_FIFOCF);
  86. val |= FIFOCF_FIFO_EN(epnum - 1);
  87. iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
  88. }
  89. static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in)
  90. {
  91. struct fotg210_udc *fotg210 = ep->fotg210;
  92. u32 val;
  93. val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
  94. val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1));
  95. iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
  96. }
  97. static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type)
  98. {
  99. struct fotg210_udc *fotg210 = ep->fotg210;
  100. u32 val;
  101. val = ioread32(fotg210->reg + FOTG210_FIFOCF);
  102. val |= FIFOCF_TYPE(type, epnum - 1);
  103. iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
  104. }
  105. static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps,
  106. u32 dir_in)
  107. {
  108. struct fotg210_udc *fotg210 = ep->fotg210;
  109. u32 val;
  110. u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) :
  111. FOTG210_OUTEPMPSR(epnum);
  112. val = ioread32(fotg210->reg + offset);
  113. val |= INOUTEPMPSR_MPS(mps);
  114. iowrite32(val, fotg210->reg + offset);
  115. }
  116. static int fotg210_config_ep(struct fotg210_ep *ep,
  117. const struct usb_endpoint_descriptor *desc)
  118. {
  119. struct fotg210_udc *fotg210 = ep->fotg210;
  120. fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in);
  121. fotg210_set_tfrtype(ep, ep->epnum, ep->type);
  122. fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in);
  123. fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in);
  124. fotg210->ep[ep->epnum] = ep;
  125. return 0;
  126. }
  127. static int fotg210_ep_enable(struct usb_ep *_ep,
  128. const struct usb_endpoint_descriptor *desc)
  129. {
  130. struct fotg210_ep *ep;
  131. ep = container_of(_ep, struct fotg210_ep, ep);
  132. ep->desc = desc;
  133. ep->epnum = usb_endpoint_num(desc);
  134. ep->type = usb_endpoint_type(desc);
  135. ep->dir_in = usb_endpoint_dir_in(desc);
  136. ep->ep.maxpacket = usb_endpoint_maxp(desc);
  137. return fotg210_config_ep(ep, desc);
  138. }
  139. static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum)
  140. {
  141. struct fotg210_ep *ep = fotg210->ep[epnum];
  142. u32 value;
  143. void __iomem *reg;
  144. reg = (ep->dir_in) ?
  145. fotg210->reg + FOTG210_INEPMPSR(epnum) :
  146. fotg210->reg + FOTG210_OUTEPMPSR(epnum);
  147. /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ
  148. * bit. Controller wouldn't clear this bit. WTF!!!
  149. */
  150. value = ioread32(reg);
  151. value |= INOUTEPMPSR_RESET_TSEQ;
  152. iowrite32(value, reg);
  153. value = ioread32(reg);
  154. value &= ~INOUTEPMPSR_RESET_TSEQ;
  155. iowrite32(value, reg);
  156. }
  157. static int fotg210_ep_release(struct fotg210_ep *ep)
  158. {
  159. if (!ep->epnum)
  160. return 0;
  161. ep->epnum = 0;
  162. ep->stall = 0;
  163. ep->wedged = 0;
  164. fotg210_reset_tseq(ep->fotg210, ep->epnum);
  165. return 0;
  166. }
  167. static int fotg210_ep_disable(struct usb_ep *_ep)
  168. {
  169. struct fotg210_ep *ep;
  170. struct fotg210_request *req;
  171. unsigned long flags;
  172. BUG_ON(!_ep);
  173. ep = container_of(_ep, struct fotg210_ep, ep);
  174. while (!list_empty(&ep->queue)) {
  175. req = list_entry(ep->queue.next,
  176. struct fotg210_request, queue);
  177. spin_lock_irqsave(&ep->fotg210->lock, flags);
  178. fotg210_done(ep, req, -ECONNRESET);
  179. spin_unlock_irqrestore(&ep->fotg210->lock, flags);
  180. }
  181. return fotg210_ep_release(ep);
  182. }
  183. static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep,
  184. gfp_t gfp_flags)
  185. {
  186. struct fotg210_request *req;
  187. req = kzalloc(sizeof(struct fotg210_request), gfp_flags);
  188. if (!req)
  189. return NULL;
  190. INIT_LIST_HEAD(&req->queue);
  191. return &req->req;
  192. }
  193. static void fotg210_ep_free_request(struct usb_ep *_ep,
  194. struct usb_request *_req)
  195. {
  196. struct fotg210_request *req;
  197. req = container_of(_req, struct fotg210_request, req);
  198. kfree(req);
  199. }
  200. static void fotg210_enable_dma(struct fotg210_ep *ep,
  201. dma_addr_t d, u32 len)
  202. {
  203. u32 value;
  204. struct fotg210_udc *fotg210 = ep->fotg210;
  205. /* set transfer length and direction */
  206. value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
  207. value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1));
  208. value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in);
  209. iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
  210. /* set device DMA target FIFO number */
  211. value = ioread32(fotg210->reg + FOTG210_DMATFNR);
  212. if (ep->epnum)
  213. value |= DMATFNR_ACC_FN(ep->epnum - 1);
  214. else
  215. value |= DMATFNR_ACC_CXF;
  216. iowrite32(value, fotg210->reg + FOTG210_DMATFNR);
  217. /* set DMA memory address */
  218. iowrite32(d, fotg210->reg + FOTG210_DMACPSR2);
  219. /* enable MDMA_EROR and MDMA_CMPLT interrupt */
  220. value = ioread32(fotg210->reg + FOTG210_DMISGR2);
  221. value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR);
  222. iowrite32(value, fotg210->reg + FOTG210_DMISGR2);
  223. /* start DMA */
  224. value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
  225. value |= DMACPSR1_DMA_START;
  226. iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
  227. }
  228. static void fotg210_disable_dma(struct fotg210_ep *ep)
  229. {
  230. iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR);
  231. }
  232. static void fotg210_wait_dma_done(struct fotg210_ep *ep)
  233. {
  234. u32 value;
  235. do {
  236. value = ioread32(ep->fotg210->reg + FOTG210_DISGR2);
  237. if ((value & DISGR2_USBRST_INT) ||
  238. (value & DISGR2_DMA_ERROR))
  239. goto dma_reset;
  240. } while (!(value & DISGR2_DMA_CMPLT));
  241. value &= ~DISGR2_DMA_CMPLT;
  242. iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2);
  243. return;
  244. dma_reset:
  245. value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1);
  246. value |= DMACPSR1_DMA_ABORT;
  247. iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1);
  248. /* reset fifo */
  249. if (ep->epnum) {
  250. value = ioread32(ep->fotg210->reg +
  251. FOTG210_FIBCR(ep->epnum - 1));
  252. value |= FIBCR_FFRST;
  253. iowrite32(value, ep->fotg210->reg +
  254. FOTG210_FIBCR(ep->epnum - 1));
  255. } else {
  256. value = ioread32(ep->fotg210->reg + FOTG210_DCFESR);
  257. value |= DCFESR_CX_CLR;
  258. iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR);
  259. }
  260. }
  261. static void fotg210_start_dma(struct fotg210_ep *ep,
  262. struct fotg210_request *req)
  263. {
  264. struct device *dev = &ep->fotg210->gadget.dev;
  265. dma_addr_t d;
  266. u8 *buffer;
  267. u32 length;
  268. if (ep->epnum) {
  269. if (ep->dir_in) {
  270. buffer = req->req.buf;
  271. length = req->req.length;
  272. } else {
  273. buffer = req->req.buf + req->req.actual;
  274. length = ioread32(ep->fotg210->reg +
  275. FOTG210_FIBCR(ep->epnum - 1)) & FIBCR_BCFX;
  276. if (length > req->req.length - req->req.actual)
  277. length = req->req.length - req->req.actual;
  278. }
  279. } else {
  280. buffer = req->req.buf + req->req.actual;
  281. if (req->req.length - req->req.actual > ep->ep.maxpacket)
  282. length = ep->ep.maxpacket;
  283. else
  284. length = req->req.length - req->req.actual;
  285. }
  286. d = dma_map_single(dev, buffer, length,
  287. ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  288. if (dma_mapping_error(dev, d)) {
  289. pr_err("dma_mapping_error\n");
  290. return;
  291. }
  292. fotg210_enable_dma(ep, d, length);
  293. /* check if dma is done */
  294. fotg210_wait_dma_done(ep);
  295. fotg210_disable_dma(ep);
  296. /* update actual transfer length */
  297. req->req.actual += length;
  298. dma_unmap_single(dev, d, length, DMA_TO_DEVICE);
  299. }
  300. static void fotg210_ep0_queue(struct fotg210_ep *ep,
  301. struct fotg210_request *req)
  302. {
  303. if (!req->req.length) {
  304. fotg210_done(ep, req, 0);
  305. return;
  306. }
  307. if (ep->dir_in) { /* if IN */
  308. fotg210_start_dma(ep, req);
  309. if (req->req.length == req->req.actual)
  310. fotg210_done(ep, req, 0);
  311. } else { /* OUT */
  312. u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0);
  313. value &= ~DMISGR0_MCX_OUT_INT;
  314. iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0);
  315. }
  316. }
  317. static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  318. gfp_t gfp_flags)
  319. {
  320. struct fotg210_ep *ep;
  321. struct fotg210_request *req;
  322. unsigned long flags;
  323. int request = 0;
  324. ep = container_of(_ep, struct fotg210_ep, ep);
  325. req = container_of(_req, struct fotg210_request, req);
  326. if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
  327. return -ESHUTDOWN;
  328. spin_lock_irqsave(&ep->fotg210->lock, flags);
  329. if (list_empty(&ep->queue))
  330. request = 1;
  331. list_add_tail(&req->queue, &ep->queue);
  332. req->req.actual = 0;
  333. req->req.status = -EINPROGRESS;
  334. if (!ep->epnum) /* ep0 */
  335. fotg210_ep0_queue(ep, req);
  336. else if (request && !ep->stall)
  337. fotg210_enable_fifo_int(ep);
  338. spin_unlock_irqrestore(&ep->fotg210->lock, flags);
  339. return 0;
  340. }
  341. static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  342. {
  343. struct fotg210_ep *ep;
  344. struct fotg210_request *req;
  345. unsigned long flags;
  346. ep = container_of(_ep, struct fotg210_ep, ep);
  347. req = container_of(_req, struct fotg210_request, req);
  348. spin_lock_irqsave(&ep->fotg210->lock, flags);
  349. if (!list_empty(&ep->queue))
  350. fotg210_done(ep, req, -ECONNRESET);
  351. spin_unlock_irqrestore(&ep->fotg210->lock, flags);
  352. return 0;
  353. }
  354. static void fotg210_set_epnstall(struct fotg210_ep *ep)
  355. {
  356. struct fotg210_udc *fotg210 = ep->fotg210;
  357. u32 value;
  358. void __iomem *reg;
  359. /* check if IN FIFO is empty before stall */
  360. if (ep->dir_in) {
  361. do {
  362. value = ioread32(fotg210->reg + FOTG210_DCFESR);
  363. } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1)));
  364. }
  365. reg = (ep->dir_in) ?
  366. fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
  367. fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
  368. value = ioread32(reg);
  369. value |= INOUTEPMPSR_STL_EP;
  370. iowrite32(value, reg);
  371. }
  372. static void fotg210_clear_epnstall(struct fotg210_ep *ep)
  373. {
  374. struct fotg210_udc *fotg210 = ep->fotg210;
  375. u32 value;
  376. void __iomem *reg;
  377. reg = (ep->dir_in) ?
  378. fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
  379. fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
  380. value = ioread32(reg);
  381. value &= ~INOUTEPMPSR_STL_EP;
  382. iowrite32(value, reg);
  383. }
  384. static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
  385. {
  386. struct fotg210_ep *ep;
  387. struct fotg210_udc *fotg210;
  388. unsigned long flags;
  389. ep = container_of(_ep, struct fotg210_ep, ep);
  390. fotg210 = ep->fotg210;
  391. spin_lock_irqsave(&ep->fotg210->lock, flags);
  392. if (value) {
  393. fotg210_set_epnstall(ep);
  394. ep->stall = 1;
  395. if (wedge)
  396. ep->wedged = 1;
  397. } else {
  398. fotg210_reset_tseq(fotg210, ep->epnum);
  399. fotg210_clear_epnstall(ep);
  400. ep->stall = 0;
  401. ep->wedged = 0;
  402. if (!list_empty(&ep->queue))
  403. fotg210_enable_fifo_int(ep);
  404. }
  405. spin_unlock_irqrestore(&ep->fotg210->lock, flags);
  406. return 0;
  407. }
  408. static int fotg210_ep_set_halt(struct usb_ep *_ep, int value)
  409. {
  410. return fotg210_set_halt_and_wedge(_ep, value, 0);
  411. }
  412. static int fotg210_ep_set_wedge(struct usb_ep *_ep)
  413. {
  414. return fotg210_set_halt_and_wedge(_ep, 1, 1);
  415. }
  416. static void fotg210_ep_fifo_flush(struct usb_ep *_ep)
  417. {
  418. }
  419. static const struct usb_ep_ops fotg210_ep_ops = {
  420. .enable = fotg210_ep_enable,
  421. .disable = fotg210_ep_disable,
  422. .alloc_request = fotg210_ep_alloc_request,
  423. .free_request = fotg210_ep_free_request,
  424. .queue = fotg210_ep_queue,
  425. .dequeue = fotg210_ep_dequeue,
  426. .set_halt = fotg210_ep_set_halt,
  427. .fifo_flush = fotg210_ep_fifo_flush,
  428. .set_wedge = fotg210_ep_set_wedge,
  429. };
  430. static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210)
  431. {
  432. u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE);
  433. value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3
  434. | TX0BYTE_EP4);
  435. iowrite32(value, fotg210->reg + FOTG210_TX0BYTE);
  436. }
  437. static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210)
  438. {
  439. u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE);
  440. value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3
  441. | RX0BYTE_EP4);
  442. iowrite32(value, fotg210->reg + FOTG210_RX0BYTE);
  443. }
  444. /* read 8-byte setup packet only */
  445. static void fotg210_rdsetupp(struct fotg210_udc *fotg210,
  446. u8 *buffer)
  447. {
  448. int i = 0;
  449. u8 *tmp = buffer;
  450. u32 data;
  451. u32 length = 8;
  452. iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR);
  453. for (i = (length >> 2); i > 0; i--) {
  454. data = ioread32(fotg210->reg + FOTG210_CXPORT);
  455. *tmp = data & 0xFF;
  456. *(tmp + 1) = (data >> 8) & 0xFF;
  457. *(tmp + 2) = (data >> 16) & 0xFF;
  458. *(tmp + 3) = (data >> 24) & 0xFF;
  459. tmp = tmp + 4;
  460. }
  461. switch (length % 4) {
  462. case 1:
  463. data = ioread32(fotg210->reg + FOTG210_CXPORT);
  464. *tmp = data & 0xFF;
  465. break;
  466. case 2:
  467. data = ioread32(fotg210->reg + FOTG210_CXPORT);
  468. *tmp = data & 0xFF;
  469. *(tmp + 1) = (data >> 8) & 0xFF;
  470. break;
  471. case 3:
  472. data = ioread32(fotg210->reg + FOTG210_CXPORT);
  473. *tmp = data & 0xFF;
  474. *(tmp + 1) = (data >> 8) & 0xFF;
  475. *(tmp + 2) = (data >> 16) & 0xFF;
  476. break;
  477. default:
  478. break;
  479. }
  480. iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR);
  481. }
  482. static void fotg210_set_configuration(struct fotg210_udc *fotg210)
  483. {
  484. u32 value = ioread32(fotg210->reg + FOTG210_DAR);
  485. value |= DAR_AFT_CONF;
  486. iowrite32(value, fotg210->reg + FOTG210_DAR);
  487. }
  488. static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr)
  489. {
  490. u32 value = ioread32(fotg210->reg + FOTG210_DAR);
  491. value |= (addr & 0x7F);
  492. iowrite32(value, fotg210->reg + FOTG210_DAR);
  493. }
  494. static void fotg210_set_cxstall(struct fotg210_udc *fotg210)
  495. {
  496. u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
  497. value |= DCFESR_CX_STL;
  498. iowrite32(value, fotg210->reg + FOTG210_DCFESR);
  499. }
  500. static void fotg210_request_error(struct fotg210_udc *fotg210)
  501. {
  502. fotg210_set_cxstall(fotg210);
  503. pr_err("request error!!\n");
  504. }
  505. static void fotg210_set_address(struct fotg210_udc *fotg210,
  506. struct usb_ctrlrequest *ctrl)
  507. {
  508. if (le16_to_cpu(ctrl->wValue) >= 0x0100) {
  509. fotg210_request_error(fotg210);
  510. } else {
  511. fotg210_set_dev_addr(fotg210, le16_to_cpu(ctrl->wValue));
  512. fotg210_set_cxdone(fotg210);
  513. }
  514. }
  515. static void fotg210_set_feature(struct fotg210_udc *fotg210,
  516. struct usb_ctrlrequest *ctrl)
  517. {
  518. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  519. case USB_RECIP_DEVICE:
  520. fotg210_set_cxdone(fotg210);
  521. break;
  522. case USB_RECIP_INTERFACE:
  523. fotg210_set_cxdone(fotg210);
  524. break;
  525. case USB_RECIP_ENDPOINT: {
  526. u8 epnum;
  527. epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  528. if (epnum)
  529. fotg210_set_epnstall(fotg210->ep[epnum]);
  530. else
  531. fotg210_set_cxstall(fotg210);
  532. fotg210_set_cxdone(fotg210);
  533. }
  534. break;
  535. default:
  536. fotg210_request_error(fotg210);
  537. break;
  538. }
  539. }
  540. static void fotg210_clear_feature(struct fotg210_udc *fotg210,
  541. struct usb_ctrlrequest *ctrl)
  542. {
  543. struct fotg210_ep *ep =
  544. fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
  545. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  546. case USB_RECIP_DEVICE:
  547. fotg210_set_cxdone(fotg210);
  548. break;
  549. case USB_RECIP_INTERFACE:
  550. fotg210_set_cxdone(fotg210);
  551. break;
  552. case USB_RECIP_ENDPOINT:
  553. if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
  554. if (ep->wedged) {
  555. fotg210_set_cxdone(fotg210);
  556. break;
  557. }
  558. if (ep->stall)
  559. fotg210_set_halt_and_wedge(&ep->ep, 0, 0);
  560. }
  561. fotg210_set_cxdone(fotg210);
  562. break;
  563. default:
  564. fotg210_request_error(fotg210);
  565. break;
  566. }
  567. }
  568. static int fotg210_is_epnstall(struct fotg210_ep *ep)
  569. {
  570. struct fotg210_udc *fotg210 = ep->fotg210;
  571. u32 value;
  572. void __iomem *reg;
  573. reg = (ep->dir_in) ?
  574. fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
  575. fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
  576. value = ioread32(reg);
  577. return value & INOUTEPMPSR_STL_EP ? 1 : 0;
  578. }
  579. /* For EP0 requests triggered by this driver (currently GET_STATUS response) */
  580. static void fotg210_ep0_complete(struct usb_ep *_ep, struct usb_request *req)
  581. {
  582. struct fotg210_ep *ep;
  583. struct fotg210_udc *fotg210;
  584. ep = container_of(_ep, struct fotg210_ep, ep);
  585. fotg210 = ep->fotg210;
  586. if (req->status || req->actual != req->length) {
  587. dev_warn(&fotg210->gadget.dev, "EP0 request failed: %d\n", req->status);
  588. }
  589. }
  590. static void fotg210_get_status(struct fotg210_udc *fotg210,
  591. struct usb_ctrlrequest *ctrl)
  592. {
  593. u8 epnum;
  594. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  595. case USB_RECIP_DEVICE:
  596. fotg210->ep0_data = cpu_to_le16(1 << USB_DEVICE_SELF_POWERED);
  597. break;
  598. case USB_RECIP_INTERFACE:
  599. fotg210->ep0_data = cpu_to_le16(0);
  600. break;
  601. case USB_RECIP_ENDPOINT:
  602. epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK;
  603. if (epnum)
  604. fotg210->ep0_data =
  605. cpu_to_le16(fotg210_is_epnstall(fotg210->ep[epnum])
  606. << USB_ENDPOINT_HALT);
  607. else
  608. fotg210_request_error(fotg210);
  609. break;
  610. default:
  611. fotg210_request_error(fotg210);
  612. return; /* exit */
  613. }
  614. fotg210->ep0_req->buf = &fotg210->ep0_data;
  615. fotg210->ep0_req->length = 2;
  616. spin_unlock(&fotg210->lock);
  617. fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_ATOMIC);
  618. spin_lock(&fotg210->lock);
  619. }
  620. static int fotg210_setup_packet(struct fotg210_udc *fotg210,
  621. struct usb_ctrlrequest *ctrl)
  622. {
  623. u8 *p = (u8 *)ctrl;
  624. u8 ret = 0;
  625. fotg210_rdsetupp(fotg210, p);
  626. fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN;
  627. if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) {
  628. u32 value = ioread32(fotg210->reg + FOTG210_DMCR);
  629. fotg210->gadget.speed = value & DMCR_HS_EN ?
  630. USB_SPEED_HIGH : USB_SPEED_FULL;
  631. }
  632. /* check request */
  633. if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
  634. switch (ctrl->bRequest) {
  635. case USB_REQ_GET_STATUS:
  636. fotg210_get_status(fotg210, ctrl);
  637. break;
  638. case USB_REQ_CLEAR_FEATURE:
  639. fotg210_clear_feature(fotg210, ctrl);
  640. break;
  641. case USB_REQ_SET_FEATURE:
  642. fotg210_set_feature(fotg210, ctrl);
  643. break;
  644. case USB_REQ_SET_ADDRESS:
  645. fotg210_set_address(fotg210, ctrl);
  646. break;
  647. case USB_REQ_SET_CONFIGURATION:
  648. fotg210_set_configuration(fotg210);
  649. ret = 1;
  650. break;
  651. default:
  652. ret = 1;
  653. break;
  654. }
  655. } else {
  656. ret = 1;
  657. }
  658. return ret;
  659. }
  660. static void fotg210_ep0out(struct fotg210_udc *fotg210)
  661. {
  662. struct fotg210_ep *ep = fotg210->ep[0];
  663. if (!list_empty(&ep->queue) && !ep->dir_in) {
  664. struct fotg210_request *req;
  665. req = list_first_entry(&ep->queue,
  666. struct fotg210_request, queue);
  667. if (req->req.length)
  668. fotg210_start_dma(ep, req);
  669. if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
  670. fotg210_done(ep, req, 0);
  671. } else {
  672. pr_err("%s : empty queue\n", __func__);
  673. }
  674. }
  675. static void fotg210_ep0in(struct fotg210_udc *fotg210)
  676. {
  677. struct fotg210_ep *ep = fotg210->ep[0];
  678. if ((!list_empty(&ep->queue)) && (ep->dir_in)) {
  679. struct fotg210_request *req;
  680. req = list_entry(ep->queue.next,
  681. struct fotg210_request, queue);
  682. if (req->req.length)
  683. fotg210_start_dma(ep, req);
  684. if (req->req.actual == req->req.length)
  685. fotg210_done(ep, req, 0);
  686. } else {
  687. fotg210_set_cxdone(fotg210);
  688. }
  689. }
  690. static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210)
  691. {
  692. u32 value = ioread32(fotg210->reg + FOTG210_DISGR0);
  693. value &= ~DISGR0_CX_COMABT_INT;
  694. iowrite32(value, fotg210->reg + FOTG210_DISGR0);
  695. }
  696. static void fotg210_in_fifo_handler(struct fotg210_ep *ep)
  697. {
  698. struct fotg210_request *req = list_entry(ep->queue.next,
  699. struct fotg210_request, queue);
  700. if (req->req.length)
  701. fotg210_start_dma(ep, req);
  702. fotg210_done(ep, req, 0);
  703. }
  704. static void fotg210_out_fifo_handler(struct fotg210_ep *ep)
  705. {
  706. struct fotg210_request *req = list_entry(ep->queue.next,
  707. struct fotg210_request, queue);
  708. int disgr1 = ioread32(ep->fotg210->reg + FOTG210_DISGR1);
  709. fotg210_start_dma(ep, req);
  710. /* Complete the request when it's full or a short packet arrived.
  711. * Like other drivers, short_not_ok isn't handled.
  712. */
  713. if (req->req.length == req->req.actual ||
  714. (disgr1 & DISGR1_SPK_INT(ep->epnum - 1)))
  715. fotg210_done(ep, req, 0);
  716. }
  717. static irqreturn_t fotg210_irq(int irq, void *_fotg210)
  718. {
  719. struct fotg210_udc *fotg210 = _fotg210;
  720. u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR);
  721. u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR);
  722. int_grp &= ~int_msk;
  723. spin_lock(&fotg210->lock);
  724. if (int_grp & DIGR_INT_G2) {
  725. void __iomem *reg = fotg210->reg + FOTG210_DISGR2;
  726. u32 int_grp2 = ioread32(reg);
  727. u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2);
  728. u32 value;
  729. int_grp2 &= ~int_msk2;
  730. if (int_grp2 & DISGR2_USBRST_INT) {
  731. usb_gadget_udc_reset(&fotg210->gadget,
  732. fotg210->driver);
  733. value = ioread32(reg);
  734. value &= ~DISGR2_USBRST_INT;
  735. iowrite32(value, reg);
  736. pr_info("fotg210 udc reset\n");
  737. }
  738. if (int_grp2 & DISGR2_SUSP_INT) {
  739. value = ioread32(reg);
  740. value &= ~DISGR2_SUSP_INT;
  741. iowrite32(value, reg);
  742. pr_info("fotg210 udc suspend\n");
  743. }
  744. if (int_grp2 & DISGR2_RESM_INT) {
  745. value = ioread32(reg);
  746. value &= ~DISGR2_RESM_INT;
  747. iowrite32(value, reg);
  748. pr_info("fotg210 udc resume\n");
  749. }
  750. if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) {
  751. value = ioread32(reg);
  752. value &= ~DISGR2_ISO_SEQ_ERR_INT;
  753. iowrite32(value, reg);
  754. pr_info("fotg210 iso sequence error\n");
  755. }
  756. if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) {
  757. value = ioread32(reg);
  758. value &= ~DISGR2_ISO_SEQ_ABORT_INT;
  759. iowrite32(value, reg);
  760. pr_info("fotg210 iso sequence abort\n");
  761. }
  762. if (int_grp2 & DISGR2_TX0BYTE_INT) {
  763. fotg210_clear_tx0byte(fotg210);
  764. value = ioread32(reg);
  765. value &= ~DISGR2_TX0BYTE_INT;
  766. iowrite32(value, reg);
  767. pr_info("fotg210 transferred 0 byte\n");
  768. }
  769. if (int_grp2 & DISGR2_RX0BYTE_INT) {
  770. fotg210_clear_rx0byte(fotg210);
  771. value = ioread32(reg);
  772. value &= ~DISGR2_RX0BYTE_INT;
  773. iowrite32(value, reg);
  774. pr_info("fotg210 received 0 byte\n");
  775. }
  776. if (int_grp2 & DISGR2_DMA_ERROR) {
  777. value = ioread32(reg);
  778. value &= ~DISGR2_DMA_ERROR;
  779. iowrite32(value, reg);
  780. }
  781. }
  782. if (int_grp & DIGR_INT_G0) {
  783. void __iomem *reg = fotg210->reg + FOTG210_DISGR0;
  784. u32 int_grp0 = ioread32(reg);
  785. u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0);
  786. struct usb_ctrlrequest ctrl;
  787. int_grp0 &= ~int_msk0;
  788. /* the highest priority in this source register */
  789. if (int_grp0 & DISGR0_CX_COMABT_INT) {
  790. fotg210_clear_comabt_int(fotg210);
  791. pr_info("fotg210 CX command abort\n");
  792. }
  793. if (int_grp0 & DISGR0_CX_SETUP_INT) {
  794. if (fotg210_setup_packet(fotg210, &ctrl)) {
  795. spin_unlock(&fotg210->lock);
  796. if (fotg210->driver->setup(&fotg210->gadget,
  797. &ctrl) < 0)
  798. fotg210_set_cxstall(fotg210);
  799. spin_lock(&fotg210->lock);
  800. }
  801. }
  802. if (int_grp0 & DISGR0_CX_COMEND_INT)
  803. pr_info("fotg210 cmd end\n");
  804. if (int_grp0 & DISGR0_CX_IN_INT)
  805. fotg210_ep0in(fotg210);
  806. if (int_grp0 & DISGR0_CX_OUT_INT)
  807. fotg210_ep0out(fotg210);
  808. if (int_grp0 & DISGR0_CX_COMFAIL_INT) {
  809. fotg210_set_cxstall(fotg210);
  810. pr_info("fotg210 ep0 fail\n");
  811. }
  812. }
  813. if (int_grp & DIGR_INT_G1) {
  814. void __iomem *reg = fotg210->reg + FOTG210_DISGR1;
  815. u32 int_grp1 = ioread32(reg);
  816. u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1);
  817. int fifo;
  818. int_grp1 &= ~int_msk1;
  819. for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) {
  820. if (int_grp1 & DISGR1_IN_INT(fifo))
  821. fotg210_in_fifo_handler(fotg210->ep[fifo + 1]);
  822. if ((int_grp1 & DISGR1_OUT_INT(fifo)) ||
  823. (int_grp1 & DISGR1_SPK_INT(fifo)))
  824. fotg210_out_fifo_handler(fotg210->ep[fifo + 1]);
  825. }
  826. }
  827. spin_unlock(&fotg210->lock);
  828. return IRQ_HANDLED;
  829. }
  830. static void fotg210_disable_unplug(struct fotg210_udc *fotg210)
  831. {
  832. u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR);
  833. reg &= ~PHYTMSR_UNPLUG;
  834. iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR);
  835. }
  836. static int fotg210_udc_start(struct usb_gadget *g,
  837. struct usb_gadget_driver *driver)
  838. {
  839. struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
  840. u32 value;
  841. /* hook up the driver */
  842. fotg210->driver = driver;
  843. /* enable device global interrupt */
  844. value = ioread32(fotg210->reg + FOTG210_DMCR);
  845. value |= DMCR_GLINT_EN;
  846. iowrite32(value, fotg210->reg + FOTG210_DMCR);
  847. return 0;
  848. }
  849. static void fotg210_init(struct fotg210_udc *fotg210)
  850. {
  851. u32 value;
  852. /* disable global interrupt and set int polarity to active high */
  853. iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY,
  854. fotg210->reg + FOTG210_GMIR);
  855. /* disable device global interrupt */
  856. value = ioread32(fotg210->reg + FOTG210_DMCR);
  857. value &= ~DMCR_GLINT_EN;
  858. iowrite32(value, fotg210->reg + FOTG210_DMCR);
  859. /* enable only grp2 irqs we handle */
  860. iowrite32(~(DISGR2_DMA_ERROR | DISGR2_RX0BYTE_INT | DISGR2_TX0BYTE_INT
  861. | DISGR2_ISO_SEQ_ABORT_INT | DISGR2_ISO_SEQ_ERR_INT
  862. | DISGR2_RESM_INT | DISGR2_SUSP_INT | DISGR2_USBRST_INT),
  863. fotg210->reg + FOTG210_DMISGR2);
  864. /* disable all fifo interrupt */
  865. iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1);
  866. /* disable cmd end */
  867. value = ioread32(fotg210->reg + FOTG210_DMISGR0);
  868. value |= DMISGR0_MCX_COMEND;
  869. iowrite32(value, fotg210->reg + FOTG210_DMISGR0);
  870. }
  871. static int fotg210_udc_stop(struct usb_gadget *g)
  872. {
  873. struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
  874. unsigned long flags;
  875. spin_lock_irqsave(&fotg210->lock, flags);
  876. fotg210_init(fotg210);
  877. fotg210->driver = NULL;
  878. spin_unlock_irqrestore(&fotg210->lock, flags);
  879. return 0;
  880. }
  881. static const struct usb_gadget_ops fotg210_gadget_ops = {
  882. .udc_start = fotg210_udc_start,
  883. .udc_stop = fotg210_udc_stop,
  884. };
  885. static int fotg210_udc_remove(struct platform_device *pdev)
  886. {
  887. struct fotg210_udc *fotg210 = platform_get_drvdata(pdev);
  888. int i;
  889. usb_del_gadget_udc(&fotg210->gadget);
  890. iounmap(fotg210->reg);
  891. free_irq(platform_get_irq(pdev, 0), fotg210);
  892. fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
  893. for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
  894. kfree(fotg210->ep[i]);
  895. kfree(fotg210);
  896. return 0;
  897. }
  898. static int fotg210_udc_probe(struct platform_device *pdev)
  899. {
  900. struct resource *res, *ires;
  901. struct fotg210_udc *fotg210 = NULL;
  902. struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP];
  903. int ret = 0;
  904. int i;
  905. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  906. if (!res) {
  907. pr_err("platform_get_resource error.\n");
  908. return -ENODEV;
  909. }
  910. ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  911. if (!ires) {
  912. pr_err("platform_get_resource IORESOURCE_IRQ error.\n");
  913. return -ENODEV;
  914. }
  915. ret = -ENOMEM;
  916. /* initialize udc */
  917. fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL);
  918. if (fotg210 == NULL)
  919. goto err;
  920. for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
  921. _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL);
  922. if (_ep[i] == NULL)
  923. goto err_alloc;
  924. fotg210->ep[i] = _ep[i];
  925. }
  926. fotg210->reg = ioremap(res->start, resource_size(res));
  927. if (fotg210->reg == NULL) {
  928. pr_err("ioremap error.\n");
  929. goto err_alloc;
  930. }
  931. spin_lock_init(&fotg210->lock);
  932. platform_set_drvdata(pdev, fotg210);
  933. fotg210->gadget.ops = &fotg210_gadget_ops;
  934. fotg210->gadget.max_speed = USB_SPEED_HIGH;
  935. fotg210->gadget.dev.parent = &pdev->dev;
  936. fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask;
  937. fotg210->gadget.name = udc_name;
  938. INIT_LIST_HEAD(&fotg210->gadget.ep_list);
  939. for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
  940. struct fotg210_ep *ep = fotg210->ep[i];
  941. if (i) {
  942. INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list);
  943. list_add_tail(&fotg210->ep[i]->ep.ep_list,
  944. &fotg210->gadget.ep_list);
  945. }
  946. ep->fotg210 = fotg210;
  947. INIT_LIST_HEAD(&ep->queue);
  948. ep->ep.name = fotg210_ep_name[i];
  949. ep->ep.ops = &fotg210_ep_ops;
  950. usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
  951. if (i == 0) {
  952. ep->ep.caps.type_control = true;
  953. } else {
  954. ep->ep.caps.type_iso = true;
  955. ep->ep.caps.type_bulk = true;
  956. ep->ep.caps.type_int = true;
  957. }
  958. ep->ep.caps.dir_in = true;
  959. ep->ep.caps.dir_out = true;
  960. }
  961. usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40);
  962. fotg210->gadget.ep0 = &fotg210->ep[0]->ep;
  963. INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list);
  964. fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep,
  965. GFP_KERNEL);
  966. if (fotg210->ep0_req == NULL)
  967. goto err_map;
  968. fotg210->ep0_req->complete = fotg210_ep0_complete;
  969. fotg210_init(fotg210);
  970. fotg210_disable_unplug(fotg210);
  971. ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED,
  972. udc_name, fotg210);
  973. if (ret < 0) {
  974. pr_err("request_irq error (%d)\n", ret);
  975. goto err_req;
  976. }
  977. ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget);
  978. if (ret)
  979. goto err_add_udc;
  980. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  981. return 0;
  982. err_add_udc:
  983. free_irq(ires->start, fotg210);
  984. err_req:
  985. fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
  986. err_map:
  987. iounmap(fotg210->reg);
  988. err_alloc:
  989. for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
  990. kfree(fotg210->ep[i]);
  991. kfree(fotg210);
  992. err:
  993. return ret;
  994. }
  995. static struct platform_driver fotg210_driver = {
  996. .driver = {
  997. .name = udc_name,
  998. },
  999. .probe = fotg210_udc_probe,
  1000. .remove = fotg210_udc_remove,
  1001. };
  1002. module_platform_driver(fotg210_driver);
  1003. MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <[email protected]>");
  1004. MODULE_LICENSE("GPL");
  1005. MODULE_DESCRIPTION(DRIVER_DESC);