dwc3-imx8mp.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer
  4. *
  5. * Copyright (c) 2020 NXP.
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pm_runtime.h>
  15. #include "core.h"
  16. /* USB wakeup registers */
  17. #define USB_WAKEUP_CTRL 0x00
  18. /* Global wakeup interrupt enable, also used to clear interrupt */
  19. #define USB_WAKEUP_EN BIT(31)
  20. /* Wakeup from connect or disconnect, only for superspeed */
  21. #define USB_WAKEUP_SS_CONN BIT(5)
  22. /* 0 select vbus_valid, 1 select sessvld */
  23. #define USB_WAKEUP_VBUS_SRC_SESS_VAL BIT(4)
  24. /* Enable signal for wake up from u3 state */
  25. #define USB_WAKEUP_U3_EN BIT(3)
  26. /* Enable signal for wake up from id change */
  27. #define USB_WAKEUP_ID_EN BIT(2)
  28. /* Enable signal for wake up from vbus change */
  29. #define USB_WAKEUP_VBUS_EN BIT(1)
  30. /* Enable signal for wake up from dp/dm change */
  31. #define USB_WAKEUP_DPDM_EN BIT(0)
  32. #define USB_WAKEUP_EN_MASK GENMASK(5, 0)
  33. /* USB glue registers */
  34. #define USB_CTRL0 0x00
  35. #define USB_CTRL1 0x04
  36. #define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */
  37. #define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */
  38. #define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */
  39. #define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */
  40. #define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */
  41. struct dwc3_imx8mp {
  42. struct device *dev;
  43. struct platform_device *dwc3;
  44. void __iomem *hsio_blk_base;
  45. void __iomem *glue_base;
  46. struct clk *hsio_clk;
  47. struct clk *suspend_clk;
  48. int irq;
  49. bool pm_suspended;
  50. bool wakeup_pending;
  51. };
  52. static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx)
  53. {
  54. struct device *dev = dwc3_imx->dev;
  55. u32 value;
  56. if (!dwc3_imx->glue_base)
  57. return;
  58. value = readl(dwc3_imx->glue_base + USB_CTRL0);
  59. if (device_property_read_bool(dev, "fsl,permanently-attached"))
  60. value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
  61. else
  62. value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
  63. if (device_property_read_bool(dev, "fsl,disable-port-power-control"))
  64. value &= ~(USB_CTRL0_PORTPWR_EN);
  65. else
  66. value |= USB_CTRL0_PORTPWR_EN;
  67. writel(value, dwc3_imx->glue_base + USB_CTRL0);
  68. value = readl(dwc3_imx->glue_base + USB_CTRL1);
  69. if (device_property_read_bool(dev, "fsl,over-current-active-low"))
  70. value |= USB_CTRL1_OC_POLARITY;
  71. else
  72. value &= ~USB_CTRL1_OC_POLARITY;
  73. if (device_property_read_bool(dev, "fsl,power-active-low"))
  74. value |= USB_CTRL1_PWR_POLARITY;
  75. else
  76. value &= ~USB_CTRL1_PWR_POLARITY;
  77. writel(value, dwc3_imx->glue_base + USB_CTRL1);
  78. }
  79. static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx)
  80. {
  81. struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
  82. u32 val;
  83. if (!dwc3)
  84. return;
  85. val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
  86. if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci)
  87. val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN |
  88. USB_WAKEUP_U3_EN | USB_WAKEUP_DPDM_EN;
  89. else if (dwc3->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
  90. val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN |
  91. USB_WAKEUP_VBUS_SRC_SESS_VAL;
  92. writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
  93. }
  94. static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx)
  95. {
  96. u32 val;
  97. val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
  98. val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK);
  99. writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
  100. }
  101. static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
  102. {
  103. struct dwc3_imx8mp *dwc3_imx = _dwc3_imx;
  104. struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
  105. if (!dwc3_imx->pm_suspended)
  106. return IRQ_HANDLED;
  107. disable_irq_nosync(dwc3_imx->irq);
  108. dwc3_imx->wakeup_pending = true;
  109. if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci)
  110. pm_runtime_resume(&dwc->xhci->dev);
  111. else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
  112. pm_runtime_get(dwc->dev);
  113. return IRQ_HANDLED;
  114. }
  115. static int dwc3_imx8mp_probe(struct platform_device *pdev)
  116. {
  117. struct device *dev = &pdev->dev;
  118. struct device_node *dwc3_np, *node = dev->of_node;
  119. struct dwc3_imx8mp *dwc3_imx;
  120. struct resource *res;
  121. int err, irq;
  122. if (!node) {
  123. dev_err(dev, "device node not found\n");
  124. return -EINVAL;
  125. }
  126. dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL);
  127. if (!dwc3_imx)
  128. return -ENOMEM;
  129. platform_set_drvdata(pdev, dwc3_imx);
  130. dwc3_imx->dev = dev;
  131. dwc3_imx->hsio_blk_base = devm_platform_ioremap_resource(pdev, 0);
  132. if (IS_ERR(dwc3_imx->hsio_blk_base))
  133. return PTR_ERR(dwc3_imx->hsio_blk_base);
  134. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  135. if (!res) {
  136. dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though.");
  137. } else {
  138. dwc3_imx->glue_base = devm_ioremap_resource(dev, res);
  139. if (IS_ERR(dwc3_imx->glue_base))
  140. return PTR_ERR(dwc3_imx->glue_base);
  141. }
  142. dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio");
  143. if (IS_ERR(dwc3_imx->hsio_clk)) {
  144. err = PTR_ERR(dwc3_imx->hsio_clk);
  145. dev_err(dev, "Failed to get hsio clk, err=%d\n", err);
  146. return err;
  147. }
  148. err = clk_prepare_enable(dwc3_imx->hsio_clk);
  149. if (err) {
  150. dev_err(dev, "Failed to enable hsio clk, err=%d\n", err);
  151. return err;
  152. }
  153. dwc3_imx->suspend_clk = devm_clk_get(dev, "suspend");
  154. if (IS_ERR(dwc3_imx->suspend_clk)) {
  155. err = PTR_ERR(dwc3_imx->suspend_clk);
  156. dev_err(dev, "Failed to get suspend clk, err=%d\n", err);
  157. goto disable_hsio_clk;
  158. }
  159. err = clk_prepare_enable(dwc3_imx->suspend_clk);
  160. if (err) {
  161. dev_err(dev, "Failed to enable suspend clk, err=%d\n", err);
  162. goto disable_hsio_clk;
  163. }
  164. irq = platform_get_irq(pdev, 0);
  165. if (irq < 0) {
  166. err = irq;
  167. goto disable_clks;
  168. }
  169. dwc3_imx->irq = irq;
  170. imx8mp_configure_glue(dwc3_imx);
  171. pm_runtime_set_active(dev);
  172. pm_runtime_enable(dev);
  173. err = pm_runtime_get_sync(dev);
  174. if (err < 0)
  175. goto disable_rpm;
  176. dwc3_np = of_get_compatible_child(node, "snps,dwc3");
  177. if (!dwc3_np) {
  178. err = -ENODEV;
  179. dev_err(dev, "failed to find dwc3 core child\n");
  180. goto disable_rpm;
  181. }
  182. err = of_platform_populate(node, NULL, NULL, dev);
  183. if (err) {
  184. dev_err(&pdev->dev, "failed to create dwc3 core\n");
  185. goto err_node_put;
  186. }
  187. dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
  188. if (!dwc3_imx->dwc3) {
  189. dev_err(dev, "failed to get dwc3 platform device\n");
  190. err = -ENODEV;
  191. goto depopulate;
  192. }
  193. of_node_put(dwc3_np);
  194. err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
  195. IRQF_ONESHOT, dev_name(dev), dwc3_imx);
  196. if (err) {
  197. dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err);
  198. goto depopulate;
  199. }
  200. device_set_wakeup_capable(dev, true);
  201. pm_runtime_put(dev);
  202. return 0;
  203. depopulate:
  204. of_platform_depopulate(dev);
  205. err_node_put:
  206. of_node_put(dwc3_np);
  207. disable_rpm:
  208. pm_runtime_disable(dev);
  209. pm_runtime_put_noidle(dev);
  210. disable_clks:
  211. clk_disable_unprepare(dwc3_imx->suspend_clk);
  212. disable_hsio_clk:
  213. clk_disable_unprepare(dwc3_imx->hsio_clk);
  214. return err;
  215. }
  216. static int dwc3_imx8mp_remove(struct platform_device *pdev)
  217. {
  218. struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
  219. struct device *dev = &pdev->dev;
  220. pm_runtime_get_sync(dev);
  221. of_platform_depopulate(dev);
  222. clk_disable_unprepare(dwc3_imx->suspend_clk);
  223. clk_disable_unprepare(dwc3_imx->hsio_clk);
  224. pm_runtime_disable(dev);
  225. pm_runtime_put_noidle(dev);
  226. platform_set_drvdata(pdev, NULL);
  227. return 0;
  228. }
  229. static int __maybe_unused dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx,
  230. pm_message_t msg)
  231. {
  232. if (dwc3_imx->pm_suspended)
  233. return 0;
  234. /* Wakeup enable */
  235. if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev))
  236. dwc3_imx8mp_wakeup_enable(dwc3_imx);
  237. dwc3_imx->pm_suspended = true;
  238. return 0;
  239. }
  240. static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx,
  241. pm_message_t msg)
  242. {
  243. struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
  244. int ret = 0;
  245. if (!dwc3_imx->pm_suspended)
  246. return 0;
  247. /* Wakeup disable */
  248. dwc3_imx8mp_wakeup_disable(dwc3_imx);
  249. dwc3_imx->pm_suspended = false;
  250. /* Upon power loss any previous configuration is lost, restore it */
  251. imx8mp_configure_glue(dwc3_imx);
  252. if (dwc3_imx->wakeup_pending) {
  253. dwc3_imx->wakeup_pending = false;
  254. if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {
  255. pm_runtime_mark_last_busy(dwc->dev);
  256. pm_runtime_put_autosuspend(dwc->dev);
  257. } else {
  258. /*
  259. * Add wait for xhci switch from suspend
  260. * clock to normal clock to detect connection.
  261. */
  262. usleep_range(9000, 10000);
  263. }
  264. enable_irq(dwc3_imx->irq);
  265. }
  266. return ret;
  267. }
  268. static int __maybe_unused dwc3_imx8mp_pm_suspend(struct device *dev)
  269. {
  270. struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
  271. int ret;
  272. ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND);
  273. if (device_may_wakeup(dwc3_imx->dev))
  274. enable_irq_wake(dwc3_imx->irq);
  275. else
  276. clk_disable_unprepare(dwc3_imx->suspend_clk);
  277. clk_disable_unprepare(dwc3_imx->hsio_clk);
  278. dev_dbg(dev, "dwc3 imx8mp pm suspend.\n");
  279. return ret;
  280. }
  281. static int __maybe_unused dwc3_imx8mp_pm_resume(struct device *dev)
  282. {
  283. struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
  284. int ret;
  285. if (device_may_wakeup(dwc3_imx->dev)) {
  286. disable_irq_wake(dwc3_imx->irq);
  287. } else {
  288. ret = clk_prepare_enable(dwc3_imx->suspend_clk);
  289. if (ret)
  290. return ret;
  291. }
  292. ret = clk_prepare_enable(dwc3_imx->hsio_clk);
  293. if (ret)
  294. return ret;
  295. ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME);
  296. pm_runtime_disable(dev);
  297. pm_runtime_set_active(dev);
  298. pm_runtime_enable(dev);
  299. dev_dbg(dev, "dwc3 imx8mp pm resume.\n");
  300. return ret;
  301. }
  302. static int __maybe_unused dwc3_imx8mp_runtime_suspend(struct device *dev)
  303. {
  304. struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
  305. dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n");
  306. return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND);
  307. }
  308. static int __maybe_unused dwc3_imx8mp_runtime_resume(struct device *dev)
  309. {
  310. struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
  311. dev_dbg(dev, "dwc3 imx8mp runtime resume.\n");
  312. return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME);
  313. }
  314. static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = {
  315. SET_SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume)
  316. SET_RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend,
  317. dwc3_imx8mp_runtime_resume, NULL)
  318. };
  319. static const struct of_device_id dwc3_imx8mp_of_match[] = {
  320. { .compatible = "fsl,imx8mp-dwc3", },
  321. {},
  322. };
  323. MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match);
  324. static struct platform_driver dwc3_imx8mp_driver = {
  325. .probe = dwc3_imx8mp_probe,
  326. .remove = dwc3_imx8mp_remove,
  327. .driver = {
  328. .name = "imx8mp-dwc3",
  329. .pm = &dwc3_imx8mp_dev_pm_ops,
  330. .of_match_table = dwc3_imx8mp_of_match,
  331. },
  332. };
  333. module_platform_driver(dwc3_imx8mp_driver);
  334. MODULE_ALIAS("platform:imx8mp-dwc3");
  335. MODULE_AUTHOR("[email protected]");
  336. MODULE_LICENSE("GPL v2");
  337. MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer");