udc.c 53 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * udc.c - ChipIdea UDC driver
  4. *
  5. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  6. *
  7. * Author: David Lopo
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/device.h>
  11. #include <linux/dmapool.h>
  12. #include <linux/err.h>
  13. #include <linux/irqreturn.h>
  14. #include <linux/kernel.h>
  15. #include <linux/slab.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/pinctrl/consumer.h>
  18. #include <linux/usb/ch9.h>
  19. #include <linux/usb/gadget.h>
  20. #include <linux/usb/otg-fsm.h>
  21. #include <linux/usb/chipidea.h>
  22. #include "ci.h"
  23. #include "udc.h"
  24. #include "bits.h"
  25. #include "otg.h"
  26. #include "otg_fsm.h"
  27. #include "trace.h"
  28. /* control endpoint description */
  29. static const struct usb_endpoint_descriptor
  30. ctrl_endpt_out_desc = {
  31. .bLength = USB_DT_ENDPOINT_SIZE,
  32. .bDescriptorType = USB_DT_ENDPOINT,
  33. .bEndpointAddress = USB_DIR_OUT,
  34. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  35. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  36. };
  37. static const struct usb_endpoint_descriptor
  38. ctrl_endpt_in_desc = {
  39. .bLength = USB_DT_ENDPOINT_SIZE,
  40. .bDescriptorType = USB_DT_ENDPOINT,
  41. .bEndpointAddress = USB_DIR_IN,
  42. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  43. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  44. };
  45. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  46. struct td_node *node);
  47. /**
  48. * hw_ep_bit: calculates the bit number
  49. * @num: endpoint number
  50. * @dir: endpoint direction
  51. *
  52. * This function returns bit number
  53. */
  54. static inline int hw_ep_bit(int num, int dir)
  55. {
  56. return num + ((dir == TX) ? 16 : 0);
  57. }
  58. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  59. {
  60. int fill = 16 - ci->hw_ep_max / 2;
  61. if (n >= ci->hw_ep_max / 2)
  62. n += fill;
  63. return n;
  64. }
  65. /**
  66. * hw_device_state: enables/disables interrupts (execute without interruption)
  67. * @ci: the controller
  68. * @dma: 0 => disable, !0 => enable and set dma engine
  69. *
  70. * This function returns an error code
  71. */
  72. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  73. {
  74. if (dma) {
  75. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  76. /* interrupt, error, port change, reset, sleep/suspend */
  77. hw_write(ci, OP_USBINTR, ~0,
  78. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  79. } else {
  80. hw_write(ci, OP_USBINTR, ~0, 0);
  81. }
  82. return 0;
  83. }
  84. /**
  85. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  86. * @ci: the controller
  87. * @num: endpoint number
  88. * @dir: endpoint direction
  89. *
  90. * This function returns an error code
  91. */
  92. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  93. {
  94. int n = hw_ep_bit(num, dir);
  95. do {
  96. /* flush any pending transfer */
  97. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  98. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  99. cpu_relax();
  100. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  101. return 0;
  102. }
  103. /**
  104. * hw_ep_disable: disables endpoint (execute without interruption)
  105. * @ci: the controller
  106. * @num: endpoint number
  107. * @dir: endpoint direction
  108. *
  109. * This function returns an error code
  110. */
  111. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  112. {
  113. hw_write(ci, OP_ENDPTCTRL + num,
  114. (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  115. return 0;
  116. }
  117. /**
  118. * hw_ep_enable: enables endpoint (execute without interruption)
  119. * @ci: the controller
  120. * @num: endpoint number
  121. * @dir: endpoint direction
  122. * @type: endpoint type
  123. *
  124. * This function returns an error code
  125. */
  126. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  127. {
  128. u32 mask, data;
  129. if (dir == TX) {
  130. mask = ENDPTCTRL_TXT; /* type */
  131. data = type << __ffs(mask);
  132. mask |= ENDPTCTRL_TXS; /* unstall */
  133. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  134. data |= ENDPTCTRL_TXR;
  135. mask |= ENDPTCTRL_TXE; /* enable */
  136. data |= ENDPTCTRL_TXE;
  137. } else {
  138. mask = ENDPTCTRL_RXT; /* type */
  139. data = type << __ffs(mask);
  140. mask |= ENDPTCTRL_RXS; /* unstall */
  141. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  142. data |= ENDPTCTRL_RXR;
  143. mask |= ENDPTCTRL_RXE; /* enable */
  144. data |= ENDPTCTRL_RXE;
  145. }
  146. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  147. return 0;
  148. }
  149. /**
  150. * hw_ep_get_halt: return endpoint halt status
  151. * @ci: the controller
  152. * @num: endpoint number
  153. * @dir: endpoint direction
  154. *
  155. * This function returns 1 if endpoint halted
  156. */
  157. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  158. {
  159. u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  160. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  161. }
  162. /**
  163. * hw_ep_prime: primes endpoint (execute without interruption)
  164. * @ci: the controller
  165. * @num: endpoint number
  166. * @dir: endpoint direction
  167. * @is_ctrl: true if control endpoint
  168. *
  169. * This function returns an error code
  170. */
  171. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  172. {
  173. int n = hw_ep_bit(num, dir);
  174. /* Synchronize before ep prime */
  175. wmb();
  176. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  177. return -EAGAIN;
  178. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  179. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  180. cpu_relax();
  181. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  182. return -EAGAIN;
  183. /* status shoult be tested according with manual but it doesn't work */
  184. return 0;
  185. }
  186. /**
  187. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  188. * without interruption)
  189. * @ci: the controller
  190. * @num: endpoint number
  191. * @dir: endpoint direction
  192. * @value: true => stall, false => unstall
  193. *
  194. * This function returns an error code
  195. */
  196. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  197. {
  198. if (value != 0 && value != 1)
  199. return -EINVAL;
  200. do {
  201. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  202. u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  203. u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  204. /* data toggle - reserved for EP0 but it's in ESS */
  205. hw_write(ci, reg, mask_xs|mask_xr,
  206. value ? mask_xs : mask_xr);
  207. } while (value != hw_ep_get_halt(ci, num, dir));
  208. return 0;
  209. }
  210. /**
  211. * hw_port_is_high_speed: test if port is high speed
  212. * @ci: the controller
  213. *
  214. * This function returns true if high speed port
  215. */
  216. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  217. {
  218. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  219. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  220. }
  221. /**
  222. * hw_test_and_clear_complete: test & clear complete status (execute without
  223. * interruption)
  224. * @ci: the controller
  225. * @n: endpoint number
  226. *
  227. * This function returns complete status
  228. */
  229. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  230. {
  231. n = ep_to_bit(ci, n);
  232. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  233. }
  234. /**
  235. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  236. * without interruption)
  237. * @ci: the controller
  238. *
  239. * This function returns active interrutps
  240. */
  241. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  242. {
  243. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  244. hw_write(ci, OP_USBSTS, ~0, reg);
  245. return reg;
  246. }
  247. /**
  248. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  249. * interruption)
  250. * @ci: the controller
  251. *
  252. * This function returns guard value
  253. */
  254. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  255. {
  256. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  257. }
  258. /**
  259. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  260. * interruption)
  261. * @ci: the controller
  262. *
  263. * This function returns guard value
  264. */
  265. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  266. {
  267. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  268. }
  269. /**
  270. * hw_usb_set_address: configures USB address (execute without interruption)
  271. * @ci: the controller
  272. * @value: new USB address
  273. *
  274. * This function explicitly sets the address, without the "USBADRA" (advance)
  275. * feature, which is not supported by older versions of the controller.
  276. */
  277. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  278. {
  279. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  280. value << __ffs(DEVICEADDR_USBADR));
  281. }
  282. /**
  283. * hw_usb_reset: restart device after a bus reset (execute without
  284. * interruption)
  285. * @ci: the controller
  286. *
  287. * This function returns an error code
  288. */
  289. static int hw_usb_reset(struct ci_hdrc *ci)
  290. {
  291. hw_usb_set_address(ci, 0);
  292. /* ESS flushes only at end?!? */
  293. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  294. /* clear setup token semaphores */
  295. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  296. /* clear complete status */
  297. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  298. /* wait until all bits cleared */
  299. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  300. udelay(10); /* not RTOS friendly */
  301. /* reset all endpoints ? */
  302. /* reset internal status and wait for further instructions
  303. no need to verify the port reset status (ESS does it) */
  304. return 0;
  305. }
  306. /******************************************************************************
  307. * UTIL block
  308. *****************************************************************************/
  309. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  310. unsigned int length, struct scatterlist *s)
  311. {
  312. int i;
  313. u32 temp;
  314. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  315. GFP_ATOMIC);
  316. if (node == NULL)
  317. return -ENOMEM;
  318. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
  319. if (node->ptr == NULL) {
  320. kfree(node);
  321. return -ENOMEM;
  322. }
  323. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  324. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  325. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  326. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  327. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  328. if (hwreq->req.length == 0
  329. || hwreq->req.length % hwep->ep.maxpacket)
  330. mul++;
  331. node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
  332. }
  333. if (s) {
  334. temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
  335. node->td_remaining_size = CI_MAX_BUF_SIZE - length;
  336. } else {
  337. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  338. }
  339. if (length) {
  340. node->ptr->page[0] = cpu_to_le32(temp);
  341. for (i = 1; i < TD_PAGE_COUNT; i++) {
  342. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  343. page &= ~TD_RESERVED_MASK;
  344. node->ptr->page[i] = cpu_to_le32(page);
  345. }
  346. }
  347. hwreq->req.actual += length;
  348. if (!list_empty(&hwreq->tds)) {
  349. /* get the last entry */
  350. lastnode = list_entry(hwreq->tds.prev,
  351. struct td_node, td);
  352. lastnode->ptr->next = cpu_to_le32(node->dma);
  353. }
  354. INIT_LIST_HEAD(&node->td);
  355. list_add_tail(&node->td, &hwreq->tds);
  356. return 0;
  357. }
  358. /**
  359. * _usb_addr: calculates endpoint address from direction & number
  360. * @ep: endpoint
  361. */
  362. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  363. {
  364. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  365. }
  366. static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
  367. struct ci_hw_req *hwreq)
  368. {
  369. unsigned int rest = hwreq->req.length;
  370. int pages = TD_PAGE_COUNT;
  371. int ret = 0;
  372. if (rest == 0) {
  373. ret = add_td_to_list(hwep, hwreq, 0, NULL);
  374. if (ret < 0)
  375. return ret;
  376. }
  377. /*
  378. * The first buffer could be not page aligned.
  379. * In that case we have to span into one extra td.
  380. */
  381. if (hwreq->req.dma % PAGE_SIZE)
  382. pages--;
  383. while (rest > 0) {
  384. unsigned int count = min(hwreq->req.length - hwreq->req.actual,
  385. (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
  386. ret = add_td_to_list(hwep, hwreq, count, NULL);
  387. if (ret < 0)
  388. return ret;
  389. rest -= count;
  390. }
  391. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  392. && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
  393. ret = add_td_to_list(hwep, hwreq, 0, NULL);
  394. if (ret < 0)
  395. return ret;
  396. }
  397. return ret;
  398. }
  399. static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  400. struct scatterlist *s)
  401. {
  402. unsigned int rest = sg_dma_len(s);
  403. int ret = 0;
  404. hwreq->req.actual = 0;
  405. while (rest > 0) {
  406. unsigned int count = min_t(unsigned int, rest,
  407. CI_MAX_BUF_SIZE);
  408. ret = add_td_to_list(hwep, hwreq, count, s);
  409. if (ret < 0)
  410. return ret;
  411. rest -= count;
  412. }
  413. return ret;
  414. }
  415. static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
  416. {
  417. int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
  418. / CI_HDRC_PAGE_SIZE;
  419. int i;
  420. u32 token;
  421. token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
  422. node->ptr->token = cpu_to_le32(token);
  423. for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
  424. u32 page = (u32) sg_dma_address(s) +
  425. (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
  426. page &= ~TD_RESERVED_MASK;
  427. node->ptr->page[i] = cpu_to_le32(page);
  428. }
  429. }
  430. static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  431. {
  432. struct usb_request *req = &hwreq->req;
  433. struct scatterlist *s = req->sg;
  434. int ret = 0, i = 0;
  435. struct td_node *node = NULL;
  436. if (!s || req->zero || req->length == 0) {
  437. dev_err(hwep->ci->dev, "not supported operation for sg\n");
  438. return -EINVAL;
  439. }
  440. while (i++ < req->num_mapped_sgs) {
  441. if (sg_dma_address(s) % PAGE_SIZE) {
  442. dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
  443. return -EINVAL;
  444. }
  445. if (node && (node->td_remaining_size >= sg_dma_len(s))) {
  446. ci_add_buffer_entry(node, s);
  447. node->td_remaining_size -= sg_dma_len(s);
  448. } else {
  449. ret = prepare_td_per_sg(hwep, hwreq, s);
  450. if (ret)
  451. return ret;
  452. node = list_entry(hwreq->tds.prev,
  453. struct td_node, td);
  454. }
  455. s = sg_next(s);
  456. }
  457. return ret;
  458. }
  459. /**
  460. * _hardware_enqueue: configures a request at hardware level
  461. * @hwep: endpoint
  462. * @hwreq: request
  463. *
  464. * This function returns an error code
  465. */
  466. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  467. {
  468. struct ci_hdrc *ci = hwep->ci;
  469. int ret = 0;
  470. struct td_node *firstnode, *lastnode;
  471. /* don't queue twice */
  472. if (hwreq->req.status == -EALREADY)
  473. return -EALREADY;
  474. hwreq->req.status = -EALREADY;
  475. ret = usb_gadget_map_request_by_dev(ci->dev->parent,
  476. &hwreq->req, hwep->dir);
  477. if (ret)
  478. return ret;
  479. if (hwreq->req.num_mapped_sgs)
  480. ret = prepare_td_for_sg(hwep, hwreq);
  481. else
  482. ret = prepare_td_for_non_sg(hwep, hwreq);
  483. if (ret)
  484. return ret;
  485. lastnode = list_entry(hwreq->tds.prev,
  486. struct td_node, td);
  487. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  488. if (!hwreq->req.no_interrupt)
  489. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  490. list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
  491. trace_ci_prepare_td(hwep, hwreq, firstnode);
  492. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  493. wmb();
  494. hwreq->req.actual = 0;
  495. if (!list_empty(&hwep->qh.queue)) {
  496. struct ci_hw_req *hwreqprev;
  497. int n = hw_ep_bit(hwep->num, hwep->dir);
  498. int tmp_stat;
  499. struct td_node *prevlastnode;
  500. u32 next = firstnode->dma & TD_ADDR_MASK;
  501. hwreqprev = list_entry(hwep->qh.queue.prev,
  502. struct ci_hw_req, queue);
  503. prevlastnode = list_entry(hwreqprev->tds.prev,
  504. struct td_node, td);
  505. prevlastnode->ptr->next = cpu_to_le32(next);
  506. wmb();
  507. if (ci->rev == CI_REVISION_22) {
  508. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  509. reprime_dtd(ci, hwep, prevlastnode);
  510. }
  511. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  512. goto done;
  513. do {
  514. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  515. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  516. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  517. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  518. if (tmp_stat)
  519. goto done;
  520. }
  521. /* QH configuration */
  522. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  523. hwep->qh.ptr->td.token &=
  524. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  525. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  526. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  527. if (hwreq->req.length == 0
  528. || hwreq->req.length % hwep->ep.maxpacket)
  529. mul++;
  530. hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
  531. }
  532. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  533. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  534. done:
  535. return ret;
  536. }
  537. /**
  538. * free_pending_td: remove a pending request for the endpoint
  539. * @hwep: endpoint
  540. */
  541. static void free_pending_td(struct ci_hw_ep *hwep)
  542. {
  543. struct td_node *pending = hwep->pending_td;
  544. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  545. hwep->pending_td = NULL;
  546. kfree(pending);
  547. }
  548. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  549. struct td_node *node)
  550. {
  551. hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
  552. hwep->qh.ptr->td.token &=
  553. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  554. return hw_ep_prime(ci, hwep->num, hwep->dir,
  555. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  556. }
  557. /**
  558. * _hardware_dequeue: handles a request at hardware level
  559. * @hwep: endpoint
  560. * @hwreq: request
  561. *
  562. * This function returns an error code
  563. */
  564. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  565. {
  566. u32 tmptoken;
  567. struct td_node *node, *tmpnode;
  568. unsigned remaining_length;
  569. unsigned actual = hwreq->req.length;
  570. struct ci_hdrc *ci = hwep->ci;
  571. if (hwreq->req.status != -EALREADY)
  572. return -EINVAL;
  573. hwreq->req.status = 0;
  574. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  575. tmptoken = le32_to_cpu(node->ptr->token);
  576. trace_ci_complete_td(hwep, hwreq, node);
  577. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  578. int n = hw_ep_bit(hwep->num, hwep->dir);
  579. if (ci->rev == CI_REVISION_24)
  580. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  581. reprime_dtd(ci, hwep, node);
  582. hwreq->req.status = -EALREADY;
  583. return -EBUSY;
  584. }
  585. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  586. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  587. actual -= remaining_length;
  588. hwreq->req.status = tmptoken & TD_STATUS;
  589. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  590. hwreq->req.status = -EPIPE;
  591. break;
  592. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  593. hwreq->req.status = -EPROTO;
  594. break;
  595. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  596. hwreq->req.status = -EILSEQ;
  597. break;
  598. }
  599. if (remaining_length) {
  600. if (hwep->dir == TX) {
  601. hwreq->req.status = -EPROTO;
  602. break;
  603. }
  604. }
  605. /*
  606. * As the hardware could still address the freed td
  607. * which will run the udc unusable, the cleanup of the
  608. * td has to be delayed by one.
  609. */
  610. if (hwep->pending_td)
  611. free_pending_td(hwep);
  612. hwep->pending_td = node;
  613. list_del_init(&node->td);
  614. }
  615. usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
  616. &hwreq->req, hwep->dir);
  617. hwreq->req.actual += actual;
  618. if (hwreq->req.status)
  619. return hwreq->req.status;
  620. return hwreq->req.actual;
  621. }
  622. /**
  623. * _ep_nuke: dequeues all endpoint requests
  624. * @hwep: endpoint
  625. *
  626. * This function returns an error code
  627. * Caller must hold lock
  628. */
  629. static int _ep_nuke(struct ci_hw_ep *hwep)
  630. __releases(hwep->lock)
  631. __acquires(hwep->lock)
  632. {
  633. struct td_node *node, *tmpnode;
  634. if (hwep == NULL)
  635. return -EINVAL;
  636. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  637. while (!list_empty(&hwep->qh.queue)) {
  638. /* pop oldest request */
  639. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  640. struct ci_hw_req, queue);
  641. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  642. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  643. list_del_init(&node->td);
  644. node->ptr = NULL;
  645. kfree(node);
  646. }
  647. list_del_init(&hwreq->queue);
  648. hwreq->req.status = -ESHUTDOWN;
  649. if (hwreq->req.complete != NULL) {
  650. spin_unlock(hwep->lock);
  651. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  652. spin_lock(hwep->lock);
  653. }
  654. }
  655. if (hwep->pending_td)
  656. free_pending_td(hwep);
  657. return 0;
  658. }
  659. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  660. {
  661. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  662. int direction, retval = 0;
  663. unsigned long flags;
  664. if (ep == NULL || hwep->ep.desc == NULL)
  665. return -EINVAL;
  666. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  667. return -EOPNOTSUPP;
  668. spin_lock_irqsave(hwep->lock, flags);
  669. if (value && hwep->dir == TX && check_transfer &&
  670. !list_empty(&hwep->qh.queue) &&
  671. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  672. spin_unlock_irqrestore(hwep->lock, flags);
  673. return -EAGAIN;
  674. }
  675. direction = hwep->dir;
  676. do {
  677. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  678. if (!value)
  679. hwep->wedge = 0;
  680. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  681. hwep->dir = (hwep->dir == TX) ? RX : TX;
  682. } while (hwep->dir != direction);
  683. spin_unlock_irqrestore(hwep->lock, flags);
  684. return retval;
  685. }
  686. /**
  687. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  688. * @gadget: gadget
  689. *
  690. * This function returns an error code
  691. */
  692. static int _gadget_stop_activity(struct usb_gadget *gadget)
  693. {
  694. struct usb_ep *ep;
  695. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  696. unsigned long flags;
  697. /* flush all endpoints */
  698. gadget_for_each_ep(ep, gadget) {
  699. usb_ep_fifo_flush(ep);
  700. }
  701. usb_ep_fifo_flush(&ci->ep0out->ep);
  702. usb_ep_fifo_flush(&ci->ep0in->ep);
  703. /* make sure to disable all endpoints */
  704. gadget_for_each_ep(ep, gadget) {
  705. usb_ep_disable(ep);
  706. }
  707. if (ci->status != NULL) {
  708. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  709. ci->status = NULL;
  710. }
  711. spin_lock_irqsave(&ci->lock, flags);
  712. ci->gadget.speed = USB_SPEED_UNKNOWN;
  713. ci->remote_wakeup = 0;
  714. ci->suspended = 0;
  715. spin_unlock_irqrestore(&ci->lock, flags);
  716. return 0;
  717. }
  718. /******************************************************************************
  719. * ISR block
  720. *****************************************************************************/
  721. /**
  722. * isr_reset_handler: USB reset interrupt handler
  723. * @ci: UDC device
  724. *
  725. * This function resets USB engine after a bus reset occurred
  726. */
  727. static void isr_reset_handler(struct ci_hdrc *ci)
  728. __releases(ci->lock)
  729. __acquires(ci->lock)
  730. {
  731. int retval;
  732. spin_unlock(&ci->lock);
  733. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  734. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  735. retval = _gadget_stop_activity(&ci->gadget);
  736. if (retval)
  737. goto done;
  738. retval = hw_usb_reset(ci);
  739. if (retval)
  740. goto done;
  741. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  742. if (ci->status == NULL)
  743. retval = -ENOMEM;
  744. done:
  745. spin_lock(&ci->lock);
  746. if (retval)
  747. dev_err(ci->dev, "error: %i\n", retval);
  748. }
  749. /**
  750. * isr_get_status_complete: get_status request complete function
  751. * @ep: endpoint
  752. * @req: request handled
  753. *
  754. * Caller must release lock
  755. */
  756. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  757. {
  758. if (ep == NULL || req == NULL)
  759. return;
  760. kfree(req->buf);
  761. usb_ep_free_request(ep, req);
  762. }
  763. /**
  764. * _ep_queue: queues (submits) an I/O request to an endpoint
  765. * @ep: endpoint
  766. * @req: request
  767. * @gfp_flags: GFP flags (not used)
  768. *
  769. * Caller must hold lock
  770. * This function returns an error code
  771. */
  772. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  773. gfp_t __maybe_unused gfp_flags)
  774. {
  775. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  776. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  777. struct ci_hdrc *ci = hwep->ci;
  778. int retval = 0;
  779. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  780. return -EINVAL;
  781. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  782. if (req->length)
  783. hwep = (ci->ep0_dir == RX) ?
  784. ci->ep0out : ci->ep0in;
  785. if (!list_empty(&hwep->qh.queue)) {
  786. _ep_nuke(hwep);
  787. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  788. _usb_addr(hwep));
  789. }
  790. }
  791. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  792. hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
  793. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  794. return -EMSGSIZE;
  795. }
  796. /* first nuke then test link, e.g. previous status has not sent */
  797. if (!list_empty(&hwreq->queue)) {
  798. dev_err(hwep->ci->dev, "request already in queue\n");
  799. return -EBUSY;
  800. }
  801. /* push request */
  802. hwreq->req.status = -EINPROGRESS;
  803. hwreq->req.actual = 0;
  804. retval = _hardware_enqueue(hwep, hwreq);
  805. if (retval == -EALREADY)
  806. retval = 0;
  807. if (!retval)
  808. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  809. return retval;
  810. }
  811. /**
  812. * isr_get_status_response: get_status request response
  813. * @ci: ci struct
  814. * @setup: setup request packet
  815. *
  816. * This function returns an error code
  817. */
  818. static int isr_get_status_response(struct ci_hdrc *ci,
  819. struct usb_ctrlrequest *setup)
  820. __releases(hwep->lock)
  821. __acquires(hwep->lock)
  822. {
  823. struct ci_hw_ep *hwep = ci->ep0in;
  824. struct usb_request *req = NULL;
  825. gfp_t gfp_flags = GFP_ATOMIC;
  826. int dir, num, retval;
  827. if (hwep == NULL || setup == NULL)
  828. return -EINVAL;
  829. spin_unlock(hwep->lock);
  830. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  831. spin_lock(hwep->lock);
  832. if (req == NULL)
  833. return -ENOMEM;
  834. req->complete = isr_get_status_complete;
  835. req->length = 2;
  836. req->buf = kzalloc(req->length, gfp_flags);
  837. if (req->buf == NULL) {
  838. retval = -ENOMEM;
  839. goto err_free_req;
  840. }
  841. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  842. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  843. ci->gadget.is_selfpowered;
  844. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  845. == USB_RECIP_ENDPOINT) {
  846. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  847. TX : RX;
  848. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  849. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  850. }
  851. /* else do nothing; reserved for future use */
  852. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  853. if (retval)
  854. goto err_free_buf;
  855. return 0;
  856. err_free_buf:
  857. kfree(req->buf);
  858. err_free_req:
  859. spin_unlock(hwep->lock);
  860. usb_ep_free_request(&hwep->ep, req);
  861. spin_lock(hwep->lock);
  862. return retval;
  863. }
  864. /**
  865. * isr_setup_status_complete: setup_status request complete function
  866. * @ep: endpoint
  867. * @req: request handled
  868. *
  869. * Caller must release lock. Put the port in test mode if test mode
  870. * feature is selected.
  871. */
  872. static void
  873. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  874. {
  875. struct ci_hdrc *ci = req->context;
  876. unsigned long flags;
  877. if (req->status < 0)
  878. return;
  879. if (ci->setaddr) {
  880. hw_usb_set_address(ci, ci->address);
  881. ci->setaddr = false;
  882. if (ci->address)
  883. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  884. }
  885. spin_lock_irqsave(&ci->lock, flags);
  886. if (ci->test_mode)
  887. hw_port_test_set(ci, ci->test_mode);
  888. spin_unlock_irqrestore(&ci->lock, flags);
  889. }
  890. /**
  891. * isr_setup_status_phase: queues the status phase of a setup transation
  892. * @ci: ci struct
  893. *
  894. * This function returns an error code
  895. */
  896. static int isr_setup_status_phase(struct ci_hdrc *ci)
  897. {
  898. struct ci_hw_ep *hwep;
  899. /*
  900. * Unexpected USB controller behavior, caused by bad signal integrity
  901. * or ground reference problems, can lead to isr_setup_status_phase
  902. * being called with ci->status equal to NULL.
  903. * If this situation occurs, you should review your USB hardware design.
  904. */
  905. if (WARN_ON_ONCE(!ci->status))
  906. return -EPIPE;
  907. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  908. ci->status->context = ci;
  909. ci->status->complete = isr_setup_status_complete;
  910. return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  911. }
  912. /**
  913. * isr_tr_complete_low: transaction complete low level handler
  914. * @hwep: endpoint
  915. *
  916. * This function returns an error code
  917. * Caller must hold lock
  918. */
  919. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  920. __releases(hwep->lock)
  921. __acquires(hwep->lock)
  922. {
  923. struct ci_hw_req *hwreq, *hwreqtemp;
  924. struct ci_hw_ep *hweptemp = hwep;
  925. int retval = 0;
  926. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  927. queue) {
  928. retval = _hardware_dequeue(hwep, hwreq);
  929. if (retval < 0)
  930. break;
  931. list_del_init(&hwreq->queue);
  932. if (hwreq->req.complete != NULL) {
  933. spin_unlock(hwep->lock);
  934. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  935. hwreq->req.length)
  936. hweptemp = hwep->ci->ep0in;
  937. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  938. spin_lock(hwep->lock);
  939. }
  940. }
  941. if (retval == -EBUSY)
  942. retval = 0;
  943. return retval;
  944. }
  945. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  946. {
  947. dev_warn(&ci->gadget.dev,
  948. "connect the device to an alternate port if you want HNP\n");
  949. return isr_setup_status_phase(ci);
  950. }
  951. /**
  952. * isr_setup_packet_handler: setup packet handler
  953. * @ci: UDC descriptor
  954. *
  955. * This function handles setup packet
  956. */
  957. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  958. __releases(ci->lock)
  959. __acquires(ci->lock)
  960. {
  961. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  962. struct usb_ctrlrequest req;
  963. int type, num, dir, err = -EINVAL;
  964. u8 tmode = 0;
  965. /*
  966. * Flush data and handshake transactions of previous
  967. * setup packet.
  968. */
  969. _ep_nuke(ci->ep0out);
  970. _ep_nuke(ci->ep0in);
  971. /* read_setup_packet */
  972. do {
  973. hw_test_and_set_setup_guard(ci);
  974. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  975. } while (!hw_test_and_clear_setup_guard(ci));
  976. type = req.bRequestType;
  977. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  978. switch (req.bRequest) {
  979. case USB_REQ_CLEAR_FEATURE:
  980. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  981. le16_to_cpu(req.wValue) ==
  982. USB_ENDPOINT_HALT) {
  983. if (req.wLength != 0)
  984. break;
  985. num = le16_to_cpu(req.wIndex);
  986. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  987. num &= USB_ENDPOINT_NUMBER_MASK;
  988. if (dir == TX)
  989. num += ci->hw_ep_max / 2;
  990. if (!ci->ci_hw_ep[num].wedge) {
  991. spin_unlock(&ci->lock);
  992. err = usb_ep_clear_halt(
  993. &ci->ci_hw_ep[num].ep);
  994. spin_lock(&ci->lock);
  995. if (err)
  996. break;
  997. }
  998. err = isr_setup_status_phase(ci);
  999. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  1000. le16_to_cpu(req.wValue) ==
  1001. USB_DEVICE_REMOTE_WAKEUP) {
  1002. if (req.wLength != 0)
  1003. break;
  1004. ci->remote_wakeup = 0;
  1005. err = isr_setup_status_phase(ci);
  1006. } else {
  1007. goto delegate;
  1008. }
  1009. break;
  1010. case USB_REQ_GET_STATUS:
  1011. if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
  1012. le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
  1013. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  1014. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  1015. goto delegate;
  1016. if (le16_to_cpu(req.wLength) != 2 ||
  1017. le16_to_cpu(req.wValue) != 0)
  1018. break;
  1019. err = isr_get_status_response(ci, &req);
  1020. break;
  1021. case USB_REQ_SET_ADDRESS:
  1022. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  1023. goto delegate;
  1024. if (le16_to_cpu(req.wLength) != 0 ||
  1025. le16_to_cpu(req.wIndex) != 0)
  1026. break;
  1027. ci->address = (u8)le16_to_cpu(req.wValue);
  1028. ci->setaddr = true;
  1029. err = isr_setup_status_phase(ci);
  1030. break;
  1031. case USB_REQ_SET_FEATURE:
  1032. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  1033. le16_to_cpu(req.wValue) ==
  1034. USB_ENDPOINT_HALT) {
  1035. if (req.wLength != 0)
  1036. break;
  1037. num = le16_to_cpu(req.wIndex);
  1038. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  1039. num &= USB_ENDPOINT_NUMBER_MASK;
  1040. if (dir == TX)
  1041. num += ci->hw_ep_max / 2;
  1042. spin_unlock(&ci->lock);
  1043. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  1044. spin_lock(&ci->lock);
  1045. if (!err)
  1046. isr_setup_status_phase(ci);
  1047. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  1048. if (req.wLength != 0)
  1049. break;
  1050. switch (le16_to_cpu(req.wValue)) {
  1051. case USB_DEVICE_REMOTE_WAKEUP:
  1052. ci->remote_wakeup = 1;
  1053. err = isr_setup_status_phase(ci);
  1054. break;
  1055. case USB_DEVICE_TEST_MODE:
  1056. tmode = le16_to_cpu(req.wIndex) >> 8;
  1057. switch (tmode) {
  1058. case USB_TEST_J:
  1059. case USB_TEST_K:
  1060. case USB_TEST_SE0_NAK:
  1061. case USB_TEST_PACKET:
  1062. case USB_TEST_FORCE_ENABLE:
  1063. ci->test_mode = tmode;
  1064. err = isr_setup_status_phase(
  1065. ci);
  1066. break;
  1067. default:
  1068. break;
  1069. }
  1070. break;
  1071. case USB_DEVICE_B_HNP_ENABLE:
  1072. if (ci_otg_is_fsm_mode(ci)) {
  1073. ci->gadget.b_hnp_enable = 1;
  1074. err = isr_setup_status_phase(
  1075. ci);
  1076. }
  1077. break;
  1078. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  1079. if (ci_otg_is_fsm_mode(ci))
  1080. err = otg_a_alt_hnp_support(ci);
  1081. break;
  1082. case USB_DEVICE_A_HNP_SUPPORT:
  1083. if (ci_otg_is_fsm_mode(ci)) {
  1084. ci->gadget.a_hnp_support = 1;
  1085. err = isr_setup_status_phase(
  1086. ci);
  1087. }
  1088. break;
  1089. default:
  1090. goto delegate;
  1091. }
  1092. } else {
  1093. goto delegate;
  1094. }
  1095. break;
  1096. default:
  1097. delegate:
  1098. if (req.wLength == 0) /* no data phase */
  1099. ci->ep0_dir = TX;
  1100. spin_unlock(&ci->lock);
  1101. err = ci->driver->setup(&ci->gadget, &req);
  1102. spin_lock(&ci->lock);
  1103. break;
  1104. }
  1105. if (err < 0) {
  1106. spin_unlock(&ci->lock);
  1107. if (_ep_set_halt(&hwep->ep, 1, false))
  1108. dev_err(ci->dev, "error: _ep_set_halt\n");
  1109. spin_lock(&ci->lock);
  1110. }
  1111. }
  1112. /**
  1113. * isr_tr_complete_handler: transaction complete interrupt handler
  1114. * @ci: UDC descriptor
  1115. *
  1116. * This function handles traffic events
  1117. */
  1118. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1119. __releases(ci->lock)
  1120. __acquires(ci->lock)
  1121. {
  1122. unsigned i;
  1123. int err;
  1124. for (i = 0; i < ci->hw_ep_max; i++) {
  1125. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1126. if (hwep->ep.desc == NULL)
  1127. continue; /* not configured */
  1128. if (hw_test_and_clear_complete(ci, i)) {
  1129. err = isr_tr_complete_low(hwep);
  1130. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1131. if (err > 0) /* needs status phase */
  1132. err = isr_setup_status_phase(ci);
  1133. if (err < 0) {
  1134. spin_unlock(&ci->lock);
  1135. if (_ep_set_halt(&hwep->ep, 1, false))
  1136. dev_err(ci->dev,
  1137. "error: _ep_set_halt\n");
  1138. spin_lock(&ci->lock);
  1139. }
  1140. }
  1141. }
  1142. /* Only handle setup packet below */
  1143. if (i == 0 &&
  1144. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1145. isr_setup_packet_handler(ci);
  1146. }
  1147. }
  1148. /******************************************************************************
  1149. * ENDPT block
  1150. *****************************************************************************/
  1151. /*
  1152. * ep_enable: configure endpoint, making it usable
  1153. *
  1154. * Check usb_ep_enable() at "usb_gadget.h" for details
  1155. */
  1156. static int ep_enable(struct usb_ep *ep,
  1157. const struct usb_endpoint_descriptor *desc)
  1158. {
  1159. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1160. int retval = 0;
  1161. unsigned long flags;
  1162. u32 cap = 0;
  1163. if (ep == NULL || desc == NULL)
  1164. return -EINVAL;
  1165. spin_lock_irqsave(hwep->lock, flags);
  1166. /* only internal SW should enable ctrl endpts */
  1167. if (!list_empty(&hwep->qh.queue)) {
  1168. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1169. spin_unlock_irqrestore(hwep->lock, flags);
  1170. return -EBUSY;
  1171. }
  1172. hwep->ep.desc = desc;
  1173. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1174. hwep->num = usb_endpoint_num(desc);
  1175. hwep->type = usb_endpoint_type(desc);
  1176. hwep->ep.maxpacket = usb_endpoint_maxp(desc);
  1177. hwep->ep.mult = usb_endpoint_maxp_mult(desc);
  1178. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1179. cap |= QH_IOS;
  1180. cap |= QH_ZLT;
  1181. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1182. /*
  1183. * For ISO-TX, we set mult at QH as the largest value, and use
  1184. * MultO at TD as real mult value.
  1185. */
  1186. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1187. cap |= 3 << __ffs(QH_MULT);
  1188. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1189. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1190. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1191. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1192. retval = -EINVAL;
  1193. }
  1194. /*
  1195. * Enable endpoints in the HW other than ep0 as ep0
  1196. * is always enabled
  1197. */
  1198. if (hwep->num)
  1199. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1200. hwep->type);
  1201. spin_unlock_irqrestore(hwep->lock, flags);
  1202. return retval;
  1203. }
  1204. /*
  1205. * ep_disable: endpoint is no longer usable
  1206. *
  1207. * Check usb_ep_disable() at "usb_gadget.h" for details
  1208. */
  1209. static int ep_disable(struct usb_ep *ep)
  1210. {
  1211. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1212. int direction, retval = 0;
  1213. unsigned long flags;
  1214. if (ep == NULL)
  1215. return -EINVAL;
  1216. else if (hwep->ep.desc == NULL)
  1217. return -EBUSY;
  1218. spin_lock_irqsave(hwep->lock, flags);
  1219. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1220. spin_unlock_irqrestore(hwep->lock, flags);
  1221. return 0;
  1222. }
  1223. /* only internal SW should disable ctrl endpts */
  1224. direction = hwep->dir;
  1225. do {
  1226. retval |= _ep_nuke(hwep);
  1227. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1228. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1229. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1230. } while (hwep->dir != direction);
  1231. hwep->ep.desc = NULL;
  1232. spin_unlock_irqrestore(hwep->lock, flags);
  1233. return retval;
  1234. }
  1235. /*
  1236. * ep_alloc_request: allocate a request object to use with this endpoint
  1237. *
  1238. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1239. */
  1240. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1241. {
  1242. struct ci_hw_req *hwreq = NULL;
  1243. if (ep == NULL)
  1244. return NULL;
  1245. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1246. if (hwreq != NULL) {
  1247. INIT_LIST_HEAD(&hwreq->queue);
  1248. INIT_LIST_HEAD(&hwreq->tds);
  1249. }
  1250. return (hwreq == NULL) ? NULL : &hwreq->req;
  1251. }
  1252. /*
  1253. * ep_free_request: frees a request object
  1254. *
  1255. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1256. */
  1257. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1258. {
  1259. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1260. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1261. struct td_node *node, *tmpnode;
  1262. unsigned long flags;
  1263. if (ep == NULL || req == NULL) {
  1264. return;
  1265. } else if (!list_empty(&hwreq->queue)) {
  1266. dev_err(hwep->ci->dev, "freeing queued request\n");
  1267. return;
  1268. }
  1269. spin_lock_irqsave(hwep->lock, flags);
  1270. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1271. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1272. list_del_init(&node->td);
  1273. node->ptr = NULL;
  1274. kfree(node);
  1275. }
  1276. kfree(hwreq);
  1277. spin_unlock_irqrestore(hwep->lock, flags);
  1278. }
  1279. /*
  1280. * ep_queue: queues (submits) an I/O request to an endpoint
  1281. *
  1282. * Check usb_ep_queue()* at usb_gadget.h" for details
  1283. */
  1284. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1285. gfp_t __maybe_unused gfp_flags)
  1286. {
  1287. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1288. int retval = 0;
  1289. unsigned long flags;
  1290. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1291. return -EINVAL;
  1292. spin_lock_irqsave(hwep->lock, flags);
  1293. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1294. spin_unlock_irqrestore(hwep->lock, flags);
  1295. return 0;
  1296. }
  1297. retval = _ep_queue(ep, req, gfp_flags);
  1298. spin_unlock_irqrestore(hwep->lock, flags);
  1299. return retval;
  1300. }
  1301. /*
  1302. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1303. *
  1304. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1305. */
  1306. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1307. {
  1308. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1309. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1310. unsigned long flags;
  1311. struct td_node *node, *tmpnode;
  1312. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1313. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1314. list_empty(&hwep->qh.queue))
  1315. return -EINVAL;
  1316. spin_lock_irqsave(hwep->lock, flags);
  1317. if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
  1318. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1319. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1320. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1321. list_del(&node->td);
  1322. kfree(node);
  1323. }
  1324. /* pop request */
  1325. list_del_init(&hwreq->queue);
  1326. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1327. req->status = -ECONNRESET;
  1328. if (hwreq->req.complete != NULL) {
  1329. spin_unlock(hwep->lock);
  1330. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1331. spin_lock(hwep->lock);
  1332. }
  1333. spin_unlock_irqrestore(hwep->lock, flags);
  1334. return 0;
  1335. }
  1336. /*
  1337. * ep_set_halt: sets the endpoint halt feature
  1338. *
  1339. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1340. */
  1341. static int ep_set_halt(struct usb_ep *ep, int value)
  1342. {
  1343. return _ep_set_halt(ep, value, true);
  1344. }
  1345. /*
  1346. * ep_set_wedge: sets the halt feature and ignores clear requests
  1347. *
  1348. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1349. */
  1350. static int ep_set_wedge(struct usb_ep *ep)
  1351. {
  1352. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1353. unsigned long flags;
  1354. if (ep == NULL || hwep->ep.desc == NULL)
  1355. return -EINVAL;
  1356. spin_lock_irqsave(hwep->lock, flags);
  1357. hwep->wedge = 1;
  1358. spin_unlock_irqrestore(hwep->lock, flags);
  1359. return usb_ep_set_halt(ep);
  1360. }
  1361. /*
  1362. * ep_fifo_flush: flushes contents of a fifo
  1363. *
  1364. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1365. */
  1366. static void ep_fifo_flush(struct usb_ep *ep)
  1367. {
  1368. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1369. unsigned long flags;
  1370. if (ep == NULL) {
  1371. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1372. return;
  1373. }
  1374. spin_lock_irqsave(hwep->lock, flags);
  1375. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1376. spin_unlock_irqrestore(hwep->lock, flags);
  1377. return;
  1378. }
  1379. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1380. spin_unlock_irqrestore(hwep->lock, flags);
  1381. }
  1382. /*
  1383. * Endpoint-specific part of the API to the USB controller hardware
  1384. * Check "usb_gadget.h" for details
  1385. */
  1386. static const struct usb_ep_ops usb_ep_ops = {
  1387. .enable = ep_enable,
  1388. .disable = ep_disable,
  1389. .alloc_request = ep_alloc_request,
  1390. .free_request = ep_free_request,
  1391. .queue = ep_queue,
  1392. .dequeue = ep_dequeue,
  1393. .set_halt = ep_set_halt,
  1394. .set_wedge = ep_set_wedge,
  1395. .fifo_flush = ep_fifo_flush,
  1396. };
  1397. /******************************************************************************
  1398. * GADGET block
  1399. *****************************************************************************/
  1400. static int ci_udc_get_frame(struct usb_gadget *_gadget)
  1401. {
  1402. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1403. unsigned long flags;
  1404. int ret;
  1405. spin_lock_irqsave(&ci->lock, flags);
  1406. ret = hw_read(ci, OP_FRINDEX, 0x3fff);
  1407. spin_unlock_irqrestore(&ci->lock, flags);
  1408. return ret >> 3;
  1409. }
  1410. /*
  1411. * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
  1412. */
  1413. static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
  1414. {
  1415. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1416. if (is_active) {
  1417. pm_runtime_get_sync(ci->dev);
  1418. hw_device_reset(ci);
  1419. spin_lock_irq(&ci->lock);
  1420. if (ci->driver) {
  1421. hw_device_state(ci, ci->ep0out->qh.dma);
  1422. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1423. spin_unlock_irq(&ci->lock);
  1424. usb_udc_vbus_handler(_gadget, true);
  1425. } else {
  1426. spin_unlock_irq(&ci->lock);
  1427. }
  1428. } else {
  1429. usb_udc_vbus_handler(_gadget, false);
  1430. if (ci->driver)
  1431. ci->driver->disconnect(&ci->gadget);
  1432. hw_device_state(ci, 0);
  1433. if (ci->platdata->notify_event)
  1434. ci->platdata->notify_event(ci,
  1435. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1436. _gadget_stop_activity(&ci->gadget);
  1437. pm_runtime_put_sync(ci->dev);
  1438. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1439. }
  1440. }
  1441. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1442. {
  1443. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1444. unsigned long flags;
  1445. int ret = 0;
  1446. spin_lock_irqsave(&ci->lock, flags);
  1447. ci->vbus_active = is_active;
  1448. spin_unlock_irqrestore(&ci->lock, flags);
  1449. if (ci->usb_phy)
  1450. usb_phy_set_charger_state(ci->usb_phy, is_active ?
  1451. USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
  1452. if (ci->platdata->notify_event)
  1453. ret = ci->platdata->notify_event(ci,
  1454. CI_HDRC_CONTROLLER_VBUS_EVENT);
  1455. if (ci->driver)
  1456. ci_hdrc_gadget_connect(_gadget, is_active);
  1457. return ret;
  1458. }
  1459. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1460. {
  1461. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1462. unsigned long flags;
  1463. int ret = 0;
  1464. spin_lock_irqsave(&ci->lock, flags);
  1465. if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1466. spin_unlock_irqrestore(&ci->lock, flags);
  1467. return 0;
  1468. }
  1469. if (!ci->remote_wakeup) {
  1470. ret = -EOPNOTSUPP;
  1471. goto out;
  1472. }
  1473. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1474. ret = -EINVAL;
  1475. goto out;
  1476. }
  1477. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1478. out:
  1479. spin_unlock_irqrestore(&ci->lock, flags);
  1480. return ret;
  1481. }
  1482. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1483. {
  1484. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1485. if (ci->usb_phy)
  1486. return usb_phy_set_power(ci->usb_phy, ma);
  1487. return -ENOTSUPP;
  1488. }
  1489. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1490. {
  1491. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1492. struct ci_hw_ep *hwep = ci->ep0in;
  1493. unsigned long flags;
  1494. spin_lock_irqsave(hwep->lock, flags);
  1495. _gadget->is_selfpowered = (is_on != 0);
  1496. spin_unlock_irqrestore(hwep->lock, flags);
  1497. return 0;
  1498. }
  1499. /* Change Data+ pullup status
  1500. * this func is used by usb_gadget_connect/disconnect
  1501. */
  1502. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1503. {
  1504. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1505. /*
  1506. * Data+ pullup controlled by OTG state machine in OTG fsm mode;
  1507. * and don't touch Data+ in host mode for dual role config.
  1508. */
  1509. if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
  1510. return 0;
  1511. pm_runtime_get_sync(ci->dev);
  1512. if (is_on)
  1513. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1514. else
  1515. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1516. pm_runtime_put_sync(ci->dev);
  1517. return 0;
  1518. }
  1519. static int ci_udc_start(struct usb_gadget *gadget,
  1520. struct usb_gadget_driver *driver);
  1521. static int ci_udc_stop(struct usb_gadget *gadget);
  1522. /* Match ISOC IN from the highest endpoint */
  1523. static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
  1524. struct usb_endpoint_descriptor *desc,
  1525. struct usb_ss_ep_comp_descriptor *comp_desc)
  1526. {
  1527. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1528. struct usb_ep *ep;
  1529. if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
  1530. list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
  1531. if (ep->caps.dir_in && !ep->claimed)
  1532. return ep;
  1533. }
  1534. }
  1535. return NULL;
  1536. }
  1537. /*
  1538. * Device operations part of the API to the USB controller hardware,
  1539. * which don't involve endpoints (or i/o)
  1540. * Check "usb_gadget.h" for details
  1541. */
  1542. static const struct usb_gadget_ops usb_gadget_ops = {
  1543. .get_frame = ci_udc_get_frame,
  1544. .vbus_session = ci_udc_vbus_session,
  1545. .wakeup = ci_udc_wakeup,
  1546. .set_selfpowered = ci_udc_selfpowered,
  1547. .pullup = ci_udc_pullup,
  1548. .vbus_draw = ci_udc_vbus_draw,
  1549. .udc_start = ci_udc_start,
  1550. .udc_stop = ci_udc_stop,
  1551. .match_ep = ci_udc_match_ep,
  1552. };
  1553. static int init_eps(struct ci_hdrc *ci)
  1554. {
  1555. int retval = 0, i, j;
  1556. for (i = 0; i < ci->hw_ep_max/2; i++)
  1557. for (j = RX; j <= TX; j++) {
  1558. int k = i + j * ci->hw_ep_max/2;
  1559. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1560. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1561. (j == TX) ? "in" : "out");
  1562. hwep->ci = ci;
  1563. hwep->lock = &ci->lock;
  1564. hwep->td_pool = ci->td_pool;
  1565. hwep->ep.name = hwep->name;
  1566. hwep->ep.ops = &usb_ep_ops;
  1567. if (i == 0) {
  1568. hwep->ep.caps.type_control = true;
  1569. } else {
  1570. hwep->ep.caps.type_iso = true;
  1571. hwep->ep.caps.type_bulk = true;
  1572. hwep->ep.caps.type_int = true;
  1573. }
  1574. if (j == TX)
  1575. hwep->ep.caps.dir_in = true;
  1576. else
  1577. hwep->ep.caps.dir_out = true;
  1578. /*
  1579. * for ep0: maxP defined in desc, for other
  1580. * eps, maxP is set by epautoconfig() called
  1581. * by gadget layer
  1582. */
  1583. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1584. INIT_LIST_HEAD(&hwep->qh.queue);
  1585. hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
  1586. &hwep->qh.dma);
  1587. if (hwep->qh.ptr == NULL)
  1588. retval = -ENOMEM;
  1589. /*
  1590. * set up shorthands for ep0 out and in endpoints,
  1591. * don't add to gadget's ep_list
  1592. */
  1593. if (i == 0) {
  1594. if (j == RX)
  1595. ci->ep0out = hwep;
  1596. else
  1597. ci->ep0in = hwep;
  1598. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1599. continue;
  1600. }
  1601. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1602. }
  1603. return retval;
  1604. }
  1605. static void destroy_eps(struct ci_hdrc *ci)
  1606. {
  1607. int i;
  1608. for (i = 0; i < ci->hw_ep_max; i++) {
  1609. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1610. if (hwep->pending_td)
  1611. free_pending_td(hwep);
  1612. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1613. }
  1614. }
  1615. /**
  1616. * ci_udc_start: register a gadget driver
  1617. * @gadget: our gadget
  1618. * @driver: the driver being registered
  1619. *
  1620. * Interrupts are enabled here.
  1621. */
  1622. static int ci_udc_start(struct usb_gadget *gadget,
  1623. struct usb_gadget_driver *driver)
  1624. {
  1625. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1626. int retval;
  1627. if (driver->disconnect == NULL)
  1628. return -EINVAL;
  1629. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1630. retval = usb_ep_enable(&ci->ep0out->ep);
  1631. if (retval)
  1632. return retval;
  1633. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1634. retval = usb_ep_enable(&ci->ep0in->ep);
  1635. if (retval)
  1636. return retval;
  1637. ci->driver = driver;
  1638. /* Start otg fsm for B-device */
  1639. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1640. ci_hdrc_otg_fsm_start(ci);
  1641. return retval;
  1642. }
  1643. if (ci->vbus_active)
  1644. ci_hdrc_gadget_connect(gadget, 1);
  1645. else
  1646. usb_udc_vbus_handler(&ci->gadget, false);
  1647. return retval;
  1648. }
  1649. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1650. {
  1651. if (!ci_otg_is_fsm_mode(ci))
  1652. return;
  1653. mutex_lock(&ci->fsm.lock);
  1654. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1655. ci->fsm.a_bidl_adis_tmout = 1;
  1656. ci_hdrc_otg_fsm_start(ci);
  1657. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1658. ci->fsm.protocol = PROTO_UNDEF;
  1659. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1660. }
  1661. mutex_unlock(&ci->fsm.lock);
  1662. }
  1663. /*
  1664. * ci_udc_stop: unregister a gadget driver
  1665. */
  1666. static int ci_udc_stop(struct usb_gadget *gadget)
  1667. {
  1668. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1669. unsigned long flags;
  1670. spin_lock_irqsave(&ci->lock, flags);
  1671. ci->driver = NULL;
  1672. if (ci->vbus_active) {
  1673. hw_device_state(ci, 0);
  1674. spin_unlock_irqrestore(&ci->lock, flags);
  1675. if (ci->platdata->notify_event)
  1676. ci->platdata->notify_event(ci,
  1677. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1678. _gadget_stop_activity(&ci->gadget);
  1679. spin_lock_irqsave(&ci->lock, flags);
  1680. pm_runtime_put(ci->dev);
  1681. }
  1682. spin_unlock_irqrestore(&ci->lock, flags);
  1683. ci_udc_stop_for_otg_fsm(ci);
  1684. return 0;
  1685. }
  1686. /******************************************************************************
  1687. * BUS block
  1688. *****************************************************************************/
  1689. /*
  1690. * udc_irq: ci interrupt handler
  1691. *
  1692. * This function returns IRQ_HANDLED if the IRQ has been handled
  1693. * It locks access to registers
  1694. */
  1695. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1696. {
  1697. irqreturn_t retval;
  1698. u32 intr;
  1699. if (ci == NULL)
  1700. return IRQ_HANDLED;
  1701. spin_lock(&ci->lock);
  1702. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1703. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1704. USBMODE_CM_DC) {
  1705. spin_unlock(&ci->lock);
  1706. return IRQ_NONE;
  1707. }
  1708. }
  1709. intr = hw_test_and_clear_intr_active(ci);
  1710. if (intr) {
  1711. /* order defines priority - do NOT change it */
  1712. if (USBi_URI & intr)
  1713. isr_reset_handler(ci);
  1714. if (USBi_PCI & intr) {
  1715. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1716. USB_SPEED_HIGH : USB_SPEED_FULL;
  1717. if (ci->suspended) {
  1718. if (ci->driver->resume) {
  1719. spin_unlock(&ci->lock);
  1720. ci->driver->resume(&ci->gadget);
  1721. spin_lock(&ci->lock);
  1722. }
  1723. ci->suspended = 0;
  1724. usb_gadget_set_state(&ci->gadget,
  1725. ci->resume_state);
  1726. }
  1727. }
  1728. if (USBi_UI & intr)
  1729. isr_tr_complete_handler(ci);
  1730. if ((USBi_SLI & intr) && !(ci->suspended)) {
  1731. ci->suspended = 1;
  1732. ci->resume_state = ci->gadget.state;
  1733. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1734. ci->driver->suspend) {
  1735. spin_unlock(&ci->lock);
  1736. ci->driver->suspend(&ci->gadget);
  1737. spin_lock(&ci->lock);
  1738. }
  1739. usb_gadget_set_state(&ci->gadget,
  1740. USB_STATE_SUSPENDED);
  1741. }
  1742. retval = IRQ_HANDLED;
  1743. } else {
  1744. retval = IRQ_NONE;
  1745. }
  1746. spin_unlock(&ci->lock);
  1747. return retval;
  1748. }
  1749. /**
  1750. * udc_start: initialize gadget role
  1751. * @ci: chipidea controller
  1752. */
  1753. static int udc_start(struct ci_hdrc *ci)
  1754. {
  1755. struct device *dev = ci->dev;
  1756. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1757. int retval = 0;
  1758. ci->gadget.ops = &usb_gadget_ops;
  1759. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1760. ci->gadget.max_speed = USB_SPEED_HIGH;
  1761. ci->gadget.name = ci->platdata->name;
  1762. ci->gadget.otg_caps = otg_caps;
  1763. ci->gadget.sg_supported = 1;
  1764. ci->gadget.irq = ci->irq;
  1765. if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
  1766. ci->gadget.quirk_avoids_skb_reserve = 1;
  1767. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1768. otg_caps->adp_support))
  1769. ci->gadget.is_otg = 1;
  1770. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1771. /* alloc resources */
  1772. ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
  1773. sizeof(struct ci_hw_qh),
  1774. 64, CI_HDRC_PAGE_SIZE);
  1775. if (ci->qh_pool == NULL)
  1776. return -ENOMEM;
  1777. ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
  1778. sizeof(struct ci_hw_td),
  1779. 64, CI_HDRC_PAGE_SIZE);
  1780. if (ci->td_pool == NULL) {
  1781. retval = -ENOMEM;
  1782. goto free_qh_pool;
  1783. }
  1784. retval = init_eps(ci);
  1785. if (retval)
  1786. goto free_pools;
  1787. ci->gadget.ep0 = &ci->ep0in->ep;
  1788. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1789. if (retval)
  1790. goto destroy_eps;
  1791. return retval;
  1792. destroy_eps:
  1793. destroy_eps(ci);
  1794. free_pools:
  1795. dma_pool_destroy(ci->td_pool);
  1796. free_qh_pool:
  1797. dma_pool_destroy(ci->qh_pool);
  1798. return retval;
  1799. }
  1800. /*
  1801. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1802. *
  1803. * No interrupts active, the IRQ has been released
  1804. */
  1805. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1806. {
  1807. if (!ci->roles[CI_ROLE_GADGET])
  1808. return;
  1809. usb_del_gadget_udc(&ci->gadget);
  1810. destroy_eps(ci);
  1811. dma_pool_destroy(ci->td_pool);
  1812. dma_pool_destroy(ci->qh_pool);
  1813. }
  1814. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1815. {
  1816. if (ci->platdata->pins_device)
  1817. pinctrl_select_state(ci->platdata->pctl,
  1818. ci->platdata->pins_device);
  1819. if (ci->is_otg)
  1820. /* Clear and enable BSV irq */
  1821. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1822. OTGSC_BSVIS | OTGSC_BSVIE);
  1823. return 0;
  1824. }
  1825. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1826. {
  1827. /*
  1828. * host doesn't care B_SESSION_VALID event
  1829. * so clear and disable BSV irq
  1830. */
  1831. if (ci->is_otg)
  1832. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1833. ci->vbus_active = 0;
  1834. if (ci->platdata->pins_device && ci->platdata->pins_default)
  1835. pinctrl_select_state(ci->platdata->pctl,
  1836. ci->platdata->pins_default);
  1837. }
  1838. /**
  1839. * ci_hdrc_gadget_init - initialize device related bits
  1840. * @ci: the controller
  1841. *
  1842. * This function initializes the gadget, if the device is "device capable".
  1843. */
  1844. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1845. {
  1846. struct ci_role_driver *rdrv;
  1847. int ret;
  1848. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1849. return -ENXIO;
  1850. rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
  1851. if (!rdrv)
  1852. return -ENOMEM;
  1853. rdrv->start = udc_id_switch_for_device;
  1854. rdrv->stop = udc_id_switch_for_host;
  1855. rdrv->irq = udc_irq;
  1856. rdrv->name = "gadget";
  1857. ret = udc_start(ci);
  1858. if (!ret)
  1859. ci->roles[CI_ROLE_GADGET] = rdrv;
  1860. return ret;
  1861. }