sunsu.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  4. *
  5. * Copyright (C) 1997 Eddie C. Dost ([email protected])
  6. * Copyright (C) 1998-1999 Pete Zaitcev ([email protected])
  7. *
  8. * This is mainly a variation of 8250.c, credits go to authors mentioned
  9. * therein. In fact this driver should be merged into the generic 8250.c
  10. * infrastructure perhaps using a 8250_sparc.c module.
  11. *
  12. * Fixed to use tty_get_baud_rate().
  13. * Theodore Ts'o <[email protected]>, 2001-Oct-12
  14. *
  15. * Converted to new 2.5.x UART layer.
  16. * David S. Miller ([email protected]), 2002-Jul-29
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/errno.h>
  22. #include <linux/tty.h>
  23. #include <linux/tty_flip.h>
  24. #include <linux/major.h>
  25. #include <linux/string.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/ioport.h>
  28. #include <linux/circ_buf.h>
  29. #include <linux/serial.h>
  30. #include <linux/sysrq.h>
  31. #include <linux/console.h>
  32. #include <linux/slab.h>
  33. #ifdef CONFIG_SERIO
  34. #include <linux/serio.h>
  35. #endif
  36. #include <linux/serial_reg.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/of_device.h>
  40. #include <linux/io.h>
  41. #include <asm/irq.h>
  42. #include <asm/prom.h>
  43. #include <asm/setup.h>
  44. #include <linux/serial_core.h>
  45. #include <linux/sunserialcore.h>
  46. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  47. * in a UART clock of 1.8462 MHz.
  48. */
  49. #define SU_BASE_BAUD (1846200 / 16)
  50. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  51. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  52. struct serial_uart_config {
  53. char *name;
  54. int dfl_xmit_fifo_size;
  55. int flags;
  56. };
  57. /*
  58. * Here we define the default xmit fifo size used for each type of UART.
  59. */
  60. static const struct serial_uart_config uart_config[] = {
  61. { "unknown", 1, 0 },
  62. { "8250", 1, 0 },
  63. { "16450", 1, 0 },
  64. { "16550", 1, 0 },
  65. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  66. { "Cirrus", 1, 0 },
  67. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  68. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  69. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  70. { "Startech", 1, 0 },
  71. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  73. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  74. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  75. };
  76. struct uart_sunsu_port {
  77. struct uart_port port;
  78. unsigned char acr;
  79. unsigned char ier;
  80. unsigned short rev;
  81. unsigned char lcr;
  82. unsigned int lsr_break_flag;
  83. unsigned int cflag;
  84. /* Probing information. */
  85. enum su_type su_type;
  86. unsigned int type_probed; /* XXX Stupid */
  87. unsigned long reg_size;
  88. #ifdef CONFIG_SERIO
  89. struct serio serio;
  90. int serio_open;
  91. #endif
  92. };
  93. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  94. {
  95. offset <<= up->port.regshift;
  96. switch (up->port.iotype) {
  97. case UPIO_HUB6:
  98. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  99. return inb(up->port.iobase + 1);
  100. case UPIO_MEM:
  101. return readb(up->port.membase + offset);
  102. default:
  103. return inb(up->port.iobase + offset);
  104. }
  105. }
  106. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  107. {
  108. #ifndef CONFIG_SPARC64
  109. /*
  110. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  111. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  112. * gate outputs a logical one. Since we use level triggered interrupts
  113. * we have lockup and watchdog reset. We cannot mask IRQ because
  114. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  115. * This problem is similar to what Alpha people suffer, see
  116. * 8250_alpha.c.
  117. */
  118. if (offset == UART_MCR)
  119. value |= UART_MCR_OUT2;
  120. #endif
  121. offset <<= up->port.regshift;
  122. switch (up->port.iotype) {
  123. case UPIO_HUB6:
  124. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  125. outb(value, up->port.iobase + 1);
  126. break;
  127. case UPIO_MEM:
  128. writeb(value, up->port.membase + offset);
  129. break;
  130. default:
  131. outb(value, up->port.iobase + offset);
  132. }
  133. }
  134. /*
  135. * We used to support using pause I/O for certain machines. We
  136. * haven't supported this for a while, but just in case it's badly
  137. * needed for certain old 386 machines, I've left these #define's
  138. * in....
  139. */
  140. #define serial_inp(up, offset) serial_in(up, offset)
  141. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  142. /*
  143. * For the 16C950
  144. */
  145. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  146. {
  147. serial_out(up, UART_SCR, offset);
  148. serial_out(up, UART_ICR, value);
  149. }
  150. #if 0 /* Unused currently */
  151. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  152. {
  153. unsigned int value;
  154. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  155. serial_out(up, UART_SCR, offset);
  156. value = serial_in(up, UART_ICR);
  157. serial_icr_write(up, UART_ACR, up->acr);
  158. return value;
  159. }
  160. #endif
  161. #ifdef CONFIG_SERIAL_8250_RSA
  162. /*
  163. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  164. * We set the port uart clock rate if we succeed.
  165. */
  166. static int __enable_rsa(struct uart_sunsu_port *up)
  167. {
  168. unsigned char mode;
  169. int result;
  170. mode = serial_inp(up, UART_RSA_MSR);
  171. result = mode & UART_RSA_MSR_FIFO;
  172. if (!result) {
  173. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  174. mode = serial_inp(up, UART_RSA_MSR);
  175. result = mode & UART_RSA_MSR_FIFO;
  176. }
  177. if (result)
  178. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  179. return result;
  180. }
  181. static void enable_rsa(struct uart_sunsu_port *up)
  182. {
  183. if (up->port.type == PORT_RSA) {
  184. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  185. spin_lock_irq(&up->port.lock);
  186. __enable_rsa(up);
  187. spin_unlock_irq(&up->port.lock);
  188. }
  189. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  190. serial_outp(up, UART_RSA_FRR, 0);
  191. }
  192. }
  193. /*
  194. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  195. * It is unknown why interrupts were disabled in here. However,
  196. * the caller is expected to preserve this behaviour by grabbing
  197. * the spinlock before calling this function.
  198. */
  199. static void disable_rsa(struct uart_sunsu_port *up)
  200. {
  201. unsigned char mode;
  202. int result;
  203. if (up->port.type == PORT_RSA &&
  204. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  205. spin_lock_irq(&up->port.lock);
  206. mode = serial_inp(up, UART_RSA_MSR);
  207. result = !(mode & UART_RSA_MSR_FIFO);
  208. if (!result) {
  209. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  210. mode = serial_inp(up, UART_RSA_MSR);
  211. result = !(mode & UART_RSA_MSR_FIFO);
  212. }
  213. if (result)
  214. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  215. spin_unlock_irq(&up->port.lock);
  216. }
  217. }
  218. #endif /* CONFIG_SERIAL_8250_RSA */
  219. static inline void __stop_tx(struct uart_sunsu_port *p)
  220. {
  221. if (p->ier & UART_IER_THRI) {
  222. p->ier &= ~UART_IER_THRI;
  223. serial_out(p, UART_IER, p->ier);
  224. }
  225. }
  226. static void sunsu_stop_tx(struct uart_port *port)
  227. {
  228. struct uart_sunsu_port *up =
  229. container_of(port, struct uart_sunsu_port, port);
  230. __stop_tx(up);
  231. /*
  232. * We really want to stop the transmitter from sending.
  233. */
  234. if (up->port.type == PORT_16C950) {
  235. up->acr |= UART_ACR_TXDIS;
  236. serial_icr_write(up, UART_ACR, up->acr);
  237. }
  238. }
  239. static void sunsu_start_tx(struct uart_port *port)
  240. {
  241. struct uart_sunsu_port *up =
  242. container_of(port, struct uart_sunsu_port, port);
  243. if (!(up->ier & UART_IER_THRI)) {
  244. up->ier |= UART_IER_THRI;
  245. serial_out(up, UART_IER, up->ier);
  246. }
  247. /*
  248. * Re-enable the transmitter if we disabled it.
  249. */
  250. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  251. up->acr &= ~UART_ACR_TXDIS;
  252. serial_icr_write(up, UART_ACR, up->acr);
  253. }
  254. }
  255. static void sunsu_stop_rx(struct uart_port *port)
  256. {
  257. struct uart_sunsu_port *up =
  258. container_of(port, struct uart_sunsu_port, port);
  259. up->ier &= ~UART_IER_RLSI;
  260. up->port.read_status_mask &= ~UART_LSR_DR;
  261. serial_out(up, UART_IER, up->ier);
  262. }
  263. static void sunsu_enable_ms(struct uart_port *port)
  264. {
  265. struct uart_sunsu_port *up =
  266. container_of(port, struct uart_sunsu_port, port);
  267. unsigned long flags;
  268. spin_lock_irqsave(&up->port.lock, flags);
  269. up->ier |= UART_IER_MSI;
  270. serial_out(up, UART_IER, up->ier);
  271. spin_unlock_irqrestore(&up->port.lock, flags);
  272. }
  273. static void
  274. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  275. {
  276. struct tty_port *port = &up->port.state->port;
  277. unsigned char ch, flag;
  278. int max_count = 256;
  279. int saw_console_brk = 0;
  280. do {
  281. ch = serial_inp(up, UART_RX);
  282. flag = TTY_NORMAL;
  283. up->port.icount.rx++;
  284. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  285. UART_LSR_FE | UART_LSR_OE))) {
  286. /*
  287. * For statistics only
  288. */
  289. if (*status & UART_LSR_BI) {
  290. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  291. up->port.icount.brk++;
  292. if (up->port.cons != NULL &&
  293. up->port.line == up->port.cons->index)
  294. saw_console_brk = 1;
  295. /*
  296. * We do the SysRQ and SAK checking
  297. * here because otherwise the break
  298. * may get masked by ignore_status_mask
  299. * or read_status_mask.
  300. */
  301. if (uart_handle_break(&up->port))
  302. goto ignore_char;
  303. } else if (*status & UART_LSR_PE)
  304. up->port.icount.parity++;
  305. else if (*status & UART_LSR_FE)
  306. up->port.icount.frame++;
  307. if (*status & UART_LSR_OE)
  308. up->port.icount.overrun++;
  309. /*
  310. * Mask off conditions which should be ingored.
  311. */
  312. *status &= up->port.read_status_mask;
  313. if (up->port.cons != NULL &&
  314. up->port.line == up->port.cons->index) {
  315. /* Recover the break flag from console xmit */
  316. *status |= up->lsr_break_flag;
  317. up->lsr_break_flag = 0;
  318. }
  319. if (*status & UART_LSR_BI) {
  320. flag = TTY_BREAK;
  321. } else if (*status & UART_LSR_PE)
  322. flag = TTY_PARITY;
  323. else if (*status & UART_LSR_FE)
  324. flag = TTY_FRAME;
  325. }
  326. if (uart_handle_sysrq_char(&up->port, ch))
  327. goto ignore_char;
  328. if ((*status & up->port.ignore_status_mask) == 0)
  329. tty_insert_flip_char(port, ch, flag);
  330. if (*status & UART_LSR_OE)
  331. /*
  332. * Overrun is special, since it's reported
  333. * immediately, and doesn't affect the current
  334. * character.
  335. */
  336. tty_insert_flip_char(port, 0, TTY_OVERRUN);
  337. ignore_char:
  338. *status = serial_inp(up, UART_LSR);
  339. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  340. if (saw_console_brk)
  341. sun_do_break();
  342. }
  343. static void transmit_chars(struct uart_sunsu_port *up)
  344. {
  345. struct circ_buf *xmit = &up->port.state->xmit;
  346. int count;
  347. if (up->port.x_char) {
  348. serial_outp(up, UART_TX, up->port.x_char);
  349. up->port.icount.tx++;
  350. up->port.x_char = 0;
  351. return;
  352. }
  353. if (uart_tx_stopped(&up->port)) {
  354. sunsu_stop_tx(&up->port);
  355. return;
  356. }
  357. if (uart_circ_empty(xmit)) {
  358. __stop_tx(up);
  359. return;
  360. }
  361. count = up->port.fifosize;
  362. do {
  363. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  364. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  365. up->port.icount.tx++;
  366. if (uart_circ_empty(xmit))
  367. break;
  368. } while (--count > 0);
  369. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  370. uart_write_wakeup(&up->port);
  371. if (uart_circ_empty(xmit))
  372. __stop_tx(up);
  373. }
  374. static void check_modem_status(struct uart_sunsu_port *up)
  375. {
  376. int status;
  377. status = serial_in(up, UART_MSR);
  378. if ((status & UART_MSR_ANY_DELTA) == 0)
  379. return;
  380. if (status & UART_MSR_TERI)
  381. up->port.icount.rng++;
  382. if (status & UART_MSR_DDSR)
  383. up->port.icount.dsr++;
  384. if (status & UART_MSR_DDCD)
  385. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  386. if (status & UART_MSR_DCTS)
  387. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  388. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  389. }
  390. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  391. {
  392. struct uart_sunsu_port *up = dev_id;
  393. unsigned long flags;
  394. unsigned char status;
  395. spin_lock_irqsave(&up->port.lock, flags);
  396. do {
  397. status = serial_inp(up, UART_LSR);
  398. if (status & UART_LSR_DR)
  399. receive_chars(up, &status);
  400. check_modem_status(up);
  401. if (status & UART_LSR_THRE)
  402. transmit_chars(up);
  403. tty_flip_buffer_push(&up->port.state->port);
  404. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  405. spin_unlock_irqrestore(&up->port.lock, flags);
  406. return IRQ_HANDLED;
  407. }
  408. /* Separate interrupt handling path for keyboard/mouse ports. */
  409. static void
  410. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  411. unsigned int iflag, unsigned int quot);
  412. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  413. {
  414. unsigned int cur_cflag = up->cflag;
  415. int quot, new_baud;
  416. up->cflag &= ~CBAUD;
  417. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  418. quot = up->port.uartclk / (16 * new_baud);
  419. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  420. }
  421. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  422. {
  423. do {
  424. unsigned char ch = serial_inp(up, UART_RX);
  425. /* Stop-A is handled by drivers/char/keyboard.c now. */
  426. if (up->su_type == SU_PORT_KBD) {
  427. #ifdef CONFIG_SERIO
  428. serio_interrupt(&up->serio, ch, 0);
  429. #endif
  430. } else if (up->su_type == SU_PORT_MS) {
  431. int ret = suncore_mouse_baud_detection(ch, is_break);
  432. switch (ret) {
  433. case 2:
  434. sunsu_change_mouse_baud(up);
  435. fallthrough;
  436. case 1:
  437. break;
  438. case 0:
  439. #ifdef CONFIG_SERIO
  440. serio_interrupt(&up->serio, ch, 0);
  441. #endif
  442. break;
  443. }
  444. }
  445. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  446. }
  447. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  448. {
  449. struct uart_sunsu_port *up = dev_id;
  450. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  451. unsigned char status = serial_inp(up, UART_LSR);
  452. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  453. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  454. }
  455. return IRQ_HANDLED;
  456. }
  457. static unsigned int sunsu_tx_empty(struct uart_port *port)
  458. {
  459. struct uart_sunsu_port *up =
  460. container_of(port, struct uart_sunsu_port, port);
  461. unsigned long flags;
  462. unsigned int ret;
  463. spin_lock_irqsave(&up->port.lock, flags);
  464. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  465. spin_unlock_irqrestore(&up->port.lock, flags);
  466. return ret;
  467. }
  468. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  469. {
  470. struct uart_sunsu_port *up =
  471. container_of(port, struct uart_sunsu_port, port);
  472. unsigned char status;
  473. unsigned int ret;
  474. status = serial_in(up, UART_MSR);
  475. ret = 0;
  476. if (status & UART_MSR_DCD)
  477. ret |= TIOCM_CAR;
  478. if (status & UART_MSR_RI)
  479. ret |= TIOCM_RNG;
  480. if (status & UART_MSR_DSR)
  481. ret |= TIOCM_DSR;
  482. if (status & UART_MSR_CTS)
  483. ret |= TIOCM_CTS;
  484. return ret;
  485. }
  486. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  487. {
  488. struct uart_sunsu_port *up =
  489. container_of(port, struct uart_sunsu_port, port);
  490. unsigned char mcr = 0;
  491. if (mctrl & TIOCM_RTS)
  492. mcr |= UART_MCR_RTS;
  493. if (mctrl & TIOCM_DTR)
  494. mcr |= UART_MCR_DTR;
  495. if (mctrl & TIOCM_OUT1)
  496. mcr |= UART_MCR_OUT1;
  497. if (mctrl & TIOCM_OUT2)
  498. mcr |= UART_MCR_OUT2;
  499. if (mctrl & TIOCM_LOOP)
  500. mcr |= UART_MCR_LOOP;
  501. serial_out(up, UART_MCR, mcr);
  502. }
  503. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  504. {
  505. struct uart_sunsu_port *up =
  506. container_of(port, struct uart_sunsu_port, port);
  507. unsigned long flags;
  508. spin_lock_irqsave(&up->port.lock, flags);
  509. if (break_state == -1)
  510. up->lcr |= UART_LCR_SBC;
  511. else
  512. up->lcr &= ~UART_LCR_SBC;
  513. serial_out(up, UART_LCR, up->lcr);
  514. spin_unlock_irqrestore(&up->port.lock, flags);
  515. }
  516. static int sunsu_startup(struct uart_port *port)
  517. {
  518. struct uart_sunsu_port *up =
  519. container_of(port, struct uart_sunsu_port, port);
  520. unsigned long flags;
  521. int retval;
  522. if (up->port.type == PORT_16C950) {
  523. /* Wake up and initialize UART */
  524. up->acr = 0;
  525. serial_outp(up, UART_LCR, 0xBF);
  526. serial_outp(up, UART_EFR, UART_EFR_ECB);
  527. serial_outp(up, UART_IER, 0);
  528. serial_outp(up, UART_LCR, 0);
  529. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  530. serial_outp(up, UART_LCR, 0xBF);
  531. serial_outp(up, UART_EFR, UART_EFR_ECB);
  532. serial_outp(up, UART_LCR, 0);
  533. }
  534. #ifdef CONFIG_SERIAL_8250_RSA
  535. /*
  536. * If this is an RSA port, see if we can kick it up to the
  537. * higher speed clock.
  538. */
  539. enable_rsa(up);
  540. #endif
  541. /*
  542. * Clear the FIFO buffers and disable them.
  543. * (they will be reenabled in set_termios())
  544. */
  545. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  546. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  547. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  548. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  549. serial_outp(up, UART_FCR, 0);
  550. }
  551. /*
  552. * Clear the interrupt registers.
  553. */
  554. (void) serial_inp(up, UART_LSR);
  555. (void) serial_inp(up, UART_RX);
  556. (void) serial_inp(up, UART_IIR);
  557. (void) serial_inp(up, UART_MSR);
  558. /*
  559. * At this point, there's no way the LSR could still be 0xff;
  560. * if it is, then bail out, because there's likely no UART
  561. * here.
  562. */
  563. if (!(up->port.flags & UPF_BUGGY_UART) &&
  564. (serial_inp(up, UART_LSR) == 0xff)) {
  565. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  566. return -ENODEV;
  567. }
  568. if (up->su_type != SU_PORT_PORT) {
  569. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  570. IRQF_SHARED, su_typev[up->su_type], up);
  571. } else {
  572. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  573. IRQF_SHARED, su_typev[up->su_type], up);
  574. }
  575. if (retval) {
  576. printk("su: Cannot register IRQ %d\n", up->port.irq);
  577. return retval;
  578. }
  579. /*
  580. * Now, initialize the UART
  581. */
  582. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  583. spin_lock_irqsave(&up->port.lock, flags);
  584. up->port.mctrl |= TIOCM_OUT2;
  585. sunsu_set_mctrl(&up->port, up->port.mctrl);
  586. spin_unlock_irqrestore(&up->port.lock, flags);
  587. /*
  588. * Finally, enable interrupts. Note: Modem status interrupts
  589. * are set via set_termios(), which will be occurring imminently
  590. * anyway, so we don't enable them here.
  591. */
  592. up->ier = UART_IER_RLSI | UART_IER_RDI;
  593. serial_outp(up, UART_IER, up->ier);
  594. if (up->port.flags & UPF_FOURPORT) {
  595. unsigned int icp;
  596. /*
  597. * Enable interrupts on the AST Fourport board
  598. */
  599. icp = (up->port.iobase & 0xfe0) | 0x01f;
  600. outb_p(0x80, icp);
  601. (void) inb_p(icp);
  602. }
  603. /*
  604. * And clear the interrupt registers again for luck.
  605. */
  606. (void) serial_inp(up, UART_LSR);
  607. (void) serial_inp(up, UART_RX);
  608. (void) serial_inp(up, UART_IIR);
  609. (void) serial_inp(up, UART_MSR);
  610. return 0;
  611. }
  612. static void sunsu_shutdown(struct uart_port *port)
  613. {
  614. struct uart_sunsu_port *up =
  615. container_of(port, struct uart_sunsu_port, port);
  616. unsigned long flags;
  617. /*
  618. * Disable interrupts from this port
  619. */
  620. up->ier = 0;
  621. serial_outp(up, UART_IER, 0);
  622. spin_lock_irqsave(&up->port.lock, flags);
  623. if (up->port.flags & UPF_FOURPORT) {
  624. /* reset interrupts on the AST Fourport board */
  625. inb((up->port.iobase & 0xfe0) | 0x1f);
  626. up->port.mctrl |= TIOCM_OUT1;
  627. } else
  628. up->port.mctrl &= ~TIOCM_OUT2;
  629. sunsu_set_mctrl(&up->port, up->port.mctrl);
  630. spin_unlock_irqrestore(&up->port.lock, flags);
  631. /*
  632. * Disable break condition and FIFOs
  633. */
  634. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  635. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  636. UART_FCR_CLEAR_RCVR |
  637. UART_FCR_CLEAR_XMIT);
  638. serial_outp(up, UART_FCR, 0);
  639. #ifdef CONFIG_SERIAL_8250_RSA
  640. /*
  641. * Reset the RSA board back to 115kbps compat mode.
  642. */
  643. disable_rsa(up);
  644. #endif
  645. /*
  646. * Read data port to reset things.
  647. */
  648. (void) serial_in(up, UART_RX);
  649. free_irq(up->port.irq, up);
  650. }
  651. static void
  652. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  653. unsigned int iflag, unsigned int quot)
  654. {
  655. struct uart_sunsu_port *up =
  656. container_of(port, struct uart_sunsu_port, port);
  657. unsigned char cval, fcr = 0;
  658. unsigned long flags;
  659. switch (cflag & CSIZE) {
  660. case CS5:
  661. cval = 0x00;
  662. break;
  663. case CS6:
  664. cval = 0x01;
  665. break;
  666. case CS7:
  667. cval = 0x02;
  668. break;
  669. default:
  670. case CS8:
  671. cval = 0x03;
  672. break;
  673. }
  674. if (cflag & CSTOPB)
  675. cval |= 0x04;
  676. if (cflag & PARENB)
  677. cval |= UART_LCR_PARITY;
  678. if (!(cflag & PARODD))
  679. cval |= UART_LCR_EPAR;
  680. if (cflag & CMSPAR)
  681. cval |= UART_LCR_SPAR;
  682. /*
  683. * Work around a bug in the Oxford Semiconductor 952 rev B
  684. * chip which causes it to seriously miscalculate baud rates
  685. * when DLL is 0.
  686. */
  687. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  688. up->rev == 0x5201)
  689. quot ++;
  690. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  691. if ((up->port.uartclk / quot) < (2400 * 16))
  692. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  693. #ifdef CONFIG_SERIAL_8250_RSA
  694. else if (up->port.type == PORT_RSA)
  695. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  696. #endif
  697. else
  698. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  699. }
  700. if (up->port.type == PORT_16750)
  701. fcr |= UART_FCR7_64BYTE;
  702. /*
  703. * Ok, we're now changing the port state. Do it with
  704. * interrupts disabled.
  705. */
  706. spin_lock_irqsave(&up->port.lock, flags);
  707. /*
  708. * Update the per-port timeout.
  709. */
  710. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  711. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  712. if (iflag & INPCK)
  713. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  714. if (iflag & (IGNBRK | BRKINT | PARMRK))
  715. up->port.read_status_mask |= UART_LSR_BI;
  716. /*
  717. * Characteres to ignore
  718. */
  719. up->port.ignore_status_mask = 0;
  720. if (iflag & IGNPAR)
  721. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  722. if (iflag & IGNBRK) {
  723. up->port.ignore_status_mask |= UART_LSR_BI;
  724. /*
  725. * If we're ignoring parity and break indicators,
  726. * ignore overruns too (for real raw support).
  727. */
  728. if (iflag & IGNPAR)
  729. up->port.ignore_status_mask |= UART_LSR_OE;
  730. }
  731. /*
  732. * ignore all characters if CREAD is not set
  733. */
  734. if ((cflag & CREAD) == 0)
  735. up->port.ignore_status_mask |= UART_LSR_DR;
  736. /*
  737. * CTS flow control flag and modem status interrupts
  738. */
  739. up->ier &= ~UART_IER_MSI;
  740. if (UART_ENABLE_MS(&up->port, cflag))
  741. up->ier |= UART_IER_MSI;
  742. serial_out(up, UART_IER, up->ier);
  743. if (uart_config[up->port.type].flags & UART_STARTECH) {
  744. serial_outp(up, UART_LCR, 0xBF);
  745. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  746. }
  747. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  748. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  749. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  750. if (up->port.type == PORT_16750)
  751. serial_outp(up, UART_FCR, fcr); /* set fcr */
  752. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  753. up->lcr = cval; /* Save LCR */
  754. if (up->port.type != PORT_16750) {
  755. if (fcr & UART_FCR_ENABLE_FIFO) {
  756. /* emulated UARTs (Lucent Venus 167x) need two steps */
  757. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  758. }
  759. serial_outp(up, UART_FCR, fcr); /* set fcr */
  760. }
  761. up->cflag = cflag;
  762. spin_unlock_irqrestore(&up->port.lock, flags);
  763. }
  764. static void
  765. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  766. const struct ktermios *old)
  767. {
  768. unsigned int baud, quot;
  769. /*
  770. * Ask the core to calculate the divisor for us.
  771. */
  772. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  773. quot = uart_get_divisor(port, baud);
  774. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  775. }
  776. static void sunsu_release_port(struct uart_port *port)
  777. {
  778. }
  779. static int sunsu_request_port(struct uart_port *port)
  780. {
  781. return 0;
  782. }
  783. static void sunsu_config_port(struct uart_port *port, int flags)
  784. {
  785. struct uart_sunsu_port *up =
  786. container_of(port, struct uart_sunsu_port, port);
  787. if (flags & UART_CONFIG_TYPE) {
  788. /*
  789. * We are supposed to call autoconfig here, but this requires
  790. * splitting all the OBP probing crap from the UART probing.
  791. * We'll do it when we kill sunsu.c altogether.
  792. */
  793. port->type = up->type_probed; /* XXX */
  794. }
  795. }
  796. static int
  797. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  798. {
  799. return -EINVAL;
  800. }
  801. static const char *
  802. sunsu_type(struct uart_port *port)
  803. {
  804. int type = port->type;
  805. if (type >= ARRAY_SIZE(uart_config))
  806. type = 0;
  807. return uart_config[type].name;
  808. }
  809. static const struct uart_ops sunsu_pops = {
  810. .tx_empty = sunsu_tx_empty,
  811. .set_mctrl = sunsu_set_mctrl,
  812. .get_mctrl = sunsu_get_mctrl,
  813. .stop_tx = sunsu_stop_tx,
  814. .start_tx = sunsu_start_tx,
  815. .stop_rx = sunsu_stop_rx,
  816. .enable_ms = sunsu_enable_ms,
  817. .break_ctl = sunsu_break_ctl,
  818. .startup = sunsu_startup,
  819. .shutdown = sunsu_shutdown,
  820. .set_termios = sunsu_set_termios,
  821. .type = sunsu_type,
  822. .release_port = sunsu_release_port,
  823. .request_port = sunsu_request_port,
  824. .config_port = sunsu_config_port,
  825. .verify_port = sunsu_verify_port,
  826. };
  827. #define UART_NR 4
  828. static struct uart_sunsu_port sunsu_ports[UART_NR];
  829. static int nr_inst; /* Number of already registered ports */
  830. #ifdef CONFIG_SERIO
  831. static DEFINE_SPINLOCK(sunsu_serio_lock);
  832. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  833. {
  834. struct uart_sunsu_port *up = serio->port_data;
  835. unsigned long flags;
  836. int lsr;
  837. spin_lock_irqsave(&sunsu_serio_lock, flags);
  838. do {
  839. lsr = serial_in(up, UART_LSR);
  840. } while (!(lsr & UART_LSR_THRE));
  841. /* Send the character out. */
  842. serial_out(up, UART_TX, ch);
  843. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  844. return 0;
  845. }
  846. static int sunsu_serio_open(struct serio *serio)
  847. {
  848. struct uart_sunsu_port *up = serio->port_data;
  849. unsigned long flags;
  850. int ret;
  851. spin_lock_irqsave(&sunsu_serio_lock, flags);
  852. if (!up->serio_open) {
  853. up->serio_open = 1;
  854. ret = 0;
  855. } else
  856. ret = -EBUSY;
  857. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  858. return ret;
  859. }
  860. static void sunsu_serio_close(struct serio *serio)
  861. {
  862. struct uart_sunsu_port *up = serio->port_data;
  863. unsigned long flags;
  864. spin_lock_irqsave(&sunsu_serio_lock, flags);
  865. up->serio_open = 0;
  866. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  867. }
  868. #endif /* CONFIG_SERIO */
  869. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  870. {
  871. unsigned char status1, status2, scratch, scratch2, scratch3;
  872. unsigned char save_lcr, save_mcr;
  873. unsigned long flags;
  874. if (up->su_type == SU_PORT_NONE)
  875. return;
  876. up->type_probed = PORT_UNKNOWN;
  877. up->port.iotype = UPIO_MEM;
  878. spin_lock_irqsave(&up->port.lock, flags);
  879. if (!(up->port.flags & UPF_BUGGY_UART)) {
  880. /*
  881. * Do a simple existence test first; if we fail this, there's
  882. * no point trying anything else.
  883. *
  884. * 0x80 is used as a nonsense port to prevent against false
  885. * positives due to ISA bus float. The assumption is that
  886. * 0x80 is a non-existent port; which should be safe since
  887. * include/asm/io.h also makes this assumption.
  888. */
  889. scratch = serial_inp(up, UART_IER);
  890. serial_outp(up, UART_IER, 0);
  891. #ifdef __i386__
  892. outb(0xff, 0x080);
  893. #endif
  894. scratch2 = serial_inp(up, UART_IER);
  895. serial_outp(up, UART_IER, 0x0f);
  896. #ifdef __i386__
  897. outb(0, 0x080);
  898. #endif
  899. scratch3 = serial_inp(up, UART_IER);
  900. serial_outp(up, UART_IER, scratch);
  901. if (scratch2 != 0 || scratch3 != 0x0F)
  902. goto out; /* We failed; there's nothing here */
  903. }
  904. save_mcr = serial_in(up, UART_MCR);
  905. save_lcr = serial_in(up, UART_LCR);
  906. /*
  907. * Check to see if a UART is really there. Certain broken
  908. * internal modems based on the Rockwell chipset fail this
  909. * test, because they apparently don't implement the loopback
  910. * test mode. So this test is skipped on the COM 1 through
  911. * COM 4 ports. This *should* be safe, since no board
  912. * manufacturer would be stupid enough to design a board
  913. * that conflicts with COM 1-4 --- we hope!
  914. */
  915. if (!(up->port.flags & UPF_SKIP_TEST)) {
  916. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  917. status1 = serial_inp(up, UART_MSR) & 0xF0;
  918. serial_outp(up, UART_MCR, save_mcr);
  919. if (status1 != 0x90)
  920. goto out; /* We failed loopback test */
  921. }
  922. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  923. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  924. serial_outp(up, UART_LCR, 0);
  925. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  926. scratch = serial_in(up, UART_IIR) >> 6;
  927. switch (scratch) {
  928. case 0:
  929. up->port.type = PORT_16450;
  930. break;
  931. case 1:
  932. up->port.type = PORT_UNKNOWN;
  933. break;
  934. case 2:
  935. up->port.type = PORT_16550;
  936. break;
  937. case 3:
  938. up->port.type = PORT_16550A;
  939. break;
  940. }
  941. if (up->port.type == PORT_16550A) {
  942. /* Check for Startech UART's */
  943. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  944. if (serial_in(up, UART_EFR) == 0) {
  945. up->port.type = PORT_16650;
  946. } else {
  947. serial_outp(up, UART_LCR, 0xBF);
  948. if (serial_in(up, UART_EFR) == 0)
  949. up->port.type = PORT_16650V2;
  950. }
  951. }
  952. if (up->port.type == PORT_16550A) {
  953. /* Check for TI 16750 */
  954. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  955. serial_outp(up, UART_FCR,
  956. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  957. scratch = serial_in(up, UART_IIR) >> 5;
  958. if (scratch == 7) {
  959. /*
  960. * If this is a 16750, and not a cheap UART
  961. * clone, then it should only go into 64 byte
  962. * mode if the UART_FCR7_64BYTE bit was set
  963. * while UART_LCR_DLAB was latched.
  964. */
  965. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  966. serial_outp(up, UART_LCR, 0);
  967. serial_outp(up, UART_FCR,
  968. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  969. scratch = serial_in(up, UART_IIR) >> 5;
  970. if (scratch == 6)
  971. up->port.type = PORT_16750;
  972. }
  973. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  974. }
  975. serial_outp(up, UART_LCR, save_lcr);
  976. if (up->port.type == PORT_16450) {
  977. scratch = serial_in(up, UART_SCR);
  978. serial_outp(up, UART_SCR, 0xa5);
  979. status1 = serial_in(up, UART_SCR);
  980. serial_outp(up, UART_SCR, 0x5a);
  981. status2 = serial_in(up, UART_SCR);
  982. serial_outp(up, UART_SCR, scratch);
  983. if ((status1 != 0xa5) || (status2 != 0x5a))
  984. up->port.type = PORT_8250;
  985. }
  986. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  987. if (up->port.type == PORT_UNKNOWN)
  988. goto out;
  989. up->type_probed = up->port.type; /* XXX */
  990. /*
  991. * Reset the UART.
  992. */
  993. #ifdef CONFIG_SERIAL_8250_RSA
  994. if (up->port.type == PORT_RSA)
  995. serial_outp(up, UART_RSA_FRR, 0);
  996. #endif
  997. serial_outp(up, UART_MCR, save_mcr);
  998. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  999. UART_FCR_CLEAR_RCVR |
  1000. UART_FCR_CLEAR_XMIT));
  1001. serial_outp(up, UART_FCR, 0);
  1002. (void)serial_in(up, UART_RX);
  1003. serial_outp(up, UART_IER, 0);
  1004. out:
  1005. spin_unlock_irqrestore(&up->port.lock, flags);
  1006. }
  1007. static struct uart_driver sunsu_reg = {
  1008. .owner = THIS_MODULE,
  1009. .driver_name = "sunsu",
  1010. .dev_name = "ttyS",
  1011. .major = TTY_MAJOR,
  1012. };
  1013. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1014. {
  1015. int quot, baud;
  1016. #ifdef CONFIG_SERIO
  1017. struct serio *serio;
  1018. #endif
  1019. if (up->su_type == SU_PORT_KBD) {
  1020. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1021. baud = 1200;
  1022. } else {
  1023. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1024. baud = 4800;
  1025. }
  1026. quot = up->port.uartclk / (16 * baud);
  1027. sunsu_autoconfig(up);
  1028. if (up->port.type == PORT_UNKNOWN)
  1029. return -ENODEV;
  1030. printk("%pOF: %s port at %llx, irq %u\n",
  1031. up->port.dev->of_node,
  1032. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1033. (unsigned long long) up->port.mapbase,
  1034. up->port.irq);
  1035. #ifdef CONFIG_SERIO
  1036. serio = &up->serio;
  1037. serio->port_data = up;
  1038. serio->id.type = SERIO_RS232;
  1039. if (up->su_type == SU_PORT_KBD) {
  1040. serio->id.proto = SERIO_SUNKBD;
  1041. strscpy(serio->name, "sukbd", sizeof(serio->name));
  1042. } else {
  1043. serio->id.proto = SERIO_SUN;
  1044. serio->id.extra = 1;
  1045. strscpy(serio->name, "sums", sizeof(serio->name));
  1046. }
  1047. strscpy(serio->phys,
  1048. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1049. sizeof(serio->phys));
  1050. serio->write = sunsu_serio_write;
  1051. serio->open = sunsu_serio_open;
  1052. serio->close = sunsu_serio_close;
  1053. serio->dev.parent = up->port.dev;
  1054. serio_register_port(serio);
  1055. #endif
  1056. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1057. sunsu_startup(&up->port);
  1058. return 0;
  1059. }
  1060. /*
  1061. * ------------------------------------------------------------
  1062. * Serial console driver
  1063. * ------------------------------------------------------------
  1064. */
  1065. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1066. /*
  1067. * Wait for transmitter & holding register to empty
  1068. */
  1069. static void wait_for_xmitr(struct uart_sunsu_port *up)
  1070. {
  1071. unsigned int status, tmout = 10000;
  1072. /* Wait up to 10ms for the character(s) to be sent. */
  1073. do {
  1074. status = serial_in(up, UART_LSR);
  1075. if (status & UART_LSR_BI)
  1076. up->lsr_break_flag = UART_LSR_BI;
  1077. if (--tmout == 0)
  1078. break;
  1079. udelay(1);
  1080. } while (!uart_lsr_tx_empty(status));
  1081. /* Wait up to 1s for flow control if necessary */
  1082. if (up->port.flags & UPF_CONS_FLOW) {
  1083. tmout = 1000000;
  1084. while (--tmout &&
  1085. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1086. udelay(1);
  1087. }
  1088. }
  1089. static void sunsu_console_putchar(struct uart_port *port, unsigned char ch)
  1090. {
  1091. struct uart_sunsu_port *up =
  1092. container_of(port, struct uart_sunsu_port, port);
  1093. wait_for_xmitr(up);
  1094. serial_out(up, UART_TX, ch);
  1095. }
  1096. /*
  1097. * Print a string to the serial port trying not to disturb
  1098. * any possible real use of the port...
  1099. */
  1100. static void sunsu_console_write(struct console *co, const char *s,
  1101. unsigned int count)
  1102. {
  1103. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1104. unsigned long flags;
  1105. unsigned int ier;
  1106. int locked = 1;
  1107. if (up->port.sysrq || oops_in_progress)
  1108. locked = spin_trylock_irqsave(&up->port.lock, flags);
  1109. else
  1110. spin_lock_irqsave(&up->port.lock, flags);
  1111. /*
  1112. * First save the UER then disable the interrupts
  1113. */
  1114. ier = serial_in(up, UART_IER);
  1115. serial_out(up, UART_IER, 0);
  1116. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1117. /*
  1118. * Finally, wait for transmitter to become empty
  1119. * and restore the IER
  1120. */
  1121. wait_for_xmitr(up);
  1122. serial_out(up, UART_IER, ier);
  1123. if (locked)
  1124. spin_unlock_irqrestore(&up->port.lock, flags);
  1125. }
  1126. /*
  1127. * Setup initial baud/bits/parity. We do two things here:
  1128. * - construct a cflag setting for the first su_open()
  1129. * - initialize the serial port
  1130. * Return non-zero if we didn't find a serial port.
  1131. */
  1132. static int __init sunsu_console_setup(struct console *co, char *options)
  1133. {
  1134. static struct ktermios dummy;
  1135. struct ktermios termios;
  1136. struct uart_port *port;
  1137. printk("Console: ttyS%d (SU)\n",
  1138. (sunsu_reg.minor - 64) + co->index);
  1139. if (co->index > nr_inst)
  1140. return -ENODEV;
  1141. port = &sunsu_ports[co->index].port;
  1142. /*
  1143. * Temporary fix.
  1144. */
  1145. spin_lock_init(&port->lock);
  1146. /* Get firmware console settings. */
  1147. sunserial_console_termios(co, port->dev->of_node);
  1148. memset(&termios, 0, sizeof(struct ktermios));
  1149. termios.c_cflag = co->cflag;
  1150. port->mctrl |= TIOCM_DTR;
  1151. port->ops->set_termios(port, &termios, &dummy);
  1152. return 0;
  1153. }
  1154. static struct console sunsu_console = {
  1155. .name = "ttyS",
  1156. .write = sunsu_console_write,
  1157. .device = uart_console_device,
  1158. .setup = sunsu_console_setup,
  1159. .flags = CON_PRINTBUFFER,
  1160. .index = -1,
  1161. .data = &sunsu_reg,
  1162. };
  1163. /*
  1164. * Register console.
  1165. */
  1166. static inline struct console *SUNSU_CONSOLE(void)
  1167. {
  1168. return &sunsu_console;
  1169. }
  1170. #else
  1171. #define SUNSU_CONSOLE() (NULL)
  1172. #define sunsu_serial_console_init() do { } while (0)
  1173. #endif
  1174. static enum su_type su_get_type(struct device_node *dp)
  1175. {
  1176. struct device_node *ap = of_find_node_by_path("/aliases");
  1177. enum su_type rc = SU_PORT_PORT;
  1178. if (ap) {
  1179. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1180. const char *ms = of_get_property(ap, "mouse", NULL);
  1181. struct device_node *match;
  1182. if (keyb) {
  1183. match = of_find_node_by_path(keyb);
  1184. /*
  1185. * The pointer is used as an identifier not
  1186. * as a pointer, we can drop the refcount on
  1187. * the of__node immediately after getting it.
  1188. */
  1189. of_node_put(match);
  1190. if (dp == match) {
  1191. rc = SU_PORT_KBD;
  1192. goto out;
  1193. }
  1194. }
  1195. if (ms) {
  1196. match = of_find_node_by_path(ms);
  1197. of_node_put(match);
  1198. if (dp == match) {
  1199. rc = SU_PORT_MS;
  1200. goto out;
  1201. }
  1202. }
  1203. }
  1204. out:
  1205. of_node_put(ap);
  1206. return rc;
  1207. }
  1208. static int su_probe(struct platform_device *op)
  1209. {
  1210. struct device_node *dp = op->dev.of_node;
  1211. struct uart_sunsu_port *up;
  1212. struct resource *rp;
  1213. enum su_type type;
  1214. bool ignore_line;
  1215. int err;
  1216. type = su_get_type(dp);
  1217. if (type == SU_PORT_PORT) {
  1218. if (nr_inst >= UART_NR)
  1219. return -EINVAL;
  1220. up = &sunsu_ports[nr_inst];
  1221. } else {
  1222. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1223. if (!up)
  1224. return -ENOMEM;
  1225. }
  1226. up->port.line = nr_inst;
  1227. spin_lock_init(&up->port.lock);
  1228. up->su_type = type;
  1229. rp = &op->resource[0];
  1230. up->port.mapbase = rp->start;
  1231. up->reg_size = resource_size(rp);
  1232. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1233. if (!up->port.membase) {
  1234. if (type != SU_PORT_PORT)
  1235. kfree(up);
  1236. return -ENOMEM;
  1237. }
  1238. up->port.irq = op->archdata.irqs[0];
  1239. up->port.dev = &op->dev;
  1240. up->port.type = PORT_UNKNOWN;
  1241. up->port.uartclk = (SU_BASE_BAUD * 16);
  1242. up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
  1243. err = 0;
  1244. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1245. err = sunsu_kbd_ms_init(up);
  1246. if (err) {
  1247. of_iounmap(&op->resource[0],
  1248. up->port.membase, up->reg_size);
  1249. kfree(up);
  1250. return err;
  1251. }
  1252. platform_set_drvdata(op, up);
  1253. nr_inst++;
  1254. return 0;
  1255. }
  1256. up->port.flags |= UPF_BOOT_AUTOCONF;
  1257. sunsu_autoconfig(up);
  1258. err = -ENODEV;
  1259. if (up->port.type == PORT_UNKNOWN)
  1260. goto out_unmap;
  1261. up->port.ops = &sunsu_pops;
  1262. ignore_line = false;
  1263. if (of_node_name_eq(dp, "rsc-console") ||
  1264. of_node_name_eq(dp, "lom-console"))
  1265. ignore_line = true;
  1266. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1267. &sunsu_reg, up->port.line,
  1268. ignore_line);
  1269. err = uart_add_one_port(&sunsu_reg, &up->port);
  1270. if (err)
  1271. goto out_unmap;
  1272. platform_set_drvdata(op, up);
  1273. nr_inst++;
  1274. return 0;
  1275. out_unmap:
  1276. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1277. kfree(up);
  1278. return err;
  1279. }
  1280. static int su_remove(struct platform_device *op)
  1281. {
  1282. struct uart_sunsu_port *up = platform_get_drvdata(op);
  1283. bool kbdms = false;
  1284. if (up->su_type == SU_PORT_MS ||
  1285. up->su_type == SU_PORT_KBD)
  1286. kbdms = true;
  1287. if (kbdms) {
  1288. #ifdef CONFIG_SERIO
  1289. serio_unregister_port(&up->serio);
  1290. #endif
  1291. } else if (up->port.type != PORT_UNKNOWN)
  1292. uart_remove_one_port(&sunsu_reg, &up->port);
  1293. if (up->port.membase)
  1294. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1295. if (kbdms)
  1296. kfree(up);
  1297. return 0;
  1298. }
  1299. static const struct of_device_id su_match[] = {
  1300. {
  1301. .name = "su",
  1302. },
  1303. {
  1304. .name = "su_pnp",
  1305. },
  1306. {
  1307. .name = "serial",
  1308. .compatible = "su",
  1309. },
  1310. {
  1311. .type = "serial",
  1312. .compatible = "su",
  1313. },
  1314. {},
  1315. };
  1316. MODULE_DEVICE_TABLE(of, su_match);
  1317. static struct platform_driver su_driver = {
  1318. .driver = {
  1319. .name = "su",
  1320. .of_match_table = su_match,
  1321. },
  1322. .probe = su_probe,
  1323. .remove = su_remove,
  1324. };
  1325. static int __init sunsu_init(void)
  1326. {
  1327. struct device_node *dp;
  1328. int err;
  1329. int num_uart = 0;
  1330. for_each_node_by_name(dp, "su") {
  1331. if (su_get_type(dp) == SU_PORT_PORT)
  1332. num_uart++;
  1333. }
  1334. for_each_node_by_name(dp, "su_pnp") {
  1335. if (su_get_type(dp) == SU_PORT_PORT)
  1336. num_uart++;
  1337. }
  1338. for_each_node_by_name(dp, "serial") {
  1339. if (of_device_is_compatible(dp, "su")) {
  1340. if (su_get_type(dp) == SU_PORT_PORT)
  1341. num_uart++;
  1342. }
  1343. }
  1344. for_each_node_by_type(dp, "serial") {
  1345. if (of_device_is_compatible(dp, "su")) {
  1346. if (su_get_type(dp) == SU_PORT_PORT)
  1347. num_uart++;
  1348. }
  1349. }
  1350. if (num_uart) {
  1351. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1352. if (err)
  1353. return err;
  1354. }
  1355. err = platform_driver_register(&su_driver);
  1356. if (err && num_uart)
  1357. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1358. return err;
  1359. }
  1360. static void __exit sunsu_exit(void)
  1361. {
  1362. platform_driver_unregister(&su_driver);
  1363. if (sunsu_reg.nr)
  1364. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1365. }
  1366. module_init(sunsu_init);
  1367. module_exit(sunsu_exit);
  1368. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1369. MODULE_DESCRIPTION("Sun SU serial port driver");
  1370. MODULE_VERSION("2.0");
  1371. MODULE_LICENSE("GPL");