dz.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dz.c: Serial port driver for DECstations equipped
  4. * with the DZ chipset.
  5. *
  6. * Copyright (C) 1998 Olivier A. D. Lebaillif
  7. *
  8. * Email: [email protected]
  9. *
  10. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  11. *
  12. * [31-AUG-98] triemer
  13. * Changed IRQ to use Harald's dec internals interrupts.h
  14. * removed base_addr code - moving address assignment to setup.c
  15. * Changed name of dz_init to rs_init to be consistent with tc code
  16. * [13-NOV-98] triemer fixed code to receive characters
  17. * after patches by harald to irq code.
  18. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  19. * field from "current" - somewhere between 2.1.121 and 2.1.131
  20. Qua Jun 27 15:02:26 BRT 2001
  21. * [27-JUN-2001] Arnaldo Carvalho de Melo <[email protected]> - cleanups
  22. *
  23. * Parts (C) 1999 David Airlie, [email protected]
  24. * [07-SEP-99] Bugfixes
  25. *
  26. * [06-Jan-2002] Russell King <[email protected]>
  27. * Converted to new serial core
  28. */
  29. #undef DEBUG_DZ
  30. #include <linux/bitops.h>
  31. #include <linux/compiler.h>
  32. #include <linux/console.h>
  33. #include <linux/delay.h>
  34. #include <linux/errno.h>
  35. #include <linux/init.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/ioport.h>
  38. #include <linux/kernel.h>
  39. #include <linux/major.h>
  40. #include <linux/module.h>
  41. #include <linux/serial.h>
  42. #include <linux/serial_core.h>
  43. #include <linux/sysrq.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/atomic.h>
  47. #include <linux/io.h>
  48. #include <asm/bootinfo.h>
  49. #include <asm/dec/interrupts.h>
  50. #include <asm/dec/kn01.h>
  51. #include <asm/dec/kn02.h>
  52. #include <asm/dec/machtype.h>
  53. #include <asm/dec/prom.h>
  54. #include <asm/dec/system.h>
  55. #include "dz.h"
  56. MODULE_DESCRIPTION("DECstation DZ serial driver");
  57. MODULE_LICENSE("GPL");
  58. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  59. static char dz_version[] __initdata = "1.04";
  60. struct dz_port {
  61. struct dz_mux *mux;
  62. struct uart_port port;
  63. unsigned int cflag;
  64. };
  65. struct dz_mux {
  66. struct dz_port dport[DZ_NB_PORT];
  67. atomic_t map_guard;
  68. atomic_t irq_guard;
  69. int initialised;
  70. };
  71. static struct dz_mux dz_mux;
  72. static inline struct dz_port *to_dport(struct uart_port *uport)
  73. {
  74. return container_of(uport, struct dz_port, port);
  75. }
  76. /*
  77. * ------------------------------------------------------------
  78. * dz_in () and dz_out ()
  79. *
  80. * These routines are used to access the registers of the DZ
  81. * chip, hiding relocation differences between implementation.
  82. * ------------------------------------------------------------
  83. */
  84. static u16 dz_in(struct dz_port *dport, unsigned offset)
  85. {
  86. void __iomem *addr = dport->port.membase + offset;
  87. return readw(addr);
  88. }
  89. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  90. {
  91. void __iomem *addr = dport->port.membase + offset;
  92. writew(value, addr);
  93. }
  94. /*
  95. * ------------------------------------------------------------
  96. * rs_stop () and rs_start ()
  97. *
  98. * These routines are called before setting or resetting
  99. * tty->flow.stopped. They enable or disable transmitter interrupts,
  100. * as necessary.
  101. * ------------------------------------------------------------
  102. */
  103. static void dz_stop_tx(struct uart_port *uport)
  104. {
  105. struct dz_port *dport = to_dport(uport);
  106. u16 tmp, mask = 1 << dport->port.line;
  107. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  108. tmp &= ~mask; /* clear the TX flag */
  109. dz_out(dport, DZ_TCR, tmp);
  110. }
  111. static void dz_start_tx(struct uart_port *uport)
  112. {
  113. struct dz_port *dport = to_dport(uport);
  114. u16 tmp, mask = 1 << dport->port.line;
  115. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  116. tmp |= mask; /* set the TX flag */
  117. dz_out(dport, DZ_TCR, tmp);
  118. }
  119. static void dz_stop_rx(struct uart_port *uport)
  120. {
  121. struct dz_port *dport = to_dport(uport);
  122. dport->cflag &= ~DZ_RXENAB;
  123. dz_out(dport, DZ_LPR, dport->cflag);
  124. }
  125. /*
  126. * ------------------------------------------------------------
  127. *
  128. * Here start the interrupt handling routines. All of the following
  129. * subroutines are declared as inline and are folded into
  130. * dz_interrupt. They were separated out for readability's sake.
  131. *
  132. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  133. * runs with interrupts turned off. People who may want to modify
  134. * dz_interrupt() should try to keep the interrupt handler as fast as
  135. * possible. After you are done making modifications, it is not a bad
  136. * idea to do:
  137. *
  138. * make drivers/serial/dz.s
  139. *
  140. * and look at the resulting assemble code in dz.s.
  141. *
  142. * ------------------------------------------------------------
  143. */
  144. /*
  145. * ------------------------------------------------------------
  146. * receive_char ()
  147. *
  148. * This routine deals with inputs from any lines.
  149. * ------------------------------------------------------------
  150. */
  151. static inline void dz_receive_chars(struct dz_mux *mux)
  152. {
  153. struct uart_port *uport;
  154. struct dz_port *dport = &mux->dport[0];
  155. struct uart_icount *icount;
  156. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  157. unsigned char ch, flag;
  158. u16 status;
  159. int i;
  160. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  161. dport = &mux->dport[LINE(status)];
  162. uport = &dport->port;
  163. ch = UCHAR(status); /* grab the char */
  164. flag = TTY_NORMAL;
  165. icount = &uport->icount;
  166. icount->rx++;
  167. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  168. /*
  169. * There is no separate BREAK status bit, so treat
  170. * null characters with framing errors as BREAKs;
  171. * normally, otherwise. For this move the Framing
  172. * Error bit to a simulated BREAK bit.
  173. */
  174. if (!ch) {
  175. status |= (status & DZ_FERR) >>
  176. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  177. status &= ~DZ_FERR;
  178. }
  179. /* Handle SysRq/SAK & keep track of the statistics. */
  180. if (status & DZ_BREAK) {
  181. icount->brk++;
  182. if (uart_handle_break(uport))
  183. continue;
  184. } else if (status & DZ_FERR)
  185. icount->frame++;
  186. else if (status & DZ_PERR)
  187. icount->parity++;
  188. if (status & DZ_OERR)
  189. icount->overrun++;
  190. status &= uport->read_status_mask;
  191. if (status & DZ_BREAK)
  192. flag = TTY_BREAK;
  193. else if (status & DZ_FERR)
  194. flag = TTY_FRAME;
  195. else if (status & DZ_PERR)
  196. flag = TTY_PARITY;
  197. }
  198. if (uart_handle_sysrq_char(uport, ch))
  199. continue;
  200. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  201. lines_rx[LINE(status)] = 1;
  202. }
  203. for (i = 0; i < DZ_NB_PORT; i++)
  204. if (lines_rx[i])
  205. tty_flip_buffer_push(&mux->dport[i].port.state->port);
  206. }
  207. /*
  208. * ------------------------------------------------------------
  209. * transmit_char ()
  210. *
  211. * This routine deals with outputs to any lines.
  212. * ------------------------------------------------------------
  213. */
  214. static inline void dz_transmit_chars(struct dz_mux *mux)
  215. {
  216. struct dz_port *dport = &mux->dport[0];
  217. struct circ_buf *xmit;
  218. unsigned char tmp;
  219. u16 status;
  220. status = dz_in(dport, DZ_CSR);
  221. dport = &mux->dport[LINE(status)];
  222. xmit = &dport->port.state->xmit;
  223. if (dport->port.x_char) { /* XON/XOFF chars */
  224. dz_out(dport, DZ_TDR, dport->port.x_char);
  225. dport->port.icount.tx++;
  226. dport->port.x_char = 0;
  227. return;
  228. }
  229. /* If nothing to do or stopped or hardware stopped. */
  230. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  231. spin_lock(&dport->port.lock);
  232. dz_stop_tx(&dport->port);
  233. spin_unlock(&dport->port.lock);
  234. return;
  235. }
  236. /*
  237. * If something to do... (remember the dz has no output fifo,
  238. * so we go one char at a time) :-<
  239. */
  240. tmp = xmit->buf[xmit->tail];
  241. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  242. dz_out(dport, DZ_TDR, tmp);
  243. dport->port.icount.tx++;
  244. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  245. uart_write_wakeup(&dport->port);
  246. /* Are we are done. */
  247. if (uart_circ_empty(xmit)) {
  248. spin_lock(&dport->port.lock);
  249. dz_stop_tx(&dport->port);
  250. spin_unlock(&dport->port.lock);
  251. }
  252. }
  253. /*
  254. * ------------------------------------------------------------
  255. * check_modem_status()
  256. *
  257. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  258. * DS 5000/200: Valid for the MODEM and PRINTER line.
  259. * ------------------------------------------------------------
  260. */
  261. static inline void check_modem_status(struct dz_port *dport)
  262. {
  263. /*
  264. * FIXME:
  265. * 1. No status change interrupt; use a timer.
  266. * 2. Handle the 3100/5000 as appropriate. --macro
  267. */
  268. u16 status;
  269. /* If not the modem line just return. */
  270. if (dport->port.line != DZ_MODEM)
  271. return;
  272. status = dz_in(dport, DZ_MSR);
  273. /* it's easy, since DSR2 is the only bit in the register */
  274. if (status)
  275. dport->port.icount.dsr++;
  276. }
  277. /*
  278. * ------------------------------------------------------------
  279. * dz_interrupt ()
  280. *
  281. * this is the main interrupt routine for the DZ chip.
  282. * It deals with the multiple ports.
  283. * ------------------------------------------------------------
  284. */
  285. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  286. {
  287. struct dz_mux *mux = dev_id;
  288. struct dz_port *dport = &mux->dport[0];
  289. u16 status;
  290. /* get the reason why we just got an irq */
  291. status = dz_in(dport, DZ_CSR);
  292. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  293. dz_receive_chars(mux);
  294. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  295. dz_transmit_chars(mux);
  296. return IRQ_HANDLED;
  297. }
  298. /*
  299. * -------------------------------------------------------------------
  300. * Here ends the DZ interrupt routines.
  301. * -------------------------------------------------------------------
  302. */
  303. static unsigned int dz_get_mctrl(struct uart_port *uport)
  304. {
  305. /*
  306. * FIXME: Handle the 3100/5000 as appropriate. --macro
  307. */
  308. struct dz_port *dport = to_dport(uport);
  309. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  310. if (dport->port.line == DZ_MODEM) {
  311. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  312. mctrl &= ~TIOCM_DSR;
  313. }
  314. return mctrl;
  315. }
  316. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  317. {
  318. /*
  319. * FIXME: Handle the 3100/5000 as appropriate. --macro
  320. */
  321. struct dz_port *dport = to_dport(uport);
  322. u16 tmp;
  323. if (dport->port.line == DZ_MODEM) {
  324. tmp = dz_in(dport, DZ_TCR);
  325. if (mctrl & TIOCM_DTR)
  326. tmp &= ~DZ_MODEM_DTR;
  327. else
  328. tmp |= DZ_MODEM_DTR;
  329. dz_out(dport, DZ_TCR, tmp);
  330. }
  331. }
  332. /*
  333. * -------------------------------------------------------------------
  334. * startup ()
  335. *
  336. * various initialization tasks
  337. * -------------------------------------------------------------------
  338. */
  339. static int dz_startup(struct uart_port *uport)
  340. {
  341. struct dz_port *dport = to_dport(uport);
  342. struct dz_mux *mux = dport->mux;
  343. unsigned long flags;
  344. int irq_guard;
  345. int ret;
  346. u16 tmp;
  347. irq_guard = atomic_add_return(1, &mux->irq_guard);
  348. if (irq_guard != 1)
  349. return 0;
  350. ret = request_irq(dport->port.irq, dz_interrupt,
  351. IRQF_SHARED, "dz", mux);
  352. if (ret) {
  353. atomic_add(-1, &mux->irq_guard);
  354. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  355. return ret;
  356. }
  357. spin_lock_irqsave(&dport->port.lock, flags);
  358. /* Enable interrupts. */
  359. tmp = dz_in(dport, DZ_CSR);
  360. tmp |= DZ_RIE | DZ_TIE;
  361. dz_out(dport, DZ_CSR, tmp);
  362. spin_unlock_irqrestore(&dport->port.lock, flags);
  363. return 0;
  364. }
  365. /*
  366. * -------------------------------------------------------------------
  367. * shutdown ()
  368. *
  369. * This routine will shutdown a serial port; interrupts are disabled, and
  370. * DTR is dropped if the hangup on close termio flag is on.
  371. * -------------------------------------------------------------------
  372. */
  373. static void dz_shutdown(struct uart_port *uport)
  374. {
  375. struct dz_port *dport = to_dport(uport);
  376. struct dz_mux *mux = dport->mux;
  377. unsigned long flags;
  378. int irq_guard;
  379. u16 tmp;
  380. spin_lock_irqsave(&dport->port.lock, flags);
  381. dz_stop_tx(&dport->port);
  382. spin_unlock_irqrestore(&dport->port.lock, flags);
  383. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  384. if (!irq_guard) {
  385. /* Disable interrupts. */
  386. tmp = dz_in(dport, DZ_CSR);
  387. tmp &= ~(DZ_RIE | DZ_TIE);
  388. dz_out(dport, DZ_CSR, tmp);
  389. free_irq(dport->port.irq, mux);
  390. }
  391. }
  392. /*
  393. * -------------------------------------------------------------------
  394. * dz_tx_empty() -- get the transmitter empty status
  395. *
  396. * Purpose: Let user call ioctl() to get info when the UART physically
  397. * is emptied. On bus types like RS485, the transmitter must
  398. * release the bus after transmitting. This must be done when
  399. * the transmit shift register is empty, not be done when the
  400. * transmit holding register is empty. This functionality
  401. * allows an RS485 driver to be written in user space.
  402. * -------------------------------------------------------------------
  403. */
  404. static unsigned int dz_tx_empty(struct uart_port *uport)
  405. {
  406. struct dz_port *dport = to_dport(uport);
  407. unsigned short tmp, mask = 1 << dport->port.line;
  408. tmp = dz_in(dport, DZ_TCR);
  409. tmp &= mask;
  410. return tmp ? 0 : TIOCSER_TEMT;
  411. }
  412. static void dz_break_ctl(struct uart_port *uport, int break_state)
  413. {
  414. /*
  415. * FIXME: Can't access BREAK bits in TDR easily;
  416. * reuse the code for polled TX. --macro
  417. */
  418. struct dz_port *dport = to_dport(uport);
  419. unsigned long flags;
  420. unsigned short tmp, mask = 1 << dport->port.line;
  421. spin_lock_irqsave(&uport->lock, flags);
  422. tmp = dz_in(dport, DZ_TCR);
  423. if (break_state)
  424. tmp |= mask;
  425. else
  426. tmp &= ~mask;
  427. dz_out(dport, DZ_TCR, tmp);
  428. spin_unlock_irqrestore(&uport->lock, flags);
  429. }
  430. static int dz_encode_baud_rate(unsigned int baud)
  431. {
  432. switch (baud) {
  433. case 50:
  434. return DZ_B50;
  435. case 75:
  436. return DZ_B75;
  437. case 110:
  438. return DZ_B110;
  439. case 134:
  440. return DZ_B134;
  441. case 150:
  442. return DZ_B150;
  443. case 300:
  444. return DZ_B300;
  445. case 600:
  446. return DZ_B600;
  447. case 1200:
  448. return DZ_B1200;
  449. case 1800:
  450. return DZ_B1800;
  451. case 2000:
  452. return DZ_B2000;
  453. case 2400:
  454. return DZ_B2400;
  455. case 3600:
  456. return DZ_B3600;
  457. case 4800:
  458. return DZ_B4800;
  459. case 7200:
  460. return DZ_B7200;
  461. case 9600:
  462. return DZ_B9600;
  463. default:
  464. return -1;
  465. }
  466. }
  467. static void dz_reset(struct dz_port *dport)
  468. {
  469. struct dz_mux *mux = dport->mux;
  470. if (mux->initialised)
  471. return;
  472. dz_out(dport, DZ_CSR, DZ_CLR);
  473. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  474. iob();
  475. /* Enable scanning. */
  476. dz_out(dport, DZ_CSR, DZ_MSE);
  477. mux->initialised = 1;
  478. }
  479. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  480. const struct ktermios *old_termios)
  481. {
  482. struct dz_port *dport = to_dport(uport);
  483. unsigned long flags;
  484. unsigned int cflag, baud;
  485. int bflag;
  486. cflag = dport->port.line;
  487. switch (termios->c_cflag & CSIZE) {
  488. case CS5:
  489. cflag |= DZ_CS5;
  490. break;
  491. case CS6:
  492. cflag |= DZ_CS6;
  493. break;
  494. case CS7:
  495. cflag |= DZ_CS7;
  496. break;
  497. case CS8:
  498. default:
  499. cflag |= DZ_CS8;
  500. }
  501. if (termios->c_cflag & CSTOPB)
  502. cflag |= DZ_CSTOPB;
  503. if (termios->c_cflag & PARENB)
  504. cflag |= DZ_PARENB;
  505. if (termios->c_cflag & PARODD)
  506. cflag |= DZ_PARODD;
  507. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  508. bflag = dz_encode_baud_rate(baud);
  509. if (bflag < 0) {
  510. if (old_termios) {
  511. /* Keep unchanged. */
  512. baud = tty_termios_baud_rate(old_termios);
  513. bflag = dz_encode_baud_rate(baud);
  514. }
  515. if (bflag < 0) { /* Resort to 9600. */
  516. baud = 9600;
  517. bflag = DZ_B9600;
  518. }
  519. tty_termios_encode_baud_rate(termios, baud, baud);
  520. }
  521. cflag |= bflag;
  522. if (termios->c_cflag & CREAD)
  523. cflag |= DZ_RXENAB;
  524. spin_lock_irqsave(&dport->port.lock, flags);
  525. uart_update_timeout(uport, termios->c_cflag, baud);
  526. dz_out(dport, DZ_LPR, cflag);
  527. dport->cflag = cflag;
  528. /* setup accept flag */
  529. dport->port.read_status_mask = DZ_OERR;
  530. if (termios->c_iflag & INPCK)
  531. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  532. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  533. dport->port.read_status_mask |= DZ_BREAK;
  534. /* characters to ignore */
  535. uport->ignore_status_mask = 0;
  536. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  537. dport->port.ignore_status_mask |= DZ_OERR;
  538. if (termios->c_iflag & IGNPAR)
  539. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  540. if (termios->c_iflag & IGNBRK)
  541. dport->port.ignore_status_mask |= DZ_BREAK;
  542. spin_unlock_irqrestore(&dport->port.lock, flags);
  543. }
  544. /*
  545. * Hack alert!
  546. * Required solely so that the initial PROM-based console
  547. * works undisturbed in parallel with this one.
  548. */
  549. static void dz_pm(struct uart_port *uport, unsigned int state,
  550. unsigned int oldstate)
  551. {
  552. struct dz_port *dport = to_dport(uport);
  553. unsigned long flags;
  554. spin_lock_irqsave(&dport->port.lock, flags);
  555. if (state < 3)
  556. dz_start_tx(&dport->port);
  557. else
  558. dz_stop_tx(&dport->port);
  559. spin_unlock_irqrestore(&dport->port.lock, flags);
  560. }
  561. static const char *dz_type(struct uart_port *uport)
  562. {
  563. return "DZ";
  564. }
  565. static void dz_release_port(struct uart_port *uport)
  566. {
  567. struct dz_mux *mux = to_dport(uport)->mux;
  568. int map_guard;
  569. iounmap(uport->membase);
  570. uport->membase = NULL;
  571. map_guard = atomic_add_return(-1, &mux->map_guard);
  572. if (!map_guard)
  573. release_mem_region(uport->mapbase, dec_kn_slot_size);
  574. }
  575. static int dz_map_port(struct uart_port *uport)
  576. {
  577. if (!uport->membase)
  578. uport->membase = ioremap(uport->mapbase,
  579. dec_kn_slot_size);
  580. if (!uport->membase) {
  581. printk(KERN_ERR "dz: Cannot map MMIO\n");
  582. return -ENOMEM;
  583. }
  584. return 0;
  585. }
  586. static int dz_request_port(struct uart_port *uport)
  587. {
  588. struct dz_mux *mux = to_dport(uport)->mux;
  589. int map_guard;
  590. int ret;
  591. map_guard = atomic_add_return(1, &mux->map_guard);
  592. if (map_guard == 1) {
  593. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  594. "dz")) {
  595. atomic_add(-1, &mux->map_guard);
  596. printk(KERN_ERR
  597. "dz: Unable to reserve MMIO resource\n");
  598. return -EBUSY;
  599. }
  600. }
  601. ret = dz_map_port(uport);
  602. if (ret) {
  603. map_guard = atomic_add_return(-1, &mux->map_guard);
  604. if (!map_guard)
  605. release_mem_region(uport->mapbase, dec_kn_slot_size);
  606. return ret;
  607. }
  608. return 0;
  609. }
  610. static void dz_config_port(struct uart_port *uport, int flags)
  611. {
  612. struct dz_port *dport = to_dport(uport);
  613. if (flags & UART_CONFIG_TYPE) {
  614. if (dz_request_port(uport))
  615. return;
  616. uport->type = PORT_DZ;
  617. dz_reset(dport);
  618. }
  619. }
  620. /*
  621. * Verify the new serial_struct (for TIOCSSERIAL).
  622. */
  623. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  624. {
  625. int ret = 0;
  626. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  627. ret = -EINVAL;
  628. if (ser->irq != uport->irq)
  629. ret = -EINVAL;
  630. return ret;
  631. }
  632. static const struct uart_ops dz_ops = {
  633. .tx_empty = dz_tx_empty,
  634. .get_mctrl = dz_get_mctrl,
  635. .set_mctrl = dz_set_mctrl,
  636. .stop_tx = dz_stop_tx,
  637. .start_tx = dz_start_tx,
  638. .stop_rx = dz_stop_rx,
  639. .break_ctl = dz_break_ctl,
  640. .startup = dz_startup,
  641. .shutdown = dz_shutdown,
  642. .set_termios = dz_set_termios,
  643. .pm = dz_pm,
  644. .type = dz_type,
  645. .release_port = dz_release_port,
  646. .request_port = dz_request_port,
  647. .config_port = dz_config_port,
  648. .verify_port = dz_verify_port,
  649. };
  650. static void __init dz_init_ports(void)
  651. {
  652. static int first = 1;
  653. unsigned long base;
  654. int line;
  655. if (!first)
  656. return;
  657. first = 0;
  658. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  659. base = dec_kn_slot_base + KN01_DZ11;
  660. else
  661. base = dec_kn_slot_base + KN02_DZ11;
  662. for (line = 0; line < DZ_NB_PORT; line++) {
  663. struct dz_port *dport = &dz_mux.dport[line];
  664. struct uart_port *uport = &dport->port;
  665. dport->mux = &dz_mux;
  666. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  667. uport->fifosize = 1;
  668. uport->iotype = UPIO_MEM;
  669. uport->flags = UPF_BOOT_AUTOCONF;
  670. uport->ops = &dz_ops;
  671. uport->line = line;
  672. uport->mapbase = base;
  673. uport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_DZ_CONSOLE);
  674. }
  675. }
  676. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  677. /*
  678. * -------------------------------------------------------------------
  679. * dz_console_putchar() -- transmit a character
  680. *
  681. * Polled transmission. This is tricky. We need to mask transmit
  682. * interrupts so that they do not interfere, enable the transmitter
  683. * for the line requested and then wait till the transmit scanner
  684. * requests data for this line. But it may request data for another
  685. * line first, in which case we have to disable its transmitter and
  686. * repeat waiting till our line pops up. Only then the character may
  687. * be transmitted. Finally, the state of the transmitter mask is
  688. * restored. Welcome to the world of PDP-11!
  689. * -------------------------------------------------------------------
  690. */
  691. static void dz_console_putchar(struct uart_port *uport, unsigned char ch)
  692. {
  693. struct dz_port *dport = to_dport(uport);
  694. unsigned long flags;
  695. unsigned short csr, tcr, trdy, mask;
  696. int loops = 10000;
  697. spin_lock_irqsave(&dport->port.lock, flags);
  698. csr = dz_in(dport, DZ_CSR);
  699. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  700. tcr = dz_in(dport, DZ_TCR);
  701. tcr |= 1 << dport->port.line;
  702. mask = tcr;
  703. dz_out(dport, DZ_TCR, mask);
  704. iob();
  705. spin_unlock_irqrestore(&dport->port.lock, flags);
  706. do {
  707. trdy = dz_in(dport, DZ_CSR);
  708. if (!(trdy & DZ_TRDY))
  709. continue;
  710. trdy = (trdy & DZ_TLINE) >> 8;
  711. if (trdy == dport->port.line)
  712. break;
  713. mask &= ~(1 << trdy);
  714. dz_out(dport, DZ_TCR, mask);
  715. iob();
  716. udelay(2);
  717. } while (--loops);
  718. if (loops) /* Cannot send otherwise. */
  719. dz_out(dport, DZ_TDR, ch);
  720. dz_out(dport, DZ_TCR, tcr);
  721. dz_out(dport, DZ_CSR, csr);
  722. }
  723. /*
  724. * -------------------------------------------------------------------
  725. * dz_console_print ()
  726. *
  727. * dz_console_print is registered for printk.
  728. * The console must be locked when we get here.
  729. * -------------------------------------------------------------------
  730. */
  731. static void dz_console_print(struct console *co,
  732. const char *str,
  733. unsigned int count)
  734. {
  735. struct dz_port *dport = &dz_mux.dport[co->index];
  736. #ifdef DEBUG_DZ
  737. prom_printf((char *) str);
  738. #endif
  739. uart_console_write(&dport->port, str, count, dz_console_putchar);
  740. }
  741. static int __init dz_console_setup(struct console *co, char *options)
  742. {
  743. struct dz_port *dport = &dz_mux.dport[co->index];
  744. struct uart_port *uport = &dport->port;
  745. int baud = 9600;
  746. int bits = 8;
  747. int parity = 'n';
  748. int flow = 'n';
  749. int ret;
  750. ret = dz_map_port(uport);
  751. if (ret)
  752. return ret;
  753. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  754. dz_reset(dport);
  755. dz_pm(uport, 0, -1);
  756. if (options)
  757. uart_parse_options(options, &baud, &parity, &bits, &flow);
  758. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  759. }
  760. static struct uart_driver dz_reg;
  761. static struct console dz_console = {
  762. .name = "ttyS",
  763. .write = dz_console_print,
  764. .device = uart_console_device,
  765. .setup = dz_console_setup,
  766. .flags = CON_PRINTBUFFER,
  767. .index = -1,
  768. .data = &dz_reg,
  769. };
  770. static int __init dz_serial_console_init(void)
  771. {
  772. if (!IOASIC) {
  773. dz_init_ports();
  774. register_console(&dz_console);
  775. return 0;
  776. } else
  777. return -ENXIO;
  778. }
  779. console_initcall(dz_serial_console_init);
  780. #define SERIAL_DZ_CONSOLE &dz_console
  781. #else
  782. #define SERIAL_DZ_CONSOLE NULL
  783. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  784. static struct uart_driver dz_reg = {
  785. .owner = THIS_MODULE,
  786. .driver_name = "serial",
  787. .dev_name = "ttyS",
  788. .major = TTY_MAJOR,
  789. .minor = 64,
  790. .nr = DZ_NB_PORT,
  791. .cons = SERIAL_DZ_CONSOLE,
  792. };
  793. static int __init dz_init(void)
  794. {
  795. int ret, i;
  796. if (IOASIC)
  797. return -ENXIO;
  798. printk("%s%s\n", dz_name, dz_version);
  799. dz_init_ports();
  800. ret = uart_register_driver(&dz_reg);
  801. if (ret)
  802. return ret;
  803. for (i = 0; i < DZ_NB_PORT; i++)
  804. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  805. return 0;
  806. }
  807. module_init(dz_init);