8250_dma.c 7.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * 8250_dma.c - DMA Engine API support for 8250.c
  4. *
  5. * Copyright (C) 2013 Intel Corporation
  6. */
  7. #include <linux/tty.h>
  8. #include <linux/tty_flip.h>
  9. #include <linux/serial_reg.h>
  10. #include <linux/dma-mapping.h>
  11. #include "8250.h"
  12. static void __dma_tx_complete(void *param)
  13. {
  14. struct uart_8250_port *p = param;
  15. struct uart_8250_dma *dma = p->dma;
  16. struct circ_buf *xmit = &p->port.state->xmit;
  17. unsigned long flags;
  18. int ret;
  19. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  20. UART_XMIT_SIZE, DMA_TO_DEVICE);
  21. spin_lock_irqsave(&p->port.lock, flags);
  22. dma->tx_running = 0;
  23. uart_xmit_advance(&p->port, dma->tx_size);
  24. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  25. uart_write_wakeup(&p->port);
  26. ret = serial8250_tx_dma(p);
  27. if (ret || !dma->tx_running)
  28. serial8250_set_THRI(p);
  29. spin_unlock_irqrestore(&p->port.lock, flags);
  30. }
  31. static void __dma_rx_complete(void *param)
  32. {
  33. struct uart_8250_port *p = param;
  34. struct uart_8250_dma *dma = p->dma;
  35. struct tty_port *tty_port = &p->port.state->port;
  36. struct dma_tx_state state;
  37. enum dma_status dma_status;
  38. int count;
  39. /*
  40. * New DMA Rx can be started during the completion handler before it
  41. * could acquire port's lock and it might still be ongoing. Don't to
  42. * anything in such case.
  43. */
  44. dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  45. if (dma_status == DMA_IN_PROGRESS)
  46. return;
  47. count = dma->rx_size - state.residue;
  48. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  49. p->port.icount.rx += count;
  50. dma->rx_running = 0;
  51. tty_flip_buffer_push(tty_port);
  52. }
  53. static void dma_rx_complete(void *param)
  54. {
  55. struct uart_8250_port *p = param;
  56. struct uart_8250_dma *dma = p->dma;
  57. unsigned long flags;
  58. spin_lock_irqsave(&p->port.lock, flags);
  59. if (dma->rx_running)
  60. __dma_rx_complete(p);
  61. spin_unlock_irqrestore(&p->port.lock, flags);
  62. }
  63. int serial8250_tx_dma(struct uart_8250_port *p)
  64. {
  65. struct uart_8250_dma *dma = p->dma;
  66. struct circ_buf *xmit = &p->port.state->xmit;
  67. struct dma_async_tx_descriptor *desc;
  68. struct uart_port *up = &p->port;
  69. int ret;
  70. if (dma->tx_running) {
  71. if (up->x_char) {
  72. dmaengine_pause(dma->txchan);
  73. uart_xchar_out(up, UART_TX);
  74. dmaengine_resume(dma->txchan);
  75. }
  76. return 0;
  77. } else if (up->x_char) {
  78. uart_xchar_out(up, UART_TX);
  79. }
  80. if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) {
  81. /* We have been called from __dma_tx_complete() */
  82. return 0;
  83. }
  84. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  85. serial8250_do_prepare_tx_dma(p);
  86. desc = dmaengine_prep_slave_single(dma->txchan,
  87. dma->tx_addr + xmit->tail,
  88. dma->tx_size, DMA_MEM_TO_DEV,
  89. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  90. if (!desc) {
  91. ret = -EBUSY;
  92. goto err;
  93. }
  94. dma->tx_running = 1;
  95. desc->callback = __dma_tx_complete;
  96. desc->callback_param = p;
  97. dma->tx_cookie = dmaengine_submit(desc);
  98. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  99. UART_XMIT_SIZE, DMA_TO_DEVICE);
  100. dma_async_issue_pending(dma->txchan);
  101. serial8250_clear_THRI(p);
  102. dma->tx_err = 0;
  103. return 0;
  104. err:
  105. dma->tx_err = 1;
  106. return ret;
  107. }
  108. int serial8250_rx_dma(struct uart_8250_port *p)
  109. {
  110. struct uart_8250_dma *dma = p->dma;
  111. struct dma_async_tx_descriptor *desc;
  112. if (dma->rx_running)
  113. return 0;
  114. serial8250_do_prepare_rx_dma(p);
  115. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  116. dma->rx_size, DMA_DEV_TO_MEM,
  117. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  118. if (!desc)
  119. return -EBUSY;
  120. dma->rx_running = 1;
  121. desc->callback = dma_rx_complete;
  122. desc->callback_param = p;
  123. dma->rx_cookie = dmaengine_submit(desc);
  124. dma_async_issue_pending(dma->rxchan);
  125. return 0;
  126. }
  127. void serial8250_rx_dma_flush(struct uart_8250_port *p)
  128. {
  129. struct uart_8250_dma *dma = p->dma;
  130. if (dma->rx_running) {
  131. dmaengine_pause(dma->rxchan);
  132. __dma_rx_complete(p);
  133. dmaengine_terminate_async(dma->rxchan);
  134. }
  135. }
  136. EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);
  137. int serial8250_request_dma(struct uart_8250_port *p)
  138. {
  139. struct uart_8250_dma *dma = p->dma;
  140. phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
  141. dma->rx_dma_addr : p->port.mapbase;
  142. phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
  143. dma->tx_dma_addr : p->port.mapbase;
  144. dma_cap_mask_t mask;
  145. struct dma_slave_caps caps;
  146. int ret;
  147. /* Default slave configuration parameters */
  148. dma->rxconf.direction = DMA_DEV_TO_MEM;
  149. dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  150. dma->rxconf.src_addr = rx_dma_addr + UART_RX;
  151. dma->txconf.direction = DMA_MEM_TO_DEV;
  152. dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  153. dma->txconf.dst_addr = tx_dma_addr + UART_TX;
  154. dma_cap_zero(mask);
  155. dma_cap_set(DMA_SLAVE, mask);
  156. /* Get a channel for RX */
  157. dma->rxchan = dma_request_slave_channel_compat(mask,
  158. dma->fn, dma->rx_param,
  159. p->port.dev, "rx");
  160. if (!dma->rxchan)
  161. return -ENODEV;
  162. /* 8250 rx dma requires dmaengine driver to support pause/terminate */
  163. ret = dma_get_slave_caps(dma->rxchan, &caps);
  164. if (ret)
  165. goto release_rx;
  166. if (!caps.cmd_pause || !caps.cmd_terminate ||
  167. caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
  168. ret = -EINVAL;
  169. goto release_rx;
  170. }
  171. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  172. /* Get a channel for TX */
  173. dma->txchan = dma_request_slave_channel_compat(mask,
  174. dma->fn, dma->tx_param,
  175. p->port.dev, "tx");
  176. if (!dma->txchan) {
  177. ret = -ENODEV;
  178. goto release_rx;
  179. }
  180. /* 8250 tx dma requires dmaengine driver to support terminate */
  181. ret = dma_get_slave_caps(dma->txchan, &caps);
  182. if (ret)
  183. goto err;
  184. if (!caps.cmd_terminate) {
  185. ret = -EINVAL;
  186. goto err;
  187. }
  188. dmaengine_slave_config(dma->txchan, &dma->txconf);
  189. /* RX buffer */
  190. if (!dma->rx_size)
  191. dma->rx_size = PAGE_SIZE;
  192. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  193. &dma->rx_addr, GFP_KERNEL);
  194. if (!dma->rx_buf) {
  195. ret = -ENOMEM;
  196. goto err;
  197. }
  198. /* TX buffer */
  199. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  200. p->port.state->xmit.buf,
  201. UART_XMIT_SIZE,
  202. DMA_TO_DEVICE);
  203. if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
  204. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
  205. dma->rx_buf, dma->rx_addr);
  206. ret = -ENOMEM;
  207. goto err;
  208. }
  209. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  210. return 0;
  211. err:
  212. dma_release_channel(dma->txchan);
  213. release_rx:
  214. dma_release_channel(dma->rxchan);
  215. return ret;
  216. }
  217. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  218. void serial8250_release_dma(struct uart_8250_port *p)
  219. {
  220. struct uart_8250_dma *dma = p->dma;
  221. if (!dma)
  222. return;
  223. /* Release RX resources */
  224. dmaengine_terminate_sync(dma->rxchan);
  225. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  226. dma->rx_addr);
  227. dma_release_channel(dma->rxchan);
  228. dma->rxchan = NULL;
  229. /* Release TX resources */
  230. dmaengine_terminate_sync(dma->txchan);
  231. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  232. UART_XMIT_SIZE, DMA_TO_DEVICE);
  233. dma_release_channel(dma->txchan);
  234. dma->txchan = NULL;
  235. dma->tx_running = 0;
  236. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  237. }
  238. EXPORT_SYMBOL_GPL(serial8250_release_dma);