smartreflex.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * OMAP SmartReflex Voltage Control
  4. *
  5. * Author: Thara Gopinath <[email protected]>
  6. *
  7. * Copyright (C) 2012 Texas Instruments, Inc.
  8. * Thara Gopinath <[email protected]>
  9. *
  10. * Copyright (C) 2008 Nokia Corporation
  11. * Kalle Jokiniemi
  12. *
  13. * Copyright (C) 2007 Texas Instruments, Inc.
  14. * Lesly A M <[email protected]>
  15. */
  16. #include <linux/module.h>
  17. #include <linux/mod_devicetable.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/power/smartreflex.h>
  26. #define DRIVER_NAME "smartreflex"
  27. #define SMARTREFLEX_NAME_LEN 32
  28. #define NVALUE_NAME_LEN 40
  29. #define SR_DISABLE_TIMEOUT 200
  30. /* sr_list contains all the instances of smartreflex module */
  31. static LIST_HEAD(sr_list);
  32. static struct omap_sr_class_data *sr_class;
  33. static struct dentry *sr_dbg_dir;
  34. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  35. {
  36. __raw_writel(value, (sr->base + offset));
  37. }
  38. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  39. u32 value)
  40. {
  41. u32 reg_val;
  42. /*
  43. * Smartreflex error config register is special as it contains
  44. * certain status bits which if written a 1 into means a clear
  45. * of those bits. So in order to make sure no accidental write of
  46. * 1 happens to those status bits, do a clear of them in the read
  47. * value. This mean this API doesn't rewrite values in these bits
  48. * if they are currently set, but does allow the caller to write
  49. * those bits.
  50. */
  51. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  52. mask |= ERRCONFIG_STATUS_V1_MASK;
  53. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  54. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  55. reg_val = __raw_readl(sr->base + offset);
  56. reg_val &= ~mask;
  57. value &= mask;
  58. reg_val |= value;
  59. __raw_writel(reg_val, (sr->base + offset));
  60. }
  61. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  62. {
  63. return __raw_readl(sr->base + offset);
  64. }
  65. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  66. {
  67. struct omap_sr *sr_info;
  68. if (!voltdm) {
  69. pr_err("%s: Null voltage domain passed!\n", __func__);
  70. return ERR_PTR(-EINVAL);
  71. }
  72. list_for_each_entry(sr_info, &sr_list, node) {
  73. if (voltdm == sr_info->voltdm)
  74. return sr_info;
  75. }
  76. return ERR_PTR(-ENODATA);
  77. }
  78. static irqreturn_t sr_interrupt(int irq, void *data)
  79. {
  80. struct omap_sr *sr_info = data;
  81. u32 status = 0;
  82. switch (sr_info->ip_type) {
  83. case SR_TYPE_V1:
  84. /* Read the status bits */
  85. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  86. /* Clear them by writing back */
  87. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  88. break;
  89. case SR_TYPE_V2:
  90. /* Read the status bits */
  91. status = sr_read_reg(sr_info, IRQSTATUS);
  92. /* Clear them by writing back */
  93. sr_write_reg(sr_info, IRQSTATUS, status);
  94. break;
  95. default:
  96. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  97. sr_info->ip_type);
  98. return IRQ_NONE;
  99. }
  100. if (sr_class->notify)
  101. sr_class->notify(sr_info, status);
  102. return IRQ_HANDLED;
  103. }
  104. static void sr_set_clk_length(struct omap_sr *sr)
  105. {
  106. u32 fclk_speed;
  107. /* Try interconnect target module fck first if it already exists */
  108. if (IS_ERR(sr->fck))
  109. return;
  110. fclk_speed = clk_get_rate(sr->fck);
  111. switch (fclk_speed) {
  112. case 12000000:
  113. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  114. break;
  115. case 13000000:
  116. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  117. break;
  118. case 19200000:
  119. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  120. break;
  121. case 26000000:
  122. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  123. break;
  124. case 38400000:
  125. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  126. break;
  127. default:
  128. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  129. __func__, fclk_speed);
  130. break;
  131. }
  132. }
  133. static void sr_start_vddautocomp(struct omap_sr *sr)
  134. {
  135. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  136. dev_warn(&sr->pdev->dev,
  137. "%s: smartreflex class driver not registered\n",
  138. __func__);
  139. return;
  140. }
  141. if (!sr_class->enable(sr))
  142. sr->autocomp_active = true;
  143. }
  144. static void sr_stop_vddautocomp(struct omap_sr *sr)
  145. {
  146. if (!sr_class || !(sr_class->disable)) {
  147. dev_warn(&sr->pdev->dev,
  148. "%s: smartreflex class driver not registered\n",
  149. __func__);
  150. return;
  151. }
  152. if (sr->autocomp_active) {
  153. sr_class->disable(sr, 1);
  154. sr->autocomp_active = false;
  155. }
  156. }
  157. /*
  158. * This function handles the initializations which have to be done
  159. * only when both sr device and class driver regiter has
  160. * completed. This will be attempted to be called from both sr class
  161. * driver register and sr device intializtion API's. Only one call
  162. * will ultimately succeed.
  163. *
  164. * Currently this function registers interrupt handler for a particular SR
  165. * if smartreflex class driver is already registered and has
  166. * requested for interrupts and the SR interrupt line in present.
  167. */
  168. static int sr_late_init(struct omap_sr *sr_info)
  169. {
  170. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  171. int ret = 0;
  172. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  173. ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
  174. sr_interrupt, 0, sr_info->name, sr_info);
  175. if (ret)
  176. goto error;
  177. disable_irq(sr_info->irq);
  178. }
  179. if (pdata && pdata->enable_on_init)
  180. sr_start_vddautocomp(sr_info);
  181. return ret;
  182. error:
  183. list_del(&sr_info->node);
  184. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n",
  185. __func__);
  186. return ret;
  187. }
  188. static void sr_v1_disable(struct omap_sr *sr)
  189. {
  190. int timeout = 0;
  191. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  192. ERRCONFIG_MCUBOUNDINTST;
  193. /* Enable MCUDisableAcknowledge interrupt */
  194. sr_modify_reg(sr, ERRCONFIG_V1,
  195. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  196. /* SRCONFIG - disable SR */
  197. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  198. /* Disable all other SR interrupts and clear the status as needed */
  199. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  200. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  201. sr_modify_reg(sr, ERRCONFIG_V1,
  202. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  203. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  204. errconf_val);
  205. /*
  206. * Wait for SR to be disabled.
  207. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  208. */
  209. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  210. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  211. timeout);
  212. if (timeout >= SR_DISABLE_TIMEOUT)
  213. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  214. __func__);
  215. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  216. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  217. ERRCONFIG_MCUDISACKINTST);
  218. }
  219. static void sr_v2_disable(struct omap_sr *sr)
  220. {
  221. int timeout = 0;
  222. /* Enable MCUDisableAcknowledge interrupt */
  223. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  224. /* SRCONFIG - disable SR */
  225. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  226. /*
  227. * Disable all other SR interrupts and clear the status
  228. * write to status register ONLY on need basis - only if status
  229. * is set.
  230. */
  231. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  232. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  233. ERRCONFIG_VPBOUNDINTST_V2);
  234. else
  235. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  236. 0x0);
  237. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  238. IRQENABLE_MCUVALIDINT |
  239. IRQENABLE_MCUBOUNDSINT));
  240. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  241. IRQSTATUS_MCVALIDINT |
  242. IRQSTATUS_MCBOUNDSINT));
  243. /*
  244. * Wait for SR to be disabled.
  245. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  246. */
  247. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  248. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  249. timeout);
  250. if (timeout >= SR_DISABLE_TIMEOUT)
  251. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  252. __func__);
  253. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  254. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  255. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  256. }
  257. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  258. struct omap_sr *sr, u32 efuse_offs)
  259. {
  260. int i;
  261. if (!sr->nvalue_table) {
  262. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  263. __func__);
  264. return NULL;
  265. }
  266. for (i = 0; i < sr->nvalue_count; i++) {
  267. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  268. return &sr->nvalue_table[i];
  269. }
  270. return NULL;
  271. }
  272. /* Public Functions */
  273. /**
  274. * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
  275. * error generator module.
  276. * @sr: SR module to be configured.
  277. *
  278. * This API is to be called from the smartreflex class driver to
  279. * configure the error generator module inside the smartreflex module.
  280. * SR settings if using the ERROR module inside Smartreflex.
  281. * SR CLASS 3 by default uses only the ERROR module where as
  282. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  283. * module. Returns 0 on success and error value in case of failure.
  284. */
  285. int sr_configure_errgen(struct omap_sr *sr)
  286. {
  287. u32 sr_config, sr_errconfig, errconfig_offs;
  288. u32 vpboundint_en, vpboundint_st;
  289. u32 senp_en = 0, senn_en = 0;
  290. u8 senp_shift, senn_shift;
  291. if (!sr) {
  292. pr_warn("%s: NULL omap_sr from %pS\n",
  293. __func__, (void *)_RET_IP_);
  294. return -EINVAL;
  295. }
  296. if (!sr->clk_length)
  297. sr_set_clk_length(sr);
  298. senp_en = sr->senp_mod;
  299. senn_en = sr->senn_mod;
  300. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  301. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  302. switch (sr->ip_type) {
  303. case SR_TYPE_V1:
  304. sr_config |= SRCONFIG_DELAYCTRL;
  305. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  306. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  307. errconfig_offs = ERRCONFIG_V1;
  308. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  309. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  310. break;
  311. case SR_TYPE_V2:
  312. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  313. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  314. errconfig_offs = ERRCONFIG_V2;
  315. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  316. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  317. break;
  318. default:
  319. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  320. __func__);
  321. return -EINVAL;
  322. }
  323. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  324. sr_write_reg(sr, SRCONFIG, sr_config);
  325. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  326. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  327. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  328. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  329. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  330. sr_errconfig);
  331. /* Enabling the interrupts if the ERROR module is used */
  332. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  333. vpboundint_en);
  334. return 0;
  335. }
  336. /**
  337. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  338. * @sr: SR module to be configured.
  339. *
  340. * This API is to be called from the smartreflex class driver to
  341. * disable the error generator module inside the smartreflex module.
  342. *
  343. * Returns 0 on success and error value in case of failure.
  344. */
  345. int sr_disable_errgen(struct omap_sr *sr)
  346. {
  347. u32 errconfig_offs;
  348. u32 vpboundint_en, vpboundint_st;
  349. if (!sr) {
  350. pr_warn("%s: NULL omap_sr from %pS\n",
  351. __func__, (void *)_RET_IP_);
  352. return -EINVAL;
  353. }
  354. switch (sr->ip_type) {
  355. case SR_TYPE_V1:
  356. errconfig_offs = ERRCONFIG_V1;
  357. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  358. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  359. break;
  360. case SR_TYPE_V2:
  361. errconfig_offs = ERRCONFIG_V2;
  362. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  363. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  364. break;
  365. default:
  366. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  367. __func__);
  368. return -EINVAL;
  369. }
  370. /* Disable the Sensor and errorgen */
  371. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  372. /*
  373. * Disable the interrupts of ERROR module
  374. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  375. * which is required is present here - sequencing is critical
  376. * at this point (after errgen is disabled, vpboundint disable)
  377. */
  378. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  379. return 0;
  380. }
  381. /**
  382. * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
  383. * minmaxavg module.
  384. * @sr: SR module to be configured.
  385. *
  386. * This API is to be called from the smartreflex class driver to
  387. * configure the minmaxavg module inside the smartreflex module.
  388. * SR settings if using the ERROR module inside Smartreflex.
  389. * SR CLASS 3 by default uses only the ERROR module where as
  390. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  391. * module. Returns 0 on success and error value in case of failure.
  392. */
  393. int sr_configure_minmax(struct omap_sr *sr)
  394. {
  395. u32 sr_config, sr_avgwt;
  396. u32 senp_en = 0, senn_en = 0;
  397. u8 senp_shift, senn_shift;
  398. if (!sr) {
  399. pr_warn("%s: NULL omap_sr from %pS\n",
  400. __func__, (void *)_RET_IP_);
  401. return -EINVAL;
  402. }
  403. if (!sr->clk_length)
  404. sr_set_clk_length(sr);
  405. senp_en = sr->senp_mod;
  406. senn_en = sr->senn_mod;
  407. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  408. SRCONFIG_SENENABLE |
  409. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  410. switch (sr->ip_type) {
  411. case SR_TYPE_V1:
  412. sr_config |= SRCONFIG_DELAYCTRL;
  413. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  414. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  415. break;
  416. case SR_TYPE_V2:
  417. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  418. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  419. break;
  420. default:
  421. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  422. __func__);
  423. return -EINVAL;
  424. }
  425. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  426. sr_write_reg(sr, SRCONFIG, sr_config);
  427. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  428. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  429. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  430. /*
  431. * Enabling the interrupts if MINMAXAVG module is used.
  432. * TODO: check if all the interrupts are mandatory
  433. */
  434. switch (sr->ip_type) {
  435. case SR_TYPE_V1:
  436. sr_modify_reg(sr, ERRCONFIG_V1,
  437. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  438. ERRCONFIG_MCUBOUNDINTEN),
  439. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  440. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  441. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  442. break;
  443. case SR_TYPE_V2:
  444. sr_write_reg(sr, IRQSTATUS,
  445. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  446. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  447. sr_write_reg(sr, IRQENABLE_SET,
  448. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  449. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  450. break;
  451. default:
  452. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  453. __func__);
  454. return -EINVAL;
  455. }
  456. return 0;
  457. }
  458. /**
  459. * sr_enable() - Enables the smartreflex module.
  460. * @sr: pointer to which the SR module to be configured belongs to.
  461. * @volt: The voltage at which the Voltage domain associated with
  462. * the smartreflex module is operating at.
  463. * This is required only to program the correct Ntarget value.
  464. *
  465. * This API is to be called from the smartreflex class driver to
  466. * enable a smartreflex module. Returns 0 on success. Returns error
  467. * value if the voltage passed is wrong or if ntarget value is wrong.
  468. */
  469. int sr_enable(struct omap_sr *sr, unsigned long volt)
  470. {
  471. struct omap_volt_data *volt_data;
  472. struct omap_sr_nvalue_table *nvalue_row;
  473. int ret;
  474. if (!sr) {
  475. pr_warn("%s: NULL omap_sr from %pS\n",
  476. __func__, (void *)_RET_IP_);
  477. return -EINVAL;
  478. }
  479. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  480. if (IS_ERR(volt_data)) {
  481. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n",
  482. __func__, volt);
  483. return PTR_ERR(volt_data);
  484. }
  485. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  486. if (!nvalue_row) {
  487. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  488. __func__, volt);
  489. return -ENODATA;
  490. }
  491. /* errminlimit is opp dependent and hence linked to voltage */
  492. sr->err_minlimit = nvalue_row->errminlimit;
  493. clk_enable(sr->fck);
  494. /* Check if SR is already enabled. If yes do nothing */
  495. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  496. goto out_enabled;
  497. /* Configure SR */
  498. ret = sr_class->configure(sr);
  499. if (ret)
  500. goto out_enabled;
  501. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  502. /* SRCONFIG - enable SR */
  503. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  504. out_enabled:
  505. sr->enabled = 1;
  506. return 0;
  507. }
  508. /**
  509. * sr_disable() - Disables the smartreflex module.
  510. * @sr: pointer to which the SR module to be configured belongs to.
  511. *
  512. * This API is to be called from the smartreflex class driver to
  513. * disable a smartreflex module.
  514. */
  515. void sr_disable(struct omap_sr *sr)
  516. {
  517. if (!sr) {
  518. pr_warn("%s: NULL omap_sr from %pS\n",
  519. __func__, (void *)_RET_IP_);
  520. return;
  521. }
  522. /* Check if SR clocks are already disabled. If yes do nothing */
  523. if (!sr->enabled)
  524. return;
  525. /*
  526. * Disable SR if only it is indeed enabled. Else just
  527. * disable the clocks.
  528. */
  529. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  530. switch (sr->ip_type) {
  531. case SR_TYPE_V1:
  532. sr_v1_disable(sr);
  533. break;
  534. case SR_TYPE_V2:
  535. sr_v2_disable(sr);
  536. break;
  537. default:
  538. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  539. sr->ip_type);
  540. }
  541. }
  542. clk_disable(sr->fck);
  543. sr->enabled = 0;
  544. }
  545. /**
  546. * sr_register_class() - API to register a smartreflex class parameters.
  547. * @class_data: The structure containing various sr class specific data.
  548. *
  549. * This API is to be called by the smartreflex class driver to register itself
  550. * with the smartreflex driver during init. Returns 0 on success else the
  551. * error value.
  552. */
  553. int sr_register_class(struct omap_sr_class_data *class_data)
  554. {
  555. struct omap_sr *sr_info;
  556. if (!class_data) {
  557. pr_warn("%s:, Smartreflex class data passed is NULL\n",
  558. __func__);
  559. return -EINVAL;
  560. }
  561. if (sr_class) {
  562. pr_warn("%s: Smartreflex class driver already registered\n",
  563. __func__);
  564. return -EBUSY;
  565. }
  566. sr_class = class_data;
  567. /*
  568. * Call into late init to do initializations that require
  569. * both sr driver and sr class driver to be initiallized.
  570. */
  571. list_for_each_entry(sr_info, &sr_list, node)
  572. sr_late_init(sr_info);
  573. return 0;
  574. }
  575. /**
  576. * omap_sr_enable() - API to enable SR clocks and to call into the
  577. * registered smartreflex class enable API.
  578. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  579. *
  580. * This API is to be called from the kernel in order to enable
  581. * a particular smartreflex module. This API will do the initial
  582. * configurations to turn on the smartreflex module and in turn call
  583. * into the registered smartreflex class enable API.
  584. */
  585. void omap_sr_enable(struct voltagedomain *voltdm)
  586. {
  587. struct omap_sr *sr = _sr_lookup(voltdm);
  588. if (IS_ERR(sr)) {
  589. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  590. return;
  591. }
  592. if (!sr->autocomp_active)
  593. return;
  594. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  595. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  596. __func__);
  597. return;
  598. }
  599. sr_class->enable(sr);
  600. }
  601. /**
  602. * omap_sr_disable() - API to disable SR without resetting the voltage
  603. * processor voltage
  604. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  605. *
  606. * This API is to be called from the kernel in order to disable
  607. * a particular smartreflex module. This API will in turn call
  608. * into the registered smartreflex class disable API. This API will tell
  609. * the smartreflex class disable not to reset the VP voltage after
  610. * disabling smartreflex.
  611. */
  612. void omap_sr_disable(struct voltagedomain *voltdm)
  613. {
  614. struct omap_sr *sr = _sr_lookup(voltdm);
  615. if (IS_ERR(sr)) {
  616. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  617. return;
  618. }
  619. if (!sr->autocomp_active)
  620. return;
  621. if (!sr_class || !(sr_class->disable)) {
  622. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  623. __func__);
  624. return;
  625. }
  626. sr_class->disable(sr, 0);
  627. }
  628. /**
  629. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  630. * voltage processor voltage
  631. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  632. *
  633. * This API is to be called from the kernel in order to disable
  634. * a particular smartreflex module. This API will in turn call
  635. * into the registered smartreflex class disable API. This API will tell
  636. * the smartreflex class disable to reset the VP voltage after
  637. * disabling smartreflex.
  638. */
  639. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  640. {
  641. struct omap_sr *sr = _sr_lookup(voltdm);
  642. if (IS_ERR(sr)) {
  643. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  644. return;
  645. }
  646. if (!sr->autocomp_active)
  647. return;
  648. if (!sr_class || !(sr_class->disable)) {
  649. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  650. __func__);
  651. return;
  652. }
  653. sr_class->disable(sr, 1);
  654. }
  655. /* PM Debug FS entries to enable and disable smartreflex. */
  656. static int omap_sr_autocomp_show(void *data, u64 *val)
  657. {
  658. struct omap_sr *sr_info = data;
  659. if (!sr_info) {
  660. pr_warn("%s: omap_sr struct not found\n", __func__);
  661. return -EINVAL;
  662. }
  663. *val = sr_info->autocomp_active;
  664. return 0;
  665. }
  666. static int omap_sr_autocomp_store(void *data, u64 val)
  667. {
  668. struct omap_sr *sr_info = data;
  669. if (!sr_info) {
  670. pr_warn("%s: omap_sr struct not found\n", __func__);
  671. return -EINVAL;
  672. }
  673. /* Sanity check */
  674. if (val > 1) {
  675. pr_warn("%s: Invalid argument %lld\n", __func__, val);
  676. return -EINVAL;
  677. }
  678. /* control enable/disable only if there is a delta in value */
  679. if (sr_info->autocomp_active != val) {
  680. if (!val)
  681. sr_stop_vddautocomp(sr_info);
  682. else
  683. sr_start_vddautocomp(sr_info);
  684. }
  685. return 0;
  686. }
  687. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  688. omap_sr_autocomp_store, "%llu\n");
  689. static int omap_sr_probe(struct platform_device *pdev)
  690. {
  691. struct omap_sr *sr_info;
  692. struct omap_sr_data *pdata = pdev->dev.platform_data;
  693. struct resource *mem;
  694. struct dentry *nvalue_dir;
  695. int i, ret = 0;
  696. sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
  697. if (!sr_info)
  698. return -ENOMEM;
  699. sr_info->name = devm_kzalloc(&pdev->dev,
  700. SMARTREFLEX_NAME_LEN, GFP_KERNEL);
  701. if (!sr_info->name)
  702. return -ENOMEM;
  703. platform_set_drvdata(pdev, sr_info);
  704. if (!pdata) {
  705. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  706. return -EINVAL;
  707. }
  708. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  709. sr_info->base = devm_ioremap_resource(&pdev->dev, mem);
  710. if (IS_ERR(sr_info->base))
  711. return PTR_ERR(sr_info->base);
  712. ret = platform_get_irq_optional(pdev, 0);
  713. if (ret < 0 && ret != -ENXIO)
  714. return dev_err_probe(&pdev->dev, ret, "failed to get IRQ resource\n");
  715. if (ret > 0)
  716. sr_info->irq = ret;
  717. sr_info->fck = devm_clk_get(pdev->dev.parent, "fck");
  718. if (IS_ERR(sr_info->fck))
  719. return PTR_ERR(sr_info->fck);
  720. clk_prepare(sr_info->fck);
  721. pm_runtime_enable(&pdev->dev);
  722. snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
  723. sr_info->pdev = pdev;
  724. sr_info->srid = pdev->id;
  725. sr_info->voltdm = pdata->voltdm;
  726. sr_info->nvalue_table = pdata->nvalue_table;
  727. sr_info->nvalue_count = pdata->nvalue_count;
  728. sr_info->senn_mod = pdata->senn_mod;
  729. sr_info->senp_mod = pdata->senp_mod;
  730. sr_info->err_weight = pdata->err_weight;
  731. sr_info->err_maxlimit = pdata->err_maxlimit;
  732. sr_info->accum_data = pdata->accum_data;
  733. sr_info->senn_avgweight = pdata->senn_avgweight;
  734. sr_info->senp_avgweight = pdata->senp_avgweight;
  735. sr_info->autocomp_active = false;
  736. sr_info->ip_type = pdata->ip_type;
  737. sr_set_clk_length(sr_info);
  738. list_add(&sr_info->node, &sr_list);
  739. /*
  740. * Call into late init to do initializations that require
  741. * both sr driver and sr class driver to be initiallized.
  742. */
  743. if (sr_class) {
  744. ret = sr_late_init(sr_info);
  745. if (ret) {
  746. pr_warn("%s: Error in SR late init\n", __func__);
  747. goto err_list_del;
  748. }
  749. }
  750. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  751. if (!sr_dbg_dir)
  752. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  753. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  754. debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, sr_info->dbg_dir,
  755. sr_info, &pm_sr_fops);
  756. debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  757. &sr_info->err_weight);
  758. debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  759. &sr_info->err_maxlimit);
  760. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  761. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  762. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  763. __func__, sr_info->name);
  764. ret = -ENODATA;
  765. goto err_debugfs;
  766. }
  767. for (i = 0; i < sr_info->nvalue_count; i++) {
  768. char name[NVALUE_NAME_LEN + 1];
  769. snprintf(name, sizeof(name), "volt_%lu",
  770. sr_info->nvalue_table[i].volt_nominal);
  771. debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  772. &(sr_info->nvalue_table[i].nvalue));
  773. snprintf(name, sizeof(name), "errminlimit_%lu",
  774. sr_info->nvalue_table[i].volt_nominal);
  775. debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  776. &(sr_info->nvalue_table[i].errminlimit));
  777. }
  778. return 0;
  779. err_debugfs:
  780. debugfs_remove_recursive(sr_info->dbg_dir);
  781. err_list_del:
  782. pm_runtime_disable(&pdev->dev);
  783. list_del(&sr_info->node);
  784. clk_unprepare(sr_info->fck);
  785. return ret;
  786. }
  787. static int omap_sr_remove(struct platform_device *pdev)
  788. {
  789. struct omap_sr_data *pdata = pdev->dev.platform_data;
  790. struct device *dev = &pdev->dev;
  791. struct omap_sr *sr_info;
  792. if (!pdata) {
  793. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  794. return -EINVAL;
  795. }
  796. sr_info = _sr_lookup(pdata->voltdm);
  797. if (IS_ERR(sr_info)) {
  798. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  799. __func__);
  800. return PTR_ERR(sr_info);
  801. }
  802. if (sr_info->autocomp_active)
  803. sr_stop_vddautocomp(sr_info);
  804. debugfs_remove_recursive(sr_info->dbg_dir);
  805. pm_runtime_disable(dev);
  806. clk_unprepare(sr_info->fck);
  807. list_del(&sr_info->node);
  808. return 0;
  809. }
  810. static void omap_sr_shutdown(struct platform_device *pdev)
  811. {
  812. struct omap_sr_data *pdata = pdev->dev.platform_data;
  813. struct omap_sr *sr_info;
  814. if (!pdata) {
  815. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  816. return;
  817. }
  818. sr_info = _sr_lookup(pdata->voltdm);
  819. if (IS_ERR(sr_info)) {
  820. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  821. __func__);
  822. return;
  823. }
  824. if (sr_info->autocomp_active)
  825. sr_stop_vddautocomp(sr_info);
  826. return;
  827. }
  828. static const struct of_device_id omap_sr_match[] = {
  829. { .compatible = "ti,omap3-smartreflex-core", },
  830. { .compatible = "ti,omap3-smartreflex-mpu-iva", },
  831. { .compatible = "ti,omap4-smartreflex-core", },
  832. { .compatible = "ti,omap4-smartreflex-mpu", },
  833. { .compatible = "ti,omap4-smartreflex-iva", },
  834. { },
  835. };
  836. MODULE_DEVICE_TABLE(of, omap_sr_match);
  837. static struct platform_driver smartreflex_driver = {
  838. .probe = omap_sr_probe,
  839. .remove = omap_sr_remove,
  840. .shutdown = omap_sr_shutdown,
  841. .driver = {
  842. .name = DRIVER_NAME,
  843. .of_match_table = omap_sr_match,
  844. },
  845. };
  846. static int __init sr_init(void)
  847. {
  848. int ret = 0;
  849. ret = platform_driver_register(&smartreflex_driver);
  850. if (ret) {
  851. pr_err("%s: platform driver register failed for SR\n",
  852. __func__);
  853. return ret;
  854. }
  855. return 0;
  856. }
  857. late_initcall(sr_init);
  858. static void __exit sr_exit(void)
  859. {
  860. platform_driver_unregister(&smartreflex_driver);
  861. }
  862. module_exit(sr_exit);
  863. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  864. MODULE_LICENSE("GPL");
  865. MODULE_ALIAS("platform:" DRIVER_NAME);
  866. MODULE_AUTHOR("Texas Instruments Inc");