qcom_stats.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/cdev.h>
  7. #include <linux/debugfs.h>
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/io.h>
  11. #include <linux/module.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/seq_file.h>
  16. #include <linux/slab.h>
  17. #include <linux/string.h>
  18. #include <linux/uaccess.h>
  19. #include <linux/soc/qcom/qcom_aoss.h>
  20. #include <linux/soc/qcom/smem.h>
  21. #include <soc/qcom/qcom_stats.h>
  22. #include <clocksource/arm_arch_timer.h>
  23. #if IS_ENABLED(CONFIG_SEC_PM)
  24. #include <trace/events/power.h>
  25. #define MAX_BUF_LEN 512
  26. #define MSM_ARCH_TIMER_FREQ 19200000
  27. #define GET_SEC(A) ((A) / (MSM_ARCH_TIMER_FREQ))
  28. #define GET_MSEC(A) (((A) / (MSM_ARCH_TIMER_FREQ / 1000)) % 1000)
  29. #endif /* CONFIG_SEC_PM */
  30. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  31. #include <linux/sec_pm_log.h>
  32. #endif
  33. #define RPM_DYNAMIC_ADDR 0x14
  34. #define RPM_DYNAMIC_ADDR_MASK 0xFFFF
  35. #define STAT_TYPE_OFFSET 0x0
  36. #define COUNT_OFFSET 0x4
  37. #define LAST_ENTERED_AT_OFFSET 0x8
  38. #define LAST_EXITED_AT_OFFSET 0x10
  39. #define ACCUMULATED_OFFSET 0x18
  40. #define CLIENT_VOTES_OFFSET 0x20
  41. #define DDR_STATS_MAGIC_KEY 0xA1157A75
  42. #define DDR_STATS_MAX_NUM_MODES 0x14
  43. #define MAX_DRV 28
  44. #define MAX_MSG_LEN 64
  45. #define DRV_ABSENT 0xdeaddead
  46. #define DRV_INVALID 0xffffdead
  47. #define VOTE_MASK 0x3fff
  48. #define VOTE_X_SHIFT 14
  49. #define DDR_STATS_MAGIC_KEY_ADDR 0x0
  50. #define DDR_STATS_NUM_MODES_ADDR 0x4
  51. #define DDR_STATS_ENTRY_ADDR 0x8
  52. #define DDR_STATS_NAME_ADDR 0x0
  53. #define DDR_STATS_COUNT_ADDR 0x4
  54. #define DDR_STATS_DURATION_ADDR 0x8
  55. #define MAX_ISLAND_STATS_NAME_LENGTH 16
  56. #define MAX_ISLAND_STATS 6
  57. #define ISLAND_STATS_PID 2 /* ADSP PID */
  58. #define ISLAND_STATS_SMEM_ID 653
  59. #define STATS_BASEMINOR 0
  60. #define STATS_MAX_MINOR 1
  61. #define STATS_DEVICE_NAME "stats"
  62. #define SUBSYSTEM_STATS_MAGIC_NUM (0x9d)
  63. #define SUBSYSTEM_STATS_OTHERS_NUM (-2)
  64. #define APSS_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 0, \
  65. struct sleep_stats *)
  66. #define MODEM_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 1, \
  67. struct sleep_stats *)
  68. #define WPSS_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 2, \
  69. struct sleep_stats *)
  70. #define ADSP_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 3, \
  71. struct sleep_stats *)
  72. #define ADSP_ISLAND_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 4, \
  73. struct sleep_stats *)
  74. #define CDSP_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 5, \
  75. struct sleep_stats *)
  76. #define SLPI_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 6, \
  77. struct sleep_stats *)
  78. #define GPU_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 7, \
  79. struct sleep_stats *)
  80. #define DISPLAY_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 8, \
  81. struct sleep_stats *)
  82. #define SLPI_ISLAND_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 9, \
  83. struct sleep_stats *)
  84. #define AOSD_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 10, \
  85. struct sleep_stats *)
  86. #define CXSD_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 11, \
  87. struct sleep_stats *)
  88. #define DDR_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 12, \
  89. struct sleep_stats *)
  90. #define DDR_STATS_IOCTL _IOR(SUBSYSTEM_STATS_MAGIC_NUM, 13, \
  91. struct sleep_stats *)
  92. struct subsystem_data {
  93. const char *name;
  94. u32 smem_item;
  95. u32 pid;
  96. bool not_present;
  97. };
  98. static struct subsystem_data subsystems[] = {
  99. { "modem", 605, 1 },
  100. { "wpss", 605, 13 },
  101. { "adsp", 606, 2 },
  102. { "cdsp", 607, 5 },
  103. { "cdsp1", 607, 12 },
  104. { "gpdsp0", 607, 17 },
  105. { "gpdsp1", 607, 18 },
  106. { "slpi", 608, 3 },
  107. { "gpu", 609, 0 },
  108. { "display", 610, 0 },
  109. { "adsp_island", 613, 2 },
  110. { "slpi_island", 613, 3 },
  111. { "apss", 631, QCOM_SMEM_HOST_ANY },
  112. };
  113. struct stats_config {
  114. size_t stats_offset;
  115. size_t ddr_stats_offset;
  116. size_t cx_vote_offset;
  117. size_t num_records;
  118. bool appended_stats_avail;
  119. bool dynamic_offset;
  120. bool subsystem_stats_in_smem;
  121. bool read_ddr_votes;
  122. bool ddr_freq_update;
  123. bool island_stats_avail;
  124. };
  125. struct stats_data {
  126. bool appended_stats_avail;
  127. void __iomem *base;
  128. };
  129. struct stats_drvdata {
  130. void __iomem *base;
  131. const struct stats_config *config;
  132. struct stats_data *d;
  133. struct dentry *root;
  134. dev_t dev_no;
  135. struct class *stats_class;
  136. struct device *stats_device;
  137. struct cdev stats_cdev;
  138. struct mutex lock;
  139. struct qmp *qmp;
  140. ktime_t ddr_freqsync_msg_time;
  141. };
  142. static struct stats_drvdata *drv;
  143. static u64 deep_sleep_last_exited_time;
  144. struct sleep_stats {
  145. u32 stat_type;
  146. u32 count;
  147. u64 last_entered_at;
  148. u64 last_exited_at;
  149. u64 accumulated;
  150. };
  151. struct appended_stats {
  152. u32 client_votes;
  153. u32 reserved[3];
  154. };
  155. struct island_stats {
  156. char name[MAX_ISLAND_STATS_NAME_LENGTH];
  157. u32 count;
  158. u64 last_entered_at;
  159. u64 last_exited_at;
  160. u64 accumulated;
  161. u32 vid;
  162. u32 task_id;
  163. u32 reserved[3];
  164. };
  165. #if IS_ENABLED(CONFIG_SEC_PM)
  166. #define MAX_SLEEP_STATS_COUNT 10
  167. #define MAX_SLEEP_STATS_NAME 16
  168. static char sys_names[MAX_SLEEP_STATS_COUNT][MAX_SLEEP_STATS_NAME];
  169. static int max_subsys_count;
  170. static int subsys_idx[MAX_SLEEP_STATS_COUNT];
  171. #endif
  172. static bool subsystem_stats_debug_on;
  173. /* Subsystem stats before and after suspend */
  174. static struct sleep_stats *b_subsystem_stats;
  175. static struct sleep_stats *a_subsystem_stats;
  176. /* System sleep stats before and after suspend */
  177. static struct sleep_stats *b_system_stats;
  178. static struct sleep_stats *a_system_stats;
  179. static DEFINE_MUTEX(sleep_stats_mutex);
  180. #define DSP_SLEEP_DEBUG_ON
  181. #if defined(DSP_SLEEP_DEBUG_ON)
  182. #include <linux/samsung/debug/sec_debug.h>
  183. #include <linux/workqueue.h>
  184. #include <linux/notifier.h>
  185. #define MAX_COUNT 10
  186. struct blocking_notifier_head cdsp_event_chain;
  187. EXPORT_SYMBOL(cdsp_event_chain);
  188. struct _dsp_entry {
  189. char name[4];
  190. uint64_t entry_sec;
  191. uint64_t entry_msec;
  192. uint64_t prev_exit_sec;
  193. uint64_t prev_exit_msec;
  194. uint64_t error_count;
  195. struct timespec64 interval;
  196. int (*ssr)(void);
  197. } DSP_ENTRY[1]; // 0 : CDSP, 1 : ADSP - adsp is disabled for the time being.
  198. #endif
  199. static inline void get_sleep_stat_name(u32 type, char *stat_type)
  200. {
  201. int i;
  202. for (i = 0; i < sizeof(u32); i++) {
  203. stat_type[i] = type & 0xff;
  204. type = type >> 8;
  205. }
  206. strim(stat_type);
  207. }
  208. bool has_system_slept(void)
  209. {
  210. int i;
  211. bool sleep_flag = true;
  212. char stat_type[sizeof(u32) + 1] = {0};
  213. for (i = 0; i < drv->config->num_records; i++) {
  214. if (b_system_stats[i].count == a_system_stats[i].count) {
  215. get_sleep_stat_name(b_system_stats[i].stat_type, stat_type);
  216. pr_warn("System %s has not entered sleep\n", stat_type);
  217. sleep_flag = false;
  218. }
  219. }
  220. return sleep_flag;
  221. }
  222. EXPORT_SYMBOL(has_system_slept);
  223. bool has_subsystem_slept(void)
  224. {
  225. int i;
  226. bool sleep_flag = true;
  227. for (i = 0; i < ARRAY_SIZE(subsystems); i++) {
  228. if (subsystems[i].not_present)
  229. continue;
  230. if ((b_subsystem_stats[i].count == a_subsystem_stats[i].count) &&
  231. (a_subsystem_stats[i].last_exited_at >
  232. a_subsystem_stats[i].last_entered_at)) {
  233. pr_info("Subsystem %s has not entered sleep\n", subsystems[i].name);
  234. sleep_flag = false;
  235. }
  236. }
  237. return sleep_flag;
  238. }
  239. EXPORT_SYMBOL(has_subsystem_slept);
  240. void subsystem_sleep_debug_enable(bool enable)
  241. {
  242. subsystem_stats_debug_on = enable;
  243. }
  244. EXPORT_SYMBOL(subsystem_sleep_debug_enable);
  245. static inline int qcom_stats_copy_to_user(unsigned long arg, struct sleep_stats *stats,
  246. unsigned long size)
  247. {
  248. return copy_to_user((void __user *)arg, stats, size);
  249. }
  250. static inline void qcom_stats_update_accumulated_duration(struct sleep_stats *stats)
  251. {
  252. /*
  253. * If a subsystem is in sleep when reading the sleep stats from SMEM
  254. * adjust the accumulated sleep duration to show actual sleep time.
  255. * This ensures that the displayed stats are real when used for
  256. * the purpose of computing battery utilization.
  257. */
  258. if (stats->last_entered_at > stats->last_exited_at)
  259. stats->accumulated += (__arch_counter_get_cntvct() - stats->last_entered_at);
  260. }
  261. static inline void qcom_stats_copy(struct sleep_stats *src, struct sleep_stats *dst)
  262. {
  263. dst->stat_type = src->stat_type;
  264. dst->count = src->count;
  265. dst->last_entered_at = src->last_entered_at;
  266. dst->last_exited_at = src->last_exited_at;
  267. dst->accumulated = src->accumulated;
  268. }
  269. static bool ddr_stats_is_freq_overtime(struct sleep_stats *data)
  270. {
  271. if ((data->count == 0) && (drv->config->ddr_freq_update))
  272. return true;
  273. return false;
  274. }
  275. uint64_t get_aosd_sleep_exit_time(void)
  276. {
  277. int i;
  278. u64 last_exited_at;
  279. u32 count;
  280. static u32 saved_deep_sleep_count;
  281. u32 s_type = 0;
  282. char stat_type[5] = {0};
  283. for (i = 0; i < drv->config->num_records; i++) {
  284. s_type = readl_relaxed(drv->d[i].base);
  285. memcpy(stat_type, &s_type, sizeof(u32));
  286. strim(stat_type);
  287. if (!memcmp((const void *)stat_type, (const void *)"aosd", 4)) {
  288. count = readl_relaxed(drv->d[i].base + COUNT_OFFSET);
  289. if (saved_deep_sleep_count == count)
  290. deep_sleep_last_exited_time = 0;
  291. else {
  292. saved_deep_sleep_count = count;
  293. last_exited_at = readq_relaxed(drv->d[i].base +
  294. LAST_EXITED_AT_OFFSET);
  295. deep_sleep_last_exited_time = last_exited_at;
  296. }
  297. break;
  298. }
  299. }
  300. return deep_sleep_last_exited_time;
  301. }
  302. EXPORT_SYMBOL_GPL(get_aosd_sleep_exit_time);
  303. static u64 qcom_stats_fill_ddr_stats(void __iomem *reg, struct sleep_stats *data, u32 *entry_count)
  304. {
  305. u64 accumulated_duration = 0;
  306. int i;
  307. *entry_count = readl_relaxed(reg + DDR_STATS_NUM_MODES_ADDR);
  308. if (*entry_count > DDR_STATS_MAX_NUM_MODES) {
  309. pr_err("Invalid entry count\n");
  310. return 0;
  311. }
  312. reg += DDR_STATS_ENTRY_ADDR;
  313. for (i = 0; i < *entry_count; i++) {
  314. data[i].count = readl_relaxed(reg + DDR_STATS_COUNT_ADDR);
  315. if ((i >= 0x4) && (ddr_stats_is_freq_overtime(&data[i]))) {
  316. pr_err("ddr_stats: Freq update failed\n");
  317. return 0;
  318. }
  319. data[i].stat_type = readl_relaxed(reg + DDR_STATS_NAME_ADDR);
  320. data[i].last_entered_at = 0xDEADDEAD;
  321. data[i].last_exited_at = 0xDEADDEAD;
  322. data[i].accumulated = readq_relaxed(reg + DDR_STATS_DURATION_ADDR);
  323. accumulated_duration += data[i].accumulated;
  324. reg += sizeof(struct sleep_stats) - 2 * sizeof(u64);
  325. }
  326. return accumulated_duration;
  327. }
  328. static int qcom_stats_device_open(struct inode *inode, struct file *file)
  329. {
  330. struct stats_drvdata *drv = NULL;
  331. if (!inode || !inode->i_cdev || !file)
  332. return -EINVAL;
  333. drv = container_of(inode->i_cdev, struct stats_drvdata, stats_cdev);
  334. file->private_data = drv;
  335. return 0;
  336. }
  337. int qcom_stats_ddr_freqsync_msg(void)
  338. {
  339. static const char buf[MAX_MSG_LEN] = "{class: ddr, action: freqsync}";
  340. int ret = 0;
  341. if (!drv || !drv->qmp || !drv->config->read_ddr_votes)
  342. return -ENODEV;
  343. mutex_lock(&drv->lock);
  344. ret = qmp_send(drv->qmp, buf, sizeof(buf));
  345. if (ret) {
  346. pr_err("Error sending qmp message: %d\n", ret);
  347. mutex_unlock(&drv->lock);
  348. return ret;
  349. }
  350. mutex_unlock(&drv->lock);
  351. drv->ddr_freqsync_msg_time = ktime_get_boottime();
  352. return ret;
  353. }
  354. EXPORT_SYMBOL(qcom_stats_ddr_freqsync_msg);
  355. static int qcom_stats_ddr_freq_sync(int *modes, struct sleep_stats *stat)
  356. {
  357. void __iomem *reg = NULL;
  358. u32 entry_count, name;
  359. ktime_t now;
  360. int i, j, ret;
  361. if (drv->config->read_ddr_votes) {
  362. ret = qcom_stats_ddr_freqsync_msg();
  363. if (ret)
  364. return ret;
  365. now = ktime_get_boottime();
  366. while (now < drv->ddr_freqsync_msg_time) {
  367. udelay(500);
  368. now = ktime_get_boottime();
  369. }
  370. }
  371. reg = drv->base + drv->config->ddr_stats_offset;
  372. qcom_stats_fill_ddr_stats(reg, stat, &entry_count);
  373. if (drv->config->read_ddr_votes) {
  374. for (i = 0, j = 0; i < entry_count; i++) {
  375. name = (stat[i].stat_type >> 8) & 0xFF;
  376. if (name == 0x1 && !stat[i].count)
  377. break;
  378. ++j;
  379. }
  380. if (j < DDR_STATS_MAX_NUM_MODES)
  381. *modes = j;
  382. }
  383. return 0;
  384. }
  385. static long qcom_stats_device_ioctl(struct file *file, unsigned int cmd,
  386. unsigned long arg)
  387. {
  388. struct stats_drvdata *drv = file->private_data;
  389. const struct subsystem_data *subsystem = NULL;
  390. struct sleep_stats *stat;
  391. struct sleep_stats *temp;
  392. void __iomem *reg = NULL;
  393. unsigned long size = sizeof(struct sleep_stats);
  394. u32 stats_id;
  395. int ret;
  396. mutex_lock(&sleep_stats_mutex);
  397. if (cmd != DDR_STATS_IOCTL)
  398. stat = kzalloc(sizeof(struct sleep_stats), GFP_KERNEL);
  399. else
  400. stat = kcalloc(DDR_STATS_MAX_NUM_MODES, sizeof(struct sleep_stats), GFP_KERNEL);
  401. if (!stat) {
  402. mutex_unlock(&sleep_stats_mutex);
  403. return -ENOMEM;
  404. }
  405. switch (cmd) {
  406. case MODEM_IOCTL:
  407. subsystem = &subsystems[0];
  408. break;
  409. case WPSS_IOCTL:
  410. subsystem = &subsystems[1];
  411. break;
  412. case ADSP_IOCTL:
  413. subsystem = &subsystems[2];
  414. break;
  415. case CDSP_IOCTL:
  416. subsystem = &subsystems[3];
  417. break;
  418. case SLPI_IOCTL:
  419. subsystem = &subsystems[4];
  420. break;
  421. case GPU_IOCTL:
  422. subsystem = &subsystems[5];
  423. break;
  424. case DISPLAY_IOCTL:
  425. subsystem = &subsystems[6];
  426. break;
  427. case ADSP_ISLAND_IOCTL:
  428. subsystem = &subsystems[7];
  429. break;
  430. case SLPI_ISLAND_IOCTL:
  431. subsystem = &subsystems[8];
  432. break;
  433. case APSS_IOCTL:
  434. subsystem = &subsystems[9];
  435. break;
  436. case AOSD_IOCTL:
  437. stats_id = 0;
  438. if (drv->config->num_records > stats_id)
  439. reg = drv->d[stats_id].base;
  440. break;
  441. case CXSD_IOCTL:
  442. stats_id = 1;
  443. if (drv->config->num_records > stats_id)
  444. reg = drv->d[stats_id].base;
  445. break;
  446. case DDR_IOCTL:
  447. stats_id = 2;
  448. if (drv->config->num_records > stats_id)
  449. reg = drv->d[stats_id].base;
  450. break;
  451. case DDR_STATS_IOCTL:
  452. break;
  453. default:
  454. pr_err("Incorrect command error\n");
  455. ret = -EINVAL;
  456. goto exit;
  457. }
  458. if (subsystem) {
  459. /* Items are allocated lazily, so lookup pointer each time */
  460. temp = qcom_smem_get(subsystem->pid, subsystem->smem_item, NULL);
  461. if (IS_ERR(temp)) {
  462. ret = -EIO;
  463. goto exit;
  464. }
  465. qcom_stats_copy(temp, stat);
  466. qcom_stats_update_accumulated_duration(stat);
  467. ret = qcom_stats_copy_to_user(arg, stat, size);
  468. } else if (reg) {
  469. memcpy_fromio(stat, reg, sizeof(*stat));
  470. qcom_stats_update_accumulated_duration(stat);
  471. ret = qcom_stats_copy_to_user(arg, stat, size);
  472. } else {
  473. int modes = DDR_STATS_MAX_NUM_MODES;
  474. ret = qcom_stats_ddr_freq_sync(&modes, stat);
  475. if (ret)
  476. goto exit;
  477. ret = qcom_stats_copy_to_user(arg, stat, modes * size);
  478. }
  479. exit:
  480. kfree(stat);
  481. mutex_unlock(&sleep_stats_mutex);
  482. return ret;
  483. }
  484. static const struct file_operations qcom_stats_device_fops = {
  485. .owner = THIS_MODULE,
  486. .open = qcom_stats_device_open,
  487. .unlocked_ioctl = qcom_stats_device_ioctl,
  488. };
  489. int ddr_stats_get_freq_count(void)
  490. {
  491. u32 entry_count, name;
  492. u32 freq_count = 0;
  493. void __iomem *reg;
  494. int i;
  495. if (!drv || !drv->qmp || !drv->config->read_ddr_votes)
  496. return -ENODEV;
  497. reg = drv->base + drv->config->ddr_stats_offset;
  498. entry_count = readl_relaxed(reg + DDR_STATS_NUM_MODES_ADDR);
  499. if (entry_count > DDR_STATS_MAX_NUM_MODES) {
  500. pr_err("Invalid entry count\n");
  501. return 0;
  502. }
  503. reg += DDR_STATS_ENTRY_ADDR;
  504. for (i = 0; i < entry_count; i++) {
  505. name = readl_relaxed(reg + DDR_STATS_NAME_ADDR);
  506. name = (name >> 8) & 0xFF;
  507. if (name == 0x1)
  508. freq_count++;
  509. reg += sizeof(struct sleep_stats) - 2 * sizeof(u64);
  510. }
  511. return freq_count;
  512. }
  513. EXPORT_SYMBOL(ddr_stats_get_freq_count);
  514. int ddr_stats_get_residency(int freq_count, struct ddr_freq_residency *data)
  515. {
  516. struct sleep_stats stat[DDR_STATS_MAX_NUM_MODES];
  517. void __iomem *reg;
  518. u32 name, entry_count;
  519. ktime_t now;
  520. int i, j;
  521. if (freq_count < 0 || !data)
  522. return -EINVAL;
  523. if (!drv || !drv->qmp || !drv->config->read_ddr_votes)
  524. return -ENODEV;
  525. now = ktime_get_boottime();
  526. while (now < drv->ddr_freqsync_msg_time) {
  527. udelay(500);
  528. now = ktime_get_boottime();
  529. }
  530. mutex_lock(&drv->lock);
  531. reg = drv->base + drv->config->ddr_stats_offset;
  532. qcom_stats_fill_ddr_stats(reg, stat, &entry_count);
  533. for (i = 0, j = 0; i < entry_count; i++) {
  534. name = stat[i].stat_type;
  535. if (((name >> 8) & 0xFF) == 0x1 && stat[i].count) {
  536. data[j].freq = name >> 16;
  537. data[j].residency = stat[i].accumulated;
  538. if (++j > freq_count)
  539. break;
  540. }
  541. }
  542. mutex_unlock(&drv->lock);
  543. return j;
  544. }
  545. EXPORT_SYMBOL(ddr_stats_get_residency);
  546. int ddr_stats_get_ss_count(void)
  547. {
  548. return drv->config->read_ddr_votes ? MAX_DRV : -EOPNOTSUPP;
  549. }
  550. EXPORT_SYMBOL(ddr_stats_get_ss_count);
  551. static void __iomem *qcom_stats_get_ddr_stats_data_addr(void)
  552. {
  553. void __iomem *reg = NULL;
  554. u32 vote_offset;
  555. u32 entry_count;
  556. reg = drv->base + drv->config->ddr_stats_offset;
  557. entry_count = readl_relaxed(reg + DDR_STATS_NUM_MODES_ADDR);
  558. if (entry_count > DDR_STATS_MAX_NUM_MODES) {
  559. pr_err("Invalid entry count\n");
  560. return NULL;
  561. }
  562. vote_offset = DDR_STATS_ENTRY_ADDR;
  563. vote_offset += entry_count * (sizeof(struct sleep_stats) - 2 * sizeof(u64));
  564. reg = drv->base + drv->config->ddr_stats_offset + vote_offset;
  565. return reg;
  566. }
  567. int ddr_stats_get_ss_vote_info(int ss_count,
  568. struct ddr_stats_ss_vote_info *vote_info)
  569. {
  570. static const char buf[MAX_MSG_LEN] = "{class: ddr, res: drvs_ddr_votes}";
  571. u32 val[MAX_DRV];
  572. void __iomem *reg;
  573. int ret, i;
  574. if (!vote_info || !(ss_count == MAX_DRV) || !drv)
  575. return -ENODEV;
  576. if (!drv->qmp)
  577. return -EOPNOTSUPP;
  578. mutex_lock(&drv->lock);
  579. ret = qmp_send(drv->qmp, buf, sizeof(buf));
  580. if (ret) {
  581. pr_err("Error sending qmp message: %d\n", ret);
  582. mutex_unlock(&drv->lock);
  583. return ret;
  584. }
  585. reg = qcom_stats_get_ddr_stats_data_addr();
  586. if (!reg) {
  587. pr_err("Error getting ddr stats data addr\n");
  588. mutex_unlock(&drv->lock);
  589. return -EINVAL;
  590. }
  591. for (i = 0; i < ss_count; i++, reg += sizeof(u32)) {
  592. val[i] = readl_relaxed(reg);
  593. if (val[i] == DRV_ABSENT) {
  594. vote_info[i].ab = DRV_ABSENT;
  595. vote_info[i].ib = DRV_ABSENT;
  596. continue;
  597. } else if (val[i] == DRV_INVALID) {
  598. vote_info[i].ab = DRV_INVALID;
  599. vote_info[i].ib = DRV_INVALID;
  600. continue;
  601. }
  602. vote_info[i].ab = (val[i] >> VOTE_X_SHIFT) & VOTE_MASK;
  603. vote_info[i].ib = val[i] & VOTE_MASK;
  604. }
  605. mutex_unlock(&drv->lock);
  606. return 0;
  607. }
  608. EXPORT_SYMBOL(ddr_stats_get_ss_vote_info);
  609. static void cxvt_info_fill_data(void __iomem *reg, u32 entry_count,
  610. u32 *data)
  611. {
  612. int i;
  613. for (i = 0; i < entry_count; i++) {
  614. data[i] = readl_relaxed(reg);
  615. reg += sizeof(u32);
  616. }
  617. }
  618. int cx_stats_get_ss_vote_info(int ss_count,
  619. struct qcom_stats_cx_vote_info *vote_info)
  620. {
  621. static const char buf[MAX_MSG_LEN] = "{class: misc_debug, res: cx_vote}";
  622. void __iomem *reg;
  623. int ret;
  624. int i, j;
  625. u32 data[((MAX_DRV + 0x3) & (~0x3))/4];
  626. if (!vote_info || !(ss_count == MAX_DRV) || !drv)
  627. return -ENODEV;
  628. if (!drv->qmp || !drv->config->cx_vote_offset)
  629. return -EOPNOTSUPP;
  630. mutex_lock(&drv->lock);
  631. ret = qmp_send(drv->qmp, buf, sizeof(buf));
  632. if (ret) {
  633. pr_err("Error sending qmp message: %d\n", ret);
  634. mutex_unlock(&drv->lock);
  635. return ret;
  636. }
  637. reg = qcom_stats_get_ddr_stats_data_addr();
  638. if (!reg) {
  639. pr_err("Error getting ddr stats data addr\n");
  640. mutex_unlock(&drv->lock);
  641. return -EINVAL;
  642. }
  643. cxvt_info_fill_data(reg, ((MAX_DRV + 0x3) & (~0x3))/4, data);
  644. for (i = 0, j = 0; i < ((MAX_DRV + 0x3) & (~0x3))/4; i++, j += 4) {
  645. vote_info[j].level = (data[i] & 0xff);
  646. vote_info[j+1].level = ((data[i] & 0xff00) >> 8);
  647. vote_info[j+2].level = ((data[i] & 0xff0000) >> 16);
  648. vote_info[j+3].level = ((data[i] & 0xff000000) >> 24);
  649. }
  650. mutex_unlock(&drv->lock);
  651. return 0;
  652. }
  653. EXPORT_SYMBOL(cx_stats_get_ss_vote_info);
  654. static void qcom_print_stats(struct seq_file *s, const struct sleep_stats *stat)
  655. {
  656. u64 accumulated = stat->accumulated;
  657. /*
  658. * If a subsystem is in sleep when reading the sleep stats adjust
  659. * the accumulated sleep duration to show actual sleep time.
  660. */
  661. if (stat->last_entered_at > stat->last_exited_at)
  662. accumulated += arch_timer_read_counter() - stat->last_entered_at;
  663. seq_printf(s, "Count: %u\n", stat->count);
  664. seq_printf(s, "Last Entered At: %llu\n", stat->last_entered_at);
  665. seq_printf(s, "Last Exited At: %llu\n", stat->last_exited_at);
  666. seq_printf(s, "Accumulated Duration: %llu\n", accumulated);
  667. }
  668. static int qcom_subsystem_sleep_stats_show(struct seq_file *s, void *unused)
  669. {
  670. struct subsystem_data *subsystem = s->private;
  671. struct sleep_stats *stat;
  672. /* Items are allocated lazily, so lookup pointer each time */
  673. stat = qcom_smem_get(subsystem->pid, subsystem->smem_item, NULL);
  674. if (IS_ERR(stat))
  675. return 0;
  676. qcom_print_stats(s, stat);
  677. return 0;
  678. }
  679. static int qcom_soc_sleep_stats_show(struct seq_file *s, void *unused)
  680. {
  681. struct stats_data *d = s->private;
  682. void __iomem *reg = d->base;
  683. struct sleep_stats stat;
  684. memcpy_fromio(&stat, reg, sizeof(stat));
  685. qcom_print_stats(s, &stat);
  686. if (d->appended_stats_avail) {
  687. struct appended_stats votes;
  688. memcpy_fromio(&votes, reg + CLIENT_VOTES_OFFSET, sizeof(votes));
  689. seq_printf(s, "Client Votes: %#x\n", votes.client_votes);
  690. }
  691. return 0;
  692. }
  693. static void print_ddr_stats(struct seq_file *s, int *count,
  694. struct sleep_stats *data, u64 accumulated_duration)
  695. {
  696. u32 cp_idx = 0;
  697. u32 name, duration = 0;
  698. if (accumulated_duration)
  699. duration = (data->accumulated * 100) / accumulated_duration;
  700. name = (data->stat_type >> 8) & 0xFF;
  701. if (name == 0x0) {
  702. name = (data->stat_type) & 0xFF;
  703. *count = *count + 1;
  704. seq_printf(s,
  705. "LPM %d:\tName:0x%x\tcount:%u\tDuration (ticks):%ld (~%d%%)\n",
  706. *count, name, data->count, data->accumulated, duration);
  707. } else if (name == 0x1) {
  708. cp_idx = data->stat_type & 0x1F;
  709. name = data->stat_type >> 16;
  710. if (!name || !data->count)
  711. return;
  712. seq_printf(s,
  713. "Freq %dMhz:\tCP IDX:%u\tcount:%u\tDuration (ticks):%ld (~%d%%)\n",
  714. name, cp_idx, data->count, data->accumulated, duration);
  715. }
  716. }
  717. static int ddr_stats_show(struct seq_file *s, void *d)
  718. {
  719. struct sleep_stats data[DDR_STATS_MAX_NUM_MODES];
  720. void __iomem *reg = s->private;
  721. u32 entry_count;
  722. u64 accumulated_duration = 0, accumulated_duration_ddr_mode = 0;
  723. int i, lpm_count = 0;
  724. accumulated_duration = qcom_stats_fill_ddr_stats(reg, data, &entry_count);
  725. for (i = 0; i < DDR_STATS_NUM_MODES_ADDR; i++)
  726. accumulated_duration_ddr_mode += data[i].accumulated;
  727. for (i = 0; i < DDR_STATS_NUM_MODES_ADDR; i++)
  728. print_ddr_stats(s, &lpm_count, &data[i], accumulated_duration_ddr_mode);
  729. if (!accumulated_duration) {
  730. seq_puts(s, "ddr_stats: Freq update failed.\n");
  731. return 0;
  732. }
  733. accumulated_duration -= accumulated_duration_ddr_mode;
  734. for (i = DDR_STATS_NUM_MODES_ADDR; i < entry_count; i++)
  735. print_ddr_stats(s, &lpm_count, &data[i], accumulated_duration);
  736. return 0;
  737. }
  738. static int island_stats_show(struct seq_file *s, void *unused)
  739. {
  740. struct island_stats *stat;
  741. int i;
  742. /* Items are allocated lazily, so lookup pointer each time */
  743. stat = qcom_smem_get(ISLAND_STATS_PID, ISLAND_STATS_SMEM_ID, NULL);
  744. if (IS_ERR(stat))
  745. return 0;
  746. for (i = 0; i < MAX_ISLAND_STATS; i++) {
  747. if (!strcmp(stat[i].name, "DEADDEAD"))
  748. continue;
  749. seq_printf(s, "Name: %s\n", stat[i].name);
  750. seq_printf(s, "Count: %u\n", stat[i].count);
  751. seq_printf(s, "Last Entered At: %llu\n", stat[i].last_entered_at);
  752. seq_printf(s, "Last Exited At: %llu\n", stat[i].last_exited_at);
  753. seq_printf(s, "Accumulated Duration: %llu\n", stat[i].accumulated);
  754. seq_printf(s, "Vid: %u\n", stat[i].vid);
  755. seq_printf(s, "task_id: %u\n", stat[i].task_id);
  756. }
  757. return 0;
  758. }
  759. DEFINE_SHOW_ATTRIBUTE(qcom_soc_sleep_stats);
  760. DEFINE_SHOW_ATTRIBUTE(qcom_subsystem_sleep_stats);
  761. DEFINE_SHOW_ATTRIBUTE(ddr_stats);
  762. DEFINE_SHOW_ATTRIBUTE(island_stats);
  763. static int qcom_create_stats_device(struct stats_drvdata *drv)
  764. {
  765. int ret;
  766. ret = alloc_chrdev_region(&drv->dev_no, STATS_BASEMINOR, STATS_MAX_MINOR,
  767. STATS_DEVICE_NAME);
  768. if (ret)
  769. return ret;
  770. cdev_init(&drv->stats_cdev, &qcom_stats_device_fops);
  771. ret = cdev_add(&drv->stats_cdev, drv->dev_no, 1);
  772. if (ret) {
  773. unregister_chrdev_region(drv->dev_no, 1);
  774. return ret;
  775. }
  776. drv->stats_class = class_create(THIS_MODULE, STATS_DEVICE_NAME);
  777. if (IS_ERR_OR_NULL(drv->stats_class)) {
  778. cdev_del(&drv->stats_cdev);
  779. unregister_chrdev_region(drv->dev_no, 1);
  780. return PTR_ERR(drv->stats_class);
  781. }
  782. drv->stats_device = device_create(drv->stats_class, NULL, drv->dev_no, NULL,
  783. STATS_DEVICE_NAME);
  784. if (IS_ERR_OR_NULL(drv->stats_device)) {
  785. class_destroy(drv->stats_class);
  786. cdev_del(&drv->stats_cdev);
  787. unregister_chrdev_region(drv->dev_no, 1);
  788. return PTR_ERR(drv->stats_device);
  789. }
  790. return ret;
  791. }
  792. static void qcom_create_island_stat_files(struct dentry *root, void __iomem *reg,
  793. struct stats_data *d,
  794. const struct stats_config *config)
  795. {
  796. if (!config->island_stats_avail)
  797. return;
  798. debugfs_create_file("island_stats", 0400, root, NULL, &island_stats_fops);
  799. }
  800. static void qcom_create_ddr_stat_files(struct dentry *root, void __iomem *reg,
  801. struct stats_data *d,
  802. const struct stats_config *config)
  803. {
  804. size_t stats_offset;
  805. u32 key;
  806. if (!config->ddr_stats_offset)
  807. return;
  808. stats_offset = config->ddr_stats_offset;
  809. key = readl_relaxed(reg + stats_offset + DDR_STATS_MAGIC_KEY_ADDR);
  810. if (key == DDR_STATS_MAGIC_KEY)
  811. debugfs_create_file("ddr_stats", 0400, root, reg + stats_offset, &ddr_stats_fops);
  812. }
  813. static void qcom_create_soc_sleep_stat_files(struct dentry *root, void __iomem *reg,
  814. struct stats_data *d,
  815. const struct stats_config *config)
  816. {
  817. char stat_type[sizeof(u32) + 1] = {0};
  818. size_t stats_offset = config->stats_offset;
  819. u32 offset = 0, type;
  820. int i;
  821. /*
  822. * On RPM targets, stats offset location is dynamic and changes from target
  823. * to target and sometimes from build to build for same target.
  824. *
  825. * In such cases the dynamic address is present at 0x14 offset from base
  826. * address in devicetree. The last 16bits indicates the stats_offset.
  827. */
  828. if (config->dynamic_offset) {
  829. stats_offset = readl(reg + RPM_DYNAMIC_ADDR);
  830. stats_offset &= RPM_DYNAMIC_ADDR_MASK;
  831. }
  832. for (i = 0; i < config->num_records; i++) {
  833. d[i].base = reg + offset + stats_offset;
  834. /*
  835. * Read the low power mode name and create debugfs file for it.
  836. * The names read could be of below,
  837. * (may change depending on low power mode supported).
  838. * For rpmh-sleep-stats: "aosd", "cxsd" and "ddr".
  839. * For rpm-sleep-stats: "vmin" and "vlow".
  840. */
  841. type = readl(d[i].base);
  842. get_sleep_stat_name(type, stat_type);
  843. debugfs_create_file(stat_type, 0400, root, &d[i],
  844. &qcom_soc_sleep_stats_fops);
  845. #if IS_ENABLED(CONFIG_SEC_PM)
  846. /* Store each system's name */
  847. strcpy(sys_names[i], stat_type);
  848. #endif
  849. offset += sizeof(struct sleep_stats);
  850. if (d[i].appended_stats_avail)
  851. offset += sizeof(struct appended_stats);
  852. }
  853. }
  854. static void qcom_create_subsystem_stat_files(struct dentry *root,
  855. const struct stats_config *config,
  856. struct device_node *node)
  857. {
  858. int i, j, n_subsystems;
  859. const char *name;
  860. if (!config->subsystem_stats_in_smem)
  861. return;
  862. n_subsystems = of_property_count_strings(node, "ss-name");
  863. if (n_subsystems < 0)
  864. return;
  865. for (i = 0; i < n_subsystems; i++) {
  866. of_property_read_string_index(node, "ss-name", i, &name);
  867. for (j = 0; j < ARRAY_SIZE(subsystems); j++) {
  868. if (!strcmp(subsystems[j].name, name)) {
  869. debugfs_create_file(subsystems[j].name, 0400, root,
  870. (void *)&subsystems[j],
  871. &qcom_subsystem_sleep_stats_fops);
  872. #if IS_ENABLED(CONFIG_SEC_PM)
  873. /* Store each subsystem's idx */
  874. subsys_idx[max_subsys_count++] = j;
  875. #endif
  876. break;
  877. }
  878. }
  879. }
  880. }
  881. #if IS_ENABLED(CONFIG_SEC_PM)
  882. u64 last_accumulated[5];
  883. static void sec_sleep_stats_show(const char *annotation)
  884. {
  885. char buf[MAX_BUF_LEN];
  886. char *buf_ptr = buf;
  887. unsigned int duration_sec, duration_msec;
  888. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  889. char pm_log_buf[MAX_BUF_LEN];
  890. char *pm_log_buf_ptr = pm_log_buf;
  891. #endif
  892. #if defined(DSP_SLEEP_DEBUG_ON)
  893. struct _dsp_entry *dsp_entry = NULL;
  894. int is_debug_low = 0;
  895. unsigned int debug_level = 0;
  896. #endif
  897. char stat_type[sizeof(u32) + 1] = {0};
  898. size_t stats_offset = drv->config->stats_offset;
  899. u32 offset = 0, type;
  900. int i, j;
  901. bool is_exit = (!strcmp("exit", annotation)) ? true : false;
  902. mutex_lock(&sleep_stats_mutex);
  903. /*
  904. * Print soc_stats
  905. */
  906. if (drv->config->dynamic_offset) {
  907. stats_offset = readl(drv->base + RPM_DYNAMIC_ADDR);
  908. stats_offset &= RPM_DYNAMIC_ADDR_MASK;
  909. }
  910. buf_ptr += sprintf(buf_ptr, "PM: %s: ", annotation);
  911. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  912. pm_log_buf_ptr += sprintf(pm_log_buf_ptr, "soc: %s: ", (is_exit ? "ex" : "en"));
  913. #endif
  914. for (i = 0; i < drv->config->num_records; i++) {
  915. struct sleep_stats stat;
  916. u64 accumulated;
  917. /* START: Print soc_stat's name */
  918. drv->d[i].base = drv->base + offset + stats_offset;
  919. type = readl(drv->d[i].base);
  920. for (j = 0; j < sizeof(u32); j++) {
  921. stat_type[j] = type & 0xff;
  922. type = type >> 8;
  923. }
  924. strim(stat_type);
  925. /* END: Print soc_stat's name */
  926. /* START: get soc_stat's info */
  927. memcpy_fromio(&stat, drv->d[i].base, sizeof(stat));
  928. accumulated = stat.accumulated;
  929. if (stat.last_entered_at > stat.last_exited_at)
  930. accumulated += arch_timer_read_counter()
  931. - stat.last_entered_at;
  932. /* Check non-sleep issue */
  933. if (is_exit && accumulated == last_accumulated[i])
  934. buf_ptr += sprintf(buf_ptr, "*");
  935. last_accumulated[i] = accumulated;
  936. /* Calculate accumulated duration */
  937. duration_sec = GET_SEC(accumulated);
  938. duration_msec = GET_MSEC(accumulated);
  939. buf_ptr += sprintf(buf_ptr, "%s(%d, %u.%u), ",
  940. stat_type,
  941. stat.count,
  942. duration_sec, duration_msec);
  943. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  944. pm_log_buf_ptr += sprintf(pm_log_buf_ptr, "(%d, %u.%u)",
  945. stat.count, duration_sec, (duration_msec / 100));
  946. #endif
  947. /* END: get soc_stat's info */
  948. /* Move to next soc_stat */
  949. offset += sizeof(struct sleep_stats);
  950. if (drv->d[i].appended_stats_avail)
  951. offset += sizeof(struct appended_stats);
  952. }
  953. buf_ptr += sprintf(buf_ptr, "\n");
  954. /*
  955. * Print subsystem_stats
  956. */
  957. buf_ptr += sprintf(buf_ptr, "PM: %s: ", annotation);
  958. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  959. pm_log_buf_ptr += sprintf(pm_log_buf_ptr, "/");
  960. #endif
  961. for (i = 0; i < max_subsys_count; i++) {
  962. struct subsystem_data *subsystem;
  963. struct sleep_stats *stat;
  964. u64 accumulated;
  965. int idx = subsys_idx[i];
  966. /* Get each subsystem's info */
  967. subsystem = &subsystems[idx];
  968. stat = qcom_smem_get(subsystem->pid, subsystem->smem_item, NULL);
  969. if (IS_ERR(stat)) {
  970. pr_err("%s: Failed to get qcom_smem for %s, ret=%d\n", __func__,
  971. subsystems[idx].name, PTR_ERR(stat));
  972. /* Even though getting info from smem is failed, next subsystem should be checked */
  973. continue;
  974. }
  975. /* Calculate accumulated duration */
  976. accumulated = stat->accumulated;
  977. if (stat->last_entered_at > stat->last_exited_at)
  978. accumulated += arch_timer_read_counter()
  979. - stat->last_entered_at;
  980. duration_sec = GET_SEC(accumulated);
  981. duration_msec = GET_MSEC(accumulated);
  982. #if defined(DSP_SLEEP_DEBUG_ON)
  983. #if 0
  984. dsp_entry = (!strcmp(subsystem->name, "cdsp")) ? &DSP_ENTRY[0] :
  985. (!strcmp(subsystem->name, "adsp") ? &DSP_ENTRY[1] : NULL);
  986. #else
  987. dsp_entry = (!strcmp(subsystem->name, "cdsp")) ? &DSP_ENTRY[0] : NULL;
  988. #endif
  989. if (dsp_entry != NULL) {
  990. if (!is_exit) {
  991. // entry
  992. dsp_entry->entry_sec = duration_sec;
  993. dsp_entry->entry_msec = duration_msec;
  994. } else {
  995. //exit
  996. /* Error detected if exit duration is same as entry */
  997. if((duration_sec == dsp_entry->entry_sec &&
  998. duration_msec == dsp_entry->entry_msec) &&
  999. (duration_sec == dsp_entry->prev_exit_sec &&
  1000. duration_msec == dsp_entry->prev_exit_msec)) {
  1001. struct timespec64 curr_kts = ktime_to_timespec64(ktime_get_boottime());
  1002. if (dsp_entry->interval.tv_sec != 0) {
  1003. time64_t diff_kts = curr_kts.tv_sec - dsp_entry->interval.tv_sec;
  1004. if (diff_kts > 60) { // don't update error count within 1 min
  1005. dsp_entry->error_count++;
  1006. printk("entry error cnt : %d\n", dsp_entry->error_count);
  1007. dsp_entry->interval = ktime_to_timespec64(ktime_get_boottime());
  1008. }
  1009. } else {
  1010. dsp_entry->interval = ktime_to_timespec64(ktime_get_boottime());
  1011. }
  1012. } else {
  1013. dsp_entry->error_count = 0;
  1014. }
  1015. dsp_entry->prev_exit_sec = duration_sec;
  1016. dsp_entry->prev_exit_msec = duration_msec;
  1017. }
  1018. }
  1019. #endif
  1020. buf_ptr += sprintf(buf_ptr, "%s(%d, %u.%u), ",
  1021. subsystem->name,
  1022. stat->count,
  1023. duration_sec, duration_msec);
  1024. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  1025. pm_log_buf_ptr += sprintf(pm_log_buf_ptr, "(%d, %u.%u)",
  1026. stat->count, duration_sec, (duration_msec / 100));
  1027. #endif
  1028. }
  1029. buf_ptr--;
  1030. buf_ptr--;
  1031. buf_ptr += sprintf(buf_ptr, "\n");
  1032. #if IS_ENABLED(CONFIG_SEC_PM_LOG)
  1033. ss_power_print("%s\n", pm_log_buf);
  1034. #endif
  1035. mutex_unlock(&sleep_stats_mutex);
  1036. pr_info("%s", buf);
  1037. #if defined(DSP_SLEEP_DEBUG_ON)
  1038. // 0 : CDSP, 1 : ADSP
  1039. for (i = 0; i < sizeof(DSP_ENTRY) / sizeof(struct _dsp_entry); i++) {
  1040. dsp_entry = &DSP_ENTRY[i];
  1041. if(dsp_entry->error_count > MAX_COUNT) {
  1042. debug_level = sec_debug_level();
  1043. switch (debug_level) {
  1044. case SEC_DEBUG_LEVEL_LOW:
  1045. is_debug_low = 1;
  1046. break;
  1047. case SEC_DEBUG_LEVEL_MID:
  1048. is_debug_low = 0;
  1049. break;
  1050. }
  1051. if (!is_debug_low) {
  1052. pr_err("entry error cnt : %d\n", dsp_entry->error_count);
  1053. pr_err("Intentional crash for %s\n", dsp_entry->name);
  1054. BUG_ON(1);
  1055. } else {
  1056. dsp_entry->error_count = 0;
  1057. pr_err("reset entry error cnt : %d\n", dsp_entry->error_count);
  1058. pr_err("Intentional cdsp subsystem restart\n");
  1059. blocking_notifier_call_chain(&cdsp_event_chain, 0, (void *)0x0);
  1060. }
  1061. }
  1062. }
  1063. #endif
  1064. }
  1065. static void qcom_stats_debug_suspend_trace_probe(void *unused,
  1066. const char *action, int val, bool start)
  1067. {
  1068. /*
  1069. * SUSPEND
  1070. * start(1), val(1), action(machine_suspend)
  1071. */
  1072. if (start && val > 0 && !strcmp("machine_suspend", action))
  1073. sec_sleep_stats_show("entry");
  1074. /*
  1075. * RESUME
  1076. *start(0), val(1), action(machine_suspend)
  1077. */
  1078. if (!start && val > 0 && !strcmp("machine_suspend", action))
  1079. sec_sleep_stats_show("exit");
  1080. }
  1081. #endif
  1082. static int qcom_stats_probe(struct platform_device *pdev)
  1083. {
  1084. void __iomem *reg;
  1085. struct dentry *root;
  1086. const struct stats_config *config;
  1087. struct stats_data *d;
  1088. int i;
  1089. int ret;
  1090. #if IS_ENABLED(CONFIG_SEC_PM)
  1091. /* Register callback for cheking subsystem stats */
  1092. ret = register_trace_suspend_resume(
  1093. qcom_stats_debug_suspend_trace_probe, NULL);
  1094. if (ret) {
  1095. pr_err("%s: Failed to register suspend trace callback, ret=%d\n",
  1096. __func__, ret);
  1097. }
  1098. #endif
  1099. config = device_get_match_data(&pdev->dev);
  1100. if (!config)
  1101. return -ENODEV;
  1102. reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
  1103. if (IS_ERR(reg))
  1104. return -ENOMEM;
  1105. d = devm_kcalloc(&pdev->dev, config->num_records,
  1106. sizeof(*d), GFP_KERNEL);
  1107. if (!d)
  1108. return -ENOMEM;
  1109. drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
  1110. if (!drv)
  1111. return -ENOMEM;
  1112. for (i = 0; i < config->num_records; i++)
  1113. d[i].appended_stats_avail = config->appended_stats_avail;
  1114. root = debugfs_create_dir("qcom_stats", NULL);
  1115. qcom_create_subsystem_stat_files(root, config, pdev->dev.of_node);
  1116. qcom_create_soc_sleep_stat_files(root, reg, d, config);
  1117. qcom_create_ddr_stat_files(root, reg, d, config);
  1118. qcom_create_island_stat_files(root, reg, d, config);
  1119. drv->d = d;
  1120. drv->config = config;
  1121. drv->base = reg;
  1122. drv->root = root;
  1123. drv->ddr_freqsync_msg_time = 0;
  1124. mutex_init(&drv->lock);
  1125. ret = qcom_create_stats_device(drv);
  1126. if (ret)
  1127. goto fail_create_stats_device;
  1128. if (config->read_ddr_votes && config->ddr_stats_offset) {
  1129. drv->qmp = qmp_get(&pdev->dev);
  1130. if (IS_ERR(drv->qmp)) {
  1131. ret = PTR_ERR(drv->qmp);
  1132. goto fail;
  1133. }
  1134. }
  1135. subsystem_stats_debug_on = false;
  1136. b_subsystem_stats = devm_kcalloc(&pdev->dev, ARRAY_SIZE(subsystems),
  1137. sizeof(struct sleep_stats), GFP_KERNEL);
  1138. if (!b_subsystem_stats) {
  1139. ret = -ENOMEM;
  1140. goto fail;
  1141. }
  1142. a_subsystem_stats = devm_kcalloc(&pdev->dev, ARRAY_SIZE(subsystems),
  1143. sizeof(struct sleep_stats), GFP_KERNEL);
  1144. if (!a_subsystem_stats) {
  1145. ret = -ENOMEM;
  1146. goto fail;
  1147. }
  1148. b_system_stats = devm_kcalloc(&pdev->dev, drv->config->num_records,
  1149. sizeof(struct sleep_stats), GFP_KERNEL);
  1150. if (!b_system_stats) {
  1151. ret = -ENOMEM;
  1152. goto fail;
  1153. }
  1154. a_system_stats = devm_kcalloc(&pdev->dev, drv->config->num_records,
  1155. sizeof(struct sleep_stats), GFP_KERNEL);
  1156. if (!a_system_stats) {
  1157. ret = -ENOMEM;
  1158. goto fail;
  1159. }
  1160. platform_set_drvdata(pdev, drv);
  1161. #if defined(DSP_SLEEP_DEBUG_ON)
  1162. BLOCKING_INIT_NOTIFIER_HEAD(&cdsp_event_chain);
  1163. strncpy(DSP_ENTRY[0].name, "cdsp", 4);
  1164. #endif
  1165. return 0;
  1166. fail:
  1167. device_destroy(drv->stats_class, drv->dev_no);
  1168. class_destroy(drv->stats_class);
  1169. cdev_del(&drv->stats_cdev);
  1170. unregister_chrdev_region(drv->dev_no, 1);
  1171. fail_create_stats_device:
  1172. debugfs_remove_recursive(drv->root);
  1173. return ret;
  1174. }
  1175. static int qcom_stats_remove(struct platform_device *pdev)
  1176. {
  1177. struct stats_drvdata *drv = platform_get_drvdata(pdev);
  1178. device_destroy(drv->stats_class, drv->dev_no);
  1179. class_destroy(drv->stats_class);
  1180. cdev_del(&drv->stats_cdev);
  1181. unregister_chrdev_region(drv->dev_no, 1);
  1182. debugfs_remove_recursive(drv->root);
  1183. #if IS_ENABLED(CONFIG_SEC_PM)
  1184. unregister_trace_suspend_resume(
  1185. qcom_stats_debug_suspend_trace_probe, NULL);
  1186. #endif
  1187. return 0;
  1188. }
  1189. static int qcom_stats_suspend(struct device *dev)
  1190. {
  1191. struct stats_drvdata *drv = dev_get_drvdata(dev);
  1192. struct sleep_stats *tmp;
  1193. void __iomem *reg = NULL;
  1194. int i;
  1195. u32 stats_id = 0;
  1196. if (!subsystem_stats_debug_on)
  1197. return 0;
  1198. mutex_lock(&sleep_stats_mutex);
  1199. for (i = 0; i < ARRAY_SIZE(subsystems); i++) {
  1200. tmp = qcom_smem_get(subsystems[i].pid, subsystems[i].smem_item, NULL);
  1201. if (IS_ERR(tmp)) {
  1202. subsystems[i].not_present = true;
  1203. continue;
  1204. } else
  1205. subsystems[i].not_present = false;
  1206. qcom_stats_copy(tmp, b_subsystem_stats + i);
  1207. }
  1208. for (i = 0; i < drv->config->num_records; i++, stats_id++) {
  1209. if (drv->config->num_records > stats_id)
  1210. reg = drv->d[stats_id].base;
  1211. if (reg)
  1212. memcpy_fromio(b_system_stats + i, reg, sizeof(struct sleep_stats));
  1213. }
  1214. mutex_unlock(&sleep_stats_mutex);
  1215. return 0;
  1216. }
  1217. static int qcom_stats_resume(struct device *dev)
  1218. {
  1219. struct stats_drvdata *drv = dev_get_drvdata(dev);
  1220. struct sleep_stats *tmp;
  1221. void __iomem *reg = NULL;
  1222. int i;
  1223. u32 stats_id = 0;
  1224. if (!subsystem_stats_debug_on)
  1225. return 0;
  1226. mutex_lock(&sleep_stats_mutex);
  1227. for (i = 0; i < ARRAY_SIZE(subsystems); i++) {
  1228. if (subsystems[i].not_present)
  1229. continue;
  1230. tmp = qcom_smem_get(subsystems[i].pid, subsystems[i].smem_item, NULL);
  1231. if (IS_ERR(tmp))
  1232. continue;
  1233. qcom_stats_copy(tmp, a_subsystem_stats + i);
  1234. }
  1235. for (i = 0; i < drv->config->num_records; i++, stats_id++) {
  1236. if (drv->config->num_records > stats_id)
  1237. reg = drv->d[stats_id].base;
  1238. if (reg)
  1239. memcpy_fromio(a_system_stats + i, reg, sizeof(struct sleep_stats));
  1240. }
  1241. mutex_unlock(&sleep_stats_mutex);
  1242. return 0;
  1243. }
  1244. static const struct stats_config rpm_data = {
  1245. .stats_offset = 0,
  1246. .num_records = 2,
  1247. .appended_stats_avail = true,
  1248. .dynamic_offset = true,
  1249. .subsystem_stats_in_smem = false,
  1250. };
  1251. /* Older RPM firmwares have the stats at a fixed offset instead */
  1252. static const struct stats_config rpm_data_dba0 = {
  1253. .stats_offset = 0xdba0,
  1254. .num_records = 2,
  1255. .appended_stats_avail = true,
  1256. .dynamic_offset = false,
  1257. .subsystem_stats_in_smem = false,
  1258. };
  1259. static const struct stats_config rpmh_data_sdm845 = {
  1260. .stats_offset = 0x48,
  1261. .num_records = 2,
  1262. .appended_stats_avail = false,
  1263. .dynamic_offset = false,
  1264. .subsystem_stats_in_smem = true,
  1265. };
  1266. static const struct stats_config rpmh_data = {
  1267. .stats_offset = 0x48,
  1268. .ddr_stats_offset = 0xb8,
  1269. .num_records = 3,
  1270. .appended_stats_avail = false,
  1271. .dynamic_offset = false,
  1272. .subsystem_stats_in_smem = true,
  1273. };
  1274. static const struct stats_config rpmh_v2_data = {
  1275. .stats_offset = 0x48,
  1276. .ddr_stats_offset = 0xb8,
  1277. .cx_vote_offset = 0xb8,
  1278. .num_records = 3,
  1279. .appended_stats_avail = false,
  1280. .dynamic_offset = false,
  1281. .subsystem_stats_in_smem = true,
  1282. .read_ddr_votes = true,
  1283. };
  1284. static const struct stats_config rpmh_v3_data = {
  1285. .stats_offset = 0x48,
  1286. .ddr_stats_offset = 0xb8,
  1287. .cx_vote_offset = 0xb8,
  1288. .num_records = 3,
  1289. .appended_stats_avail = false,
  1290. .dynamic_offset = false,
  1291. .subsystem_stats_in_smem = true,
  1292. .read_ddr_votes = true,
  1293. .ddr_freq_update = true,
  1294. };
  1295. static const struct stats_config rpmh_v4_data = {
  1296. .stats_offset = 0x48,
  1297. .ddr_stats_offset = 0xb8,
  1298. .cx_vote_offset = 0xb8,
  1299. .num_records = 3,
  1300. .appended_stats_avail = false,
  1301. .dynamic_offset = false,
  1302. .subsystem_stats_in_smem = true,
  1303. .read_ddr_votes = true,
  1304. .ddr_freq_update = true,
  1305. .island_stats_avail = true,
  1306. };
  1307. static const struct of_device_id qcom_stats_table[] = {
  1308. { .compatible = "qcom,apq8084-rpm-stats", .data = &rpm_data_dba0 },
  1309. { .compatible = "qcom,msm8226-rpm-stats", .data = &rpm_data_dba0 },
  1310. { .compatible = "qcom,msm8916-rpm-stats", .data = &rpm_data_dba0 },
  1311. { .compatible = "qcom,msm8974-rpm-stats", .data = &rpm_data_dba0 },
  1312. { .compatible = "qcom,rpm-stats", .data = &rpm_data },
  1313. { .compatible = "qcom,rpmh-stats", .data = &rpmh_data },
  1314. { .compatible = "qcom,rpmh-stats-v2", .data = &rpmh_v2_data },
  1315. { .compatible = "qcom,rpmh-stats-v3", .data = &rpmh_v3_data },
  1316. { .compatible = "qcom,rpmh-stats-v4", .data = &rpmh_v4_data },
  1317. { .compatible = "qcom,sdm845-rpmh-stats", .data = &rpmh_data_sdm845 },
  1318. { }
  1319. };
  1320. MODULE_DEVICE_TABLE(of, qcom_stats_table);
  1321. static const struct dev_pm_ops qcom_stats_pm_ops = {
  1322. .suspend_late = qcom_stats_suspend,
  1323. .resume_early = qcom_stats_resume,
  1324. };
  1325. static struct platform_driver qcom_stats = {
  1326. .probe = qcom_stats_probe,
  1327. .remove = qcom_stats_remove,
  1328. .driver = {
  1329. .name = "qcom_stats",
  1330. .of_match_table = qcom_stats_table,
  1331. .pm = &qcom_stats_pm_ops,
  1332. },
  1333. };
  1334. static int __init qcom_stats_init(void)
  1335. {
  1336. return platform_driver_register(&qcom_stats);
  1337. }
  1338. late_initcall(qcom_stats_init);
  1339. static void __exit qcom_stats_exit(void)
  1340. {
  1341. platform_driver_unregister(&qcom_stats);
  1342. }
  1343. module_exit(qcom_stats_exit)
  1344. MODULE_DESCRIPTION("Qualcomm Technologies, Inc. (QTI) Stats driver");
  1345. MODULE_LICENSE("GPL v2");