nsp32.c 86 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  4. * Copyright (C) 2001, 2002, 2003
  5. * YOKOTA Hiroshi <[email protected]>
  6. * GOTO Masanori <[email protected]>, <[email protected]>
  7. *
  8. * Revision History:
  9. * 1.0: Initial Release.
  10. * 1.1: Add /proc SDTR status.
  11. * Remove obsolete error handler nsp32_reset.
  12. * Some clean up.
  13. * 1.2: PowerPC (big endian) support.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/timer.h>
  20. #include <linux/ioport.h>
  21. #include <linux/major.h>
  22. #include <linux/blkdev.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/pci.h>
  25. #include <linux/delay.h>
  26. #include <linux/ctype.h>
  27. #include <linux/dma-mapping.h>
  28. #include <asm/dma.h>
  29. #include <asm/io.h>
  30. #include <scsi/scsi.h>
  31. #include <scsi/scsi_cmnd.h>
  32. #include <scsi/scsi_device.h>
  33. #include <scsi/scsi_host.h>
  34. #include <scsi/scsi_ioctl.h>
  35. #include "nsp32.h"
  36. /***********************************************************************
  37. * Module parameters
  38. */
  39. static int trans_mode = 0; /* default: BIOS */
  40. module_param (trans_mode, int, 0);
  41. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  42. #define ASYNC_MODE 1
  43. #define ULTRA20M_MODE 2
  44. static bool auto_param = 0; /* default: ON */
  45. module_param (auto_param, bool, 0);
  46. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  47. static bool disc_priv = 1; /* default: OFF */
  48. module_param (disc_priv, bool, 0);
  49. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  50. MODULE_AUTHOR("YOKOTA Hiroshi <[email protected]>, GOTO Masanori <[email protected]>");
  51. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  52. MODULE_LICENSE("GPL");
  53. static const char *nsp32_release_version = "1.2";
  54. /****************************************************************************
  55. * Supported hardware
  56. */
  57. static struct pci_device_id nsp32_pci_table[] = {
  58. {
  59. .vendor = PCI_VENDOR_ID_IODATA,
  60. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  61. .subvendor = PCI_ANY_ID,
  62. .subdevice = PCI_ANY_ID,
  63. .driver_data = MODEL_IODATA,
  64. },
  65. {
  66. .vendor = PCI_VENDOR_ID_WORKBIT,
  67. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  68. .subvendor = PCI_ANY_ID,
  69. .subdevice = PCI_ANY_ID,
  70. .driver_data = MODEL_KME,
  71. },
  72. {
  73. .vendor = PCI_VENDOR_ID_WORKBIT,
  74. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  75. .subvendor = PCI_ANY_ID,
  76. .subdevice = PCI_ANY_ID,
  77. .driver_data = MODEL_WORKBIT,
  78. },
  79. {
  80. .vendor = PCI_VENDOR_ID_WORKBIT,
  81. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  82. .subvendor = PCI_ANY_ID,
  83. .subdevice = PCI_ANY_ID,
  84. .driver_data = MODEL_PCI_WORKBIT,
  85. },
  86. {
  87. .vendor = PCI_VENDOR_ID_WORKBIT,
  88. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  89. .subvendor = PCI_ANY_ID,
  90. .subdevice = PCI_ANY_ID,
  91. .driver_data = MODEL_LOGITEC,
  92. },
  93. {
  94. .vendor = PCI_VENDOR_ID_WORKBIT,
  95. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  96. .subvendor = PCI_ANY_ID,
  97. .subdevice = PCI_ANY_ID,
  98. .driver_data = MODEL_PCI_LOGITEC,
  99. },
  100. {
  101. .vendor = PCI_VENDOR_ID_WORKBIT,
  102. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  103. .subvendor = PCI_ANY_ID,
  104. .subdevice = PCI_ANY_ID,
  105. .driver_data = MODEL_PCI_MELCO,
  106. },
  107. {
  108. .vendor = PCI_VENDOR_ID_WORKBIT,
  109. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  110. .subvendor = PCI_ANY_ID,
  111. .subdevice = PCI_ANY_ID,
  112. .driver_data = MODEL_PCI_MELCO,
  113. },
  114. {0,0,},
  115. };
  116. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  117. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  118. /*
  119. * Period/AckWidth speed conversion table
  120. *
  121. * Note: This period/ackwidth speed table must be in descending order.
  122. */
  123. static nsp32_sync_table nsp32_sync_table_40M[] = {
  124. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  125. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  126. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  127. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  128. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  129. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  130. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  131. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  132. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  133. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  134. };
  135. static nsp32_sync_table nsp32_sync_table_20M[] = {
  136. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  137. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  138. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  139. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  140. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  141. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  142. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  143. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  144. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  145. };
  146. static nsp32_sync_table nsp32_sync_table_pci[] = {
  147. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  148. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  149. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  150. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  151. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  152. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  153. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  154. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  155. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  156. };
  157. /*
  158. * function declaration
  159. */
  160. /* module entry point */
  161. static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  162. static void nsp32_remove(struct pci_dev *);
  163. static int __init init_nsp32 (void);
  164. static void __exit exit_nsp32 (void);
  165. /* struct struct scsi_host_template */
  166. static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
  167. static int nsp32_detect (struct pci_dev *pdev);
  168. static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
  169. static const char *nsp32_info (struct Scsi_Host *);
  170. static int nsp32_release (struct Scsi_Host *);
  171. /* SCSI error handler */
  172. static int nsp32_eh_abort (struct scsi_cmnd *);
  173. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  174. /* generate SCSI message */
  175. static void nsp32_build_identify(struct scsi_cmnd *);
  176. static void nsp32_build_nop (struct scsi_cmnd *);
  177. static void nsp32_build_reject (struct scsi_cmnd *);
  178. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char,
  179. unsigned char);
  180. /* SCSI message handler */
  181. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  182. static void nsp32_msgout_occur (struct scsi_cmnd *);
  183. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long,
  184. unsigned short);
  185. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  186. static int nsp32_selection_autopara(struct scsi_cmnd *);
  187. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  188. static void nsp32_scsi_done (struct scsi_cmnd *);
  189. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  190. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  191. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  192. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  193. /* SCSI SDTR */
  194. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  195. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *,
  196. unsigned char);
  197. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  198. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *,
  199. unsigned char *, unsigned char *);
  200. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *,
  201. int, unsigned char);
  202. /* SCSI bus status handler */
  203. static void nsp32_wait_req (nsp32_hw_data *, int);
  204. static void nsp32_wait_sack (nsp32_hw_data *, int);
  205. static void nsp32_sack_assert (nsp32_hw_data *);
  206. static void nsp32_sack_negate (nsp32_hw_data *);
  207. static void nsp32_do_bus_reset(nsp32_hw_data *);
  208. /* hardware interrupt handler */
  209. static irqreturn_t do_nsp32_isr(int, void *);
  210. /* initialize hardware */
  211. static int nsp32hw_init(nsp32_hw_data *);
  212. /* EEPROM handler */
  213. static int nsp32_getprom_param (nsp32_hw_data *);
  214. static int nsp32_getprom_at24 (nsp32_hw_data *);
  215. static int nsp32_getprom_c16 (nsp32_hw_data *);
  216. static void nsp32_prom_start (nsp32_hw_data *);
  217. static void nsp32_prom_stop (nsp32_hw_data *);
  218. static int nsp32_prom_read (nsp32_hw_data *, int);
  219. static int nsp32_prom_read_bit (nsp32_hw_data *);
  220. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  221. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  222. static int nsp32_prom_get (nsp32_hw_data *, int);
  223. /* debug/warning/info message */
  224. static void nsp32_message (const char *, int, char *, char *, ...);
  225. #ifdef NSP32_DEBUG
  226. static void nsp32_dmessage(const char *, int, int, char *, ...);
  227. #endif
  228. /*
  229. * max_sectors is currently limited up to 128.
  230. */
  231. static struct scsi_host_template nsp32_template = {
  232. .proc_name = "nsp32",
  233. .name = "Workbit NinjaSCSI-32Bi/UDE",
  234. .show_info = nsp32_show_info,
  235. .info = nsp32_info,
  236. .queuecommand = nsp32_queuecommand,
  237. .can_queue = 1,
  238. .sg_tablesize = NSP32_SG_SIZE,
  239. .max_sectors = 128,
  240. .this_id = NSP32_HOST_SCSIID,
  241. .dma_boundary = PAGE_SIZE - 1,
  242. .eh_abort_handler = nsp32_eh_abort,
  243. .eh_host_reset_handler = nsp32_eh_host_reset,
  244. /* .highmem_io = 1, */
  245. .cmd_size = sizeof(struct nsp32_cmd_priv),
  246. };
  247. #include "nsp32_io.h"
  248. /***********************************************************************
  249. * debug, error print
  250. */
  251. #ifndef NSP32_DEBUG
  252. # define NSP32_DEBUG_MASK 0x000000
  253. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  254. # define nsp32_dbg(mask, args...) /* */
  255. #else
  256. # define NSP32_DEBUG_MASK 0xffffff
  257. # define nsp32_msg(type, args...) \
  258. nsp32_message (__func__, __LINE__, (type), args)
  259. # define nsp32_dbg(mask, args...) \
  260. nsp32_dmessage(__func__, __LINE__, (mask), args)
  261. #endif
  262. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  263. #define NSP32_DEBUG_REGISTER BIT(1)
  264. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  265. #define NSP32_DEBUG_INTR BIT(3)
  266. #define NSP32_DEBUG_SGLIST BIT(4)
  267. #define NSP32_DEBUG_BUSFREE BIT(5)
  268. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  269. #define NSP32_DEBUG_RESELECTION BIT(7)
  270. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  271. #define NSP32_DEBUG_EEPROM BIT(9)
  272. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  273. #define NSP32_DEBUG_BUSRESET BIT(11)
  274. #define NSP32_DEBUG_RESTART BIT(12)
  275. #define NSP32_DEBUG_SYNC BIT(13)
  276. #define NSP32_DEBUG_WAIT BIT(14)
  277. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  278. #define NSP32_DEBUG_PROC BIT(16)
  279. #define NSP32_DEBUG_INIT BIT(17)
  280. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  281. #define NSP32_DEBUG_BUF_LEN 100
  282. __printf(4, 5)
  283. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  284. {
  285. va_list args;
  286. char buf[NSP32_DEBUG_BUF_LEN];
  287. va_start(args, fmt);
  288. vsnprintf(buf, sizeof(buf), fmt, args);
  289. va_end(args);
  290. #ifndef NSP32_DEBUG
  291. printk("%snsp32: %s\n", type, buf);
  292. #else
  293. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  294. #endif
  295. }
  296. #ifdef NSP32_DEBUG
  297. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  298. {
  299. va_list args;
  300. char buf[NSP32_DEBUG_BUF_LEN];
  301. va_start(args, fmt);
  302. vsnprintf(buf, sizeof(buf), fmt, args);
  303. va_end(args);
  304. if (mask & NSP32_DEBUG_MASK) {
  305. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  306. }
  307. }
  308. #endif
  309. #ifdef NSP32_DEBUG
  310. # include "nsp32_debug.c"
  311. #else
  312. # define show_command(arg) /* */
  313. # define show_busphase(arg) /* */
  314. # define show_autophase(arg) /* */
  315. #endif
  316. /*
  317. * IDENTIFY Message
  318. */
  319. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  320. {
  321. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  322. int pos = data->msgout_len;
  323. int mode = FALSE;
  324. /* XXX: Auto DiscPriv detection is progressing... */
  325. if (disc_priv == 0) {
  326. /* mode = TRUE; */
  327. }
  328. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  329. data->msgout_len = pos;
  330. }
  331. /*
  332. * SDTR Message Routine
  333. */
  334. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  335. unsigned char period,
  336. unsigned char offset)
  337. {
  338. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  339. int pos = data->msgout_len;
  340. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  341. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  342. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  343. data->msgoutbuf[pos] = period; pos++;
  344. data->msgoutbuf[pos] = offset; pos++;
  345. data->msgout_len = pos;
  346. }
  347. /*
  348. * No Operation Message
  349. */
  350. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  351. {
  352. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  353. int pos = data->msgout_len;
  354. if (pos != 0) {
  355. nsp32_msg(KERN_WARNING,
  356. "Some messages are already contained!");
  357. return;
  358. }
  359. data->msgoutbuf[pos] = NOP; pos++;
  360. data->msgout_len = pos;
  361. }
  362. /*
  363. * Reject Message
  364. */
  365. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  366. {
  367. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  368. int pos = data->msgout_len;
  369. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  370. data->msgout_len = pos;
  371. }
  372. /*
  373. * timer
  374. */
  375. #if 0
  376. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  377. {
  378. unsigned int base = SCpnt->host->io_port;
  379. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  380. if (time & (~TIMER_CNT_MASK)) {
  381. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  382. }
  383. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  384. }
  385. #endif
  386. /*
  387. * set SCSI command and other parameter to asic, and start selection phase
  388. */
  389. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  390. {
  391. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  392. unsigned int base = SCpnt->device->host->io_port;
  393. unsigned int host_id = SCpnt->device->host->this_id;
  394. unsigned char target = scmd_id(SCpnt);
  395. nsp32_autoparam *param = data->autoparam;
  396. unsigned char phase;
  397. int i, ret;
  398. unsigned int msgout;
  399. u16_le s;
  400. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  401. /*
  402. * check bus free
  403. */
  404. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  405. if (phase != BUSMON_BUS_FREE) {
  406. nsp32_msg(KERN_WARNING, "bus busy");
  407. show_busphase(phase & BUSMON_PHASE_MASK);
  408. SCpnt->result = DID_BUS_BUSY << 16;
  409. return FALSE;
  410. }
  411. /*
  412. * message out
  413. *
  414. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  415. * over 3 messages needs another routine.
  416. */
  417. if (data->msgout_len == 0) {
  418. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  419. SCpnt->result = DID_ERROR << 16;
  420. return FALSE;
  421. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  422. msgout = 0;
  423. for (i = 0; i < data->msgout_len; i++) {
  424. /*
  425. * the sending order of the message is:
  426. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  427. * MCNT 2: MSG#1 -> MSG#2
  428. * MCNT 1: MSG#2
  429. */
  430. msgout >>= 8;
  431. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  432. }
  433. msgout |= MV_VALID; /* MV valid */
  434. msgout |= (unsigned int)data->msgout_len; /* len */
  435. } else {
  436. /* data->msgout_len > 3 */
  437. msgout = 0;
  438. }
  439. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n",
  440. // nsp32_read2(base, SEL_TIME_OUT));
  441. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  442. /*
  443. * setup asic parameter
  444. */
  445. memset(param, 0, sizeof(nsp32_autoparam));
  446. /* cdb */
  447. for (i = 0; i < SCpnt->cmd_len; i++) {
  448. param->cdb[4 * i] = SCpnt->cmnd[i];
  449. }
  450. /* outgoing messages */
  451. param->msgout = cpu_to_le32(msgout);
  452. /* syncreg, ackwidth, target id, SREQ sampling rate */
  453. param->syncreg = data->cur_target->syncreg;
  454. param->ackwidth = data->cur_target->ackwidth;
  455. param->target_id = BIT(host_id) | BIT(target);
  456. param->sample_reg = data->cur_target->sample_reg;
  457. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  458. /* command control */
  459. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  460. AUTOSCSI_START |
  461. AUTO_MSGIN_00_OR_04 |
  462. AUTO_MSGIN_02 |
  463. AUTO_ATN );
  464. /* transfer control */
  465. s = 0;
  466. switch (data->trans_method) {
  467. case NSP32_TRANSFER_BUSMASTER:
  468. s |= BM_START;
  469. break;
  470. case NSP32_TRANSFER_MMIO:
  471. s |= CB_MMIO_MODE;
  472. break;
  473. case NSP32_TRANSFER_PIO:
  474. s |= CB_IO_MODE;
  475. break;
  476. default:
  477. nsp32_msg(KERN_ERR, "unknown trans_method");
  478. break;
  479. }
  480. /*
  481. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  482. * For bus master transfer, it's taken off.
  483. */
  484. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  485. param->transfer_control = cpu_to_le16(s);
  486. /* sg table addr */
  487. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  488. /*
  489. * transfer parameter to ASIC
  490. */
  491. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  492. nsp32_write2(base, COMMAND_CONTROL,
  493. CLEAR_CDB_FIFO_POINTER | AUTO_PARAMETER );
  494. /*
  495. * Check arbitration
  496. */
  497. ret = nsp32_arbitration(SCpnt, base);
  498. return ret;
  499. }
  500. /*
  501. * Selection with AUTO SCSI (without AUTO PARAMETER)
  502. */
  503. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  504. {
  505. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  506. unsigned int base = SCpnt->device->host->io_port;
  507. unsigned int host_id = SCpnt->device->host->this_id;
  508. unsigned char target = scmd_id(SCpnt);
  509. unsigned char phase;
  510. int status;
  511. unsigned short command = 0;
  512. unsigned int msgout = 0;
  513. int i;
  514. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  515. /*
  516. * IRQ disable
  517. */
  518. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  519. /*
  520. * check bus line
  521. */
  522. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  523. if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
  524. nsp32_msg(KERN_WARNING, "bus busy");
  525. SCpnt->result = DID_BUS_BUSY << 16;
  526. status = 1;
  527. goto out;
  528. }
  529. /*
  530. * clear execph
  531. */
  532. nsp32_read2(base, SCSI_EXECUTE_PHASE);
  533. /*
  534. * clear FIFO counter to set CDBs
  535. */
  536. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  537. /*
  538. * set CDB0 - CDB15
  539. */
  540. for (i = 0; i < SCpnt->cmd_len; i++) {
  541. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  542. }
  543. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  544. /*
  545. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  546. */
  547. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID,
  548. BIT(host_id) | BIT(target));
  549. /*
  550. * set SCSI MSGOUT REG
  551. *
  552. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  553. * over 3 messages needs another routine.
  554. */
  555. if (data->msgout_len == 0) {
  556. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  557. SCpnt->result = DID_ERROR << 16;
  558. status = 1;
  559. goto out;
  560. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  561. msgout = 0;
  562. for (i = 0; i < data->msgout_len; i++) {
  563. /*
  564. * the sending order of the message is:
  565. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  566. * MCNT 2: MSG#1 -> MSG#2
  567. * MCNT 1: MSG#2
  568. */
  569. msgout >>= 8;
  570. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  571. }
  572. msgout |= MV_VALID; /* MV valid */
  573. msgout |= (unsigned int)data->msgout_len; /* len */
  574. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  575. } else {
  576. /* data->msgout_len > 3 */
  577. nsp32_write4(base, SCSI_MSG_OUT, 0);
  578. }
  579. /*
  580. * set selection timeout(= 250ms)
  581. */
  582. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  583. /*
  584. * set SREQ hazard killer sampling rate
  585. *
  586. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  587. * check other internal clock!
  588. */
  589. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  590. /*
  591. * clear Arbit
  592. */
  593. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  594. /*
  595. * set SYNCREG
  596. * Don't set BM_START_ADR before setting this register.
  597. */
  598. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  599. /*
  600. * set ACKWIDTH
  601. */
  602. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  603. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  604. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  605. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  606. nsp32_read4(base, SGT_ADR),
  607. nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  608. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  609. data->msgout_len, msgout);
  610. /*
  611. * set SGT ADDR (physical address)
  612. */
  613. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  614. /*
  615. * set TRANSFER CONTROL REG
  616. */
  617. command = 0;
  618. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  619. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  620. if (scsi_bufflen(SCpnt) > 0) {
  621. command |= BM_START;
  622. }
  623. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  624. command |= CB_MMIO_MODE;
  625. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  626. command |= CB_IO_MODE;
  627. }
  628. nsp32_write2(base, TRANSFER_CONTROL, command);
  629. /*
  630. * start AUTO SCSI, kick off arbitration
  631. */
  632. command = (CLEAR_CDB_FIFO_POINTER |
  633. AUTOSCSI_START |
  634. AUTO_MSGIN_00_OR_04 |
  635. AUTO_MSGIN_02 |
  636. AUTO_ATN);
  637. nsp32_write2(base, COMMAND_CONTROL, command);
  638. /*
  639. * Check arbitration
  640. */
  641. status = nsp32_arbitration(SCpnt, base);
  642. out:
  643. /*
  644. * IRQ enable
  645. */
  646. nsp32_write2(base, IRQ_CONTROL, 0);
  647. return status;
  648. }
  649. /*
  650. * Arbitration Status Check
  651. *
  652. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  653. * Using udelay(1) consumes CPU time and system time, but
  654. * arbitration delay time is defined minimal 2.4us in SCSI
  655. * specification, thus udelay works as coarse grained wait timer.
  656. */
  657. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  658. {
  659. unsigned char arbit;
  660. int status = TRUE;
  661. int time = 0;
  662. do {
  663. arbit = nsp32_read1(base, ARBIT_STATUS);
  664. time++;
  665. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  666. (time <= ARBIT_TIMEOUT_TIME));
  667. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  668. "arbit: 0x%x, delay time: %d", arbit, time);
  669. if (arbit & ARBIT_WIN) {
  670. /* Arbitration succeeded */
  671. SCpnt->result = DID_OK << 16;
  672. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  673. } else if (arbit & ARBIT_FAIL) {
  674. /* Arbitration failed */
  675. SCpnt->result = DID_BUS_BUSY << 16;
  676. status = FALSE;
  677. } else {
  678. /*
  679. * unknown error or ARBIT_GO timeout,
  680. * something lock up! guess no connection.
  681. */
  682. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  683. SCpnt->result = DID_NO_CONNECT << 16;
  684. status = FALSE;
  685. }
  686. /*
  687. * clear Arbit
  688. */
  689. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  690. return status;
  691. }
  692. /*
  693. * reselection
  694. *
  695. * Note: This reselection routine is called from msgin_occur,
  696. * reselection target id&lun must be already set.
  697. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  698. */
  699. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  700. {
  701. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  702. unsigned int host_id = SCpnt->device->host->this_id;
  703. unsigned int base = SCpnt->device->host->io_port;
  704. unsigned char tmpid, newid;
  705. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  706. /*
  707. * calculate reselected SCSI ID
  708. */
  709. tmpid = nsp32_read1(base, RESELECT_ID);
  710. tmpid &= (~BIT(host_id));
  711. newid = 0;
  712. while (tmpid) {
  713. if (tmpid & 1) {
  714. break;
  715. }
  716. tmpid >>= 1;
  717. newid++;
  718. }
  719. /*
  720. * If reselected New ID:LUN is not existed
  721. * or current nexus is not existed, unexpected
  722. * reselection is occurred. Send reject message.
  723. */
  724. if (newid >= ARRAY_SIZE(data->lunt) ||
  725. newlun >= ARRAY_SIZE(data->lunt[0])) {
  726. nsp32_msg(KERN_WARNING, "unknown id/lun");
  727. return FALSE;
  728. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  729. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  730. return FALSE;
  731. }
  732. data->cur_id = newid;
  733. data->cur_lun = newlun;
  734. data->cur_target = &(data->target[newid]);
  735. data->cur_lunt = &(data->lunt[newid][newlun]);
  736. /* reset SACK/SavedACK counter (or ALL clear?) */
  737. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  738. return TRUE;
  739. }
  740. /*
  741. * nsp32_setup_sg_table - build scatter gather list for transfer data
  742. * with bus master.
  743. *
  744. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  745. */
  746. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  747. {
  748. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  749. struct scatterlist *sg;
  750. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  751. int num, i;
  752. u32_le l;
  753. if (sgt == NULL) {
  754. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  755. return FALSE;
  756. }
  757. num = scsi_dma_map(SCpnt);
  758. if (!num)
  759. return TRUE;
  760. else if (num < 0)
  761. return FALSE;
  762. else {
  763. scsi_for_each_sg(SCpnt, sg, num, i) {
  764. /*
  765. * Build nsp32_sglist, substitute sg dma addresses.
  766. */
  767. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  768. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  769. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  770. nsp32_msg(KERN_ERR,
  771. "can't transfer over 64KB at a time, "
  772. "size=0x%x", le32_to_cpu(sgt[i].len));
  773. return FALSE;
  774. }
  775. nsp32_dbg(NSP32_DEBUG_SGLIST,
  776. "num 0x%x : addr 0x%lx len 0x%lx",
  777. i,
  778. le32_to_cpu(sgt[i].addr),
  779. le32_to_cpu(sgt[i].len ));
  780. }
  781. /* set end mark */
  782. l = le32_to_cpu(sgt[num-1].len);
  783. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  784. }
  785. return TRUE;
  786. }
  787. static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt)
  788. {
  789. void (*done)(struct scsi_cmnd *) = scsi_done;
  790. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  791. nsp32_target *target;
  792. nsp32_lunt *cur_lunt;
  793. int ret;
  794. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  795. "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
  796. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  797. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0],
  798. SCpnt->cmd_len, scsi_sg_count(SCpnt), scsi_sglist(SCpnt),
  799. scsi_bufflen(SCpnt));
  800. if (data->CurrentSC != NULL) {
  801. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  802. data->CurrentSC = NULL;
  803. SCpnt->result = DID_NO_CONNECT << 16;
  804. done(SCpnt);
  805. return 0;
  806. }
  807. /* check target ID is not same as this initiator ID */
  808. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  809. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
  810. SCpnt->result = DID_BAD_TARGET << 16;
  811. done(SCpnt);
  812. return 0;
  813. }
  814. /* check target LUN is allowable value */
  815. if (SCpnt->device->lun >= MAX_LUN) {
  816. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  817. SCpnt->result = DID_BAD_TARGET << 16;
  818. done(SCpnt);
  819. return 0;
  820. }
  821. show_command(SCpnt);
  822. data->CurrentSC = SCpnt;
  823. nsp32_priv(SCpnt)->status = SAM_STAT_CHECK_CONDITION;
  824. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  825. /* initialize data */
  826. data->msgout_len = 0;
  827. data->msgin_len = 0;
  828. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  829. cur_lunt->SCpnt = SCpnt;
  830. cur_lunt->save_datp = 0;
  831. cur_lunt->msgin03 = FALSE;
  832. data->cur_lunt = cur_lunt;
  833. data->cur_id = SCpnt->device->id;
  834. data->cur_lun = SCpnt->device->lun;
  835. ret = nsp32_setup_sg_table(SCpnt);
  836. if (ret == FALSE) {
  837. nsp32_msg(KERN_ERR, "SGT fail");
  838. SCpnt->result = DID_ERROR << 16;
  839. nsp32_scsi_done(SCpnt);
  840. return 0;
  841. }
  842. /* Build IDENTIFY */
  843. nsp32_build_identify(SCpnt);
  844. /*
  845. * If target is the first time to transfer after the reset
  846. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  847. * message SDTR is needed to do synchronous transfer.
  848. */
  849. target = &data->target[scmd_id(SCpnt)];
  850. data->cur_target = target;
  851. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  852. unsigned char period, offset;
  853. if (trans_mode != ASYNC_MODE) {
  854. nsp32_set_max_sync(data, target, &period, &offset);
  855. nsp32_build_sdtr(SCpnt, period, offset);
  856. target->sync_flag |= SDTR_INITIATOR;
  857. } else {
  858. nsp32_set_async(data, target);
  859. target->sync_flag |= SDTR_DONE;
  860. }
  861. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  862. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  863. target->limit_entry, period, offset);
  864. } else if (target->sync_flag & SDTR_INITIATOR) {
  865. /*
  866. * It was negotiating SDTR with target, sending from the
  867. * initiator, but there are no chance to remove this flag.
  868. * Set async because we don't get proper negotiation.
  869. */
  870. nsp32_set_async(data, target);
  871. target->sync_flag &= ~SDTR_INITIATOR;
  872. target->sync_flag |= SDTR_DONE;
  873. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  874. "SDTR_INITIATOR: fall back to async");
  875. } else if (target->sync_flag & SDTR_TARGET) {
  876. /*
  877. * It was negotiating SDTR with target, sending from target,
  878. * but there are no chance to remove this flag. Set async
  879. * because we don't get proper negotiation.
  880. */
  881. nsp32_set_async(data, target);
  882. target->sync_flag &= ~SDTR_TARGET;
  883. target->sync_flag |= SDTR_DONE;
  884. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  885. "Unknown SDTR from target is reached, fall back to async.");
  886. }
  887. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  888. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  889. SCpnt->device->id, target->sync_flag, target->syncreg,
  890. target->ackwidth);
  891. /* Selection */
  892. if (auto_param == 0) {
  893. ret = nsp32_selection_autopara(SCpnt);
  894. } else {
  895. ret = nsp32_selection_autoscsi(SCpnt);
  896. }
  897. if (ret != TRUE) {
  898. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  899. nsp32_scsi_done(SCpnt);
  900. }
  901. return 0;
  902. }
  903. static DEF_SCSI_QCMD(nsp32_queuecommand)
  904. /* initialize asic */
  905. static int nsp32hw_init(nsp32_hw_data *data)
  906. {
  907. unsigned int base = data->BaseAddress;
  908. unsigned short irq_stat;
  909. unsigned long lc_reg;
  910. unsigned char power;
  911. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  912. if ((lc_reg & 0xff00) == 0) {
  913. lc_reg |= (0x20 << 8);
  914. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  915. }
  916. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  917. nsp32_write2(base, TRANSFER_CONTROL, 0);
  918. nsp32_write4(base, BM_CNT, 0);
  919. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  920. do {
  921. irq_stat = nsp32_read2(base, IRQ_STATUS);
  922. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  923. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  924. /*
  925. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  926. * designated by specification.
  927. */
  928. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  929. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  930. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  931. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  932. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  933. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  934. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  935. } else {
  936. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  937. }
  938. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  939. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  940. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  941. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  942. nsp32_index_write1(base, BM_CYCLE,
  943. MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  944. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  945. /*
  946. * initialize MISC_WRRD register
  947. *
  948. * Note: Designated parameters is obeyed as following:
  949. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  950. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  951. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  952. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  953. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  954. * MISC_DELAYED_BMSTART: It's selected for safety.
  955. *
  956. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  957. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  958. * appropriate value before restarting bus master transfer.
  959. */
  960. nsp32_index_write2(base, MISC_WR,
  961. (SCSI_DIRECTION_DETECTOR_SELECT |
  962. DELAYED_BMSTART |
  963. MASTER_TERMINATION_SELECT |
  964. BMREQ_NEGATE_TIMING_SEL |
  965. AUTOSEL_TIMING_SEL |
  966. BMSTOP_CHANGE2_NONDATA_PHASE));
  967. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  968. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  969. if (!(power & SENSE)) {
  970. nsp32_msg(KERN_INFO, "term power on");
  971. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  972. }
  973. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  974. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  975. nsp32_write1(base, SYNC_REG, 0);
  976. nsp32_write1(base, ACK_WIDTH, 0);
  977. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  978. /*
  979. * enable to select designated IRQ (except for
  980. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  981. */
  982. nsp32_index_write2(base, IRQ_SELECT,
  983. IRQSELECT_TIMER_IRQ |
  984. IRQSELECT_SCSIRESET_IRQ |
  985. IRQSELECT_FIFO_SHLD_IRQ |
  986. IRQSELECT_RESELECT_IRQ |
  987. IRQSELECT_PHASE_CHANGE_IRQ |
  988. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  989. // IRQSELECT_BMCNTERR_IRQ |
  990. IRQSELECT_TARGET_ABORT_IRQ |
  991. IRQSELECT_MASTER_ABORT_IRQ );
  992. nsp32_write2(base, IRQ_CONTROL, 0);
  993. /* PCI LED off */
  994. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  995. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  996. return TRUE;
  997. }
  998. /* interrupt routine */
  999. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1000. {
  1001. nsp32_hw_data *data = dev_id;
  1002. unsigned int base = data->BaseAddress;
  1003. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1004. unsigned short auto_stat, irq_stat, trans_stat;
  1005. unsigned char busmon, busphase;
  1006. unsigned long flags;
  1007. int ret;
  1008. int handled = 0;
  1009. struct Scsi_Host *host = data->Host;
  1010. spin_lock_irqsave(host->host_lock, flags);
  1011. /*
  1012. * IRQ check, then enable IRQ mask
  1013. */
  1014. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1015. nsp32_dbg(NSP32_DEBUG_INTR,
  1016. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1017. /* is this interrupt comes from Ninja asic? */
  1018. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1019. nsp32_dbg(NSP32_DEBUG_INTR,
  1020. "shared interrupt: irq other 0x%x", irq_stat);
  1021. goto out2;
  1022. }
  1023. handled = 1;
  1024. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1025. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1026. busphase = busmon & BUSMON_PHASE_MASK;
  1027. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1028. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1029. nsp32_msg(KERN_INFO, "card disconnect");
  1030. if (data->CurrentSC != NULL) {
  1031. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1032. SCpnt->result = DID_BAD_TARGET << 16;
  1033. nsp32_scsi_done(SCpnt);
  1034. }
  1035. goto out;
  1036. }
  1037. /* Timer IRQ */
  1038. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1039. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1040. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1041. goto out;
  1042. }
  1043. /* SCSI reset */
  1044. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1045. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1046. nsp32_do_bus_reset(data);
  1047. if (SCpnt != NULL) {
  1048. SCpnt->result = DID_RESET << 16;
  1049. nsp32_scsi_done(SCpnt);
  1050. }
  1051. goto out;
  1052. }
  1053. if (SCpnt == NULL) {
  1054. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1055. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x",
  1056. irq_stat, trans_stat);
  1057. goto out;
  1058. }
  1059. /*
  1060. * AutoSCSI Interrupt.
  1061. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1062. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1063. * recorded when AutoSCSI sequencer has been processed.
  1064. */
  1065. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1066. /* getting SCSI executed phase */
  1067. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1068. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1069. /* Selection Timeout, go busfree phase. */
  1070. if (auto_stat & SELECTION_TIMEOUT) {
  1071. nsp32_dbg(NSP32_DEBUG_INTR,
  1072. "selection timeout occurred");
  1073. SCpnt->result = DID_TIME_OUT << 16;
  1074. nsp32_scsi_done(SCpnt);
  1075. goto out;
  1076. }
  1077. if (auto_stat & MSGOUT_PHASE) {
  1078. /*
  1079. * MsgOut phase was processed.
  1080. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1081. * completed. Thus, msgout_len must reset. Otherwise,
  1082. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1083. * then we will encounter the condition and check.
  1084. */
  1085. if (!(auto_stat & MSG_IN_OCCUER) &&
  1086. (data->msgout_len <= 3)) {
  1087. /*
  1088. * !MSG_IN_OCCUER && msgout_len <=3
  1089. * ---> AutoSCSI with MSGOUTreg is processed.
  1090. */
  1091. data->msgout_len = 0;
  1092. }
  1093. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1094. }
  1095. if ((auto_stat & DATA_IN_PHASE) &&
  1096. (scsi_get_resid(SCpnt) > 0) &&
  1097. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1098. printk( "auto+fifo\n");
  1099. //nsp32_pio_read(SCpnt);
  1100. }
  1101. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1102. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1103. nsp32_dbg(NSP32_DEBUG_INTR,
  1104. "Data in/out phase processed");
  1105. /* read BMCNT, SGT pointer addr */
  1106. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1107. nsp32_read4(base, BM_CNT));
  1108. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1109. nsp32_read4(base, SGT_ADR));
  1110. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1111. nsp32_read4(base, SACK_CNT));
  1112. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1113. nsp32_read4(base, SAVED_SACK_CNT));
  1114. scsi_set_resid(SCpnt, 0); /* all data transferred! */
  1115. }
  1116. /*
  1117. * MsgIn Occur
  1118. */
  1119. if (auto_stat & MSG_IN_OCCUER) {
  1120. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1121. }
  1122. /*
  1123. * MsgOut Occur
  1124. */
  1125. if (auto_stat & MSG_OUT_OCCUER) {
  1126. nsp32_msgout_occur(SCpnt);
  1127. }
  1128. /*
  1129. * Bus Free Occur
  1130. */
  1131. if (auto_stat & BUS_FREE_OCCUER) {
  1132. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1133. if (ret == TRUE) {
  1134. goto out;
  1135. }
  1136. }
  1137. if (auto_stat & STATUS_PHASE) {
  1138. /*
  1139. * Read CSB and substitute CSB for SCpnt->result
  1140. * to save status phase stutas byte.
  1141. * scsi error handler checks host_byte (DID_*:
  1142. * low level driver to indicate status), then checks
  1143. * status_byte (SCSI status byte).
  1144. */
  1145. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1146. }
  1147. if (auto_stat & ILLEGAL_PHASE) {
  1148. /* Illegal phase is detected. SACK is not back. */
  1149. nsp32_msg(KERN_WARNING,
  1150. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1151. /* TODO: currently we don't have any action... bus reset? */
  1152. /*
  1153. * To send back SACK, assert, wait, and negate.
  1154. */
  1155. nsp32_sack_assert(data);
  1156. nsp32_wait_req(data, NEGATE);
  1157. nsp32_sack_negate(data);
  1158. }
  1159. if (auto_stat & COMMAND_PHASE) {
  1160. /* nothing to do */
  1161. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1162. }
  1163. if (auto_stat & AUTOSCSI_BUSY) {
  1164. /* AutoSCSI is running */
  1165. }
  1166. show_autophase(auto_stat);
  1167. }
  1168. /* FIFO_SHLD_IRQ */
  1169. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1170. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1171. switch(busphase) {
  1172. case BUSPHASE_DATA_OUT:
  1173. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1174. //nsp32_pio_write(SCpnt);
  1175. break;
  1176. case BUSPHASE_DATA_IN:
  1177. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1178. //nsp32_pio_read(SCpnt);
  1179. break;
  1180. case BUSPHASE_STATUS:
  1181. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1182. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1183. break;
  1184. default:
  1185. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1186. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x",
  1187. irq_stat, trans_stat);
  1188. show_busphase(busphase);
  1189. break;
  1190. }
  1191. goto out;
  1192. }
  1193. /* Phase Change IRQ */
  1194. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1195. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1196. switch(busphase) {
  1197. case BUSPHASE_MESSAGE_IN:
  1198. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1199. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1200. break;
  1201. default:
  1202. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1203. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1204. irq_stat, trans_stat);
  1205. show_busphase(busphase);
  1206. break;
  1207. }
  1208. goto out;
  1209. }
  1210. /* PCI_IRQ */
  1211. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1212. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1213. /* Do nothing */
  1214. }
  1215. /* BMCNTERR_IRQ */
  1216. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1217. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1218. /*
  1219. * TODO: To be implemented improving bus master
  1220. * transfer reliability when BMCNTERR is occurred in
  1221. * AutoSCSI phase described in specification.
  1222. */
  1223. }
  1224. #if 0
  1225. nsp32_dbg(NSP32_DEBUG_INTR,
  1226. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1227. show_busphase(busphase);
  1228. #endif
  1229. out:
  1230. /* disable IRQ mask */
  1231. nsp32_write2(base, IRQ_CONTROL, 0);
  1232. out2:
  1233. spin_unlock_irqrestore(host->host_lock, flags);
  1234. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1235. return IRQ_RETVAL(handled);
  1236. }
  1237. static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
  1238. {
  1239. unsigned long flags;
  1240. nsp32_hw_data *data;
  1241. int hostno;
  1242. unsigned int base;
  1243. unsigned char mode_reg;
  1244. int id, speed;
  1245. long model;
  1246. hostno = host->host_no;
  1247. data = (nsp32_hw_data *)host->hostdata;
  1248. base = host->io_port;
  1249. seq_puts(m, "NinjaSCSI-32 status\n\n");
  1250. seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n",
  1251. nsp32_release_version);
  1252. seq_printf(m, "SCSI host No.: %d\n", hostno);
  1253. seq_printf(m, "IRQ: %d\n", host->irq);
  1254. seq_printf(m, "IO: 0x%lx-0x%lx\n",
  1255. host->io_port, host->io_port + host->n_io_port - 1);
  1256. seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n",
  1257. host->base, host->base + data->MmioLength - 1);
  1258. seq_printf(m, "sg_tablesize: %d\n",
  1259. host->sg_tablesize);
  1260. seq_printf(m, "Chip revision: 0x%x\n",
  1261. (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1262. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1263. model = data->pci_devid->driver_data;
  1264. #ifdef CONFIG_PM
  1265. seq_printf(m, "Power Management: %s\n",
  1266. (mode_reg & OPTF) ? "yes" : "no");
  1267. #endif
  1268. seq_printf(m, "OEM: %ld, %s\n",
  1269. (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1270. spin_lock_irqsave(&(data->Lock), flags);
  1271. seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
  1272. spin_unlock_irqrestore(&(data->Lock), flags);
  1273. seq_puts(m, "SDTR status\n");
  1274. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1275. seq_printf(m, "id %d: ", id);
  1276. if (id == host->this_id) {
  1277. seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
  1278. continue;
  1279. }
  1280. if (data->target[id].sync_flag == SDTR_DONE) {
  1281. if (data->target[id].period == 0 &&
  1282. data->target[id].offset == ASYNC_OFFSET ) {
  1283. seq_puts(m, "async");
  1284. } else {
  1285. seq_puts(m, " sync");
  1286. }
  1287. } else {
  1288. seq_puts(m, " none");
  1289. }
  1290. if (data->target[id].period != 0) {
  1291. speed = 1000000 / (data->target[id].period * 4);
  1292. seq_printf(m, " transfer %d.%dMB/s, offset %d",
  1293. speed / 1000,
  1294. speed % 1000,
  1295. data->target[id].offset
  1296. );
  1297. }
  1298. seq_putc(m, '\n');
  1299. }
  1300. return 0;
  1301. }
  1302. /*
  1303. * Reset parameters and call scsi_done for data->cur_lunt.
  1304. * Be careful setting SCpnt->result = DID_* before calling this function.
  1305. */
  1306. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1307. {
  1308. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1309. unsigned int base = SCpnt->device->host->io_port;
  1310. scsi_dma_unmap(SCpnt);
  1311. /*
  1312. * clear TRANSFERCONTROL_BM_START
  1313. */
  1314. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1315. nsp32_write4(base, BM_CNT, 0);
  1316. /*
  1317. * call scsi_done
  1318. */
  1319. scsi_done(SCpnt);
  1320. /*
  1321. * reset parameters
  1322. */
  1323. data->cur_lunt->SCpnt = NULL;
  1324. data->cur_lunt = NULL;
  1325. data->cur_target = NULL;
  1326. data->CurrentSC = NULL;
  1327. }
  1328. /*
  1329. * Bus Free Occur
  1330. *
  1331. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1332. * with ACK reply when below condition is matched:
  1333. * MsgIn 00: Command Complete.
  1334. * MsgIn 02: Save Data Pointer.
  1335. * MsgIn 04: Disconnect.
  1336. * In other case, unexpected BUSFREE is detected.
  1337. */
  1338. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1339. {
  1340. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1341. unsigned int base = SCpnt->device->host->io_port;
  1342. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1343. show_autophase(execph);
  1344. nsp32_write4(base, BM_CNT, 0);
  1345. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1346. /*
  1347. * MsgIn 02: Save Data Pointer
  1348. *
  1349. * VALID:
  1350. * Save Data Pointer is received. Adjust pointer.
  1351. *
  1352. * NO-VALID:
  1353. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1354. * processing and we can't adjust any SCSI data pointer in next data
  1355. * phase.
  1356. */
  1357. if (execph & MSGIN_02_VALID) {
  1358. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1359. /*
  1360. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1361. * needed.
  1362. */
  1363. if (!(execph & MSGIN_00_VALID) &&
  1364. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1365. unsigned int sacklen, s_sacklen;
  1366. /*
  1367. * Read SACK count and SAVEDSACK count, then compare.
  1368. */
  1369. sacklen = nsp32_read4(base, SACK_CNT );
  1370. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1371. /*
  1372. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1373. * come after data transferring.
  1374. */
  1375. if (s_sacklen > 0) {
  1376. /*
  1377. * Comparing between sack and savedsack to
  1378. * check the condition of AutoMsgIn03.
  1379. *
  1380. * If they are same, set msgin03 == TRUE,
  1381. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1382. * reselection. On the other hand, if they
  1383. * aren't same, set msgin03 == FALSE, and
  1384. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1385. * reselection.
  1386. */
  1387. if (sacklen != s_sacklen) {
  1388. data->cur_lunt->msgin03 = FALSE;
  1389. } else {
  1390. data->cur_lunt->msgin03 = TRUE;
  1391. }
  1392. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1393. }
  1394. }
  1395. /* This value has not substitude with valid value yet... */
  1396. //data->cur_lunt->save_datp = data->cur_datp;
  1397. } else {
  1398. /*
  1399. * no processing.
  1400. */
  1401. }
  1402. if (execph & MSGIN_03_VALID) {
  1403. /* MsgIn03 was valid to be processed. No need processing. */
  1404. }
  1405. /*
  1406. * target SDTR check
  1407. */
  1408. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1409. /*
  1410. * SDTR negotiation pulled by the initiator has not
  1411. * finished yet. Fall back to ASYNC mode.
  1412. */
  1413. nsp32_set_async(data, data->cur_target);
  1414. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1415. data->cur_target->sync_flag |= SDTR_DONE;
  1416. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1417. /*
  1418. * SDTR negotiation pulled by the target has been
  1419. * negotiating.
  1420. */
  1421. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1422. /*
  1423. * If valid message is received, then
  1424. * negotiation is succeeded.
  1425. */
  1426. } else {
  1427. /*
  1428. * On the contrary, if unexpected bus free is
  1429. * occurred, then negotiation is failed. Fall
  1430. * back to ASYNC mode.
  1431. */
  1432. nsp32_set_async(data, data->cur_target);
  1433. }
  1434. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1435. data->cur_target->sync_flag |= SDTR_DONE;
  1436. }
  1437. /*
  1438. * It is always ensured by SCSI standard that initiator
  1439. * switches into Bus Free Phase after
  1440. * receiving message 00 (Command Complete), 04 (Disconnect).
  1441. * It's the reason that processing here is valid.
  1442. */
  1443. if (execph & MSGIN_00_VALID) {
  1444. /* MsgIn 00: Command Complete */
  1445. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1446. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1447. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1448. "normal end stat=0x%x resid=0x%x\n",
  1449. nsp32_priv(SCpnt)->status, scsi_get_resid(SCpnt));
  1450. SCpnt->result = (DID_OK << 16) |
  1451. (nsp32_priv(SCpnt)->status << 0);
  1452. nsp32_scsi_done(SCpnt);
  1453. /* All operation is done */
  1454. return TRUE;
  1455. } else if (execph & MSGIN_04_VALID) {
  1456. /* MsgIn 04: Disconnect */
  1457. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1458. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1459. return TRUE;
  1460. } else {
  1461. /* Unexpected bus free */
  1462. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1463. SCpnt->result = DID_ERROR << 16;
  1464. nsp32_scsi_done(SCpnt);
  1465. return TRUE;
  1466. }
  1467. return FALSE;
  1468. }
  1469. /*
  1470. * nsp32_adjust_busfree - adjusting SG table
  1471. *
  1472. * Note: This driver adjust the SG table using SCSI ACK
  1473. * counter instead of BMCNT counter!
  1474. */
  1475. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1476. {
  1477. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1478. int old_entry = data->cur_entry;
  1479. int new_entry;
  1480. int sg_num = data->cur_lunt->sg_num;
  1481. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1482. unsigned int restlen, sentlen;
  1483. u32_le len, addr;
  1484. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1485. /* adjust saved SACK count with 4 byte start address boundary */
  1486. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1487. /*
  1488. * calculate new_entry from sack count and each sgt[].len
  1489. * calculate the byte which is intent to send
  1490. */
  1491. sentlen = 0;
  1492. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1493. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1494. if (sentlen > s_sacklen) {
  1495. break;
  1496. }
  1497. }
  1498. /* all sgt is processed */
  1499. if (new_entry == sg_num) {
  1500. goto last;
  1501. }
  1502. if (sentlen == s_sacklen) {
  1503. /* XXX: confirm it's ok or not */
  1504. /* In this case, it's ok because we are at
  1505. * the head element of the sg. restlen is correctly
  1506. * calculated.
  1507. */
  1508. }
  1509. /* calculate the rest length for transferring */
  1510. restlen = sentlen - s_sacklen;
  1511. /* update adjusting current SG table entry */
  1512. len = le32_to_cpu(sgt[new_entry].len);
  1513. addr = le32_to_cpu(sgt[new_entry].addr);
  1514. addr += (len - restlen);
  1515. sgt[new_entry].addr = cpu_to_le32(addr);
  1516. sgt[new_entry].len = cpu_to_le32(restlen);
  1517. /* set cur_entry with new_entry */
  1518. data->cur_entry = new_entry;
  1519. return;
  1520. last:
  1521. if (scsi_get_resid(SCpnt) < sentlen) {
  1522. nsp32_msg(KERN_ERR, "resid underflow");
  1523. }
  1524. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1525. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1526. /* update hostdata and lun */
  1527. return;
  1528. }
  1529. /*
  1530. * It's called MsgOut phase occur.
  1531. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1532. * message out phase. It, however, has more than 3 messages,
  1533. * HBA creates the interrupt and we have to process by hand.
  1534. */
  1535. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1536. {
  1537. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1538. unsigned int base = SCpnt->device->host->io_port;
  1539. int i;
  1540. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1541. "enter: msgout_len: 0x%x", data->msgout_len);
  1542. /*
  1543. * If MsgOut phase is occurred without having any
  1544. * message, then No_Operation is sent (SCSI-2).
  1545. */
  1546. if (data->msgout_len == 0) {
  1547. nsp32_build_nop(SCpnt);
  1548. }
  1549. /*
  1550. * send messages
  1551. */
  1552. for (i = 0; i < data->msgout_len; i++) {
  1553. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1554. "%d : 0x%x", i, data->msgoutbuf[i]);
  1555. /*
  1556. * Check REQ is asserted.
  1557. */
  1558. nsp32_wait_req(data, ASSERT);
  1559. if (i == (data->msgout_len - 1)) {
  1560. /*
  1561. * If the last message, set the AutoSCSI restart
  1562. * before send back the ack message. AutoSCSI
  1563. * restart automatically negate ATN signal.
  1564. */
  1565. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1566. //nsp32_restart_autoscsi(SCpnt, command);
  1567. nsp32_write2(base, COMMAND_CONTROL,
  1568. (CLEAR_CDB_FIFO_POINTER |
  1569. AUTO_COMMAND_PHASE |
  1570. AUTOSCSI_RESTART |
  1571. AUTO_MSGIN_00_OR_04 |
  1572. AUTO_MSGIN_02 ));
  1573. }
  1574. /*
  1575. * Write data with SACK, then wait sack is
  1576. * automatically negated.
  1577. */
  1578. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1579. nsp32_wait_sack(data, NEGATE);
  1580. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1581. nsp32_read1(base, SCSI_BUS_MONITOR));
  1582. }
  1583. data->msgout_len = 0;
  1584. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1585. }
  1586. /*
  1587. * Restart AutoSCSI
  1588. *
  1589. * Note: Restarting AutoSCSI needs set:
  1590. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1591. */
  1592. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1593. {
  1594. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1595. unsigned int base = data->BaseAddress;
  1596. unsigned short transfer = 0;
  1597. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1598. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1599. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1600. }
  1601. /*
  1602. * set SYNC_REG
  1603. * Don't set BM_START_ADR before setting this register.
  1604. */
  1605. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1606. /*
  1607. * set ACKWIDTH
  1608. */
  1609. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1610. /*
  1611. * set SREQ hazard killer sampling rate
  1612. */
  1613. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1614. /*
  1615. * set SGT ADDR (physical address)
  1616. */
  1617. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1618. /*
  1619. * set TRANSFER CONTROL REG
  1620. */
  1621. transfer = 0;
  1622. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1623. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1624. if (scsi_bufflen(SCpnt) > 0) {
  1625. transfer |= BM_START;
  1626. }
  1627. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1628. transfer |= CB_MMIO_MODE;
  1629. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1630. transfer |= CB_IO_MODE;
  1631. }
  1632. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1633. /*
  1634. * restart AutoSCSI
  1635. *
  1636. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1637. */
  1638. command |= (CLEAR_CDB_FIFO_POINTER |
  1639. AUTO_COMMAND_PHASE |
  1640. AUTOSCSI_RESTART );
  1641. nsp32_write2(base, COMMAND_CONTROL, command);
  1642. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1643. }
  1644. /*
  1645. * cannot run automatically message in occur
  1646. */
  1647. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1648. unsigned long irq_status,
  1649. unsigned short execph)
  1650. {
  1651. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1652. unsigned int base = SCpnt->device->host->io_port;
  1653. unsigned char msg;
  1654. unsigned char msgtype;
  1655. unsigned char newlun;
  1656. unsigned short command = 0;
  1657. int msgclear = TRUE;
  1658. long new_sgtp;
  1659. int ret;
  1660. /*
  1661. * read first message
  1662. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1663. * of Message-In have to be processed before sending back SCSI ACK.
  1664. */
  1665. msg = nsp32_read1(base, SCSI_DATA_IN);
  1666. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1667. msgtype = data->msginbuf[0];
  1668. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1669. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1670. data->msgin_len, msg, msgtype);
  1671. /*
  1672. * TODO: We need checking whether bus phase is message in?
  1673. */
  1674. /*
  1675. * assert SCSI ACK
  1676. */
  1677. nsp32_sack_assert(data);
  1678. /*
  1679. * processing IDENTIFY
  1680. */
  1681. if (msgtype & 0x80) {
  1682. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1683. /* Invalid (non reselect) phase */
  1684. goto reject;
  1685. }
  1686. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1687. ret = nsp32_reselection(SCpnt, newlun);
  1688. if (ret == TRUE) {
  1689. goto restart;
  1690. } else {
  1691. goto reject;
  1692. }
  1693. }
  1694. /*
  1695. * processing messages except for IDENTIFY
  1696. *
  1697. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1698. */
  1699. switch (msgtype) {
  1700. /*
  1701. * 1-byte message
  1702. */
  1703. case COMMAND_COMPLETE:
  1704. case DISCONNECT:
  1705. /*
  1706. * These messages should not be occurred.
  1707. * They should be processed on AutoSCSI sequencer.
  1708. */
  1709. nsp32_msg(KERN_WARNING,
  1710. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1711. break;
  1712. case RESTORE_POINTERS:
  1713. /*
  1714. * AutoMsgIn03 is disabled, and HBA gets this message.
  1715. */
  1716. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1717. unsigned int s_sacklen;
  1718. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1719. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1720. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1721. } else {
  1722. /* No need to rewrite SGT */
  1723. }
  1724. }
  1725. data->cur_lunt->msgin03 = FALSE;
  1726. /* Update with the new value */
  1727. /* reset SACK/SavedACK counter (or ALL clear?) */
  1728. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1729. /*
  1730. * set new sg pointer
  1731. */
  1732. new_sgtp = data->cur_lunt->sglun_paddr +
  1733. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1734. nsp32_write4(base, SGT_ADR, new_sgtp);
  1735. break;
  1736. case SAVE_POINTERS:
  1737. /*
  1738. * These messages should not be occurred.
  1739. * They should be processed on AutoSCSI sequencer.
  1740. */
  1741. nsp32_msg (KERN_WARNING,
  1742. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1743. break;
  1744. case MESSAGE_REJECT:
  1745. /* If previous message_out is sending SDTR, and get
  1746. message_reject from target, SDTR negotiation is failed */
  1747. if (data->cur_target->sync_flag &
  1748. (SDTR_INITIATOR | SDTR_TARGET)) {
  1749. /*
  1750. * Current target is negotiating SDTR, but it's
  1751. * failed. Fall back to async transfer mode, and set
  1752. * SDTR_DONE.
  1753. */
  1754. nsp32_set_async(data, data->cur_target);
  1755. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1756. data->cur_target->sync_flag |= SDTR_DONE;
  1757. }
  1758. break;
  1759. case LINKED_CMD_COMPLETE:
  1760. case LINKED_FLG_CMD_COMPLETE:
  1761. /* queue tag is not supported currently */
  1762. nsp32_msg (KERN_WARNING,
  1763. "unsupported message: 0x%x", msgtype);
  1764. break;
  1765. case INITIATE_RECOVERY:
  1766. /* staring ECA (Extended Contingent Allegiance) state. */
  1767. /* This message is declined in SPI2 or later. */
  1768. goto reject;
  1769. /*
  1770. * 2-byte message
  1771. */
  1772. case SIMPLE_QUEUE_TAG:
  1773. case 0x23:
  1774. /*
  1775. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1776. * No support is needed.
  1777. */
  1778. if (data->msgin_len >= 1) {
  1779. goto reject;
  1780. }
  1781. /* current position is 1-byte of 2 byte */
  1782. msgclear = FALSE;
  1783. break;
  1784. /*
  1785. * extended message
  1786. */
  1787. case EXTENDED_MESSAGE:
  1788. if (data->msgin_len < 1) {
  1789. /*
  1790. * Current position does not reach 2-byte
  1791. * (2-byte is extended message length).
  1792. */
  1793. msgclear = FALSE;
  1794. break;
  1795. }
  1796. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1797. /*
  1798. * Current extended message has msginbuf[1] + 2
  1799. * (msgin_len starts counting from 0, so buf[1] + 1).
  1800. * If current message position is not finished,
  1801. * continue receiving message.
  1802. */
  1803. msgclear = FALSE;
  1804. break;
  1805. }
  1806. /*
  1807. * Reach here means regular length of each type of
  1808. * extended messages.
  1809. */
  1810. switch (data->msginbuf[2]) {
  1811. case EXTENDED_MODIFY_DATA_POINTER:
  1812. /* TODO */
  1813. goto reject; /* not implemented yet */
  1814. break;
  1815. case EXTENDED_SDTR:
  1816. /*
  1817. * Exchange this message between initiator and target.
  1818. */
  1819. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1820. /*
  1821. * received inappropriate message.
  1822. */
  1823. goto reject;
  1824. break;
  1825. }
  1826. nsp32_analyze_sdtr(SCpnt);
  1827. break;
  1828. case EXTENDED_EXTENDED_IDENTIFY:
  1829. /* SCSI-I only, not supported. */
  1830. goto reject; /* not implemented yet */
  1831. break;
  1832. case EXTENDED_WDTR:
  1833. goto reject; /* not implemented yet */
  1834. break;
  1835. default:
  1836. goto reject;
  1837. }
  1838. break;
  1839. default:
  1840. goto reject;
  1841. }
  1842. restart:
  1843. if (msgclear == TRUE) {
  1844. data->msgin_len = 0;
  1845. /*
  1846. * If restarting AutoSCSI, but there are some message to out
  1847. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1848. * (MV_VALID = 0). When commandcontrol is written with
  1849. * AutoSCSI restart, at the same time MsgOutOccur should be
  1850. * happened (however, such situation is really possible...?).
  1851. */
  1852. if (data->msgout_len > 0) {
  1853. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1854. command |= AUTO_ATN;
  1855. }
  1856. /*
  1857. * restart AutoSCSI
  1858. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1859. */
  1860. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1861. /*
  1862. * If current msgin03 is TRUE, then flag on.
  1863. */
  1864. if (data->cur_lunt->msgin03 == TRUE) {
  1865. command |= AUTO_MSGIN_03;
  1866. }
  1867. data->cur_lunt->msgin03 = FALSE;
  1868. } else {
  1869. data->msgin_len++;
  1870. }
  1871. /*
  1872. * restart AutoSCSI
  1873. */
  1874. nsp32_restart_autoscsi(SCpnt, command);
  1875. /*
  1876. * wait SCSI REQ negate for REQ-ACK handshake
  1877. */
  1878. nsp32_wait_req(data, NEGATE);
  1879. /*
  1880. * negate SCSI ACK
  1881. */
  1882. nsp32_sack_negate(data);
  1883. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1884. return;
  1885. reject:
  1886. nsp32_msg(KERN_WARNING,
  1887. "invalid or unsupported MessageIn, rejected. "
  1888. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1889. msg, data->msgin_len, msgtype);
  1890. nsp32_build_reject(SCpnt);
  1891. data->msgin_len = 0;
  1892. goto restart;
  1893. }
  1894. /*
  1895. *
  1896. */
  1897. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1898. {
  1899. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1900. nsp32_target *target = data->cur_target;
  1901. unsigned char get_period = data->msginbuf[3];
  1902. unsigned char get_offset = data->msginbuf[4];
  1903. int entry;
  1904. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1905. /*
  1906. * If this inititor sent the SDTR message, then target responds SDTR,
  1907. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1908. * Messages are not appropriate, then send back reject message.
  1909. * If initiator did not send the SDTR, but target sends SDTR,
  1910. * initiator calculator the appropriate parameter and send back SDTR.
  1911. */
  1912. if (target->sync_flag & SDTR_INITIATOR) {
  1913. /*
  1914. * Initiator sent SDTR, the target responds and
  1915. * send back negotiation SDTR.
  1916. */
  1917. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1918. target->sync_flag &= ~SDTR_INITIATOR;
  1919. target->sync_flag |= SDTR_DONE;
  1920. /*
  1921. * offset:
  1922. */
  1923. if (get_offset > SYNC_OFFSET) {
  1924. /*
  1925. * Negotiation is failed, the target send back
  1926. * unexpected offset value.
  1927. */
  1928. goto reject;
  1929. }
  1930. if (get_offset == ASYNC_OFFSET) {
  1931. /*
  1932. * Negotiation is succeeded, the target want
  1933. * to fall back into asynchronous transfer mode.
  1934. */
  1935. goto async;
  1936. }
  1937. /*
  1938. * period:
  1939. * Check whether sync period is too short. If too short,
  1940. * fall back to async mode. If it's ok, then investigate
  1941. * the received sync period. If sync period is acceptable
  1942. * between sync table start_period and end_period, then
  1943. * set this I_T nexus as sent offset and period.
  1944. * If it's not acceptable, send back reject and fall back
  1945. * to async mode.
  1946. */
  1947. if (get_period < data->synct[0].period_num) {
  1948. /*
  1949. * Negotiation is failed, the target send back
  1950. * unexpected period value.
  1951. */
  1952. goto reject;
  1953. }
  1954. entry = nsp32_search_period_entry(data, target, get_period);
  1955. if (entry < 0) {
  1956. /*
  1957. * Target want to use long period which is not
  1958. * acceptable NinjaSCSI-32Bi/UDE.
  1959. */
  1960. goto reject;
  1961. }
  1962. /*
  1963. * Set new sync table and offset in this I_T nexus.
  1964. */
  1965. nsp32_set_sync_entry(data, target, entry, get_offset);
  1966. } else {
  1967. /* Target send SDTR to initiator. */
  1968. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  1969. target->sync_flag |= SDTR_INITIATOR;
  1970. /* offset: */
  1971. if (get_offset > SYNC_OFFSET) {
  1972. /* send back as SYNC_OFFSET */
  1973. get_offset = SYNC_OFFSET;
  1974. }
  1975. /* period: */
  1976. if (get_period < data->synct[0].period_num) {
  1977. get_period = data->synct[0].period_num;
  1978. }
  1979. entry = nsp32_search_period_entry(data, target, get_period);
  1980. if (get_offset == ASYNC_OFFSET || entry < 0) {
  1981. nsp32_set_async(data, target);
  1982. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  1983. } else {
  1984. nsp32_set_sync_entry(data, target, entry, get_offset);
  1985. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  1986. }
  1987. }
  1988. target->period = get_period;
  1989. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1990. return;
  1991. reject:
  1992. /*
  1993. * If the current message is unacceptable, send back to the target
  1994. * with reject message.
  1995. */
  1996. nsp32_build_reject(SCpnt);
  1997. async:
  1998. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  1999. target->period = 0;
  2000. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2001. return;
  2002. }
  2003. /*
  2004. * Search config entry number matched in sync_table from given
  2005. * target and speed period value. If failed to search, return negative value.
  2006. */
  2007. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2008. nsp32_target *target,
  2009. unsigned char period)
  2010. {
  2011. int i;
  2012. if (target->limit_entry >= data->syncnum) {
  2013. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2014. target->limit_entry = 0;
  2015. }
  2016. for (i = target->limit_entry; i < data->syncnum; i++) {
  2017. if (period >= data->synct[i].start_period &&
  2018. period <= data->synct[i].end_period) {
  2019. break;
  2020. }
  2021. }
  2022. /*
  2023. * Check given period value is over the sync_table value.
  2024. * If so, return max value.
  2025. */
  2026. if (i == data->syncnum) {
  2027. i = -1;
  2028. }
  2029. return i;
  2030. }
  2031. /*
  2032. * target <-> initiator use ASYNC transfer
  2033. */
  2034. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2035. {
  2036. unsigned char period = data->synct[target->limit_entry].period_num;
  2037. target->offset = ASYNC_OFFSET;
  2038. target->period = 0;
  2039. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2040. target->ackwidth = 0;
  2041. target->sample_reg = 0;
  2042. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2043. }
  2044. /*
  2045. * target <-> initiator use maximum SYNC transfer
  2046. */
  2047. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2048. nsp32_target *target,
  2049. unsigned char *period,
  2050. unsigned char *offset)
  2051. {
  2052. unsigned char period_num, ackwidth;
  2053. period_num = data->synct[target->limit_entry].period_num;
  2054. *period = data->synct[target->limit_entry].start_period;
  2055. ackwidth = data->synct[target->limit_entry].ackwidth;
  2056. *offset = SYNC_OFFSET;
  2057. target->syncreg = TO_SYNCREG(period_num, *offset);
  2058. target->ackwidth = ackwidth;
  2059. target->offset = *offset;
  2060. target->sample_reg = 0; /* disable SREQ sampling */
  2061. }
  2062. /*
  2063. * target <-> initiator use entry number speed
  2064. */
  2065. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2066. nsp32_target *target,
  2067. int entry,
  2068. unsigned char offset)
  2069. {
  2070. unsigned char period, ackwidth, sample_rate;
  2071. period = data->synct[entry].period_num;
  2072. ackwidth = data->synct[entry].ackwidth;
  2073. sample_rate = data->synct[entry].sample_rate;
  2074. target->syncreg = TO_SYNCREG(period, offset);
  2075. target->ackwidth = ackwidth;
  2076. target->offset = offset;
  2077. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2078. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2079. }
  2080. /*
  2081. * It waits until SCSI REQ becomes assertion or negation state.
  2082. *
  2083. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2084. * connected target responds SCSI REQ negation. We have to wait
  2085. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2086. * REQ-ACK handshake.
  2087. */
  2088. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2089. {
  2090. unsigned int base = data->BaseAddress;
  2091. int wait_time = 0;
  2092. unsigned char bus, req_bit;
  2093. if (!((state == ASSERT) || (state == NEGATE))) {
  2094. nsp32_msg(KERN_ERR, "unknown state designation");
  2095. }
  2096. /* REQ is BIT(5) */
  2097. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2098. do {
  2099. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2100. if ((bus & BUSMON_REQ) == req_bit) {
  2101. nsp32_dbg(NSP32_DEBUG_WAIT,
  2102. "wait_time: %d", wait_time);
  2103. return;
  2104. }
  2105. udelay(1);
  2106. wait_time++;
  2107. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2108. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2109. }
  2110. /*
  2111. * It waits until SCSI SACK becomes assertion or negation state.
  2112. */
  2113. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2114. {
  2115. unsigned int base = data->BaseAddress;
  2116. int wait_time = 0;
  2117. unsigned char bus, ack_bit;
  2118. if (!((state == ASSERT) || (state == NEGATE))) {
  2119. nsp32_msg(KERN_ERR, "unknown state designation");
  2120. }
  2121. /* ACK is BIT(4) */
  2122. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2123. do {
  2124. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2125. if ((bus & BUSMON_ACK) == ack_bit) {
  2126. nsp32_dbg(NSP32_DEBUG_WAIT,
  2127. "wait_time: %d", wait_time);
  2128. return;
  2129. }
  2130. udelay(1);
  2131. wait_time++;
  2132. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2133. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2134. }
  2135. /*
  2136. * assert SCSI ACK
  2137. *
  2138. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2139. */
  2140. static void nsp32_sack_assert(nsp32_hw_data *data)
  2141. {
  2142. unsigned int base = data->BaseAddress;
  2143. unsigned char busctrl;
  2144. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2145. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2146. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2147. }
  2148. /*
  2149. * negate SCSI ACK
  2150. */
  2151. static void nsp32_sack_negate(nsp32_hw_data *data)
  2152. {
  2153. unsigned int base = data->BaseAddress;
  2154. unsigned char busctrl;
  2155. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2156. busctrl &= ~BUSCTL_ACK;
  2157. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2158. }
  2159. /*
  2160. * Note: n_io_port is defined as 0x7f because I/O register port is
  2161. * assigned as:
  2162. * 0x800-0x8ff: memory mapped I/O port
  2163. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2164. * 0xc00-0xfff: CardBus status registers
  2165. */
  2166. static int nsp32_detect(struct pci_dev *pdev)
  2167. {
  2168. struct Scsi_Host *host; /* registered host structure */
  2169. struct resource *res;
  2170. nsp32_hw_data *data;
  2171. int ret;
  2172. int i, j;
  2173. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2174. /*
  2175. * register this HBA as SCSI device
  2176. */
  2177. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2178. if (host == NULL) {
  2179. nsp32_msg (KERN_ERR, "failed to scsi register");
  2180. goto err;
  2181. }
  2182. /*
  2183. * set nsp32_hw_data
  2184. */
  2185. data = (nsp32_hw_data *)host->hostdata;
  2186. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2187. host->irq = data->IrqNumber;
  2188. host->io_port = data->BaseAddress;
  2189. host->unique_id = data->BaseAddress;
  2190. host->n_io_port = data->NumAddress;
  2191. host->base = (unsigned long)data->MmioAddress;
  2192. data->Host = host;
  2193. spin_lock_init(&(data->Lock));
  2194. data->cur_lunt = NULL;
  2195. data->cur_target = NULL;
  2196. /*
  2197. * Bus master transfer mode is supported currently.
  2198. */
  2199. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2200. /*
  2201. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2202. * dividing * 100ns/4).
  2203. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2204. */
  2205. data->clock = CLOCK_4;
  2206. /*
  2207. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2208. */
  2209. switch (data->clock) {
  2210. case CLOCK_4:
  2211. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2212. data->synct = nsp32_sync_table_40M;
  2213. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2214. break;
  2215. case CLOCK_2:
  2216. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2217. data->synct = nsp32_sync_table_20M;
  2218. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2219. break;
  2220. case PCICLK:
  2221. /* If data->clock is PCICLK, then select pci sync table. */
  2222. data->synct = nsp32_sync_table_pci;
  2223. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2224. break;
  2225. default:
  2226. nsp32_msg(KERN_WARNING,
  2227. "Invalid clock div is selected, set CLOCK_4.");
  2228. /* Use default value CLOCK_4 */
  2229. data->clock = CLOCK_4;
  2230. data->synct = nsp32_sync_table_40M;
  2231. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2232. }
  2233. /*
  2234. * setup nsp32_lunt
  2235. */
  2236. /*
  2237. * setup DMA
  2238. */
  2239. if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
  2240. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2241. goto scsi_unregister;
  2242. }
  2243. /*
  2244. * allocate autoparam DMA resource.
  2245. */
  2246. data->autoparam = dma_alloc_coherent(&pdev->dev,
  2247. sizeof(nsp32_autoparam), &(data->auto_paddr),
  2248. GFP_KERNEL);
  2249. if (data->autoparam == NULL) {
  2250. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2251. goto scsi_unregister;
  2252. }
  2253. /*
  2254. * allocate scatter-gather DMA resource.
  2255. */
  2256. data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
  2257. &data->sg_paddr, GFP_KERNEL);
  2258. if (data->sg_list == NULL) {
  2259. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2260. goto free_autoparam;
  2261. }
  2262. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2263. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2264. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2265. nsp32_lunt tmp = {
  2266. .SCpnt = NULL,
  2267. .save_datp = 0,
  2268. .msgin03 = FALSE,
  2269. .sg_num = 0,
  2270. .cur_entry = 0,
  2271. .sglun = &(data->sg_list[offset]),
  2272. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2273. };
  2274. data->lunt[i][j] = tmp;
  2275. }
  2276. }
  2277. /*
  2278. * setup target
  2279. */
  2280. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2281. nsp32_target *target = &(data->target[i]);
  2282. target->limit_entry = 0;
  2283. target->sync_flag = 0;
  2284. nsp32_set_async(data, target);
  2285. }
  2286. /*
  2287. * EEPROM check
  2288. */
  2289. ret = nsp32_getprom_param(data);
  2290. if (ret == FALSE) {
  2291. data->resettime = 3; /* default 3 */
  2292. }
  2293. /*
  2294. * setup HBA
  2295. */
  2296. nsp32hw_init(data);
  2297. snprintf(data->info_str, sizeof(data->info_str),
  2298. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2299. host->irq, host->io_port, host->n_io_port);
  2300. /*
  2301. * SCSI bus reset
  2302. *
  2303. * Note: It's important to reset SCSI bus in initialization phase.
  2304. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2305. * system is coming up, so SCSI devices connected to HBA is set as
  2306. * un-asynchronous mode. It brings the merit that this HBA is
  2307. * ready to start synchronous transfer without any preparation,
  2308. * but we are difficult to control transfer speed. In addition,
  2309. * it prevents device transfer speed from effecting EEPROM start-up
  2310. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2311. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2312. * connected same or more than 4 devices. It should be avoided
  2313. * depending on this specification. Thus, resetting the SCSI bus
  2314. * restores all connected SCSI devices to asynchronous mode, then
  2315. * this driver set SDTR safely later, and we can control all SCSI
  2316. * device transfer mode.
  2317. */
  2318. nsp32_do_bus_reset(data);
  2319. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2320. if (ret < 0) {
  2321. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2322. "SCSI PCI controller. Interrupt: %d", host->irq);
  2323. goto free_sg_list;
  2324. }
  2325. /*
  2326. * PCI IO register
  2327. */
  2328. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2329. if (res == NULL) {
  2330. nsp32_msg(KERN_ERR,
  2331. "I/O region 0x%x+0x%x is already used",
  2332. data->BaseAddress, data->NumAddress);
  2333. goto free_irq;
  2334. }
  2335. ret = scsi_add_host(host, &pdev->dev);
  2336. if (ret) {
  2337. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2338. goto free_region;
  2339. }
  2340. scsi_scan_host(host);
  2341. pci_set_drvdata(pdev, host);
  2342. return 0;
  2343. free_region:
  2344. release_region(host->io_port, host->n_io_port);
  2345. free_irq:
  2346. free_irq(host->irq, data);
  2347. free_sg_list:
  2348. dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
  2349. data->sg_list, data->sg_paddr);
  2350. free_autoparam:
  2351. dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
  2352. data->autoparam, data->auto_paddr);
  2353. scsi_unregister:
  2354. scsi_host_put(host);
  2355. err:
  2356. return 1;
  2357. }
  2358. static int nsp32_release(struct Scsi_Host *host)
  2359. {
  2360. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2361. if (data->autoparam) {
  2362. dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
  2363. data->autoparam, data->auto_paddr);
  2364. }
  2365. if (data->sg_list) {
  2366. dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
  2367. data->sg_list, data->sg_paddr);
  2368. }
  2369. if (host->irq) {
  2370. free_irq(host->irq, data);
  2371. }
  2372. if (host->io_port && host->n_io_port) {
  2373. release_region(host->io_port, host->n_io_port);
  2374. }
  2375. if (data->MmioAddress) {
  2376. iounmap(data->MmioAddress);
  2377. }
  2378. return 0;
  2379. }
  2380. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2381. {
  2382. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2383. return data->info_str;
  2384. }
  2385. /****************************************************************************
  2386. * error handler
  2387. */
  2388. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2389. {
  2390. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2391. unsigned int base = SCpnt->device->host->io_port;
  2392. nsp32_msg(KERN_WARNING, "abort");
  2393. if (data->cur_lunt->SCpnt == NULL) {
  2394. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2395. return FAILED;
  2396. }
  2397. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2398. /* reset SDTR negotiation */
  2399. data->cur_target->sync_flag = 0;
  2400. nsp32_set_async(data, data->cur_target);
  2401. }
  2402. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2403. nsp32_write2(base, BM_CNT, 0);
  2404. SCpnt->result = DID_ABORT << 16;
  2405. nsp32_scsi_done(SCpnt);
  2406. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2407. return SUCCESS;
  2408. }
  2409. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2410. {
  2411. unsigned int base = data->BaseAddress;
  2412. int i;
  2413. unsigned short __maybe_unused intrdat;
  2414. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2415. /*
  2416. * stop all transfer
  2417. * clear TRANSFERCONTROL_BM_START
  2418. * clear counter
  2419. */
  2420. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2421. nsp32_write4(base, BM_CNT, 0);
  2422. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2423. /*
  2424. * fall back to asynchronous transfer mode
  2425. * initialize SDTR negotiation flag
  2426. */
  2427. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2428. nsp32_target *target = &data->target[i];
  2429. target->sync_flag = 0;
  2430. nsp32_set_async(data, target);
  2431. }
  2432. /*
  2433. * reset SCSI bus
  2434. */
  2435. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2436. mdelay(RESET_HOLD_TIME / 1000);
  2437. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2438. for(i = 0; i < 5; i++) {
  2439. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2440. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2441. }
  2442. data->CurrentSC = NULL;
  2443. }
  2444. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2445. {
  2446. struct Scsi_Host *host = SCpnt->device->host;
  2447. unsigned int base = SCpnt->device->host->io_port;
  2448. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2449. nsp32_msg(KERN_INFO, "Host Reset");
  2450. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2451. spin_lock_irq(SCpnt->device->host->host_lock);
  2452. nsp32hw_init(data);
  2453. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2454. nsp32_do_bus_reset(data);
  2455. nsp32_write2(base, IRQ_CONTROL, 0);
  2456. spin_unlock_irq(SCpnt->device->host->host_lock);
  2457. return SUCCESS; /* Host reset is succeeded at any time. */
  2458. }
  2459. /**************************************************************************
  2460. * EEPROM handler
  2461. */
  2462. /*
  2463. * getting EEPROM parameter
  2464. */
  2465. static int nsp32_getprom_param(nsp32_hw_data *data)
  2466. {
  2467. int vendor = data->pci_devid->vendor;
  2468. int device = data->pci_devid->device;
  2469. int ret, i;
  2470. int __maybe_unused val;
  2471. /*
  2472. * EEPROM checking.
  2473. */
  2474. ret = nsp32_prom_read(data, 0x7e);
  2475. if (ret != 0x55) {
  2476. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2477. return FALSE;
  2478. }
  2479. ret = nsp32_prom_read(data, 0x7f);
  2480. if (ret != 0xaa) {
  2481. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2482. return FALSE;
  2483. }
  2484. /*
  2485. * check EEPROM type
  2486. */
  2487. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2488. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2489. ret = nsp32_getprom_c16(data);
  2490. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2491. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2492. ret = nsp32_getprom_at24(data);
  2493. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2494. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2495. ret = nsp32_getprom_at24(data);
  2496. } else {
  2497. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2498. ret = FALSE;
  2499. }
  2500. /* for debug : SPROM data full checking */
  2501. for (i = 0; i <= 0x1f; i++) {
  2502. val = nsp32_prom_read(data, i);
  2503. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2504. "rom address 0x%x : 0x%x", i, val);
  2505. }
  2506. return ret;
  2507. }
  2508. /*
  2509. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2510. *
  2511. * ROMADDR
  2512. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2513. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2514. * 0x07 : HBA Synchronous Transfer Period
  2515. * Value 0: AutoSync, 1: Manual Setting
  2516. * 0x08 - 0x0f : Not Used? (0x0)
  2517. * 0x10 : Bus Termination
  2518. * Value 0: Auto[ON], 1: ON, 2: OFF
  2519. * 0x11 : Not Used? (0)
  2520. * 0x12 : Bus Reset Delay Time (0x03)
  2521. * 0x13 : Bootable CD Support
  2522. * Value 0: Disable, 1: Enable
  2523. * 0x14 : Device Scan
  2524. * Bit 7 6 5 4 3 2 1 0
  2525. * | <----------------->
  2526. * | SCSI ID: Value 0: Skip, 1: YES
  2527. * |-> Value 0: ALL scan, Value 1: Manual
  2528. * 0x15 - 0x1b : Not Used? (0)
  2529. * 0x1c : Constant? (0x01) (clock div?)
  2530. * 0x1d - 0x7c : Not Used (0xff)
  2531. * 0x7d : Not Used? (0xff)
  2532. * 0x7e : Constant (0x55), Validity signature
  2533. * 0x7f : Constant (0xaa), Validity signature
  2534. */
  2535. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2536. {
  2537. int ret, i;
  2538. int auto_sync;
  2539. nsp32_target *target;
  2540. int entry;
  2541. /*
  2542. * Reset time which is designated by EEPROM.
  2543. *
  2544. * TODO: Not used yet.
  2545. */
  2546. data->resettime = nsp32_prom_read(data, 0x12);
  2547. /*
  2548. * HBA Synchronous Transfer Period
  2549. *
  2550. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2551. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2552. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2553. * On the contrary if connected SCSI devices are same or higher
  2554. * than 4, then transfer speed is set as FAST-10M.
  2555. *
  2556. * I break this rule. The number of connected SCSI devices are
  2557. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2558. * forced as ULTRA-20M.
  2559. */
  2560. ret = nsp32_prom_read(data, 0x07);
  2561. switch (ret) {
  2562. case 0:
  2563. auto_sync = TRUE;
  2564. break;
  2565. case 1:
  2566. auto_sync = FALSE;
  2567. break;
  2568. default:
  2569. nsp32_msg(KERN_WARNING,
  2570. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2571. auto_sync = TRUE;
  2572. }
  2573. if (trans_mode == ULTRA20M_MODE) {
  2574. auto_sync = TRUE;
  2575. }
  2576. /*
  2577. * each device Synchronous Transfer Period
  2578. */
  2579. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2580. target = &data->target[i];
  2581. if (auto_sync == TRUE) {
  2582. target->limit_entry = 0; /* set as ULTRA20M */
  2583. } else {
  2584. ret = nsp32_prom_read(data, i);
  2585. entry = nsp32_search_period_entry(data, target, ret);
  2586. if (entry < 0) {
  2587. /* search failed... set maximum speed */
  2588. entry = 0;
  2589. }
  2590. target->limit_entry = entry;
  2591. }
  2592. }
  2593. return TRUE;
  2594. }
  2595. /*
  2596. * C16 110 (I-O Data: SC-NBD) data map:
  2597. *
  2598. * ROMADDR
  2599. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2600. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2601. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2602. * 0x08 - 0x0f : Not Used? (0x0)
  2603. * 0x10 : Transfer Mode
  2604. * Value 0: PIO, 1: Busmater
  2605. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2606. * 0x12 : Bus Termination
  2607. * Value 0: Disable, 1: Enable
  2608. * 0x13 - 0x19 : Disconnection
  2609. * Value 0: Disable, 1: Enable
  2610. * 0x1a - 0x7c : Not Used? (0)
  2611. * 0x7d : Not Used? (0xf8)
  2612. * 0x7e : Constant (0x55), Validity signature
  2613. * 0x7f : Constant (0xaa), Validity signature
  2614. */
  2615. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2616. {
  2617. int ret, i;
  2618. nsp32_target *target;
  2619. int entry, val;
  2620. /*
  2621. * Reset time which is designated by EEPROM.
  2622. *
  2623. * TODO: Not used yet.
  2624. */
  2625. data->resettime = nsp32_prom_read(data, 0x11);
  2626. /*
  2627. * each device Synchronous Transfer Period
  2628. */
  2629. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2630. target = &data->target[i];
  2631. ret = nsp32_prom_read(data, i);
  2632. switch (ret) {
  2633. case 0: /* 20MB/s */
  2634. val = 0x0c;
  2635. break;
  2636. case 1: /* 10MB/s */
  2637. val = 0x19;
  2638. break;
  2639. case 2: /* 5MB/s */
  2640. val = 0x32;
  2641. break;
  2642. case 3: /* ASYNC */
  2643. val = 0x00;
  2644. break;
  2645. default: /* default 20MB/s */
  2646. val = 0x0c;
  2647. break;
  2648. }
  2649. entry = nsp32_search_period_entry(data, target, val);
  2650. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2651. /* search failed... set maximum speed */
  2652. entry = 0;
  2653. }
  2654. target->limit_entry = entry;
  2655. }
  2656. return TRUE;
  2657. }
  2658. /*
  2659. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2660. */
  2661. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2662. {
  2663. int i, val;
  2664. /* start condition */
  2665. nsp32_prom_start(data);
  2666. /* device address */
  2667. nsp32_prom_write_bit(data, 1); /* 1 */
  2668. nsp32_prom_write_bit(data, 0); /* 0 */
  2669. nsp32_prom_write_bit(data, 1); /* 1 */
  2670. nsp32_prom_write_bit(data, 0); /* 0 */
  2671. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2672. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2673. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2674. /* R/W: W for dummy write */
  2675. nsp32_prom_write_bit(data, 0);
  2676. /* ack */
  2677. nsp32_prom_write_bit(data, 0);
  2678. /* word address */
  2679. for (i = 7; i >= 0; i--) {
  2680. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2681. }
  2682. /* ack */
  2683. nsp32_prom_write_bit(data, 0);
  2684. /* start condition */
  2685. nsp32_prom_start(data);
  2686. /* device address */
  2687. nsp32_prom_write_bit(data, 1); /* 1 */
  2688. nsp32_prom_write_bit(data, 0); /* 0 */
  2689. nsp32_prom_write_bit(data, 1); /* 1 */
  2690. nsp32_prom_write_bit(data, 0); /* 0 */
  2691. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2692. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2693. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2694. /* R/W: R */
  2695. nsp32_prom_write_bit(data, 1);
  2696. /* ack */
  2697. nsp32_prom_write_bit(data, 0);
  2698. /* data... */
  2699. val = 0;
  2700. for (i = 7; i >= 0; i--) {
  2701. val += (nsp32_prom_read_bit(data) << i);
  2702. }
  2703. /* no ack */
  2704. nsp32_prom_write_bit(data, 1);
  2705. /* stop condition */
  2706. nsp32_prom_stop(data);
  2707. return val;
  2708. }
  2709. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2710. {
  2711. int base = data->BaseAddress;
  2712. int tmp;
  2713. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2714. if (val == 0) {
  2715. tmp &= ~bit;
  2716. } else {
  2717. tmp |= bit;
  2718. }
  2719. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2720. udelay(10);
  2721. }
  2722. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2723. {
  2724. int base = data->BaseAddress;
  2725. int tmp, ret;
  2726. if (bit != SDA) {
  2727. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2728. return 0;
  2729. }
  2730. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2731. if (tmp == 0) {
  2732. ret = 0;
  2733. } else {
  2734. ret = 1;
  2735. }
  2736. udelay(10);
  2737. return ret;
  2738. }
  2739. static void nsp32_prom_start (nsp32_hw_data *data)
  2740. {
  2741. /* start condition */
  2742. nsp32_prom_set(data, SCL, 1);
  2743. nsp32_prom_set(data, SDA, 1);
  2744. nsp32_prom_set(data, ENA, 1); /* output mode */
  2745. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2746. * SDA 1->0 is start condition */
  2747. nsp32_prom_set(data, SCL, 0);
  2748. }
  2749. static void nsp32_prom_stop (nsp32_hw_data *data)
  2750. {
  2751. /* stop condition */
  2752. nsp32_prom_set(data, SCL, 1);
  2753. nsp32_prom_set(data, SDA, 0);
  2754. nsp32_prom_set(data, ENA, 1); /* output mode */
  2755. nsp32_prom_set(data, SDA, 1);
  2756. nsp32_prom_set(data, SCL, 0);
  2757. }
  2758. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2759. {
  2760. /* write */
  2761. nsp32_prom_set(data, SDA, val);
  2762. nsp32_prom_set(data, SCL, 1 );
  2763. nsp32_prom_set(data, SCL, 0 );
  2764. }
  2765. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2766. {
  2767. int val;
  2768. /* read */
  2769. nsp32_prom_set(data, ENA, 0); /* input mode */
  2770. nsp32_prom_set(data, SCL, 1);
  2771. val = nsp32_prom_get(data, SDA);
  2772. nsp32_prom_set(data, SCL, 0);
  2773. nsp32_prom_set(data, ENA, 1); /* output mode */
  2774. return val;
  2775. }
  2776. /**************************************************************************
  2777. * Power Management
  2778. */
  2779. #ifdef CONFIG_PM
  2780. /* Device suspended */
  2781. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2782. {
  2783. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2784. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state.event=%x, slot=%s, host=0x%p",
  2785. pdev, state.event, pci_name(pdev), host);
  2786. pci_save_state (pdev);
  2787. pci_disable_device (pdev);
  2788. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2789. return 0;
  2790. }
  2791. /* Device woken up */
  2792. static int nsp32_resume(struct pci_dev *pdev)
  2793. {
  2794. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2795. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2796. unsigned short reg;
  2797. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p",
  2798. pdev, pci_name(pdev), host);
  2799. pci_set_power_state(pdev, PCI_D0);
  2800. pci_enable_wake (pdev, PCI_D0, 0);
  2801. pci_restore_state (pdev);
  2802. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2803. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2804. if (reg == 0xffff) {
  2805. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2806. return 0;
  2807. }
  2808. nsp32hw_init (data);
  2809. nsp32_do_bus_reset(data);
  2810. nsp32_msg(KERN_INFO, "resume success");
  2811. return 0;
  2812. }
  2813. #endif
  2814. /************************************************************************
  2815. * PCI/Cardbus probe/remove routine
  2816. */
  2817. static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2818. {
  2819. int ret;
  2820. nsp32_hw_data *data = &nsp32_data_base;
  2821. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2822. ret = pci_enable_device(pdev);
  2823. if (ret) {
  2824. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2825. return ret;
  2826. }
  2827. data->Pci = pdev;
  2828. data->pci_devid = id;
  2829. data->IrqNumber = pdev->irq;
  2830. data->BaseAddress = pci_resource_start(pdev, 0);
  2831. data->NumAddress = pci_resource_len (pdev, 0);
  2832. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2833. data->MmioLength = pci_resource_len (pdev, 1);
  2834. pci_set_master(pdev);
  2835. ret = nsp32_detect(pdev);
  2836. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2837. pdev->irq,
  2838. data->MmioAddress, data->MmioLength,
  2839. pci_name(pdev),
  2840. nsp32_model[id->driver_data]);
  2841. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2842. return ret;
  2843. }
  2844. static void nsp32_remove(struct pci_dev *pdev)
  2845. {
  2846. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2847. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2848. scsi_remove_host(host);
  2849. nsp32_release(host);
  2850. scsi_host_put(host);
  2851. }
  2852. static struct pci_driver nsp32_driver = {
  2853. .name = "nsp32",
  2854. .id_table = nsp32_pci_table,
  2855. .probe = nsp32_probe,
  2856. .remove = nsp32_remove,
  2857. #ifdef CONFIG_PM
  2858. .suspend = nsp32_suspend,
  2859. .resume = nsp32_resume,
  2860. #endif
  2861. };
  2862. /*********************************************************************
  2863. * Moule entry point
  2864. */
  2865. static int __init init_nsp32(void) {
  2866. nsp32_msg(KERN_INFO, "loading...");
  2867. return pci_register_driver(&nsp32_driver);
  2868. }
  2869. static void __exit exit_nsp32(void) {
  2870. nsp32_msg(KERN_INFO, "unloading...");
  2871. pci_unregister_driver(&nsp32_driver);
  2872. }
  2873. module_init(init_nsp32);
  2874. module_exit(exit_nsp32);
  2875. /* end */