aic79xx_osm_pci.c 10.0 KB

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  1. /*
  2. * Linux driver attachment glue for PCI based U320 controllers.
  3. *
  4. * Copyright (c) 2000-2001 Adaptec Inc.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
  40. */
  41. #include "aic79xx_osm.h"
  42. #include "aic79xx_inline.h"
  43. #include "aic79xx_pci.h"
  44. /* Define the macro locally since it's different for different class of chips.
  45. */
  46. #define ID(x) \
  47. ID2C(x), \
  48. ID2C(IDIROC(x))
  49. static const struct pci_device_id ahd_linux_pci_id_table[] = {
  50. /* aic7901 based controllers */
  51. ID(ID_AHA_29320A),
  52. ID(ID_AHA_29320ALP),
  53. ID(ID_AHA_29320LPE),
  54. /* aic7902 based controllers */
  55. ID(ID_AHA_29320),
  56. ID(ID_AHA_29320B),
  57. ID(ID_AHA_29320LP),
  58. ID(ID_AHA_39320),
  59. ID(ID_AHA_39320_B),
  60. ID(ID_AHA_39320A),
  61. ID(ID_AHA_39320D),
  62. ID(ID_AHA_39320D_HP),
  63. ID(ID_AHA_39320D_B),
  64. ID(ID_AHA_39320D_B_HP),
  65. /* Generic chip probes for devices we don't know exactly. */
  66. ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
  67. ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
  68. ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
  69. { 0 }
  70. };
  71. MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
  72. static int __maybe_unused
  73. ahd_linux_pci_dev_suspend(struct device *dev)
  74. {
  75. struct ahd_softc *ahd = dev_get_drvdata(dev);
  76. int rc;
  77. if ((rc = ahd_suspend(ahd)))
  78. return rc;
  79. ahd_pci_suspend(ahd);
  80. return rc;
  81. }
  82. static int __maybe_unused
  83. ahd_linux_pci_dev_resume(struct device *dev)
  84. {
  85. struct ahd_softc *ahd = dev_get_drvdata(dev);
  86. ahd_pci_resume(ahd);
  87. ahd_resume(ahd);
  88. return 0;
  89. }
  90. static void
  91. ahd_linux_pci_dev_remove(struct pci_dev *pdev)
  92. {
  93. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  94. u_long s;
  95. if (ahd->platform_data && ahd->platform_data->host)
  96. scsi_remove_host(ahd->platform_data->host);
  97. ahd_lock(ahd, &s);
  98. ahd_intr_enable(ahd, FALSE);
  99. ahd_unlock(ahd, &s);
  100. ahd_free(ahd);
  101. }
  102. static void
  103. ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
  104. {
  105. struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
  106. unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  107. master_pdev = pci_get_slot(pdev->bus, master_devfn);
  108. if (master_pdev) {
  109. struct ahd_softc *master = pci_get_drvdata(master_pdev);
  110. if (master) {
  111. ahd->flags &= ~AHD_BIOS_ENABLED;
  112. ahd->flags |= master->flags & AHD_BIOS_ENABLED;
  113. } else
  114. printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
  115. pci_dev_put(master_pdev);
  116. }
  117. }
  118. static int
  119. ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  120. {
  121. char buf[80];
  122. struct ahd_softc *ahd;
  123. ahd_dev_softc_t pci;
  124. const struct ahd_pci_identity *entry;
  125. char *name;
  126. int error;
  127. struct device *dev = &pdev->dev;
  128. pci = pdev;
  129. entry = ahd_find_pci_device(pci);
  130. if (entry == NULL)
  131. return (-ENODEV);
  132. /*
  133. * Allocate a softc for this card and
  134. * set it up for attachment by our
  135. * common detect routine.
  136. */
  137. sprintf(buf, "ahd_pci:%d:%d:%d",
  138. ahd_get_pci_bus(pci),
  139. ahd_get_pci_slot(pci),
  140. ahd_get_pci_function(pci));
  141. name = kstrdup(buf, GFP_ATOMIC);
  142. if (name == NULL)
  143. return (-ENOMEM);
  144. ahd = ahd_alloc(NULL, name);
  145. if (ahd == NULL)
  146. return (-ENOMEM);
  147. if (pci_enable_device(pdev)) {
  148. ahd_free(ahd);
  149. return (-ENODEV);
  150. }
  151. pci_set_master(pdev);
  152. if (sizeof(dma_addr_t) > 4) {
  153. const u64 required_mask = dma_get_required_mask(dev);
  154. if (required_mask > DMA_BIT_MASK(39) &&
  155. dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
  156. ahd->flags |= AHD_64BIT_ADDRESSING;
  157. else if (required_mask > DMA_BIT_MASK(32) &&
  158. dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
  159. ahd->flags |= AHD_39BIT_ADDRESSING;
  160. else
  161. dma_set_mask(dev, DMA_BIT_MASK(32));
  162. } else {
  163. dma_set_mask(dev, DMA_BIT_MASK(32));
  164. }
  165. ahd->dev_softc = pci;
  166. error = ahd_pci_config(ahd, entry);
  167. if (error != 0) {
  168. ahd_free(ahd);
  169. return (-error);
  170. }
  171. /*
  172. * Second Function PCI devices need to inherit some
  173. * * settings from function 0.
  174. */
  175. if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
  176. ahd_linux_pci_inherit_flags(ahd);
  177. pci_set_drvdata(pdev, ahd);
  178. ahd_linux_register_host(ahd, &aic79xx_driver_template);
  179. return (0);
  180. }
  181. static SIMPLE_DEV_PM_OPS(ahd_linux_pci_dev_pm_ops,
  182. ahd_linux_pci_dev_suspend,
  183. ahd_linux_pci_dev_resume);
  184. static struct pci_driver aic79xx_pci_driver = {
  185. .name = "aic79xx",
  186. .probe = ahd_linux_pci_dev_probe,
  187. .driver.pm = &ahd_linux_pci_dev_pm_ops,
  188. .remove = ahd_linux_pci_dev_remove,
  189. .id_table = ahd_linux_pci_id_table
  190. };
  191. int
  192. ahd_linux_pci_init(void)
  193. {
  194. return pci_register_driver(&aic79xx_pci_driver);
  195. }
  196. void
  197. ahd_linux_pci_exit(void)
  198. {
  199. pci_unregister_driver(&aic79xx_pci_driver);
  200. }
  201. static int
  202. ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
  203. resource_size_t *base2)
  204. {
  205. *base = pci_resource_start(ahd->dev_softc, 0);
  206. /*
  207. * This is really the 3rd bar and should be at index 2,
  208. * but the Linux PCI code doesn't know how to "count" 64bit
  209. * bars.
  210. */
  211. *base2 = pci_resource_start(ahd->dev_softc, 3);
  212. if (*base == 0 || *base2 == 0)
  213. return (ENOMEM);
  214. if (!request_region(*base, 256, "aic79xx"))
  215. return (ENOMEM);
  216. if (!request_region(*base2, 256, "aic79xx")) {
  217. release_region(*base, 256);
  218. return (ENOMEM);
  219. }
  220. return (0);
  221. }
  222. static int
  223. ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  224. resource_size_t *bus_addr,
  225. uint8_t __iomem **maddr)
  226. {
  227. resource_size_t start;
  228. resource_size_t base_page;
  229. u_long base_offset;
  230. int error = 0;
  231. if (aic79xx_allow_memio == 0)
  232. return (ENOMEM);
  233. if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
  234. return (ENOMEM);
  235. start = pci_resource_start(ahd->dev_softc, 1);
  236. base_page = start & PAGE_MASK;
  237. base_offset = start - base_page;
  238. if (start != 0) {
  239. *bus_addr = start;
  240. if (!request_mem_region(start, 0x1000, "aic79xx"))
  241. error = ENOMEM;
  242. if (!error) {
  243. *maddr = ioremap(base_page, base_offset + 512);
  244. if (*maddr == NULL) {
  245. error = ENOMEM;
  246. release_mem_region(start, 0x1000);
  247. } else
  248. *maddr += base_offset;
  249. }
  250. } else
  251. error = ENOMEM;
  252. return (error);
  253. }
  254. int
  255. ahd_pci_map_registers(struct ahd_softc *ahd)
  256. {
  257. uint32_t command;
  258. resource_size_t base;
  259. uint8_t __iomem *maddr;
  260. int error;
  261. /*
  262. * If its allowed, we prefer memory mapped access.
  263. */
  264. command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
  265. command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
  266. base = 0;
  267. maddr = NULL;
  268. error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
  269. if (error == 0) {
  270. ahd->platform_data->mem_busaddr = base;
  271. ahd->tags[0] = BUS_SPACE_MEMIO;
  272. ahd->bshs[0].maddr = maddr;
  273. ahd->tags[1] = BUS_SPACE_MEMIO;
  274. ahd->bshs[1].maddr = maddr + 0x100;
  275. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
  276. command | PCIM_CMD_MEMEN, 4);
  277. if (ahd_pci_test_register_access(ahd) != 0) {
  278. printk("aic79xx: PCI Device %d:%d:%d "
  279. "failed memory mapped test. Using PIO.\n",
  280. ahd_get_pci_bus(ahd->dev_softc),
  281. ahd_get_pci_slot(ahd->dev_softc),
  282. ahd_get_pci_function(ahd->dev_softc));
  283. iounmap(maddr);
  284. release_mem_region(ahd->platform_data->mem_busaddr,
  285. 0x1000);
  286. ahd->bshs[0].maddr = NULL;
  287. maddr = NULL;
  288. } else
  289. command |= PCIM_CMD_MEMEN;
  290. } else if (bootverbose) {
  291. printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
  292. "unavailable. Cannot memory map device.\n",
  293. ahd_get_pci_bus(ahd->dev_softc),
  294. ahd_get_pci_slot(ahd->dev_softc),
  295. ahd_get_pci_function(ahd->dev_softc),
  296. (unsigned long long)base);
  297. }
  298. if (maddr == NULL) {
  299. resource_size_t base2;
  300. error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
  301. if (error == 0) {
  302. ahd->tags[0] = BUS_SPACE_PIO;
  303. ahd->tags[1] = BUS_SPACE_PIO;
  304. ahd->bshs[0].ioport = (u_long)base;
  305. ahd->bshs[1].ioport = (u_long)base2;
  306. command |= PCIM_CMD_PORTEN;
  307. } else {
  308. printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
  309. "0x%llx unavailable. Cannot map device.\n",
  310. ahd_get_pci_bus(ahd->dev_softc),
  311. ahd_get_pci_slot(ahd->dev_softc),
  312. ahd_get_pci_function(ahd->dev_softc),
  313. (unsigned long long)base,
  314. (unsigned long long)base2);
  315. }
  316. }
  317. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
  318. return (error);
  319. }
  320. int
  321. ahd_pci_map_int(struct ahd_softc *ahd)
  322. {
  323. int error;
  324. error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
  325. IRQF_SHARED, "aic79xx", ahd);
  326. if (!error)
  327. ahd->platform_data->irq = ahd->dev_softc->irq;
  328. return (-error);
  329. }
  330. void
  331. ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
  332. {
  333. pci_set_power_state(ahd->dev_softc, new_state);
  334. }