ctcm_fsms.c 73 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2001, 2007
  4. * Authors: Fritz Elfert ([email protected])
  5. * Peter Tiedemann ([email protected])
  6. * MPC additions :
  7. * Belinda Thompson ([email protected])
  8. * Andy Richter ([email protected])
  9. */
  10. #undef DEBUG
  11. #undef DEBUGDATA
  12. #undef DEBUGCCW
  13. #define KMSG_COMPONENT "ctcm"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/errno.h>
  20. #include <linux/types.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/timer.h>
  23. #include <linux/bitops.h>
  24. #include <linux/signal.h>
  25. #include <linux/string.h>
  26. #include <linux/ip.h>
  27. #include <linux/if_arp.h>
  28. #include <linux/tcp.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ctype.h>
  31. #include <net/dst.h>
  32. #include <linux/io.h>
  33. #include <asm/ccwdev.h>
  34. #include <asm/ccwgroup.h>
  35. #include <linux/uaccess.h>
  36. #include <asm/idals.h>
  37. #include "fsm.h"
  38. #include "ctcm_dbug.h"
  39. #include "ctcm_main.h"
  40. #include "ctcm_fsms.h"
  41. const char *dev_state_names[] = {
  42. [DEV_STATE_STOPPED] = "Stopped",
  43. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  44. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  45. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  46. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  47. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  48. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  49. [DEV_STATE_RUNNING] = "Running",
  50. };
  51. const char *dev_event_names[] = {
  52. [DEV_EVENT_START] = "Start",
  53. [DEV_EVENT_STOP] = "Stop",
  54. [DEV_EVENT_RXUP] = "RX up",
  55. [DEV_EVENT_TXUP] = "TX up",
  56. [DEV_EVENT_RXDOWN] = "RX down",
  57. [DEV_EVENT_TXDOWN] = "TX down",
  58. [DEV_EVENT_RESTART] = "Restart",
  59. };
  60. const char *ctc_ch_event_names[] = {
  61. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  62. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  63. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  64. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  65. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  66. [CTC_EVENT_ATTN] = "Status ATTN",
  67. [CTC_EVENT_BUSY] = "Status BUSY",
  68. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  69. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  70. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  71. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  72. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  73. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  74. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  75. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  76. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  77. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  78. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  79. [CTC_EVENT_IRQ] = "IRQ normal",
  80. [CTC_EVENT_FINSTAT] = "IRQ final",
  81. [CTC_EVENT_TIMER] = "Timer",
  82. [CTC_EVENT_START] = "Start",
  83. [CTC_EVENT_STOP] = "Stop",
  84. /*
  85. * additional MPC events
  86. */
  87. [CTC_EVENT_SEND_XID] = "XID Exchange",
  88. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  89. };
  90. const char *ctc_ch_state_names[] = {
  91. [CTC_STATE_IDLE] = "Idle",
  92. [CTC_STATE_STOPPED] = "Stopped",
  93. [CTC_STATE_STARTWAIT] = "StartWait",
  94. [CTC_STATE_STARTRETRY] = "StartRetry",
  95. [CTC_STATE_SETUPWAIT] = "SetupWait",
  96. [CTC_STATE_RXINIT] = "RX init",
  97. [CTC_STATE_TXINIT] = "TX init",
  98. [CTC_STATE_RX] = "RX",
  99. [CTC_STATE_TX] = "TX",
  100. [CTC_STATE_RXIDLE] = "RX idle",
  101. [CTC_STATE_TXIDLE] = "TX idle",
  102. [CTC_STATE_RXERR] = "RX error",
  103. [CTC_STATE_TXERR] = "TX error",
  104. [CTC_STATE_TERM] = "Terminating",
  105. [CTC_STATE_DTERM] = "Restarting",
  106. [CTC_STATE_NOTOP] = "Not operational",
  107. /*
  108. * additional MPC states
  109. */
  110. [CH_XID0_PENDING] = "Pending XID0 Start",
  111. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  112. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  113. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  114. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  115. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  116. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  117. };
  118. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  119. /*
  120. * ----- static ctcm actions for channel statemachine -----
  121. *
  122. */
  123. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  124. static void chx_rx(fsm_instance *fi, int event, void *arg);
  125. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  126. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  140. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  141. /*
  142. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  143. *
  144. */
  145. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  147. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  148. /* shared :
  149. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  162. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  163. */
  164. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  165. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  167. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  168. /*
  169. * Check return code of a preceding ccw_device call, halt_IO etc...
  170. *
  171. * ch : The channel, the error belongs to.
  172. * Returns the error code (!= 0) to inspect.
  173. */
  174. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  175. {
  176. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  177. "%s(%s): %s: %04x\n",
  178. CTCM_FUNTAIL, ch->id, msg, rc);
  179. switch (rc) {
  180. case -EBUSY:
  181. pr_info("%s: The communication peer is busy\n",
  182. ch->id);
  183. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  184. break;
  185. case -ENODEV:
  186. pr_err("%s: The specified target device is not valid\n",
  187. ch->id);
  188. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  189. break;
  190. default:
  191. pr_err("An I/O operation resulted in error %04x\n",
  192. rc);
  193. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  194. }
  195. }
  196. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  197. {
  198. struct sk_buff *skb;
  199. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  200. while ((skb = skb_dequeue(q))) {
  201. refcount_dec(&skb->users);
  202. dev_kfree_skb_any(skb);
  203. }
  204. }
  205. /*
  206. * NOP action for statemachines
  207. */
  208. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  209. {
  210. }
  211. /*
  212. * Actions for channel - statemachines.
  213. */
  214. /*
  215. * Normal data has been send. Free the corresponding
  216. * skb (it's in io_queue), reset dev->tbusy and
  217. * revert to idle state.
  218. *
  219. * fi An instance of a channel statemachine.
  220. * event The event, just happened.
  221. * arg Generic pointer, casted from channel * upon call.
  222. */
  223. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  224. {
  225. struct channel *ch = arg;
  226. struct net_device *dev = ch->netdev;
  227. struct ctcm_priv *priv = dev->ml_priv;
  228. struct sk_buff *skb;
  229. int first = 1;
  230. int i;
  231. unsigned long duration;
  232. unsigned long done_stamp = jiffies;
  233. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  234. duration = done_stamp - ch->prof.send_stamp;
  235. if (duration > ch->prof.tx_time)
  236. ch->prof.tx_time = duration;
  237. if (ch->irb->scsw.cmd.count != 0)
  238. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  239. "%s(%s): TX not complete, remaining %d bytes",
  240. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  241. fsm_deltimer(&ch->timer);
  242. while ((skb = skb_dequeue(&ch->io_queue))) {
  243. priv->stats.tx_packets++;
  244. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  245. if (first) {
  246. priv->stats.tx_bytes += 2;
  247. first = 0;
  248. }
  249. refcount_dec(&skb->users);
  250. dev_kfree_skb_irq(skb);
  251. }
  252. spin_lock(&ch->collect_lock);
  253. clear_normalized_cda(&ch->ccw[4]);
  254. if (ch->collect_len > 0) {
  255. int rc;
  256. if (ctcm_checkalloc_buffer(ch)) {
  257. spin_unlock(&ch->collect_lock);
  258. return;
  259. }
  260. ch->trans_skb->data = ch->trans_skb_data;
  261. skb_reset_tail_pointer(ch->trans_skb);
  262. ch->trans_skb->len = 0;
  263. if (ch->prof.maxmulti < (ch->collect_len + 2))
  264. ch->prof.maxmulti = ch->collect_len + 2;
  265. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  266. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  267. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  268. i = 0;
  269. while ((skb = skb_dequeue(&ch->collect_queue))) {
  270. skb_copy_from_linear_data(skb,
  271. skb_put(ch->trans_skb, skb->len), skb->len);
  272. priv->stats.tx_packets++;
  273. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  274. refcount_dec(&skb->users);
  275. dev_kfree_skb_irq(skb);
  276. i++;
  277. }
  278. ch->collect_len = 0;
  279. spin_unlock(&ch->collect_lock);
  280. ch->ccw[1].count = ch->trans_skb->len;
  281. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  282. ch->prof.send_stamp = jiffies;
  283. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  284. ch->prof.doios_multi++;
  285. if (rc != 0) {
  286. priv->stats.tx_dropped += i;
  287. priv->stats.tx_errors += i;
  288. fsm_deltimer(&ch->timer);
  289. ctcm_ccw_check_rc(ch, rc, "chained TX");
  290. }
  291. } else {
  292. spin_unlock(&ch->collect_lock);
  293. fsm_newstate(fi, CTC_STATE_TXIDLE);
  294. }
  295. ctcm_clear_busy_do(dev);
  296. }
  297. /*
  298. * Initial data is sent.
  299. * Notify device statemachine that we are up and
  300. * running.
  301. *
  302. * fi An instance of a channel statemachine.
  303. * event The event, just happened.
  304. * arg Generic pointer, casted from channel * upon call.
  305. */
  306. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  307. {
  308. struct channel *ch = arg;
  309. struct net_device *dev = ch->netdev;
  310. struct ctcm_priv *priv = dev->ml_priv;
  311. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  312. fsm_deltimer(&ch->timer);
  313. fsm_newstate(fi, CTC_STATE_TXIDLE);
  314. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  315. }
  316. /*
  317. * Got normal data, check for sanity, queue it up, allocate new buffer
  318. * trigger bottom half, and initiate next read.
  319. *
  320. * fi An instance of a channel statemachine.
  321. * event The event, just happened.
  322. * arg Generic pointer, casted from channel * upon call.
  323. */
  324. static void chx_rx(fsm_instance *fi, int event, void *arg)
  325. {
  326. struct channel *ch = arg;
  327. struct net_device *dev = ch->netdev;
  328. struct ctcm_priv *priv = dev->ml_priv;
  329. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  330. struct sk_buff *skb = ch->trans_skb;
  331. __u16 block_len = *((__u16 *)skb->data);
  332. int check_len;
  333. int rc;
  334. fsm_deltimer(&ch->timer);
  335. if (len < 8) {
  336. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  337. "%s(%s): got packet with length %d < 8\n",
  338. CTCM_FUNTAIL, dev->name, len);
  339. priv->stats.rx_dropped++;
  340. priv->stats.rx_length_errors++;
  341. goto again;
  342. }
  343. if (len > ch->max_bufsize) {
  344. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  345. "%s(%s): got packet with length %d > %d\n",
  346. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  347. priv->stats.rx_dropped++;
  348. priv->stats.rx_length_errors++;
  349. goto again;
  350. }
  351. /*
  352. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  353. */
  354. switch (ch->protocol) {
  355. case CTCM_PROTO_S390:
  356. case CTCM_PROTO_OS390:
  357. check_len = block_len + 2;
  358. break;
  359. default:
  360. check_len = block_len;
  361. break;
  362. }
  363. if ((len < block_len) || (len > check_len)) {
  364. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  365. "%s(%s): got block length %d != rx length %d\n",
  366. CTCM_FUNTAIL, dev->name, block_len, len);
  367. if (do_debug)
  368. ctcmpc_dump_skb(skb, 0);
  369. *((__u16 *)skb->data) = len;
  370. priv->stats.rx_dropped++;
  371. priv->stats.rx_length_errors++;
  372. goto again;
  373. }
  374. if (block_len > 2) {
  375. *((__u16 *)skb->data) = block_len - 2;
  376. ctcm_unpack_skb(ch, skb);
  377. }
  378. again:
  379. skb->data = ch->trans_skb_data;
  380. skb_reset_tail_pointer(skb);
  381. skb->len = 0;
  382. if (ctcm_checkalloc_buffer(ch))
  383. return;
  384. ch->ccw[1].count = ch->max_bufsize;
  385. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  386. if (rc != 0)
  387. ctcm_ccw_check_rc(ch, rc, "normal RX");
  388. }
  389. /*
  390. * Initialize connection by sending a __u16 of value 0.
  391. *
  392. * fi An instance of a channel statemachine.
  393. * event The event, just happened.
  394. * arg Generic pointer, casted from channel * upon call.
  395. */
  396. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  397. {
  398. int rc;
  399. struct channel *ch = arg;
  400. int fsmstate = fsm_getstate(fi);
  401. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  402. "%s(%s) : %02x",
  403. CTCM_FUNTAIL, ch->id, fsmstate);
  404. ch->sense_rc = 0; /* reset unit check report control */
  405. if (fsmstate == CTC_STATE_TXIDLE)
  406. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  407. "%s(%s): remote side issued READ?, init.\n",
  408. CTCM_FUNTAIL, ch->id);
  409. fsm_deltimer(&ch->timer);
  410. if (ctcm_checkalloc_buffer(ch))
  411. return;
  412. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  413. (ch->protocol == CTCM_PROTO_OS390)) {
  414. /* OS/390 resp. z/OS */
  415. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  416. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  417. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  418. CTC_EVENT_TIMER, ch);
  419. chx_rxidle(fi, event, arg);
  420. } else {
  421. struct net_device *dev = ch->netdev;
  422. struct ctcm_priv *priv = dev->ml_priv;
  423. fsm_newstate(fi, CTC_STATE_TXIDLE);
  424. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  425. }
  426. return;
  427. }
  428. /*
  429. * Don't setup a timer for receiving the initial RX frame
  430. * if in compatibility mode, since VM TCP delays the initial
  431. * frame until it has some data to send.
  432. */
  433. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
  434. (ch->protocol != CTCM_PROTO_S390))
  435. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  436. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  437. ch->ccw[1].count = 2; /* Transfer only length */
  438. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  439. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  440. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  441. if (rc != 0) {
  442. fsm_deltimer(&ch->timer);
  443. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  444. ctcm_ccw_check_rc(ch, rc, "init IO");
  445. }
  446. /*
  447. * If in compatibility mode since we don't setup a timer, we
  448. * also signal RX channel up immediately. This enables us
  449. * to send packets early which in turn usually triggers some
  450. * reply from VM TCP which brings up the RX channel to it's
  451. * final state.
  452. */
  453. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
  454. (ch->protocol == CTCM_PROTO_S390)) {
  455. struct net_device *dev = ch->netdev;
  456. struct ctcm_priv *priv = dev->ml_priv;
  457. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  458. }
  459. }
  460. /*
  461. * Got initial data, check it. If OK,
  462. * notify device statemachine that we are up and
  463. * running.
  464. *
  465. * fi An instance of a channel statemachine.
  466. * event The event, just happened.
  467. * arg Generic pointer, casted from channel * upon call.
  468. */
  469. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  470. {
  471. struct channel *ch = arg;
  472. struct net_device *dev = ch->netdev;
  473. struct ctcm_priv *priv = dev->ml_priv;
  474. __u16 buflen;
  475. int rc;
  476. fsm_deltimer(&ch->timer);
  477. buflen = *((__u16 *)ch->trans_skb->data);
  478. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  479. __func__, dev->name, buflen);
  480. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  481. if (ctcm_checkalloc_buffer(ch))
  482. return;
  483. ch->ccw[1].count = ch->max_bufsize;
  484. fsm_newstate(fi, CTC_STATE_RXIDLE);
  485. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  486. if (rc != 0) {
  487. fsm_newstate(fi, CTC_STATE_RXINIT);
  488. ctcm_ccw_check_rc(ch, rc, "initial RX");
  489. } else
  490. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  491. } else {
  492. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  493. __func__, dev->name,
  494. buflen, CTCM_INITIAL_BLOCKLEN);
  495. chx_firstio(fi, event, arg);
  496. }
  497. }
  498. /*
  499. * Set channel into extended mode.
  500. *
  501. * fi An instance of a channel statemachine.
  502. * event The event, just happened.
  503. * arg Generic pointer, casted from channel * upon call.
  504. */
  505. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  506. {
  507. struct channel *ch = arg;
  508. int rc;
  509. unsigned long saveflags = 0;
  510. int timeout = CTCM_TIME_5_SEC;
  511. fsm_deltimer(&ch->timer);
  512. if (IS_MPC(ch)) {
  513. timeout = 1500;
  514. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  515. __func__, smp_processor_id(), ch, ch->id);
  516. }
  517. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  518. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  519. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  520. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  521. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  522. /* Such conditional locking is undeterministic in
  523. * static view. => ignore sparse warnings here. */
  524. rc = ccw_device_start(ch->cdev, &ch->ccw[6], 0, 0xff, 0);
  525. if (event == CTC_EVENT_TIMER) /* see above comments */
  526. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  527. if (rc != 0) {
  528. fsm_deltimer(&ch->timer);
  529. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  530. ctcm_ccw_check_rc(ch, rc, "set Mode");
  531. } else
  532. ch->retry = 0;
  533. }
  534. /*
  535. * Setup channel.
  536. *
  537. * fi An instance of a channel statemachine.
  538. * event The event, just happened.
  539. * arg Generic pointer, casted from channel * upon call.
  540. */
  541. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  542. {
  543. struct channel *ch = arg;
  544. unsigned long saveflags;
  545. int rc;
  546. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  547. CTCM_FUNTAIL, ch->id,
  548. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
  549. if (ch->trans_skb != NULL) {
  550. clear_normalized_cda(&ch->ccw[1]);
  551. dev_kfree_skb(ch->trans_skb);
  552. ch->trans_skb = NULL;
  553. }
  554. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  555. ch->ccw[1].cmd_code = CCW_CMD_READ;
  556. ch->ccw[1].flags = CCW_FLAG_SLI;
  557. ch->ccw[1].count = 0;
  558. } else {
  559. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  560. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  561. ch->ccw[1].count = 0;
  562. }
  563. if (ctcm_checkalloc_buffer(ch)) {
  564. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  565. "%s(%s): %s trans_skb alloc delayed "
  566. "until first transfer",
  567. CTCM_FUNTAIL, ch->id,
  568. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
  569. "RX" : "TX");
  570. }
  571. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  572. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  573. ch->ccw[0].count = 0;
  574. ch->ccw[0].cda = 0;
  575. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  576. ch->ccw[2].flags = CCW_FLAG_SLI;
  577. ch->ccw[2].count = 0;
  578. ch->ccw[2].cda = 0;
  579. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  580. ch->ccw[4].cda = 0;
  581. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  582. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  583. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  584. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  585. rc = ccw_device_halt(ch->cdev, 0);
  586. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  587. if (rc != 0) {
  588. if (rc != -EBUSY)
  589. fsm_deltimer(&ch->timer);
  590. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  591. }
  592. }
  593. /*
  594. * Shutdown a channel.
  595. *
  596. * fi An instance of a channel statemachine.
  597. * event The event, just happened.
  598. * arg Generic pointer, casted from channel * upon call.
  599. */
  600. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  601. {
  602. struct channel *ch = arg;
  603. unsigned long saveflags = 0;
  604. int rc;
  605. int oldstate;
  606. fsm_deltimer(&ch->timer);
  607. if (IS_MPC(ch))
  608. fsm_deltimer(&ch->sweep_timer);
  609. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  610. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  611. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  612. /* Such conditional locking is undeterministic in
  613. * static view. => ignore sparse warnings here. */
  614. oldstate = fsm_getstate(fi);
  615. fsm_newstate(fi, CTC_STATE_TERM);
  616. rc = ccw_device_halt(ch->cdev, 0);
  617. if (event == CTC_EVENT_STOP)
  618. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  619. /* see remark above about conditional locking */
  620. if (rc != 0 && rc != -EBUSY) {
  621. fsm_deltimer(&ch->timer);
  622. if (event != CTC_EVENT_STOP) {
  623. fsm_newstate(fi, oldstate);
  624. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  625. }
  626. }
  627. }
  628. /*
  629. * Cleanup helper for chx_fail and chx_stopped
  630. * cleanup channels queue and notify interface statemachine.
  631. *
  632. * fi An instance of a channel statemachine.
  633. * state The next state (depending on caller).
  634. * ch The channel to operate on.
  635. */
  636. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  637. struct channel *ch)
  638. {
  639. struct net_device *dev = ch->netdev;
  640. struct ctcm_priv *priv = dev->ml_priv;
  641. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  642. "%s(%s): %s[%d]\n",
  643. CTCM_FUNTAIL, dev->name, ch->id, state);
  644. fsm_deltimer(&ch->timer);
  645. if (IS_MPC(ch))
  646. fsm_deltimer(&ch->sweep_timer);
  647. fsm_newstate(fi, state);
  648. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  649. clear_normalized_cda(&ch->ccw[1]);
  650. dev_kfree_skb_any(ch->trans_skb);
  651. ch->trans_skb = NULL;
  652. }
  653. ch->th_seg = 0x00;
  654. ch->th_seq_num = 0x00;
  655. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  656. skb_queue_purge(&ch->io_queue);
  657. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  658. } else {
  659. ctcm_purge_skb_queue(&ch->io_queue);
  660. if (IS_MPC(ch))
  661. ctcm_purge_skb_queue(&ch->sweep_queue);
  662. spin_lock(&ch->collect_lock);
  663. ctcm_purge_skb_queue(&ch->collect_queue);
  664. ch->collect_len = 0;
  665. spin_unlock(&ch->collect_lock);
  666. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  667. }
  668. }
  669. /*
  670. * A channel has successfully been halted.
  671. * Cleanup it's queue and notify interface statemachine.
  672. *
  673. * fi An instance of a channel statemachine.
  674. * event The event, just happened.
  675. * arg Generic pointer, casted from channel * upon call.
  676. */
  677. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  678. {
  679. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  680. }
  681. /*
  682. * A stop command from device statemachine arrived and we are in
  683. * not operational mode. Set state to stopped.
  684. *
  685. * fi An instance of a channel statemachine.
  686. * event The event, just happened.
  687. * arg Generic pointer, casted from channel * upon call.
  688. */
  689. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  690. {
  691. fsm_newstate(fi, CTC_STATE_STOPPED);
  692. }
  693. /*
  694. * A machine check for no path, not operational status or gone device has
  695. * happened.
  696. * Cleanup queue and notify interface statemachine.
  697. *
  698. * fi An instance of a channel statemachine.
  699. * event The event, just happened.
  700. * arg Generic pointer, casted from channel * upon call.
  701. */
  702. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  703. {
  704. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  705. }
  706. /*
  707. * Handle error during setup of channel.
  708. *
  709. * fi An instance of a channel statemachine.
  710. * event The event, just happened.
  711. * arg Generic pointer, casted from channel * upon call.
  712. */
  713. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  714. {
  715. struct channel *ch = arg;
  716. struct net_device *dev = ch->netdev;
  717. struct ctcm_priv *priv = dev->ml_priv;
  718. /*
  719. * Special case: Got UC_RCRESET on setmode.
  720. * This means that remote side isn't setup. In this case
  721. * simply retry after some 10 secs...
  722. */
  723. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  724. ((event == CTC_EVENT_UC_RCRESET) ||
  725. (event == CTC_EVENT_UC_RSRESET))) {
  726. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  727. fsm_deltimer(&ch->timer);
  728. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  729. if (!IS_MPC(ch) &&
  730. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
  731. int rc = ccw_device_halt(ch->cdev, 0);
  732. if (rc != 0)
  733. ctcm_ccw_check_rc(ch, rc,
  734. "HaltIO in chx_setuperr");
  735. }
  736. return;
  737. }
  738. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  739. "%s(%s) : %s error during %s channel setup state=%s\n",
  740. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  741. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
  742. fsm_getstate_str(fi));
  743. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  744. fsm_newstate(fi, CTC_STATE_RXERR);
  745. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  746. } else {
  747. fsm_newstate(fi, CTC_STATE_TXERR);
  748. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  749. }
  750. }
  751. /*
  752. * Restart a channel after an error.
  753. *
  754. * fi An instance of a channel statemachine.
  755. * event The event, just happened.
  756. * arg Generic pointer, casted from channel * upon call.
  757. */
  758. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  759. {
  760. struct channel *ch = arg;
  761. struct net_device *dev = ch->netdev;
  762. unsigned long saveflags = 0;
  763. int oldstate;
  764. int rc;
  765. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  766. "%s: %s[%d] of %s\n",
  767. CTCM_FUNTAIL, ch->id, event, dev->name);
  768. fsm_deltimer(&ch->timer);
  769. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  770. oldstate = fsm_getstate(fi);
  771. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  772. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  773. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  774. /* Such conditional locking is a known problem for
  775. * sparse because its undeterministic in static view.
  776. * Warnings should be ignored here. */
  777. rc = ccw_device_halt(ch->cdev, 0);
  778. if (event == CTC_EVENT_TIMER)
  779. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  780. if (rc != 0) {
  781. if (rc != -EBUSY) {
  782. fsm_deltimer(&ch->timer);
  783. fsm_newstate(fi, oldstate);
  784. }
  785. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  786. }
  787. }
  788. /*
  789. * Handle error during RX initial handshake (exchange of
  790. * 0-length block header)
  791. *
  792. * fi An instance of a channel statemachine.
  793. * event The event, just happened.
  794. * arg Generic pointer, casted from channel * upon call.
  795. */
  796. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  797. {
  798. struct channel *ch = arg;
  799. struct net_device *dev = ch->netdev;
  800. struct ctcm_priv *priv = dev->ml_priv;
  801. if (event == CTC_EVENT_TIMER) {
  802. if (!IS_MPCDEV(dev))
  803. /* TODO : check if MPC deletes timer somewhere */
  804. fsm_deltimer(&ch->timer);
  805. if (ch->retry++ < 3)
  806. ctcm_chx_restart(fi, event, arg);
  807. else {
  808. fsm_newstate(fi, CTC_STATE_RXERR);
  809. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  810. }
  811. } else {
  812. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  813. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  814. ctc_ch_event_names[event], fsm_getstate_str(fi));
  815. dev_warn(&dev->dev,
  816. "Initialization failed with RX/TX init handshake "
  817. "error %s\n", ctc_ch_event_names[event]);
  818. }
  819. }
  820. /*
  821. * Notify device statemachine if we gave up initialization
  822. * of RX channel.
  823. *
  824. * fi An instance of a channel statemachine.
  825. * event The event, just happened.
  826. * arg Generic pointer, casted from channel * upon call.
  827. */
  828. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  829. {
  830. struct channel *ch = arg;
  831. struct net_device *dev = ch->netdev;
  832. struct ctcm_priv *priv = dev->ml_priv;
  833. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  834. "%s(%s): RX %s busy, init. fail",
  835. CTCM_FUNTAIL, dev->name, ch->id);
  836. fsm_newstate(fi, CTC_STATE_RXERR);
  837. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  838. }
  839. /*
  840. * Handle RX Unit check remote reset (remote disconnected)
  841. *
  842. * fi An instance of a channel statemachine.
  843. * event The event, just happened.
  844. * arg Generic pointer, casted from channel * upon call.
  845. */
  846. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  847. {
  848. struct channel *ch = arg;
  849. struct channel *ch2;
  850. struct net_device *dev = ch->netdev;
  851. struct ctcm_priv *priv = dev->ml_priv;
  852. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  853. "%s: %s: remote disconnect - re-init ...",
  854. CTCM_FUNTAIL, dev->name);
  855. fsm_deltimer(&ch->timer);
  856. /*
  857. * Notify device statemachine
  858. */
  859. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  860. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  861. fsm_newstate(fi, CTC_STATE_DTERM);
  862. ch2 = priv->channel[CTCM_WRITE];
  863. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  864. ccw_device_halt(ch->cdev, 0);
  865. ccw_device_halt(ch2->cdev, 0);
  866. }
  867. /*
  868. * Handle error during TX channel initialization.
  869. *
  870. * fi An instance of a channel statemachine.
  871. * event The event, just happened.
  872. * arg Generic pointer, casted from channel * upon call.
  873. */
  874. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  875. {
  876. struct channel *ch = arg;
  877. struct net_device *dev = ch->netdev;
  878. struct ctcm_priv *priv = dev->ml_priv;
  879. if (event == CTC_EVENT_TIMER) {
  880. fsm_deltimer(&ch->timer);
  881. if (ch->retry++ < 3)
  882. ctcm_chx_restart(fi, event, arg);
  883. else {
  884. fsm_newstate(fi, CTC_STATE_TXERR);
  885. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  886. }
  887. } else {
  888. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  889. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  890. ctc_ch_event_names[event], fsm_getstate_str(fi));
  891. dev_warn(&dev->dev,
  892. "Initialization failed with RX/TX init handshake "
  893. "error %s\n", ctc_ch_event_names[event]);
  894. }
  895. }
  896. /*
  897. * Handle TX timeout by retrying operation.
  898. *
  899. * fi An instance of a channel statemachine.
  900. * event The event, just happened.
  901. * arg Generic pointer, casted from channel * upon call.
  902. */
  903. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  904. {
  905. struct channel *ch = arg;
  906. struct net_device *dev = ch->netdev;
  907. struct ctcm_priv *priv = dev->ml_priv;
  908. struct sk_buff *skb;
  909. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  910. __func__, smp_processor_id(), ch, ch->id);
  911. fsm_deltimer(&ch->timer);
  912. if (ch->retry++ > 3) {
  913. struct mpc_group *gptr = priv->mpcg;
  914. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  915. "%s: %s: retries exceeded",
  916. CTCM_FUNTAIL, ch->id);
  917. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  918. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  919. use gptr as mpc indicator */
  920. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  921. ctcm_chx_restart(fi, event, arg);
  922. goto done;
  923. }
  924. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  925. "%s : %s: retry %d",
  926. CTCM_FUNTAIL, ch->id, ch->retry);
  927. skb = skb_peek(&ch->io_queue);
  928. if (skb) {
  929. int rc = 0;
  930. unsigned long saveflags = 0;
  931. clear_normalized_cda(&ch->ccw[4]);
  932. ch->ccw[4].count = skb->len;
  933. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  934. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  935. "%s: %s: IDAL alloc failed",
  936. CTCM_FUNTAIL, ch->id);
  937. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  938. ctcm_chx_restart(fi, event, arg);
  939. goto done;
  940. }
  941. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  942. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  943. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  944. /* Such conditional locking is a known problem for
  945. * sparse because its undeterministic in static view.
  946. * Warnings should be ignored here. */
  947. if (do_debug_ccw)
  948. ctcmpc_dumpit((char *)&ch->ccw[3],
  949. sizeof(struct ccw1) * 3);
  950. rc = ccw_device_start(ch->cdev, &ch->ccw[3], 0, 0xff, 0);
  951. if (event == CTC_EVENT_TIMER)
  952. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  953. saveflags);
  954. if (rc != 0) {
  955. fsm_deltimer(&ch->timer);
  956. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  957. ctcm_purge_skb_queue(&ch->io_queue);
  958. }
  959. }
  960. done:
  961. return;
  962. }
  963. /*
  964. * Handle fatal errors during an I/O command.
  965. *
  966. * fi An instance of a channel statemachine.
  967. * event The event, just happened.
  968. * arg Generic pointer, casted from channel * upon call.
  969. */
  970. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  971. {
  972. struct channel *ch = arg;
  973. struct net_device *dev = ch->netdev;
  974. struct ctcm_priv *priv = dev->ml_priv;
  975. int rd = CHANNEL_DIRECTION(ch->flags);
  976. fsm_deltimer(&ch->timer);
  977. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  978. "%s: %s: %s unrecoverable channel error",
  979. CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
  980. if (IS_MPC(ch)) {
  981. priv->stats.tx_dropped++;
  982. priv->stats.tx_errors++;
  983. }
  984. if (rd == CTCM_READ) {
  985. fsm_newstate(fi, CTC_STATE_RXERR);
  986. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  987. } else {
  988. fsm_newstate(fi, CTC_STATE_TXERR);
  989. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  990. }
  991. }
  992. /*
  993. * The ctcm statemachine for a channel.
  994. */
  995. const fsm_node ch_fsm[] = {
  996. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  997. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  998. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  999. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1000. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1001. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1002. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1003. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1004. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1005. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1006. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1007. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1008. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1009. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1010. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1011. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1012. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1013. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1014. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1015. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1016. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1017. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1018. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1019. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1020. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1021. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1022. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1023. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1024. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1025. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1026. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1027. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1028. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1029. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1033. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1034. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1035. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1036. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1037. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1038. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1039. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1040. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1041. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1042. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1043. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1044. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1045. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1046. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1047. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1048. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1049. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1050. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1051. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1052. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1053. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1054. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1055. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1056. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1057. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1058. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1059. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1060. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1061. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1062. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1063. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1064. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1065. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1066. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1067. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1068. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1069. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1070. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1071. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1072. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1073. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1074. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1075. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1076. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1077. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1078. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1079. };
  1080. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1081. /*
  1082. * MPC actions for mpc channel statemachine
  1083. * handling of MPC protocol requires extra
  1084. * statemachine and actions which are prefixed ctcmpc_ .
  1085. * The ctc_ch_states and ctc_ch_state_names,
  1086. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1087. * which are expanded by some elements.
  1088. */
  1089. /*
  1090. * Actions for mpc channel statemachine.
  1091. */
  1092. /*
  1093. * Normal data has been send. Free the corresponding
  1094. * skb (it's in io_queue), reset dev->tbusy and
  1095. * revert to idle state.
  1096. *
  1097. * fi An instance of a channel statemachine.
  1098. * event The event, just happened.
  1099. * arg Generic pointer, casted from channel * upon call.
  1100. */
  1101. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1102. {
  1103. struct channel *ch = arg;
  1104. struct net_device *dev = ch->netdev;
  1105. struct ctcm_priv *priv = dev->ml_priv;
  1106. struct mpc_group *grp = priv->mpcg;
  1107. struct sk_buff *skb;
  1108. int first = 1;
  1109. int i;
  1110. __u32 data_space;
  1111. unsigned long duration;
  1112. struct sk_buff *peekskb;
  1113. int rc;
  1114. struct th_header *header;
  1115. struct pdu *p_header;
  1116. unsigned long done_stamp = jiffies;
  1117. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1118. __func__, dev->name, smp_processor_id());
  1119. duration = done_stamp - ch->prof.send_stamp;
  1120. if (duration > ch->prof.tx_time)
  1121. ch->prof.tx_time = duration;
  1122. if (ch->irb->scsw.cmd.count != 0)
  1123. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1124. "%s(%s): TX not complete, remaining %d bytes",
  1125. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1126. fsm_deltimer(&ch->timer);
  1127. while ((skb = skb_dequeue(&ch->io_queue))) {
  1128. priv->stats.tx_packets++;
  1129. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1130. if (first) {
  1131. priv->stats.tx_bytes += 2;
  1132. first = 0;
  1133. }
  1134. refcount_dec(&skb->users);
  1135. dev_kfree_skb_irq(skb);
  1136. }
  1137. spin_lock(&ch->collect_lock);
  1138. clear_normalized_cda(&ch->ccw[4]);
  1139. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1140. spin_unlock(&ch->collect_lock);
  1141. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1142. goto done;
  1143. }
  1144. if (ctcm_checkalloc_buffer(ch)) {
  1145. spin_unlock(&ch->collect_lock);
  1146. goto done;
  1147. }
  1148. ch->trans_skb->data = ch->trans_skb_data;
  1149. skb_reset_tail_pointer(ch->trans_skb);
  1150. ch->trans_skb->len = 0;
  1151. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1152. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1153. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1154. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1155. i = 0;
  1156. p_header = NULL;
  1157. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1158. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1159. " data_space:%04x\n",
  1160. __func__, data_space);
  1161. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1162. skb_put_data(ch->trans_skb, skb->data, skb->len);
  1163. p_header = (struct pdu *)
  1164. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1165. p_header->pdu_flag = 0x00;
  1166. if (be16_to_cpu(skb->protocol) == ETH_P_SNAP)
  1167. p_header->pdu_flag |= 0x60;
  1168. else
  1169. p_header->pdu_flag |= 0x20;
  1170. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1171. __func__, ch->trans_skb->len);
  1172. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1173. " to 32 bytes sent to vtam\n", __func__);
  1174. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1175. ch->collect_len -= skb->len;
  1176. data_space -= skb->len;
  1177. priv->stats.tx_packets++;
  1178. priv->stats.tx_bytes += skb->len;
  1179. refcount_dec(&skb->users);
  1180. dev_kfree_skb_any(skb);
  1181. peekskb = skb_peek(&ch->collect_queue);
  1182. if (peekskb->len > data_space)
  1183. break;
  1184. i++;
  1185. }
  1186. /* p_header points to the last one we handled */
  1187. if (p_header)
  1188. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1189. header = skb_push(ch->trans_skb, TH_HEADER_LENGTH);
  1190. memset(header, 0, TH_HEADER_LENGTH);
  1191. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1192. ch->th_seq_num++;
  1193. header->th_seq_num = ch->th_seq_num;
  1194. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1195. __func__, ch->th_seq_num);
  1196. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1197. __func__, ch->trans_skb->len);
  1198. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1199. "data to vtam from collect_q\n", __func__);
  1200. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1201. min_t(int, ch->trans_skb->len, 50));
  1202. spin_unlock(&ch->collect_lock);
  1203. clear_normalized_cda(&ch->ccw[1]);
  1204. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1205. (void *)(unsigned long)ch->ccw[1].cda,
  1206. ch->trans_skb->data);
  1207. ch->ccw[1].count = ch->max_bufsize;
  1208. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1209. dev_kfree_skb_any(ch->trans_skb);
  1210. ch->trans_skb = NULL;
  1211. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1212. "%s: %s: IDAL alloc failed",
  1213. CTCM_FUNTAIL, ch->id);
  1214. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1215. return;
  1216. }
  1217. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1218. (void *)(unsigned long)ch->ccw[1].cda,
  1219. ch->trans_skb->data);
  1220. ch->ccw[1].count = ch->trans_skb->len;
  1221. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1222. ch->prof.send_stamp = jiffies;
  1223. if (do_debug_ccw)
  1224. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1225. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1226. ch->prof.doios_multi++;
  1227. if (rc != 0) {
  1228. priv->stats.tx_dropped += i;
  1229. priv->stats.tx_errors += i;
  1230. fsm_deltimer(&ch->timer);
  1231. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1232. }
  1233. done:
  1234. ctcm_clear_busy(dev);
  1235. return;
  1236. }
  1237. /*
  1238. * Got normal data, check for sanity, queue it up, allocate new buffer
  1239. * trigger bottom half, and initiate next read.
  1240. *
  1241. * fi An instance of a channel statemachine.
  1242. * event The event, just happened.
  1243. * arg Generic pointer, casted from channel * upon call.
  1244. */
  1245. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1246. {
  1247. struct channel *ch = arg;
  1248. struct net_device *dev = ch->netdev;
  1249. struct ctcm_priv *priv = dev->ml_priv;
  1250. struct mpc_group *grp = priv->mpcg;
  1251. struct sk_buff *skb = ch->trans_skb;
  1252. struct sk_buff *new_skb;
  1253. unsigned long saveflags = 0; /* avoids compiler warning */
  1254. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1255. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1256. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1257. ch->id, ch->max_bufsize, len);
  1258. fsm_deltimer(&ch->timer);
  1259. if (skb == NULL) {
  1260. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1261. "%s(%s): TRANS_SKB = NULL",
  1262. CTCM_FUNTAIL, dev->name);
  1263. goto again;
  1264. }
  1265. if (len < TH_HEADER_LENGTH) {
  1266. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1267. "%s(%s): packet length %d too short",
  1268. CTCM_FUNTAIL, dev->name, len);
  1269. priv->stats.rx_dropped++;
  1270. priv->stats.rx_length_errors++;
  1271. } else {
  1272. /* must have valid th header or game over */
  1273. __u32 block_len = len;
  1274. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1275. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1276. if (new_skb == NULL) {
  1277. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1278. "%s(%s): skb allocation failed",
  1279. CTCM_FUNTAIL, dev->name);
  1280. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1281. goto again;
  1282. }
  1283. switch (fsm_getstate(grp->fsm)) {
  1284. case MPCG_STATE_RESET:
  1285. case MPCG_STATE_INOP:
  1286. dev_kfree_skb_any(new_skb);
  1287. break;
  1288. case MPCG_STATE_FLOWC:
  1289. case MPCG_STATE_READY:
  1290. skb_put_data(new_skb, skb->data, block_len);
  1291. skb_queue_tail(&ch->io_queue, new_skb);
  1292. tasklet_schedule(&ch->ch_tasklet);
  1293. break;
  1294. default:
  1295. skb_put_data(new_skb, skb->data, len);
  1296. skb_queue_tail(&ch->io_queue, new_skb);
  1297. tasklet_hi_schedule(&ch->ch_tasklet);
  1298. break;
  1299. }
  1300. }
  1301. again:
  1302. switch (fsm_getstate(grp->fsm)) {
  1303. int rc, dolock;
  1304. case MPCG_STATE_FLOWC:
  1305. case MPCG_STATE_READY:
  1306. if (ctcm_checkalloc_buffer(ch))
  1307. break;
  1308. ch->trans_skb->data = ch->trans_skb_data;
  1309. skb_reset_tail_pointer(ch->trans_skb);
  1310. ch->trans_skb->len = 0;
  1311. ch->ccw[1].count = ch->max_bufsize;
  1312. if (do_debug_ccw)
  1313. ctcmpc_dumpit((char *)&ch->ccw[0],
  1314. sizeof(struct ccw1) * 3);
  1315. dolock = !in_hardirq();
  1316. if (dolock)
  1317. spin_lock_irqsave(
  1318. get_ccwdev_lock(ch->cdev), saveflags);
  1319. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1320. if (dolock) /* see remark about conditional locking */
  1321. spin_unlock_irqrestore(
  1322. get_ccwdev_lock(ch->cdev), saveflags);
  1323. if (rc != 0)
  1324. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1325. break;
  1326. default:
  1327. break;
  1328. }
  1329. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1330. __func__, dev->name, ch, ch->id);
  1331. }
  1332. /*
  1333. * Initialize connection by sending a __u16 of value 0.
  1334. *
  1335. * fi An instance of a channel statemachine.
  1336. * event The event, just happened.
  1337. * arg Generic pointer, casted from channel * upon call.
  1338. */
  1339. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1340. {
  1341. struct channel *ch = arg;
  1342. struct net_device *dev = ch->netdev;
  1343. struct ctcm_priv *priv = dev->ml_priv;
  1344. struct mpc_group *gptr = priv->mpcg;
  1345. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1346. __func__, ch->id, ch);
  1347. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1348. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1349. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1350. fsm_getstate(gptr->fsm), ch->protocol);
  1351. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1352. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1353. fsm_deltimer(&ch->timer);
  1354. if (ctcm_checkalloc_buffer(ch))
  1355. goto done;
  1356. switch (fsm_getstate(fi)) {
  1357. case CTC_STATE_STARTRETRY:
  1358. case CTC_STATE_SETUPWAIT:
  1359. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  1360. ctcmpc_chx_rxidle(fi, event, arg);
  1361. } else {
  1362. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1363. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1364. }
  1365. goto done;
  1366. default:
  1367. break;
  1368. }
  1369. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  1370. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1371. done:
  1372. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1373. __func__, ch->id, ch);
  1374. return;
  1375. }
  1376. /*
  1377. * Got initial data, check it. If OK,
  1378. * notify device statemachine that we are up and
  1379. * running.
  1380. *
  1381. * fi An instance of a channel statemachine.
  1382. * event The event, just happened.
  1383. * arg Generic pointer, casted from channel * upon call.
  1384. */
  1385. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1386. {
  1387. struct channel *ch = arg;
  1388. struct net_device *dev = ch->netdev;
  1389. struct ctcm_priv *priv = dev->ml_priv;
  1390. struct mpc_group *grp = priv->mpcg;
  1391. int rc;
  1392. unsigned long saveflags = 0; /* avoids compiler warning */
  1393. fsm_deltimer(&ch->timer);
  1394. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1395. __func__, ch->id, dev->name, smp_processor_id(),
  1396. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1397. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1398. /* XID processing complete */
  1399. switch (fsm_getstate(grp->fsm)) {
  1400. case MPCG_STATE_FLOWC:
  1401. case MPCG_STATE_READY:
  1402. if (ctcm_checkalloc_buffer(ch))
  1403. goto done;
  1404. ch->trans_skb->data = ch->trans_skb_data;
  1405. skb_reset_tail_pointer(ch->trans_skb);
  1406. ch->trans_skb->len = 0;
  1407. ch->ccw[1].count = ch->max_bufsize;
  1408. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1409. if (event == CTC_EVENT_START)
  1410. /* see remark about conditional locking */
  1411. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1412. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1413. if (event == CTC_EVENT_START)
  1414. spin_unlock_irqrestore(
  1415. get_ccwdev_lock(ch->cdev), saveflags);
  1416. if (rc != 0) {
  1417. fsm_newstate(fi, CTC_STATE_RXINIT);
  1418. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1419. goto done;
  1420. }
  1421. break;
  1422. default:
  1423. break;
  1424. }
  1425. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1426. done:
  1427. return;
  1428. }
  1429. /*
  1430. * ctcmpc channel FSM action
  1431. * called from several points in ctcmpc_ch_fsm
  1432. * ctcmpc only
  1433. */
  1434. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1435. {
  1436. struct channel *ch = arg;
  1437. struct net_device *dev = ch->netdev;
  1438. struct ctcm_priv *priv = dev->ml_priv;
  1439. struct mpc_group *grp = priv->mpcg;
  1440. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1441. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1442. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1443. switch (fsm_getstate(grp->fsm)) {
  1444. case MPCG_STATE_XID2INITW:
  1445. /* ok..start yside xid exchanges */
  1446. if (!ch->in_mpcgroup)
  1447. break;
  1448. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1449. fsm_deltimer(&grp->timer);
  1450. fsm_addtimer(&grp->timer,
  1451. MPC_XID_TIMEOUT_VALUE,
  1452. MPCG_EVENT_TIMER, dev);
  1453. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1454. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1455. /* attn rcvd before xid0 processed via bh */
  1456. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1457. break;
  1458. case MPCG_STATE_XID2INITX:
  1459. case MPCG_STATE_XID0IOWAIT:
  1460. case MPCG_STATE_XID0IOWAIX:
  1461. /* attn rcvd before xid0 processed on ch
  1462. but mid-xid0 processing for group */
  1463. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1464. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1465. break;
  1466. case MPCG_STATE_XID7INITW:
  1467. case MPCG_STATE_XID7INITX:
  1468. case MPCG_STATE_XID7INITI:
  1469. case MPCG_STATE_XID7INITZ:
  1470. switch (fsm_getstate(ch->fsm)) {
  1471. case CH_XID7_PENDING:
  1472. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1473. break;
  1474. case CH_XID7_PENDING2:
  1475. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1476. break;
  1477. }
  1478. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1479. break;
  1480. }
  1481. return;
  1482. }
  1483. /*
  1484. * ctcmpc channel FSM action
  1485. * called from one point in ctcmpc_ch_fsm
  1486. * ctcmpc only
  1487. */
  1488. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1489. {
  1490. struct channel *ch = arg;
  1491. struct net_device *dev = ch->netdev;
  1492. struct ctcm_priv *priv = dev->ml_priv;
  1493. struct mpc_group *grp = priv->mpcg;
  1494. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1495. __func__, dev->name, ch->id,
  1496. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1497. fsm_deltimer(&ch->timer);
  1498. switch (fsm_getstate(grp->fsm)) {
  1499. case MPCG_STATE_XID0IOWAIT:
  1500. /* vtam wants to be primary.start yside xid exchanges*/
  1501. /* only receive one attn-busy at a time so must not */
  1502. /* change state each time */
  1503. grp->changed_side = 1;
  1504. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1505. break;
  1506. case MPCG_STATE_XID2INITW:
  1507. if (grp->changed_side == 1) {
  1508. grp->changed_side = 2;
  1509. break;
  1510. }
  1511. /* process began via call to establish_conn */
  1512. /* so must report failure instead of reverting */
  1513. /* back to ready-for-xid passive state */
  1514. if (grp->estconnfunc)
  1515. goto done;
  1516. /* this attnbusy is NOT the result of xside xid */
  1517. /* collisions so yside must have been triggered */
  1518. /* by an ATTN that was not intended to start XID */
  1519. /* processing. Revert back to ready-for-xid and */
  1520. /* wait for ATTN interrupt to signal xid start */
  1521. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1522. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1523. fsm_deltimer(&grp->timer);
  1524. goto done;
  1525. }
  1526. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1527. goto done;
  1528. case MPCG_STATE_XID2INITX:
  1529. /* XID2 was received before ATTN Busy for second
  1530. channel.Send yside xid for second channel.
  1531. */
  1532. if (grp->changed_side == 1) {
  1533. grp->changed_side = 2;
  1534. break;
  1535. }
  1536. fallthrough;
  1537. case MPCG_STATE_XID0IOWAIX:
  1538. case MPCG_STATE_XID7INITW:
  1539. case MPCG_STATE_XID7INITX:
  1540. case MPCG_STATE_XID7INITI:
  1541. case MPCG_STATE_XID7INITZ:
  1542. default:
  1543. /* multiple attn-busy indicates too out-of-sync */
  1544. /* and they are certainly not being received as part */
  1545. /* of valid mpc group negotiations.. */
  1546. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1547. goto done;
  1548. }
  1549. if (grp->changed_side == 1) {
  1550. fsm_deltimer(&grp->timer);
  1551. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1552. MPCG_EVENT_TIMER, dev);
  1553. }
  1554. if (ch->in_mpcgroup)
  1555. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1556. else
  1557. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1558. "%s(%s): channel %s not added to group",
  1559. CTCM_FUNTAIL, dev->name, ch->id);
  1560. done:
  1561. return;
  1562. }
  1563. /*
  1564. * ctcmpc channel FSM action
  1565. * called from several points in ctcmpc_ch_fsm
  1566. * ctcmpc only
  1567. */
  1568. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1569. {
  1570. struct channel *ch = arg;
  1571. struct net_device *dev = ch->netdev;
  1572. struct ctcm_priv *priv = dev->ml_priv;
  1573. struct mpc_group *grp = priv->mpcg;
  1574. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1575. return;
  1576. }
  1577. /*
  1578. * ctcmpc channel FSM action
  1579. * called from several points in ctcmpc_ch_fsm
  1580. * ctcmpc only
  1581. */
  1582. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1583. {
  1584. struct channel *ach = arg;
  1585. struct net_device *dev = ach->netdev;
  1586. struct ctcm_priv *priv = dev->ml_priv;
  1587. struct mpc_group *grp = priv->mpcg;
  1588. struct channel *wch = priv->channel[CTCM_WRITE];
  1589. struct channel *rch = priv->channel[CTCM_READ];
  1590. struct sk_buff *skb;
  1591. struct th_sweep *header;
  1592. int rc = 0;
  1593. unsigned long saveflags = 0;
  1594. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1595. __func__, smp_processor_id(), ach, ach->id);
  1596. if (grp->in_sweep == 0)
  1597. goto done;
  1598. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1599. __func__, wch->th_seq_num);
  1600. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1601. __func__, rch->th_seq_num);
  1602. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1603. /* give the previous IO time to complete */
  1604. fsm_addtimer(&wch->sweep_timer,
  1605. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1606. goto done;
  1607. }
  1608. skb = skb_dequeue(&wch->sweep_queue);
  1609. if (!skb)
  1610. goto done;
  1611. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1612. grp->in_sweep = 0;
  1613. ctcm_clear_busy_do(dev);
  1614. dev_kfree_skb_any(skb);
  1615. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1616. goto done;
  1617. } else {
  1618. refcount_inc(&skb->users);
  1619. skb_queue_tail(&wch->io_queue, skb);
  1620. }
  1621. /* send out the sweep */
  1622. wch->ccw[4].count = skb->len;
  1623. header = (struct th_sweep *)skb->data;
  1624. switch (header->th.th_ch_flag) {
  1625. case TH_SWEEP_REQ:
  1626. grp->sweep_req_pend_num--;
  1627. break;
  1628. case TH_SWEEP_RESP:
  1629. grp->sweep_rsp_pend_num--;
  1630. break;
  1631. }
  1632. header->sw.th_last_seq = wch->th_seq_num;
  1633. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1634. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1635. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1636. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1637. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1638. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1639. wch->prof.send_stamp = jiffies;
  1640. rc = ccw_device_start(wch->cdev, &wch->ccw[3], 0, 0xff, 0);
  1641. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1642. if ((grp->sweep_req_pend_num == 0) &&
  1643. (grp->sweep_rsp_pend_num == 0)) {
  1644. grp->in_sweep = 0;
  1645. rch->th_seq_num = 0x00;
  1646. wch->th_seq_num = 0x00;
  1647. ctcm_clear_busy_do(dev);
  1648. }
  1649. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1650. __func__, wch->th_seq_num, rch->th_seq_num);
  1651. if (rc != 0)
  1652. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1653. done:
  1654. return;
  1655. }
  1656. /*
  1657. * The ctcmpc statemachine for a channel.
  1658. */
  1659. const fsm_node ctcmpc_ch_fsm[] = {
  1660. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1661. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1662. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1663. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1664. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1665. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1666. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1667. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1668. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1669. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1670. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1671. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1672. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1673. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1674. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1675. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1676. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1677. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1678. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1679. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1680. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1681. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1682. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1683. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1684. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1685. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1686. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1687. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1688. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1689. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1690. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1691. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1692. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1693. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1694. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1695. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1696. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1697. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1698. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1699. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1700. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1701. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1702. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1703. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1704. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1705. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1706. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1707. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1708. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1709. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1710. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1711. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1712. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1713. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1714. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1715. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1716. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1717. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1718. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1719. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1720. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1721. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1722. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1723. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1724. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1725. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1726. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1727. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1728. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1729. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1730. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1731. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1732. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1733. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1734. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1735. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1736. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1737. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1738. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1739. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1740. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1741. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1742. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1743. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1744. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1745. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1746. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1747. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1748. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1749. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1750. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1751. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1752. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1753. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1754. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1755. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1756. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1757. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1758. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1759. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1760. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1761. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1762. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1763. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1764. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1765. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1766. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1767. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1768. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1769. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1770. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1771. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1772. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1773. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1774. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1775. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1776. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1777. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1778. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1779. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1780. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1781. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1782. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1783. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1784. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1785. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1786. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1787. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1788. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1789. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1790. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1791. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1792. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1793. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1794. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1795. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1796. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1797. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1798. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1799. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1800. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1801. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1802. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1803. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1804. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1805. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1806. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1807. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1808. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1809. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1810. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1811. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1812. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1813. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1814. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1815. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1816. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1817. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1818. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1819. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1820. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1821. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1822. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1823. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1824. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1825. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1826. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1827. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1828. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1829. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1830. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1831. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1832. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1833. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1834. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1835. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1836. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1837. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1838. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1839. };
  1840. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1841. /*
  1842. * Actions for interface - statemachine.
  1843. */
  1844. /*
  1845. * Startup channels by sending CTC_EVENT_START to each channel.
  1846. *
  1847. * fi An instance of an interface statemachine.
  1848. * event The event, just happened.
  1849. * arg Generic pointer, casted from struct net_device * upon call.
  1850. */
  1851. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1852. {
  1853. struct net_device *dev = arg;
  1854. struct ctcm_priv *priv = dev->ml_priv;
  1855. int direction;
  1856. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1857. fsm_deltimer(&priv->restart_timer);
  1858. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1859. if (IS_MPC(priv))
  1860. priv->mpcg->channels_terminating = 0;
  1861. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1862. struct channel *ch = priv->channel[direction];
  1863. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1864. }
  1865. }
  1866. /*
  1867. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1868. *
  1869. * fi An instance of an interface statemachine.
  1870. * event The event, just happened.
  1871. * arg Generic pointer, casted from struct net_device * upon call.
  1872. */
  1873. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1874. {
  1875. int direction;
  1876. struct net_device *dev = arg;
  1877. struct ctcm_priv *priv = dev->ml_priv;
  1878. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1879. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1880. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1881. struct channel *ch = priv->channel[direction];
  1882. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1883. ch->th_seq_num = 0x00;
  1884. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1885. __func__, ch->th_seq_num);
  1886. }
  1887. if (IS_MPC(priv))
  1888. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1889. }
  1890. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1891. {
  1892. int restart_timer;
  1893. struct net_device *dev = arg;
  1894. struct ctcm_priv *priv = dev->ml_priv;
  1895. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1896. if (IS_MPC(priv)) {
  1897. restart_timer = CTCM_TIME_1_SEC;
  1898. } else {
  1899. restart_timer = CTCM_TIME_5_SEC;
  1900. }
  1901. dev_info(&dev->dev, "Restarting device\n");
  1902. dev_action_stop(fi, event, arg);
  1903. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1904. if (IS_MPC(priv))
  1905. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1906. /* going back into start sequence too quickly can */
  1907. /* result in the other side becoming unreachable due */
  1908. /* to sense reported when IO is aborted */
  1909. fsm_addtimer(&priv->restart_timer, restart_timer,
  1910. DEV_EVENT_START, dev);
  1911. }
  1912. /*
  1913. * Called from channel statemachine
  1914. * when a channel is up and running.
  1915. *
  1916. * fi An instance of an interface statemachine.
  1917. * event The event, just happened.
  1918. * arg Generic pointer, casted from struct net_device * upon call.
  1919. */
  1920. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1921. {
  1922. struct net_device *dev = arg;
  1923. struct ctcm_priv *priv = dev->ml_priv;
  1924. int dev_stat = fsm_getstate(fi);
  1925. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1926. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1927. dev->name, dev->ml_priv, dev_stat, event);
  1928. switch (fsm_getstate(fi)) {
  1929. case DEV_STATE_STARTWAIT_RXTX:
  1930. if (event == DEV_EVENT_RXUP)
  1931. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1932. else
  1933. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1934. break;
  1935. case DEV_STATE_STARTWAIT_RX:
  1936. if (event == DEV_EVENT_RXUP) {
  1937. fsm_newstate(fi, DEV_STATE_RUNNING);
  1938. dev_info(&dev->dev,
  1939. "Connected with remote side\n");
  1940. ctcm_clear_busy(dev);
  1941. }
  1942. break;
  1943. case DEV_STATE_STARTWAIT_TX:
  1944. if (event == DEV_EVENT_TXUP) {
  1945. fsm_newstate(fi, DEV_STATE_RUNNING);
  1946. dev_info(&dev->dev,
  1947. "Connected with remote side\n");
  1948. ctcm_clear_busy(dev);
  1949. }
  1950. break;
  1951. case DEV_STATE_STOPWAIT_TX:
  1952. if (event == DEV_EVENT_RXUP)
  1953. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1954. break;
  1955. case DEV_STATE_STOPWAIT_RX:
  1956. if (event == DEV_EVENT_TXUP)
  1957. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1958. break;
  1959. }
  1960. if (IS_MPC(priv)) {
  1961. if (event == DEV_EVENT_RXUP)
  1962. mpc_channel_action(priv->channel[CTCM_READ],
  1963. CTCM_READ, MPC_CHANNEL_ADD);
  1964. else
  1965. mpc_channel_action(priv->channel[CTCM_WRITE],
  1966. CTCM_WRITE, MPC_CHANNEL_ADD);
  1967. }
  1968. }
  1969. /*
  1970. * Called from device statemachine
  1971. * when a channel has been shutdown.
  1972. *
  1973. * fi An instance of an interface statemachine.
  1974. * event The event, just happened.
  1975. * arg Generic pointer, casted from struct net_device * upon call.
  1976. */
  1977. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1978. {
  1979. struct net_device *dev = arg;
  1980. struct ctcm_priv *priv = dev->ml_priv;
  1981. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1982. switch (fsm_getstate(fi)) {
  1983. case DEV_STATE_RUNNING:
  1984. if (event == DEV_EVENT_TXDOWN)
  1985. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1986. else
  1987. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1988. break;
  1989. case DEV_STATE_STARTWAIT_RX:
  1990. if (event == DEV_EVENT_TXDOWN)
  1991. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1992. break;
  1993. case DEV_STATE_STARTWAIT_TX:
  1994. if (event == DEV_EVENT_RXDOWN)
  1995. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1996. break;
  1997. case DEV_STATE_STOPWAIT_RXTX:
  1998. if (event == DEV_EVENT_TXDOWN)
  1999. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2000. else
  2001. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2002. break;
  2003. case DEV_STATE_STOPWAIT_RX:
  2004. if (event == DEV_EVENT_RXDOWN)
  2005. fsm_newstate(fi, DEV_STATE_STOPPED);
  2006. break;
  2007. case DEV_STATE_STOPWAIT_TX:
  2008. if (event == DEV_EVENT_TXDOWN)
  2009. fsm_newstate(fi, DEV_STATE_STOPPED);
  2010. break;
  2011. }
  2012. if (IS_MPC(priv)) {
  2013. if (event == DEV_EVENT_RXDOWN)
  2014. mpc_channel_action(priv->channel[CTCM_READ],
  2015. CTCM_READ, MPC_CHANNEL_REMOVE);
  2016. else
  2017. mpc_channel_action(priv->channel[CTCM_WRITE],
  2018. CTCM_WRITE, MPC_CHANNEL_REMOVE);
  2019. }
  2020. }
  2021. const fsm_node dev_fsm[] = {
  2022. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2023. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2024. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2025. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2026. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2027. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2028. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2029. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2030. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2031. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2032. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2033. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2034. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2035. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2036. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2037. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2038. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2039. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2040. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2041. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2042. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2043. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2044. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2045. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2046. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2047. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2048. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2049. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2050. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2051. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2052. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2053. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2054. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2055. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2056. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2057. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2058. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2059. };
  2060. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2061. /* --- This is the END my friend --- */