rtc-m48t86.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * ST M48T86 / Dallas DS12887 RTC driver
  4. * Copyright (c) 2006 Tower Technologies
  5. *
  6. * Author: Alessandro Zummo <[email protected]>
  7. *
  8. * This drivers only supports the clock running in BCD and 24H mode.
  9. * If it will be ever adapted to binary and 12H mode, care must be taken
  10. * to not introduce bugs.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/rtc.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/bcd.h>
  16. #include <linux/io.h>
  17. #define M48T86_SEC 0x00
  18. #define M48T86_SECALRM 0x01
  19. #define M48T86_MIN 0x02
  20. #define M48T86_MINALRM 0x03
  21. #define M48T86_HOUR 0x04
  22. #define M48T86_HOURALRM 0x05
  23. #define M48T86_DOW 0x06 /* 1 = sunday */
  24. #define M48T86_DOM 0x07
  25. #define M48T86_MONTH 0x08 /* 1 - 12 */
  26. #define M48T86_YEAR 0x09 /* 0 - 99 */
  27. #define M48T86_A 0x0a
  28. #define M48T86_B 0x0b
  29. #define M48T86_B_SET BIT(7)
  30. #define M48T86_B_DM BIT(2)
  31. #define M48T86_B_H24 BIT(1)
  32. #define M48T86_C 0x0c
  33. #define M48T86_D 0x0d
  34. #define M48T86_D_VRT BIT(7)
  35. #define M48T86_NVRAM(x) (0x0e + (x))
  36. #define M48T86_NVRAM_LEN 114
  37. struct m48t86_rtc_info {
  38. void __iomem *index_reg;
  39. void __iomem *data_reg;
  40. struct rtc_device *rtc;
  41. };
  42. static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
  43. {
  44. struct m48t86_rtc_info *info = dev_get_drvdata(dev);
  45. unsigned char value;
  46. writeb(addr, info->index_reg);
  47. value = readb(info->data_reg);
  48. return value;
  49. }
  50. static void m48t86_writeb(struct device *dev,
  51. unsigned char value, unsigned long addr)
  52. {
  53. struct m48t86_rtc_info *info = dev_get_drvdata(dev);
  54. writeb(addr, info->index_reg);
  55. writeb(value, info->data_reg);
  56. }
  57. static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
  58. {
  59. unsigned char reg;
  60. reg = m48t86_readb(dev, M48T86_B);
  61. if (reg & M48T86_B_DM) {
  62. /* data (binary) mode */
  63. tm->tm_sec = m48t86_readb(dev, M48T86_SEC);
  64. tm->tm_min = m48t86_readb(dev, M48T86_MIN);
  65. tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f;
  66. tm->tm_mday = m48t86_readb(dev, M48T86_DOM);
  67. /* tm_mon is 0-11 */
  68. tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1;
  69. tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100;
  70. tm->tm_wday = m48t86_readb(dev, M48T86_DOW);
  71. } else {
  72. /* bcd mode */
  73. tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC));
  74. tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN));
  75. tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
  76. 0x3f);
  77. tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM));
  78. /* tm_mon is 0-11 */
  79. tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
  80. tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
  81. tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW));
  82. }
  83. /* correct the hour if the clock is in 12h mode */
  84. if (!(reg & M48T86_B_H24))
  85. if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
  86. tm->tm_hour += 12;
  87. return 0;
  88. }
  89. static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
  90. {
  91. unsigned char reg;
  92. reg = m48t86_readb(dev, M48T86_B);
  93. /* update flag and 24h mode */
  94. reg |= M48T86_B_SET | M48T86_B_H24;
  95. m48t86_writeb(dev, reg, M48T86_B);
  96. if (reg & M48T86_B_DM) {
  97. /* data (binary) mode */
  98. m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
  99. m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
  100. m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
  101. m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
  102. m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
  103. m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
  104. m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
  105. } else {
  106. /* bcd mode */
  107. m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
  108. m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
  109. m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
  110. m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
  111. m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
  112. m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
  113. m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
  114. }
  115. /* update ended */
  116. reg &= ~M48T86_B_SET;
  117. m48t86_writeb(dev, reg, M48T86_B);
  118. return 0;
  119. }
  120. static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
  121. {
  122. unsigned char reg;
  123. reg = m48t86_readb(dev, M48T86_B);
  124. seq_printf(seq, "mode\t\t: %s\n",
  125. (reg & M48T86_B_DM) ? "binary" : "bcd");
  126. reg = m48t86_readb(dev, M48T86_D);
  127. seq_printf(seq, "battery\t\t: %s\n",
  128. (reg & M48T86_D_VRT) ? "ok" : "exhausted");
  129. return 0;
  130. }
  131. static const struct rtc_class_ops m48t86_rtc_ops = {
  132. .read_time = m48t86_rtc_read_time,
  133. .set_time = m48t86_rtc_set_time,
  134. .proc = m48t86_rtc_proc,
  135. };
  136. static int m48t86_nvram_read(void *priv, unsigned int off, void *buf,
  137. size_t count)
  138. {
  139. struct device *dev = priv;
  140. unsigned int i;
  141. for (i = 0; i < count; i++)
  142. ((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));
  143. return 0;
  144. }
  145. static int m48t86_nvram_write(void *priv, unsigned int off, void *buf,
  146. size_t count)
  147. {
  148. struct device *dev = priv;
  149. unsigned int i;
  150. for (i = 0; i < count; i++)
  151. m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));
  152. return 0;
  153. }
  154. /*
  155. * The RTC is an optional feature at purchase time on some Technologic Systems
  156. * boards. Verify that it actually exists by checking if the last two bytes
  157. * of the NVRAM can be changed.
  158. *
  159. * This is based on the method used in their rtc7800.c example.
  160. */
  161. static bool m48t86_verify_chip(struct platform_device *pdev)
  162. {
  163. unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
  164. unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
  165. unsigned char tmp0, tmp1;
  166. tmp0 = m48t86_readb(&pdev->dev, offset0);
  167. tmp1 = m48t86_readb(&pdev->dev, offset1);
  168. m48t86_writeb(&pdev->dev, 0x00, offset0);
  169. m48t86_writeb(&pdev->dev, 0x55, offset1);
  170. if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
  171. m48t86_writeb(&pdev->dev, 0xaa, offset1);
  172. if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
  173. m48t86_readb(&pdev->dev, offset0) == 0x00) {
  174. m48t86_writeb(&pdev->dev, tmp0, offset0);
  175. m48t86_writeb(&pdev->dev, tmp1, offset1);
  176. return true;
  177. }
  178. }
  179. return false;
  180. }
  181. static int m48t86_rtc_probe(struct platform_device *pdev)
  182. {
  183. struct m48t86_rtc_info *info;
  184. unsigned char reg;
  185. int err;
  186. struct nvmem_config m48t86_nvmem_cfg = {
  187. .name = "m48t86_nvram",
  188. .word_size = 1,
  189. .stride = 1,
  190. .size = M48T86_NVRAM_LEN,
  191. .reg_read = m48t86_nvram_read,
  192. .reg_write = m48t86_nvram_write,
  193. .priv = &pdev->dev,
  194. };
  195. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  196. if (!info)
  197. return -ENOMEM;
  198. info->index_reg = devm_platform_ioremap_resource(pdev, 0);
  199. if (IS_ERR(info->index_reg))
  200. return PTR_ERR(info->index_reg);
  201. info->data_reg = devm_platform_ioremap_resource(pdev, 1);
  202. if (IS_ERR(info->data_reg))
  203. return PTR_ERR(info->data_reg);
  204. dev_set_drvdata(&pdev->dev, info);
  205. if (!m48t86_verify_chip(pdev)) {
  206. dev_info(&pdev->dev, "RTC not present\n");
  207. return -ENODEV;
  208. }
  209. info->rtc = devm_rtc_allocate_device(&pdev->dev);
  210. if (IS_ERR(info->rtc))
  211. return PTR_ERR(info->rtc);
  212. info->rtc->ops = &m48t86_rtc_ops;
  213. err = devm_rtc_register_device(info->rtc);
  214. if (err)
  215. return err;
  216. devm_rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg);
  217. /* read battery status */
  218. reg = m48t86_readb(&pdev->dev, M48T86_D);
  219. dev_info(&pdev->dev, "battery %s\n",
  220. (reg & M48T86_D_VRT) ? "ok" : "exhausted");
  221. return 0;
  222. }
  223. static struct platform_driver m48t86_rtc_platform_driver = {
  224. .driver = {
  225. .name = "rtc-m48t86",
  226. },
  227. .probe = m48t86_rtc_probe,
  228. };
  229. module_platform_driver(m48t86_rtc_platform_driver);
  230. MODULE_AUTHOR("Alessandro Zummo <[email protected]>");
  231. MODULE_DESCRIPTION("M48T86 RTC driver");
  232. MODULE_LICENSE("GPL");
  233. MODULE_ALIAS("platform:rtc-m48t86");