rtc-ds3232.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
  4. *
  5. * Copyright (C) 2009-2011 Freescale Semiconductor.
  6. * Author: Jack Lan <[email protected]>
  7. * Copyright (C) 2008 MIMOMax Wireless Ltd.
  8. */
  9. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/rtc.h>
  16. #include <linux/bcd.h>
  17. #include <linux/slab.h>
  18. #include <linux/regmap.h>
  19. #include <linux/hwmon.h>
  20. #define DS3232_REG_SECONDS 0x00
  21. #define DS3232_REG_MINUTES 0x01
  22. #define DS3232_REG_HOURS 0x02
  23. #define DS3232_REG_AMPM 0x02
  24. #define DS3232_REG_DAY 0x03
  25. #define DS3232_REG_DATE 0x04
  26. #define DS3232_REG_MONTH 0x05
  27. #define DS3232_REG_CENTURY 0x05
  28. #define DS3232_REG_YEAR 0x06
  29. #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
  30. #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
  31. #define DS3232_REG_CR 0x0E /* Control register */
  32. # define DS3232_REG_CR_nEOSC 0x80
  33. # define DS3232_REG_CR_INTCN 0x04
  34. # define DS3232_REG_CR_A2IE 0x02
  35. # define DS3232_REG_CR_A1IE 0x01
  36. #define DS3232_REG_SR 0x0F /* control/status register */
  37. # define DS3232_REG_SR_OSF 0x80
  38. # define DS3232_REG_SR_BSY 0x04
  39. # define DS3232_REG_SR_A2F 0x02
  40. # define DS3232_REG_SR_A1F 0x01
  41. #define DS3232_REG_TEMPERATURE 0x11
  42. #define DS3232_REG_SRAM_START 0x14
  43. #define DS3232_REG_SRAM_END 0xFF
  44. #define DS3232_REG_SRAM_SIZE 236
  45. struct ds3232 {
  46. struct device *dev;
  47. struct regmap *regmap;
  48. int irq;
  49. struct rtc_device *rtc;
  50. bool suspended;
  51. };
  52. static int ds3232_check_rtc_status(struct device *dev)
  53. {
  54. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  55. int ret = 0;
  56. int control, stat;
  57. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  58. if (ret)
  59. return ret;
  60. if (stat & DS3232_REG_SR_OSF)
  61. dev_warn(dev,
  62. "oscillator discontinuity flagged, "
  63. "time unreliable\n");
  64. stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
  65. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  66. if (ret)
  67. return ret;
  68. /* If the alarm is pending, clear it before requesting
  69. * the interrupt, so an interrupt event isn't reported
  70. * before everything is initialized.
  71. */
  72. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  73. if (ret)
  74. return ret;
  75. control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
  76. control |= DS3232_REG_CR_INTCN;
  77. return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  78. }
  79. static int ds3232_read_time(struct device *dev, struct rtc_time *time)
  80. {
  81. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  82. int ret;
  83. u8 buf[7];
  84. unsigned int year, month, day, hour, minute, second;
  85. unsigned int week, twelve_hr, am_pm;
  86. unsigned int century, add_century = 0;
  87. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
  88. if (ret)
  89. return ret;
  90. second = buf[0];
  91. minute = buf[1];
  92. hour = buf[2];
  93. week = buf[3];
  94. day = buf[4];
  95. month = buf[5];
  96. year = buf[6];
  97. /* Extract additional information for AM/PM and century */
  98. twelve_hr = hour & 0x40;
  99. am_pm = hour & 0x20;
  100. century = month & 0x80;
  101. /* Write to rtc_time structure */
  102. time->tm_sec = bcd2bin(second);
  103. time->tm_min = bcd2bin(minute);
  104. if (twelve_hr) {
  105. /* Convert to 24 hr */
  106. if (am_pm)
  107. time->tm_hour = bcd2bin(hour & 0x1F) + 12;
  108. else
  109. time->tm_hour = bcd2bin(hour & 0x1F);
  110. } else {
  111. time->tm_hour = bcd2bin(hour);
  112. }
  113. /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
  114. time->tm_wday = bcd2bin(week) - 1;
  115. time->tm_mday = bcd2bin(day);
  116. /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
  117. time->tm_mon = bcd2bin(month & 0x7F) - 1;
  118. if (century)
  119. add_century = 100;
  120. time->tm_year = bcd2bin(year) + add_century;
  121. return 0;
  122. }
  123. static int ds3232_set_time(struct device *dev, struct rtc_time *time)
  124. {
  125. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  126. u8 buf[7];
  127. /* Extract time from rtc_time and load into ds3232*/
  128. buf[0] = bin2bcd(time->tm_sec);
  129. buf[1] = bin2bcd(time->tm_min);
  130. buf[2] = bin2bcd(time->tm_hour);
  131. /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
  132. buf[3] = bin2bcd(time->tm_wday + 1);
  133. buf[4] = bin2bcd(time->tm_mday); /* Date */
  134. /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
  135. buf[5] = bin2bcd(time->tm_mon + 1);
  136. if (time->tm_year >= 100) {
  137. buf[5] |= 0x80;
  138. buf[6] = bin2bcd(time->tm_year - 100);
  139. } else {
  140. buf[6] = bin2bcd(time->tm_year);
  141. }
  142. return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
  143. }
  144. /*
  145. * DS3232 has two alarm, we only use alarm1
  146. * According to linux specification, only support one-shot alarm
  147. * no periodic alarm mode
  148. */
  149. static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  150. {
  151. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  152. int control, stat;
  153. int ret;
  154. u8 buf[4];
  155. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  156. if (ret)
  157. goto out;
  158. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  159. if (ret)
  160. goto out;
  161. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
  162. if (ret)
  163. goto out;
  164. alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
  165. alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
  166. alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
  167. alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
  168. alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
  169. alarm->pending = !!(stat & DS3232_REG_SR_A1F);
  170. ret = 0;
  171. out:
  172. return ret;
  173. }
  174. /*
  175. * linux rtc-module does not support wday alarm
  176. * and only 24h time mode supported indeed
  177. */
  178. static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  179. {
  180. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  181. int control, stat;
  182. int ret;
  183. u8 buf[4];
  184. if (ds3232->irq <= 0)
  185. return -EINVAL;
  186. buf[0] = bin2bcd(alarm->time.tm_sec);
  187. buf[1] = bin2bcd(alarm->time.tm_min);
  188. buf[2] = bin2bcd(alarm->time.tm_hour);
  189. buf[3] = bin2bcd(alarm->time.tm_mday);
  190. /* clear alarm interrupt enable bit */
  191. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  192. if (ret)
  193. goto out;
  194. control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
  195. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  196. if (ret)
  197. goto out;
  198. /* clear any pending alarm flag */
  199. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  200. if (ret)
  201. goto out;
  202. stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
  203. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  204. if (ret)
  205. goto out;
  206. ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
  207. if (ret)
  208. goto out;
  209. if (alarm->enabled) {
  210. control |= DS3232_REG_CR_A1IE;
  211. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  212. }
  213. out:
  214. return ret;
  215. }
  216. static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
  217. {
  218. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  219. int control;
  220. int ret;
  221. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  222. if (ret)
  223. return ret;
  224. if (enabled)
  225. /* enable alarm1 interrupt */
  226. control |= DS3232_REG_CR_A1IE;
  227. else
  228. /* disable alarm1 interrupt */
  229. control &= ~(DS3232_REG_CR_A1IE);
  230. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  231. return ret;
  232. }
  233. /*
  234. * Temperature sensor support for ds3232/ds3234 devices.
  235. * A user-initiated temperature conversion is not started by this function,
  236. * so the temperature is updated once every 64 seconds.
  237. */
  238. static int ds3232_hwmon_read_temp(struct device *dev, long int *mC)
  239. {
  240. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  241. u8 temp_buf[2];
  242. s16 temp;
  243. int ret;
  244. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf,
  245. sizeof(temp_buf));
  246. if (ret < 0)
  247. return ret;
  248. /*
  249. * Temperature is represented as a 10-bit code with a resolution of
  250. * 0.25 degree celsius and encoded in two's complement format.
  251. */
  252. temp = (temp_buf[0] << 8) | temp_buf[1];
  253. temp >>= 6;
  254. *mC = temp * 250;
  255. return 0;
  256. }
  257. static umode_t ds3232_hwmon_is_visible(const void *data,
  258. enum hwmon_sensor_types type,
  259. u32 attr, int channel)
  260. {
  261. if (type != hwmon_temp)
  262. return 0;
  263. switch (attr) {
  264. case hwmon_temp_input:
  265. return 0444;
  266. default:
  267. return 0;
  268. }
  269. }
  270. static int ds3232_hwmon_read(struct device *dev,
  271. enum hwmon_sensor_types type,
  272. u32 attr, int channel, long *temp)
  273. {
  274. int err;
  275. switch (attr) {
  276. case hwmon_temp_input:
  277. err = ds3232_hwmon_read_temp(dev, temp);
  278. break;
  279. default:
  280. err = -EOPNOTSUPP;
  281. break;
  282. }
  283. return err;
  284. }
  285. static u32 ds3232_hwmon_chip_config[] = {
  286. HWMON_C_REGISTER_TZ,
  287. 0
  288. };
  289. static const struct hwmon_channel_info ds3232_hwmon_chip = {
  290. .type = hwmon_chip,
  291. .config = ds3232_hwmon_chip_config,
  292. };
  293. static u32 ds3232_hwmon_temp_config[] = {
  294. HWMON_T_INPUT,
  295. 0
  296. };
  297. static const struct hwmon_channel_info ds3232_hwmon_temp = {
  298. .type = hwmon_temp,
  299. .config = ds3232_hwmon_temp_config,
  300. };
  301. static const struct hwmon_channel_info *ds3232_hwmon_info[] = {
  302. &ds3232_hwmon_chip,
  303. &ds3232_hwmon_temp,
  304. NULL
  305. };
  306. static const struct hwmon_ops ds3232_hwmon_hwmon_ops = {
  307. .is_visible = ds3232_hwmon_is_visible,
  308. .read = ds3232_hwmon_read,
  309. };
  310. static const struct hwmon_chip_info ds3232_hwmon_chip_info = {
  311. .ops = &ds3232_hwmon_hwmon_ops,
  312. .info = ds3232_hwmon_info,
  313. };
  314. static void ds3232_hwmon_register(struct device *dev, const char *name)
  315. {
  316. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  317. struct device *hwmon_dev;
  318. if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON))
  319. return;
  320. hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232,
  321. &ds3232_hwmon_chip_info,
  322. NULL);
  323. if (IS_ERR(hwmon_dev)) {
  324. dev_err(dev, "unable to register hwmon device %ld\n",
  325. PTR_ERR(hwmon_dev));
  326. }
  327. }
  328. static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
  329. {
  330. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  331. if (ds3232->irq <= 0)
  332. return -EINVAL;
  333. return ds3232_update_alarm(dev, enabled);
  334. }
  335. static irqreturn_t ds3232_irq(int irq, void *dev_id)
  336. {
  337. struct device *dev = dev_id;
  338. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  339. int ret;
  340. int stat, control;
  341. rtc_lock(ds3232->rtc);
  342. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  343. if (ret)
  344. goto unlock;
  345. if (stat & DS3232_REG_SR_A1F) {
  346. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  347. if (ret) {
  348. dev_warn(ds3232->dev,
  349. "Read Control Register error %d\n", ret);
  350. } else {
  351. /* disable alarm1 interrupt */
  352. control &= ~(DS3232_REG_CR_A1IE);
  353. ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
  354. control);
  355. if (ret) {
  356. dev_warn(ds3232->dev,
  357. "Write Control Register error %d\n",
  358. ret);
  359. goto unlock;
  360. }
  361. /* clear the alarm pend flag */
  362. stat &= ~DS3232_REG_SR_A1F;
  363. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  364. if (ret) {
  365. dev_warn(ds3232->dev,
  366. "Write Status Register error %d\n",
  367. ret);
  368. goto unlock;
  369. }
  370. rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
  371. }
  372. }
  373. unlock:
  374. rtc_unlock(ds3232->rtc);
  375. return IRQ_HANDLED;
  376. }
  377. static const struct rtc_class_ops ds3232_rtc_ops = {
  378. .read_time = ds3232_read_time,
  379. .set_time = ds3232_set_time,
  380. .read_alarm = ds3232_read_alarm,
  381. .set_alarm = ds3232_set_alarm,
  382. .alarm_irq_enable = ds3232_alarm_irq_enable,
  383. };
  384. static int ds3232_nvmem_read(void *priv, unsigned int offset, void *val,
  385. size_t bytes)
  386. {
  387. struct regmap *ds3232_regmap = (struct regmap *)priv;
  388. return regmap_bulk_read(ds3232_regmap, DS3232_REG_SRAM_START + offset,
  389. val, bytes);
  390. }
  391. static int ds3232_nvmem_write(void *priv, unsigned int offset, void *val,
  392. size_t bytes)
  393. {
  394. struct regmap *ds3232_regmap = (struct regmap *)priv;
  395. return regmap_bulk_write(ds3232_regmap, DS3232_REG_SRAM_START + offset,
  396. val, bytes);
  397. }
  398. static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
  399. const char *name)
  400. {
  401. struct ds3232 *ds3232;
  402. int ret;
  403. struct nvmem_config nvmem_cfg = {
  404. .name = "ds3232_sram",
  405. .stride = 1,
  406. .size = DS3232_REG_SRAM_SIZE,
  407. .word_size = 1,
  408. .reg_read = ds3232_nvmem_read,
  409. .reg_write = ds3232_nvmem_write,
  410. .priv = regmap,
  411. .type = NVMEM_TYPE_BATTERY_BACKED
  412. };
  413. ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
  414. if (!ds3232)
  415. return -ENOMEM;
  416. ds3232->regmap = regmap;
  417. ds3232->irq = irq;
  418. ds3232->dev = dev;
  419. dev_set_drvdata(dev, ds3232);
  420. ret = ds3232_check_rtc_status(dev);
  421. if (ret)
  422. return ret;
  423. if (ds3232->irq > 0)
  424. device_init_wakeup(dev, 1);
  425. ds3232_hwmon_register(dev, name);
  426. ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
  427. THIS_MODULE);
  428. if (IS_ERR(ds3232->rtc))
  429. return PTR_ERR(ds3232->rtc);
  430. ret = devm_rtc_nvmem_register(ds3232->rtc, &nvmem_cfg);
  431. if(ret)
  432. return ret;
  433. if (ds3232->irq > 0) {
  434. ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
  435. ds3232_irq,
  436. IRQF_SHARED | IRQF_ONESHOT,
  437. name, dev);
  438. if (ret) {
  439. device_set_wakeup_capable(dev, 0);
  440. ds3232->irq = 0;
  441. dev_err(dev, "unable to request IRQ\n");
  442. }
  443. }
  444. return 0;
  445. }
  446. #ifdef CONFIG_PM_SLEEP
  447. static int ds3232_suspend(struct device *dev)
  448. {
  449. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  450. if (device_may_wakeup(dev)) {
  451. if (enable_irq_wake(ds3232->irq))
  452. dev_warn_once(dev, "Cannot set wakeup source\n");
  453. }
  454. return 0;
  455. }
  456. static int ds3232_resume(struct device *dev)
  457. {
  458. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  459. if (device_may_wakeup(dev))
  460. disable_irq_wake(ds3232->irq);
  461. return 0;
  462. }
  463. #endif
  464. static const struct dev_pm_ops ds3232_pm_ops = {
  465. SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
  466. };
  467. #if IS_ENABLED(CONFIG_I2C)
  468. static int ds3232_i2c_probe(struct i2c_client *client)
  469. {
  470. struct regmap *regmap;
  471. static const struct regmap_config config = {
  472. .reg_bits = 8,
  473. .val_bits = 8,
  474. .max_register = DS3232_REG_SRAM_END,
  475. };
  476. regmap = devm_regmap_init_i2c(client, &config);
  477. if (IS_ERR(regmap)) {
  478. dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
  479. __func__, PTR_ERR(regmap));
  480. return PTR_ERR(regmap);
  481. }
  482. return ds3232_probe(&client->dev, regmap, client->irq, client->name);
  483. }
  484. static const struct i2c_device_id ds3232_id[] = {
  485. { "ds3232", 0 },
  486. { }
  487. };
  488. MODULE_DEVICE_TABLE(i2c, ds3232_id);
  489. static const __maybe_unused struct of_device_id ds3232_of_match[] = {
  490. { .compatible = "dallas,ds3232" },
  491. { }
  492. };
  493. MODULE_DEVICE_TABLE(of, ds3232_of_match);
  494. static struct i2c_driver ds3232_driver = {
  495. .driver = {
  496. .name = "rtc-ds3232",
  497. .of_match_table = of_match_ptr(ds3232_of_match),
  498. .pm = &ds3232_pm_ops,
  499. },
  500. .probe_new = ds3232_i2c_probe,
  501. .id_table = ds3232_id,
  502. };
  503. static int ds3232_register_driver(void)
  504. {
  505. return i2c_add_driver(&ds3232_driver);
  506. }
  507. static void ds3232_unregister_driver(void)
  508. {
  509. i2c_del_driver(&ds3232_driver);
  510. }
  511. #else
  512. static int ds3232_register_driver(void)
  513. {
  514. return 0;
  515. }
  516. static void ds3232_unregister_driver(void)
  517. {
  518. }
  519. #endif
  520. #if IS_ENABLED(CONFIG_SPI_MASTER)
  521. static int ds3234_probe(struct spi_device *spi)
  522. {
  523. int res;
  524. unsigned int tmp;
  525. static const struct regmap_config config = {
  526. .reg_bits = 8,
  527. .val_bits = 8,
  528. .max_register = DS3232_REG_SRAM_END,
  529. .write_flag_mask = 0x80,
  530. };
  531. struct regmap *regmap;
  532. regmap = devm_regmap_init_spi(spi, &config);
  533. if (IS_ERR(regmap)) {
  534. dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
  535. __func__, PTR_ERR(regmap));
  536. return PTR_ERR(regmap);
  537. }
  538. spi->mode = SPI_MODE_3;
  539. spi->bits_per_word = 8;
  540. spi_setup(spi);
  541. res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
  542. if (res)
  543. return res;
  544. /* Control settings
  545. *
  546. * CONTROL_REG
  547. * BIT 7 6 5 4 3 2 1 0
  548. * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
  549. *
  550. * 0 0 0 1 1 1 0 0
  551. *
  552. * CONTROL_STAT_REG
  553. * BIT 7 6 5 4 3 2 1 0
  554. * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
  555. *
  556. * 1 0 0 0 1 0 0 0
  557. */
  558. res = regmap_read(regmap, DS3232_REG_CR, &tmp);
  559. if (res)
  560. return res;
  561. res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
  562. if (res)
  563. return res;
  564. res = regmap_read(regmap, DS3232_REG_SR, &tmp);
  565. if (res)
  566. return res;
  567. res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
  568. if (res)
  569. return res;
  570. /* Print our settings */
  571. res = regmap_read(regmap, DS3232_REG_CR, &tmp);
  572. if (res)
  573. return res;
  574. dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
  575. res = regmap_read(regmap, DS3232_REG_SR, &tmp);
  576. if (res)
  577. return res;
  578. dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
  579. return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
  580. }
  581. static struct spi_driver ds3234_driver = {
  582. .driver = {
  583. .name = "ds3234",
  584. },
  585. .probe = ds3234_probe,
  586. };
  587. static int ds3234_register_driver(void)
  588. {
  589. return spi_register_driver(&ds3234_driver);
  590. }
  591. static void ds3234_unregister_driver(void)
  592. {
  593. spi_unregister_driver(&ds3234_driver);
  594. }
  595. #else
  596. static int ds3234_register_driver(void)
  597. {
  598. return 0;
  599. }
  600. static void ds3234_unregister_driver(void)
  601. {
  602. }
  603. #endif
  604. static int __init ds323x_init(void)
  605. {
  606. int ret;
  607. ret = ds3232_register_driver();
  608. if (ret) {
  609. pr_err("Failed to register ds3232 driver: %d\n", ret);
  610. return ret;
  611. }
  612. ret = ds3234_register_driver();
  613. if (ret) {
  614. pr_err("Failed to register ds3234 driver: %d\n", ret);
  615. ds3232_unregister_driver();
  616. }
  617. return ret;
  618. }
  619. module_init(ds323x_init)
  620. static void __exit ds323x_exit(void)
  621. {
  622. ds3234_unregister_driver();
  623. ds3232_unregister_driver();
  624. }
  625. module_exit(ds323x_exit)
  626. MODULE_AUTHOR("Srikanth Srinivasan <[email protected]>");
  627. MODULE_AUTHOR("Dennis Aberilla <[email protected]>");
  628. MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
  629. MODULE_LICENSE("GPL");
  630. MODULE_ALIAS("spi:ds3234");