rtc-abx80x.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * A driver for the I2C members of the Abracon AB x8xx RTC family,
  4. * and compatible: AB 1805 and AB 0805
  5. *
  6. * Copyright 2014-2015 Macq S.A.
  7. *
  8. * Author: Philippe De Muyter <[email protected]>
  9. * Author: Alexandre Belloni <[email protected]>
  10. *
  11. */
  12. #include <linux/bcd.h>
  13. #include <linux/i2c.h>
  14. #include <linux/module.h>
  15. #include <linux/of_device.h>
  16. #include <linux/rtc.h>
  17. #include <linux/watchdog.h>
  18. #define ABX8XX_REG_HTH 0x00
  19. #define ABX8XX_REG_SC 0x01
  20. #define ABX8XX_REG_MN 0x02
  21. #define ABX8XX_REG_HR 0x03
  22. #define ABX8XX_REG_DA 0x04
  23. #define ABX8XX_REG_MO 0x05
  24. #define ABX8XX_REG_YR 0x06
  25. #define ABX8XX_REG_WD 0x07
  26. #define ABX8XX_REG_AHTH 0x08
  27. #define ABX8XX_REG_ASC 0x09
  28. #define ABX8XX_REG_AMN 0x0a
  29. #define ABX8XX_REG_AHR 0x0b
  30. #define ABX8XX_REG_ADA 0x0c
  31. #define ABX8XX_REG_AMO 0x0d
  32. #define ABX8XX_REG_AWD 0x0e
  33. #define ABX8XX_REG_STATUS 0x0f
  34. #define ABX8XX_STATUS_AF BIT(2)
  35. #define ABX8XX_STATUS_BLF BIT(4)
  36. #define ABX8XX_STATUS_WDT BIT(6)
  37. #define ABX8XX_REG_CTRL1 0x10
  38. #define ABX8XX_CTRL_WRITE BIT(0)
  39. #define ABX8XX_CTRL_ARST BIT(2)
  40. #define ABX8XX_CTRL_12_24 BIT(6)
  41. #define ABX8XX_REG_CTRL2 0x11
  42. #define ABX8XX_CTRL2_RSVD BIT(5)
  43. #define ABX8XX_REG_IRQ 0x12
  44. #define ABX8XX_IRQ_AIE BIT(2)
  45. #define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
  46. #define ABX8XX_REG_CD_TIMER_CTL 0x18
  47. #define ABX8XX_REG_OSC 0x1c
  48. #define ABX8XX_OSC_FOS BIT(3)
  49. #define ABX8XX_OSC_BOS BIT(4)
  50. #define ABX8XX_OSC_ACAL_512 BIT(5)
  51. #define ABX8XX_OSC_ACAL_1024 BIT(6)
  52. #define ABX8XX_OSC_OSEL BIT(7)
  53. #define ABX8XX_REG_OSS 0x1d
  54. #define ABX8XX_OSS_OF BIT(1)
  55. #define ABX8XX_OSS_OMODE BIT(4)
  56. #define ABX8XX_REG_WDT 0x1b
  57. #define ABX8XX_WDT_WDS BIT(7)
  58. #define ABX8XX_WDT_BMB_MASK 0x7c
  59. #define ABX8XX_WDT_BMB_SHIFT 2
  60. #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
  61. #define ABX8XX_WDT_WRB_MASK 0x03
  62. #define ABX8XX_WDT_WRB_1HZ 0x02
  63. #define ABX8XX_REG_CFG_KEY 0x1f
  64. #define ABX8XX_CFG_KEY_OSC 0xa1
  65. #define ABX8XX_CFG_KEY_MISC 0x9d
  66. #define ABX8XX_REG_ID0 0x28
  67. #define ABX8XX_REG_OUT_CTRL 0x30
  68. #define ABX8XX_OUT_CTRL_EXDS BIT(4)
  69. #define ABX8XX_REG_TRICKLE 0x20
  70. #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
  71. #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
  72. #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
  73. static u8 trickle_resistors[] = {0, 3, 6, 11};
  74. enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
  75. AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
  76. struct abx80x_cap {
  77. u16 pn;
  78. bool has_tc;
  79. bool has_wdog;
  80. };
  81. static struct abx80x_cap abx80x_caps[] = {
  82. [AB0801] = {.pn = 0x0801},
  83. [AB0803] = {.pn = 0x0803},
  84. [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
  85. [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
  86. [AB1801] = {.pn = 0x1801},
  87. [AB1803] = {.pn = 0x1803},
  88. [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
  89. [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
  90. [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
  91. [ABX80X] = {.pn = 0}
  92. };
  93. struct abx80x_priv {
  94. struct rtc_device *rtc;
  95. struct i2c_client *client;
  96. struct watchdog_device wdog;
  97. };
  98. static int abx80x_write_config_key(struct i2c_client *client, u8 key)
  99. {
  100. if (i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, key) < 0) {
  101. dev_err(&client->dev, "Unable to write configuration key\n");
  102. return -EIO;
  103. }
  104. return 0;
  105. }
  106. static int abx80x_is_rc_mode(struct i2c_client *client)
  107. {
  108. int flags = 0;
  109. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  110. if (flags < 0) {
  111. dev_err(&client->dev,
  112. "Failed to read autocalibration attribute\n");
  113. return flags;
  114. }
  115. return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
  116. }
  117. static int abx80x_enable_trickle_charger(struct i2c_client *client,
  118. u8 trickle_cfg)
  119. {
  120. int err;
  121. /*
  122. * Write the configuration key register to enable access to the Trickle
  123. * register
  124. */
  125. if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
  126. return -EIO;
  127. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
  128. ABX8XX_TRICKLE_CHARGE_ENABLE |
  129. trickle_cfg);
  130. if (err < 0) {
  131. dev_err(&client->dev, "Unable to write trickle register\n");
  132. return -EIO;
  133. }
  134. return 0;
  135. }
  136. static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
  137. {
  138. struct i2c_client *client = to_i2c_client(dev);
  139. unsigned char buf[8];
  140. int err, flags, rc_mode = 0;
  141. /* Read the Oscillator Failure only in XT mode */
  142. rc_mode = abx80x_is_rc_mode(client);
  143. if (rc_mode < 0)
  144. return rc_mode;
  145. if (!rc_mode) {
  146. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  147. if (flags < 0)
  148. return flags;
  149. if (flags & ABX8XX_OSS_OF) {
  150. dev_err(dev, "Oscillator failure, data is invalid.\n");
  151. return -EINVAL;
  152. }
  153. }
  154. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
  155. sizeof(buf), buf);
  156. if (err < 0) {
  157. dev_err(&client->dev, "Unable to read date\n");
  158. return -EIO;
  159. }
  160. tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
  161. tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
  162. tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
  163. tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
  164. tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
  165. tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
  166. tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
  167. return 0;
  168. }
  169. static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
  170. {
  171. struct i2c_client *client = to_i2c_client(dev);
  172. unsigned char buf[8];
  173. int err, flags;
  174. if (tm->tm_year < 100)
  175. return -EINVAL;
  176. buf[ABX8XX_REG_HTH] = 0;
  177. buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
  178. buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
  179. buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
  180. buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
  181. buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
  182. buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
  183. buf[ABX8XX_REG_WD] = tm->tm_wday;
  184. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
  185. sizeof(buf), buf);
  186. if (err < 0) {
  187. dev_err(&client->dev, "Unable to write to date registers\n");
  188. return -EIO;
  189. }
  190. /* Clear the OF bit of Oscillator Status Register */
  191. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  192. if (flags < 0)
  193. return flags;
  194. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
  195. flags & ~ABX8XX_OSS_OF);
  196. if (err < 0) {
  197. dev_err(&client->dev, "Unable to write oscillator status register\n");
  198. return err;
  199. }
  200. return 0;
  201. }
  202. static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
  203. {
  204. struct i2c_client *client = dev_id;
  205. struct abx80x_priv *priv = i2c_get_clientdata(client);
  206. struct rtc_device *rtc = priv->rtc;
  207. int status;
  208. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  209. if (status < 0)
  210. return IRQ_NONE;
  211. if (status & ABX8XX_STATUS_AF)
  212. rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
  213. /*
  214. * It is unclear if we'll get an interrupt before the external
  215. * reset kicks in.
  216. */
  217. if (status & ABX8XX_STATUS_WDT)
  218. dev_alert(&client->dev, "watchdog timeout interrupt.\n");
  219. i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
  220. return IRQ_HANDLED;
  221. }
  222. static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  223. {
  224. struct i2c_client *client = to_i2c_client(dev);
  225. unsigned char buf[7];
  226. int irq_mask, err;
  227. if (client->irq <= 0)
  228. return -EINVAL;
  229. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
  230. sizeof(buf), buf);
  231. if (err)
  232. return err;
  233. irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
  234. if (irq_mask < 0)
  235. return irq_mask;
  236. t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
  237. t->time.tm_min = bcd2bin(buf[1] & 0x7F);
  238. t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
  239. t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
  240. t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
  241. t->time.tm_wday = buf[5] & 0x7;
  242. t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
  243. t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
  244. return err;
  245. }
  246. static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  247. {
  248. struct i2c_client *client = to_i2c_client(dev);
  249. u8 alarm[6];
  250. int err;
  251. if (client->irq <= 0)
  252. return -EINVAL;
  253. alarm[0] = 0x0;
  254. alarm[1] = bin2bcd(t->time.tm_sec);
  255. alarm[2] = bin2bcd(t->time.tm_min);
  256. alarm[3] = bin2bcd(t->time.tm_hour);
  257. alarm[4] = bin2bcd(t->time.tm_mday);
  258. alarm[5] = bin2bcd(t->time.tm_mon + 1);
  259. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
  260. sizeof(alarm), alarm);
  261. if (err < 0) {
  262. dev_err(&client->dev, "Unable to write alarm registers\n");
  263. return -EIO;
  264. }
  265. if (t->enabled) {
  266. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  267. (ABX8XX_IRQ_IM_1_4 |
  268. ABX8XX_IRQ_AIE));
  269. if (err)
  270. return err;
  271. }
  272. return 0;
  273. }
  274. static int abx80x_rtc_set_autocalibration(struct device *dev,
  275. int autocalibration)
  276. {
  277. struct i2c_client *client = to_i2c_client(dev);
  278. int retval, flags = 0;
  279. if ((autocalibration != 0) && (autocalibration != 1024) &&
  280. (autocalibration != 512)) {
  281. dev_err(dev, "autocalibration value outside permitted range\n");
  282. return -EINVAL;
  283. }
  284. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  285. if (flags < 0)
  286. return flags;
  287. if (autocalibration == 0) {
  288. flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
  289. } else if (autocalibration == 1024) {
  290. /* 1024 autocalibration is 0x10 */
  291. flags |= ABX8XX_OSC_ACAL_1024;
  292. flags &= ~(ABX8XX_OSC_ACAL_512);
  293. } else {
  294. /* 512 autocalibration is 0x11 */
  295. flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
  296. }
  297. /* Unlock write access to Oscillator Control Register */
  298. if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
  299. return -EIO;
  300. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  301. return retval;
  302. }
  303. static int abx80x_rtc_get_autocalibration(struct device *dev)
  304. {
  305. struct i2c_client *client = to_i2c_client(dev);
  306. int flags = 0, autocalibration;
  307. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  308. if (flags < 0)
  309. return flags;
  310. if (flags & ABX8XX_OSC_ACAL_512)
  311. autocalibration = 512;
  312. else if (flags & ABX8XX_OSC_ACAL_1024)
  313. autocalibration = 1024;
  314. else
  315. autocalibration = 0;
  316. return autocalibration;
  317. }
  318. static ssize_t autocalibration_store(struct device *dev,
  319. struct device_attribute *attr,
  320. const char *buf, size_t count)
  321. {
  322. int retval;
  323. unsigned long autocalibration = 0;
  324. retval = kstrtoul(buf, 10, &autocalibration);
  325. if (retval < 0) {
  326. dev_err(dev, "Failed to store RTC autocalibration attribute\n");
  327. return -EINVAL;
  328. }
  329. retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
  330. return retval ? retval : count;
  331. }
  332. static ssize_t autocalibration_show(struct device *dev,
  333. struct device_attribute *attr, char *buf)
  334. {
  335. int autocalibration = 0;
  336. autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
  337. if (autocalibration < 0) {
  338. dev_err(dev, "Failed to read RTC autocalibration\n");
  339. sprintf(buf, "0\n");
  340. return autocalibration;
  341. }
  342. return sprintf(buf, "%d\n", autocalibration);
  343. }
  344. static DEVICE_ATTR_RW(autocalibration);
  345. static ssize_t oscillator_store(struct device *dev,
  346. struct device_attribute *attr,
  347. const char *buf, size_t count)
  348. {
  349. struct i2c_client *client = to_i2c_client(dev->parent);
  350. int retval, flags, rc_mode = 0;
  351. if (strncmp(buf, "rc", 2) == 0) {
  352. rc_mode = 1;
  353. } else if (strncmp(buf, "xtal", 4) == 0) {
  354. rc_mode = 0;
  355. } else {
  356. dev_err(dev, "Oscillator selection value outside permitted ones\n");
  357. return -EINVAL;
  358. }
  359. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  360. if (flags < 0)
  361. return flags;
  362. if (rc_mode == 0)
  363. flags &= ~(ABX8XX_OSC_OSEL);
  364. else
  365. flags |= (ABX8XX_OSC_OSEL);
  366. /* Unlock write access on Oscillator Control register */
  367. if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
  368. return -EIO;
  369. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  370. if (retval < 0) {
  371. dev_err(dev, "Failed to write Oscillator Control register\n");
  372. return retval;
  373. }
  374. return retval ? retval : count;
  375. }
  376. static ssize_t oscillator_show(struct device *dev,
  377. struct device_attribute *attr, char *buf)
  378. {
  379. int rc_mode = 0;
  380. struct i2c_client *client = to_i2c_client(dev->parent);
  381. rc_mode = abx80x_is_rc_mode(client);
  382. if (rc_mode < 0) {
  383. dev_err(dev, "Failed to read RTC oscillator selection\n");
  384. sprintf(buf, "\n");
  385. return rc_mode;
  386. }
  387. if (rc_mode)
  388. return sprintf(buf, "rc\n");
  389. else
  390. return sprintf(buf, "xtal\n");
  391. }
  392. static DEVICE_ATTR_RW(oscillator);
  393. static struct attribute *rtc_calib_attrs[] = {
  394. &dev_attr_autocalibration.attr,
  395. &dev_attr_oscillator.attr,
  396. NULL,
  397. };
  398. static const struct attribute_group rtc_calib_attr_group = {
  399. .attrs = rtc_calib_attrs,
  400. };
  401. static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
  402. {
  403. struct i2c_client *client = to_i2c_client(dev);
  404. int err;
  405. if (enabled)
  406. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  407. (ABX8XX_IRQ_IM_1_4 |
  408. ABX8XX_IRQ_AIE));
  409. else
  410. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  411. ABX8XX_IRQ_IM_1_4);
  412. return err;
  413. }
  414. static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  415. {
  416. struct i2c_client *client = to_i2c_client(dev);
  417. int status, tmp;
  418. switch (cmd) {
  419. case RTC_VL_READ:
  420. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  421. if (status < 0)
  422. return status;
  423. tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
  424. return put_user(tmp, (unsigned int __user *)arg);
  425. case RTC_VL_CLR:
  426. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  427. if (status < 0)
  428. return status;
  429. status &= ~ABX8XX_STATUS_BLF;
  430. tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
  431. if (tmp < 0)
  432. return tmp;
  433. return 0;
  434. default:
  435. return -ENOIOCTLCMD;
  436. }
  437. }
  438. static const struct rtc_class_ops abx80x_rtc_ops = {
  439. .read_time = abx80x_rtc_read_time,
  440. .set_time = abx80x_rtc_set_time,
  441. .read_alarm = abx80x_read_alarm,
  442. .set_alarm = abx80x_set_alarm,
  443. .alarm_irq_enable = abx80x_alarm_irq_enable,
  444. .ioctl = abx80x_ioctl,
  445. };
  446. static int abx80x_dt_trickle_cfg(struct i2c_client *client)
  447. {
  448. struct device_node *np = client->dev.of_node;
  449. const char *diode;
  450. int trickle_cfg = 0;
  451. int i, ret;
  452. u32 tmp;
  453. ret = of_property_read_string(np, "abracon,tc-diode", &diode);
  454. if (ret)
  455. return ret;
  456. if (!strcmp(diode, "standard")) {
  457. trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
  458. } else if (!strcmp(diode, "schottky")) {
  459. trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
  460. } else {
  461. dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode);
  462. return -EINVAL;
  463. }
  464. ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
  465. if (ret)
  466. return ret;
  467. for (i = 0; i < sizeof(trickle_resistors); i++)
  468. if (trickle_resistors[i] == tmp)
  469. break;
  470. if (i == sizeof(trickle_resistors)) {
  471. dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp);
  472. return -EINVAL;
  473. }
  474. return (trickle_cfg | i);
  475. }
  476. #ifdef CONFIG_WATCHDOG
  477. static inline u8 timeout_bits(unsigned int timeout)
  478. {
  479. return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
  480. ABX8XX_WDT_WRB_1HZ;
  481. }
  482. static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  483. unsigned int timeout)
  484. {
  485. struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
  486. u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
  487. /*
  488. * Writing any timeout to the WDT register resets the watchdog timer.
  489. * Writing 0 disables it.
  490. */
  491. return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
  492. }
  493. static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  494. unsigned int new_timeout)
  495. {
  496. int err = 0;
  497. if (watchdog_hw_running(wdog))
  498. err = __abx80x_wdog_set_timeout(wdog, new_timeout);
  499. if (err == 0)
  500. wdog->timeout = new_timeout;
  501. return err;
  502. }
  503. static int abx80x_wdog_ping(struct watchdog_device *wdog)
  504. {
  505. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  506. }
  507. static int abx80x_wdog_start(struct watchdog_device *wdog)
  508. {
  509. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  510. }
  511. static int abx80x_wdog_stop(struct watchdog_device *wdog)
  512. {
  513. return __abx80x_wdog_set_timeout(wdog, 0);
  514. }
  515. static const struct watchdog_info abx80x_wdog_info = {
  516. .identity = "abx80x watchdog",
  517. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  518. };
  519. static const struct watchdog_ops abx80x_wdog_ops = {
  520. .owner = THIS_MODULE,
  521. .start = abx80x_wdog_start,
  522. .stop = abx80x_wdog_stop,
  523. .ping = abx80x_wdog_ping,
  524. .set_timeout = abx80x_wdog_set_timeout,
  525. };
  526. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  527. {
  528. priv->wdog.parent = &priv->client->dev;
  529. priv->wdog.ops = &abx80x_wdog_ops;
  530. priv->wdog.info = &abx80x_wdog_info;
  531. priv->wdog.min_timeout = 1;
  532. priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
  533. priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
  534. watchdog_set_drvdata(&priv->wdog, priv);
  535. return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
  536. }
  537. #else
  538. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  539. {
  540. return 0;
  541. }
  542. #endif
  543. static int abx80x_probe(struct i2c_client *client,
  544. const struct i2c_device_id *id)
  545. {
  546. struct device_node *np = client->dev.of_node;
  547. struct abx80x_priv *priv;
  548. int i, data, err, trickle_cfg = -EINVAL;
  549. char buf[7];
  550. unsigned int part = id->driver_data;
  551. unsigned int partnumber;
  552. unsigned int majrev, minrev;
  553. unsigned int lot;
  554. unsigned int wafer;
  555. unsigned int uid;
  556. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  557. return -ENODEV;
  558. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
  559. sizeof(buf), buf);
  560. if (err < 0) {
  561. dev_err(&client->dev, "Unable to read partnumber\n");
  562. return -EIO;
  563. }
  564. partnumber = (buf[0] << 8) | buf[1];
  565. majrev = buf[2] >> 3;
  566. minrev = buf[2] & 0x7;
  567. lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
  568. uid = ((buf[4] & 0x7f) << 8) | buf[5];
  569. wafer = (buf[6] & 0x7c) >> 2;
  570. dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
  571. partnumber, majrev, minrev, lot, wafer, uid);
  572. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
  573. if (data < 0) {
  574. dev_err(&client->dev, "Unable to read control register\n");
  575. return -EIO;
  576. }
  577. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
  578. ((data & ~(ABX8XX_CTRL_12_24 |
  579. ABX8XX_CTRL_ARST)) |
  580. ABX8XX_CTRL_WRITE));
  581. if (err < 0) {
  582. dev_err(&client->dev, "Unable to write control register\n");
  583. return -EIO;
  584. }
  585. /* Configure RV1805 specifics */
  586. if (part == RV1805) {
  587. /*
  588. * Avoid accidentally entering test mode. This can happen
  589. * on the RV1805 in case the reserved bit 5 in control2
  590. * register is set. RV-1805-C3 datasheet indicates that
  591. * the bit should be cleared in section 11h - Control2.
  592. */
  593. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
  594. if (data < 0) {
  595. dev_err(&client->dev,
  596. "Unable to read control2 register\n");
  597. return -EIO;
  598. }
  599. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
  600. data & ~ABX8XX_CTRL2_RSVD);
  601. if (err < 0) {
  602. dev_err(&client->dev,
  603. "Unable to write control2 register\n");
  604. return -EIO;
  605. }
  606. /*
  607. * Avoid extra power leakage. The RV1805 uses smaller
  608. * 10pin package and the EXTI input is not present.
  609. * Disable it to avoid leakage.
  610. */
  611. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
  612. if (data < 0) {
  613. dev_err(&client->dev,
  614. "Unable to read output control register\n");
  615. return -EIO;
  616. }
  617. /*
  618. * Write the configuration key register to enable access to
  619. * the config2 register
  620. */
  621. if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
  622. return -EIO;
  623. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
  624. data | ABX8XX_OUT_CTRL_EXDS);
  625. if (err < 0) {
  626. dev_err(&client->dev,
  627. "Unable to write output control register\n");
  628. return -EIO;
  629. }
  630. }
  631. /* part autodetection */
  632. if (part == ABX80X) {
  633. for (i = 0; abx80x_caps[i].pn; i++)
  634. if (partnumber == abx80x_caps[i].pn)
  635. break;
  636. if (abx80x_caps[i].pn == 0) {
  637. dev_err(&client->dev, "Unknown part: %04x\n",
  638. partnumber);
  639. return -EINVAL;
  640. }
  641. part = i;
  642. }
  643. if (partnumber != abx80x_caps[part].pn) {
  644. dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
  645. partnumber, abx80x_caps[part].pn);
  646. return -EINVAL;
  647. }
  648. if (np && abx80x_caps[part].has_tc)
  649. trickle_cfg = abx80x_dt_trickle_cfg(client);
  650. if (trickle_cfg > 0) {
  651. dev_info(&client->dev, "Enabling trickle charger: %02x\n",
  652. trickle_cfg);
  653. abx80x_enable_trickle_charger(client, trickle_cfg);
  654. }
  655. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
  656. BIT(2));
  657. if (err)
  658. return err;
  659. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  660. if (priv == NULL)
  661. return -ENOMEM;
  662. priv->rtc = devm_rtc_allocate_device(&client->dev);
  663. if (IS_ERR(priv->rtc))
  664. return PTR_ERR(priv->rtc);
  665. priv->rtc->ops = &abx80x_rtc_ops;
  666. priv->client = client;
  667. i2c_set_clientdata(client, priv);
  668. if (abx80x_caps[part].has_wdog) {
  669. err = abx80x_setup_watchdog(priv);
  670. if (err)
  671. return err;
  672. }
  673. if (client->irq > 0) {
  674. dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
  675. err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
  676. abx80x_handle_irq,
  677. IRQF_SHARED | IRQF_ONESHOT,
  678. "abx8xx",
  679. client);
  680. if (err) {
  681. dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
  682. client->irq = 0;
  683. }
  684. }
  685. err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
  686. if (err) {
  687. dev_err(&client->dev, "Failed to create sysfs group: %d\n",
  688. err);
  689. return err;
  690. }
  691. return devm_rtc_register_device(priv->rtc);
  692. }
  693. static const struct i2c_device_id abx80x_id[] = {
  694. { "abx80x", ABX80X },
  695. { "ab0801", AB0801 },
  696. { "ab0803", AB0803 },
  697. { "ab0804", AB0804 },
  698. { "ab0805", AB0805 },
  699. { "ab1801", AB1801 },
  700. { "ab1803", AB1803 },
  701. { "ab1804", AB1804 },
  702. { "ab1805", AB1805 },
  703. { "rv1805", RV1805 },
  704. { }
  705. };
  706. MODULE_DEVICE_TABLE(i2c, abx80x_id);
  707. #ifdef CONFIG_OF
  708. static const struct of_device_id abx80x_of_match[] = {
  709. {
  710. .compatible = "abracon,abx80x",
  711. .data = (void *)ABX80X
  712. },
  713. {
  714. .compatible = "abracon,ab0801",
  715. .data = (void *)AB0801
  716. },
  717. {
  718. .compatible = "abracon,ab0803",
  719. .data = (void *)AB0803
  720. },
  721. {
  722. .compatible = "abracon,ab0804",
  723. .data = (void *)AB0804
  724. },
  725. {
  726. .compatible = "abracon,ab0805",
  727. .data = (void *)AB0805
  728. },
  729. {
  730. .compatible = "abracon,ab1801",
  731. .data = (void *)AB1801
  732. },
  733. {
  734. .compatible = "abracon,ab1803",
  735. .data = (void *)AB1803
  736. },
  737. {
  738. .compatible = "abracon,ab1804",
  739. .data = (void *)AB1804
  740. },
  741. {
  742. .compatible = "abracon,ab1805",
  743. .data = (void *)AB1805
  744. },
  745. {
  746. .compatible = "microcrystal,rv1805",
  747. .data = (void *)RV1805
  748. },
  749. { }
  750. };
  751. MODULE_DEVICE_TABLE(of, abx80x_of_match);
  752. #endif
  753. static struct i2c_driver abx80x_driver = {
  754. .driver = {
  755. .name = "rtc-abx80x",
  756. .of_match_table = of_match_ptr(abx80x_of_match),
  757. },
  758. .probe = abx80x_probe,
  759. .id_table = abx80x_id,
  760. };
  761. module_i2c_driver(abx80x_driver);
  762. MODULE_AUTHOR("Philippe De Muyter <[email protected]>");
  763. MODULE_AUTHOR("Alexandre Belloni <[email protected]>");
  764. MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
  765. MODULE_LICENSE("GPL v2");