phy-qcom-qmp-qserdes-com-v4.h 5.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2017, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef QCOM_PHY_QMP_QSERDES_COM_V4_H_
  6. #define QCOM_PHY_QMP_QSERDES_COM_V4_H_
  7. /* Only for QMP V4 PHY - QSERDES COM registers */
  8. #define QSERDES_V4_COM_ATB_SEL1 0x000
  9. #define QSERDES_V4_COM_ATB_SEL2 0x004
  10. #define QSERDES_V4_COM_FREQ_UPDATE 0x008
  11. #define QSERDES_V4_COM_BG_TIMER 0x00c
  12. #define QSERDES_V4_COM_SSC_EN_CENTER 0x010
  13. #define QSERDES_V4_COM_SSC_ADJ_PER1 0x014
  14. #define QSERDES_V4_COM_SSC_ADJ_PER2 0x018
  15. #define QSERDES_V4_COM_SSC_PER1 0x01c
  16. #define QSERDES_V4_COM_SSC_PER2 0x020
  17. #define QSERDES_V4_COM_SSC_STEP_SIZE1_MODE0 0x024
  18. #define QSERDES_V4_COM_SSC_STEP_SIZE2_MODE0 0x028
  19. #define QSERDES_V4_COM_SSC_STEP_SIZE3_MODE0 0x02c
  20. #define QSERDES_V4_COM_SSC_STEP_SIZE1_MODE1 0x030
  21. #define QSERDES_V4_COM_SSC_STEP_SIZE2_MODE1 0x034
  22. #define QSERDES_V4_COM_SSC_STEP_SIZE3_MODE1 0x038
  23. #define QSERDES_V4_COM_POST_DIV 0x03c
  24. #define QSERDES_V4_COM_POST_DIV_MUX 0x040
  25. #define QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN 0x044
  26. #define QSERDES_V4_COM_CLK_ENABLE1 0x048
  27. #define QSERDES_V4_COM_SYS_CLK_CTRL 0x04c
  28. #define QSERDES_V4_COM_SYSCLK_BUF_ENABLE 0x050
  29. #define QSERDES_V4_COM_PLL_EN 0x054
  30. #define QSERDES_V4_COM_PLL_IVCO 0x058
  31. #define QSERDES_V4_COM_CMN_IETRIM 0x05c
  32. #define QSERDES_V4_COM_CMN_IPTRIM 0x060
  33. #define QSERDES_V4_COM_EP_CLOCK_DETECT_CTRL 0x064
  34. #define QSERDES_V4_COM_SYSCLK_DET_COMP_STATUS 0x068
  35. #define QSERDES_V4_COM_CLK_EP_DIV_MODE0 0x06c
  36. #define QSERDES_V4_COM_CLK_EP_DIV_MODE1 0x070
  37. #define QSERDES_V4_COM_CP_CTRL_MODE0 0x074
  38. #define QSERDES_V4_COM_CP_CTRL_MODE1 0x078
  39. #define QSERDES_V4_COM_PLL_RCTRL_MODE0 0x07c
  40. #define QSERDES_V4_COM_PLL_RCTRL_MODE1 0x080
  41. #define QSERDES_V4_COM_PLL_CCTRL_MODE0 0x084
  42. #define QSERDES_V4_COM_PLL_CCTRL_MODE1 0x088
  43. #define QSERDES_V4_COM_PLL_CNTRL 0x08c
  44. #define QSERDES_V4_COM_BIAS_EN_CTRL_BY_PSM 0x090
  45. #define QSERDES_V4_COM_SYSCLK_EN_SEL 0x094
  46. #define QSERDES_V4_COM_CML_SYSCLK_SEL 0x098
  47. #define QSERDES_V4_COM_RESETSM_CNTRL 0x09c
  48. #define QSERDES_V4_COM_RESETSM_CNTRL2 0x0a0
  49. #define QSERDES_V4_COM_LOCK_CMP_EN 0x0a4
  50. #define QSERDES_V4_COM_LOCK_CMP_CFG 0x0a8
  51. #define QSERDES_V4_COM_LOCK_CMP1_MODE0 0x0ac
  52. #define QSERDES_V4_COM_LOCK_CMP2_MODE0 0x0b0
  53. #define QSERDES_V4_COM_LOCK_CMP1_MODE1 0x0b4
  54. #define QSERDES_V4_COM_LOCK_CMP2_MODE1 0x0b8
  55. #define QSERDES_V4_COM_DEC_START_MODE0 0x0bc
  56. #define QSERDES_V4_COM_DEC_START_MSB_MODE0 0x0c0
  57. #define QSERDES_V4_COM_DEC_START_MODE1 0x0c4
  58. #define QSERDES_V4_COM_DEC_START_MSB_MODE1 0x0c8
  59. #define QSERDES_V4_COM_DIV_FRAC_START1_MODE0 0x0cc
  60. #define QSERDES_V4_COM_DIV_FRAC_START2_MODE0 0x0d0
  61. #define QSERDES_V4_COM_DIV_FRAC_START3_MODE0 0x0d4
  62. #define QSERDES_V4_COM_DIV_FRAC_START1_MODE1 0x0d8
  63. #define QSERDES_V4_COM_DIV_FRAC_START2_MODE1 0x0dc
  64. #define QSERDES_V4_COM_DIV_FRAC_START3_MODE1 0x0e0
  65. #define QSERDES_V4_COM_INTEGLOOP_INITVAL 0x0e4
  66. #define QSERDES_V4_COM_INTEGLOOP_EN 0x0e8
  67. #define QSERDES_V4_COM_INTEGLOOP_GAIN0_MODE0 0x0ec
  68. #define QSERDES_V4_COM_INTEGLOOP_GAIN1_MODE0 0x0f0
  69. #define QSERDES_V4_COM_INTEGLOOP_GAIN0_MODE1 0x0f4
  70. #define QSERDES_V4_COM_INTEGLOOP_GAIN1_MODE1 0x0f8
  71. #define QSERDES_V4_COM_INTEGLOOP_P_PATH_GAIN0 0x0fc
  72. #define QSERDES_V4_COM_INTEGLOOP_P_PATH_GAIN1 0x100
  73. #define QSERDES_V4_COM_VCOCAL_DEADMAN_CTRL 0x104
  74. #define QSERDES_V4_COM_VCO_TUNE_CTRL 0x108
  75. #define QSERDES_V4_COM_VCO_TUNE_MAP 0x10c
  76. #define QSERDES_V4_COM_VCO_TUNE1_MODE0 0x110
  77. #define QSERDES_V4_COM_VCO_TUNE2_MODE0 0x114
  78. #define QSERDES_V4_COM_VCO_TUNE1_MODE1 0x118
  79. #define QSERDES_V4_COM_VCO_TUNE2_MODE1 0x11c
  80. #define QSERDES_V4_COM_VCO_TUNE_INITVAL1 0x120
  81. #define QSERDES_V4_COM_VCO_TUNE_INITVAL2 0x124
  82. #define QSERDES_V4_COM_VCO_TUNE_MINVAL1 0x128
  83. #define QSERDES_V4_COM_VCO_TUNE_MINVAL2 0x12c
  84. #define QSERDES_V4_COM_VCO_TUNE_MAXVAL1 0x130
  85. #define QSERDES_V4_COM_VCO_TUNE_MAXVAL2 0x134
  86. #define QSERDES_V4_COM_VCO_TUNE_TIMER1 0x138
  87. #define QSERDES_V4_COM_VCO_TUNE_TIMER2 0x13c
  88. #define QSERDES_V4_COM_CMN_STATUS 0x140
  89. #define QSERDES_V4_COM_RESET_SM_STATUS 0x144
  90. #define QSERDES_V4_COM_RESTRIM_CODE_STATUS 0x148
  91. #define QSERDES_V4_COM_PLLCAL_CODE1_STATUS 0x14c
  92. #define QSERDES_V4_COM_PLLCAL_CODE2_STATUS 0x150
  93. #define QSERDES_V4_COM_CLK_SELECT 0x154
  94. #define QSERDES_V4_COM_HSCLK_SEL 0x158
  95. #define QSERDES_V4_COM_HSCLK_HS_SWITCH_SEL 0x15c
  96. #define QSERDES_V4_COM_INTEGLOOP_BINCODE_STATUS 0x160
  97. #define QSERDES_V4_COM_PLL_ANALOG 0x164
  98. #define QSERDES_V4_COM_CORECLK_DIV_MODE0 0x168
  99. #define QSERDES_V4_COM_CORECLK_DIV_MODE1 0x16c
  100. #define QSERDES_V4_COM_SW_RESET 0x170
  101. #define QSERDES_V4_COM_CORE_CLK_EN 0x174
  102. #define QSERDES_V4_COM_C_READY_STATUS 0x178
  103. #define QSERDES_V4_COM_CMN_CONFIG 0x17c
  104. #define QSERDES_V4_COM_CMN_RATE_OVERRIDE 0x180
  105. #define QSERDES_V4_COM_SVS_MODE_CLK_SEL 0x184
  106. #define QSERDES_V4_COM_DEBUG_BUS0 0x188
  107. #define QSERDES_V4_COM_DEBUG_BUS1 0x18c
  108. #define QSERDES_V4_COM_DEBUG_BUS2 0x190
  109. #define QSERDES_V4_COM_DEBUG_BUS3 0x194
  110. #define QSERDES_V4_COM_DEBUG_BUS_SEL 0x198
  111. #define QSERDES_V4_COM_CMN_MISC1 0x19c
  112. #define QSERDES_V4_COM_CMN_MISC2 0x1a0
  113. #define QSERDES_V4_COM_CMN_MODE 0x1a4
  114. #define QSERDES_V4_COM_VCO_DC_LEVEL_CTRL 0x1a8
  115. #define QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0x1ac
  116. #define QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1b0
  117. #define QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0x1b4
  118. #define QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1b8
  119. #define QSERDES_V4_COM_BIN_VCOCAL_HSCLK_SEL 0x1bc
  120. #endif