ptm.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCI Express Precision Time Measurement
  4. * Copyright (c) 2016, Intel Corporation.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/init.h>
  8. #include <linux/pci.h>
  9. #include "../pci.h"
  10. /*
  11. * If the next upstream device supports PTM, return it; otherwise return
  12. * NULL. PTM Messages are local, so both link partners must support it.
  13. */
  14. static struct pci_dev *pci_upstream_ptm(struct pci_dev *dev)
  15. {
  16. struct pci_dev *ups = pci_upstream_bridge(dev);
  17. /*
  18. * Switch Downstream Ports are not permitted to have a PTM
  19. * capability; their PTM behavior is controlled by the Upstream
  20. * Port (PCIe r5.0, sec 7.9.16), so if the upstream bridge is a
  21. * Switch Downstream Port, look up one more level.
  22. */
  23. if (ups && pci_pcie_type(ups) == PCI_EXP_TYPE_DOWNSTREAM)
  24. ups = pci_upstream_bridge(ups);
  25. if (ups && ups->ptm_cap)
  26. return ups;
  27. return NULL;
  28. }
  29. /*
  30. * Find the PTM Capability (if present) and extract the information we need
  31. * to use it.
  32. */
  33. void pci_ptm_init(struct pci_dev *dev)
  34. {
  35. u16 ptm;
  36. u32 cap;
  37. struct pci_dev *ups;
  38. if (!pci_is_pcie(dev))
  39. return;
  40. ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
  41. if (!ptm)
  42. return;
  43. dev->ptm_cap = ptm;
  44. pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u32));
  45. pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
  46. dev->ptm_granularity = (cap & PCI_PTM_GRANULARITY_MASK) >> 8;
  47. /*
  48. * Per the spec recommendation (PCIe r6.0, sec 7.9.15.3), select the
  49. * furthest upstream Time Source as the PTM Root. For Endpoints,
  50. * "the Effective Granularity is the maximum Local Clock Granularity
  51. * reported by the PTM Root and all intervening PTM Time Sources."
  52. */
  53. ups = pci_upstream_ptm(dev);
  54. if (ups) {
  55. if (ups->ptm_granularity == 0)
  56. dev->ptm_granularity = 0;
  57. else if (ups->ptm_granularity > dev->ptm_granularity)
  58. dev->ptm_granularity = ups->ptm_granularity;
  59. } else if (cap & PCI_PTM_CAP_ROOT) {
  60. dev->ptm_root = 1;
  61. } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
  62. /*
  63. * Per sec 7.9.15.3, this should be the Local Clock
  64. * Granularity of the associated Time Source. But it
  65. * doesn't say how to find that Time Source.
  66. */
  67. dev->ptm_granularity = 0;
  68. }
  69. if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
  70. pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM)
  71. pci_enable_ptm(dev, NULL);
  72. }
  73. void pci_save_ptm_state(struct pci_dev *dev)
  74. {
  75. u16 ptm = dev->ptm_cap;
  76. struct pci_cap_saved_state *save_state;
  77. u32 *cap;
  78. if (!ptm)
  79. return;
  80. save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
  81. if (!save_state)
  82. return;
  83. cap = (u32 *)&save_state->cap.data[0];
  84. pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, cap);
  85. }
  86. void pci_restore_ptm_state(struct pci_dev *dev)
  87. {
  88. u16 ptm = dev->ptm_cap;
  89. struct pci_cap_saved_state *save_state;
  90. u32 *cap;
  91. if (!ptm)
  92. return;
  93. save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
  94. if (!save_state)
  95. return;
  96. cap = (u32 *)&save_state->cap.data[0];
  97. pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, *cap);
  98. }
  99. /* Enable PTM in the Control register if possible */
  100. static int __pci_enable_ptm(struct pci_dev *dev)
  101. {
  102. u16 ptm = dev->ptm_cap;
  103. struct pci_dev *ups;
  104. u32 ctrl;
  105. if (!ptm)
  106. return -EINVAL;
  107. /*
  108. * A device uses local PTM Messages to request time information
  109. * from a PTM Root that's farther upstream. Every device along the
  110. * path must support PTM and have it enabled so it can handle the
  111. * messages. Therefore, if this device is not a PTM Root, the
  112. * upstream link partner must have PTM enabled before we can enable
  113. * PTM.
  114. */
  115. if (!dev->ptm_root) {
  116. ups = pci_upstream_ptm(dev);
  117. if (!ups || !ups->ptm_enabled)
  118. return -EINVAL;
  119. }
  120. pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
  121. ctrl |= PCI_PTM_CTRL_ENABLE;
  122. ctrl &= ~PCI_PTM_GRANULARITY_MASK;
  123. ctrl |= dev->ptm_granularity << 8;
  124. if (dev->ptm_root)
  125. ctrl |= PCI_PTM_CTRL_ROOT;
  126. pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
  127. return 0;
  128. }
  129. /**
  130. * pci_enable_ptm() - Enable Precision Time Measurement
  131. * @dev: PCI device
  132. * @granularity: pointer to return granularity
  133. *
  134. * Enable Precision Time Measurement for @dev. If successful and
  135. * @granularity is non-NULL, return the Effective Granularity.
  136. *
  137. * Return: zero if successful, or -EINVAL if @dev lacks a PTM Capability or
  138. * is not a PTM Root and lacks an upstream path of PTM-enabled devices.
  139. */
  140. int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
  141. {
  142. int rc;
  143. char clock_desc[8];
  144. rc = __pci_enable_ptm(dev);
  145. if (rc)
  146. return rc;
  147. dev->ptm_enabled = 1;
  148. if (granularity)
  149. *granularity = dev->ptm_granularity;
  150. switch (dev->ptm_granularity) {
  151. case 0:
  152. snprintf(clock_desc, sizeof(clock_desc), "unknown");
  153. break;
  154. case 255:
  155. snprintf(clock_desc, sizeof(clock_desc), ">254ns");
  156. break;
  157. default:
  158. snprintf(clock_desc, sizeof(clock_desc), "%uns",
  159. dev->ptm_granularity);
  160. break;
  161. }
  162. pci_info(dev, "PTM enabled%s, %s granularity\n",
  163. dev->ptm_root ? " (root)" : "", clock_desc);
  164. return 0;
  165. }
  166. EXPORT_SYMBOL(pci_enable_ptm);
  167. static void __pci_disable_ptm(struct pci_dev *dev)
  168. {
  169. u16 ptm = dev->ptm_cap;
  170. u32 ctrl;
  171. if (!ptm)
  172. return;
  173. pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
  174. ctrl &= ~(PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT);
  175. pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
  176. }
  177. /**
  178. * pci_disable_ptm() - Disable Precision Time Measurement
  179. * @dev: PCI device
  180. *
  181. * Disable Precision Time Measurement for @dev.
  182. */
  183. void pci_disable_ptm(struct pci_dev *dev)
  184. {
  185. if (dev->ptm_enabled) {
  186. __pci_disable_ptm(dev);
  187. dev->ptm_enabled = 0;
  188. }
  189. }
  190. EXPORT_SYMBOL(pci_disable_ptm);
  191. /*
  192. * Disable PTM, but preserve dev->ptm_enabled so we silently re-enable it on
  193. * resume if necessary.
  194. */
  195. void pci_suspend_ptm(struct pci_dev *dev)
  196. {
  197. if (dev->ptm_enabled)
  198. __pci_disable_ptm(dev);
  199. }
  200. /* If PTM was enabled before suspend, re-enable it when resuming */
  201. void pci_resume_ptm(struct pci_dev *dev)
  202. {
  203. if (dev->ptm_enabled)
  204. __pci_enable_ptm(dev);
  205. }
  206. bool pcie_ptm_enabled(struct pci_dev *dev)
  207. {
  208. if (!dev)
  209. return false;
  210. return dev->ptm_enabled;
  211. }
  212. EXPORT_SYMBOL(pcie_ptm_enabled);