portdrv_pci.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Purpose: PCI Express Port Bus Driver
  4. * Author: Tom Nguyen <[email protected]>
  5. *
  6. * Copyright (C) 2004 Intel
  7. * Copyright (C) Tom Long Nguyen ([email protected])
  8. */
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/init.h>
  15. #include <linux/aer.h>
  16. #include <linux/dmi.h>
  17. #include "../pci.h"
  18. #include "portdrv.h"
  19. /* If this switch is set, PCIe port native services should not be enabled. */
  20. bool pcie_ports_disabled;
  21. /*
  22. * If the user specified "pcie_ports=native", use the PCIe services regardless
  23. * of whether the platform has given us permission. On ACPI systems, this
  24. * means we ignore _OSC.
  25. */
  26. bool pcie_ports_native;
  27. /*
  28. * If the user specified "pcie_ports=dpc-native", use the Linux DPC PCIe
  29. * service even if the platform hasn't given us permission.
  30. */
  31. bool pcie_ports_dpc_native;
  32. static int __init pcie_port_setup(char *str)
  33. {
  34. if (!strncmp(str, "compat", 6))
  35. pcie_ports_disabled = true;
  36. else if (!strncmp(str, "native", 6))
  37. pcie_ports_native = true;
  38. else if (!strncmp(str, "dpc-native", 10))
  39. pcie_ports_dpc_native = true;
  40. return 1;
  41. }
  42. __setup("pcie_ports=", pcie_port_setup);
  43. /* global data */
  44. #ifdef CONFIG_PM
  45. static int pcie_port_runtime_suspend(struct device *dev)
  46. {
  47. if (!to_pci_dev(dev)->bridge_d3)
  48. return -EBUSY;
  49. return pcie_port_device_runtime_suspend(dev);
  50. }
  51. static int pcie_port_runtime_idle(struct device *dev)
  52. {
  53. /*
  54. * Assume the PCI core has set bridge_d3 whenever it thinks the port
  55. * should be good to go to D3. Everything else, including moving
  56. * the port to D3, is handled by the PCI core.
  57. */
  58. return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
  59. }
  60. static const struct dev_pm_ops pcie_portdrv_pm_ops = {
  61. .suspend = pcie_port_device_suspend,
  62. .resume_noirq = pcie_port_device_resume_noirq,
  63. .resume = pcie_port_device_resume,
  64. .freeze = pcie_port_device_suspend,
  65. .thaw = pcie_port_device_resume,
  66. .poweroff = pcie_port_device_suspend,
  67. .restore_noirq = pcie_port_device_resume_noirq,
  68. .restore = pcie_port_device_resume,
  69. .runtime_suspend = pcie_port_runtime_suspend,
  70. .runtime_resume = pcie_port_device_runtime_resume,
  71. .runtime_idle = pcie_port_runtime_idle,
  72. };
  73. #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
  74. #else /* !PM */
  75. #define PCIE_PORTDRV_PM_OPS NULL
  76. #endif /* !PM */
  77. /*
  78. * pcie_portdrv_probe - Probe PCI-Express port devices
  79. * @dev: PCI-Express port device being probed
  80. *
  81. * If detected invokes the pcie_port_device_register() method for
  82. * this port device.
  83. *
  84. */
  85. static int pcie_portdrv_probe(struct pci_dev *dev,
  86. const struct pci_device_id *id)
  87. {
  88. int type = pci_pcie_type(dev);
  89. int status;
  90. if (!pci_is_pcie(dev) ||
  91. ((type != PCI_EXP_TYPE_ROOT_PORT) &&
  92. (type != PCI_EXP_TYPE_UPSTREAM) &&
  93. (type != PCI_EXP_TYPE_DOWNSTREAM) &&
  94. (type != PCI_EXP_TYPE_RC_EC)))
  95. return -ENODEV;
  96. if (type == PCI_EXP_TYPE_RC_EC)
  97. pcie_link_rcec(dev);
  98. status = pcie_port_device_register(dev);
  99. if (status)
  100. return status;
  101. pci_save_state(dev);
  102. dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE |
  103. DPM_FLAG_SMART_SUSPEND);
  104. if (pci_bridge_d3_possible(dev)) {
  105. /*
  106. * Keep the port resumed 100ms to make sure things like
  107. * config space accesses from userspace (lspci) will not
  108. * cause the port to repeatedly suspend and resume.
  109. */
  110. pm_runtime_set_autosuspend_delay(&dev->dev, 100);
  111. pm_runtime_use_autosuspend(&dev->dev);
  112. pm_runtime_mark_last_busy(&dev->dev);
  113. pm_runtime_put_autosuspend(&dev->dev);
  114. pm_runtime_allow(&dev->dev);
  115. }
  116. return 0;
  117. }
  118. static void pcie_portdrv_remove(struct pci_dev *dev)
  119. {
  120. if (pci_bridge_d3_possible(dev)) {
  121. pm_runtime_forbid(&dev->dev);
  122. pm_runtime_get_noresume(&dev->dev);
  123. pm_runtime_dont_use_autosuspend(&dev->dev);
  124. }
  125. pcie_port_device_remove(dev);
  126. }
  127. static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
  128. pci_channel_state_t error)
  129. {
  130. if (error == pci_channel_io_frozen)
  131. return PCI_ERS_RESULT_NEED_RESET;
  132. return PCI_ERS_RESULT_CAN_RECOVER;
  133. }
  134. static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
  135. {
  136. size_t off = offsetof(struct pcie_port_service_driver, slot_reset);
  137. device_for_each_child(&dev->dev, &off, pcie_port_device_iter);
  138. pci_restore_state(dev);
  139. pci_save_state(dev);
  140. return PCI_ERS_RESULT_RECOVERED;
  141. }
  142. static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
  143. {
  144. return PCI_ERS_RESULT_RECOVERED;
  145. }
  146. /*
  147. * LINUX Device Driver Model
  148. */
  149. static const struct pci_device_id port_pci_ids[] = {
  150. /* handle any PCI-Express port */
  151. { PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_NORMAL, ~0) },
  152. /* subtractive decode PCI-to-PCI bridge, class type is 060401h */
  153. { PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE, ~0) },
  154. /* handle any Root Complex Event Collector */
  155. { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) },
  156. { },
  157. };
  158. static const struct pci_error_handlers pcie_portdrv_err_handler = {
  159. .error_detected = pcie_portdrv_error_detected,
  160. .slot_reset = pcie_portdrv_slot_reset,
  161. .mmio_enabled = pcie_portdrv_mmio_enabled,
  162. };
  163. static struct pci_driver pcie_portdriver = {
  164. .name = "pcieport",
  165. .id_table = &port_pci_ids[0],
  166. .probe = pcie_portdrv_probe,
  167. .remove = pcie_portdrv_remove,
  168. .shutdown = pcie_portdrv_remove,
  169. .err_handler = &pcie_portdrv_err_handler,
  170. .driver_managed_dma = true,
  171. .driver.pm = PCIE_PORTDRV_PM_OPS,
  172. };
  173. static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
  174. {
  175. pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
  176. d->ident);
  177. pcie_pme_disable_msi();
  178. return 0;
  179. }
  180. static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
  181. /*
  182. * Boxes that should not use MSI for PCIe PME signaling.
  183. */
  184. {
  185. .callback = dmi_pcie_pme_disable_msi,
  186. .ident = "MSI Wind U-100",
  187. .matches = {
  188. DMI_MATCH(DMI_SYS_VENDOR,
  189. "MICRO-STAR INTERNATIONAL CO., LTD"),
  190. DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
  191. },
  192. },
  193. {}
  194. };
  195. static void __init pcie_init_services(void)
  196. {
  197. pcie_aer_init();
  198. pcie_pme_init();
  199. pcie_dpc_init();
  200. pcie_hp_init();
  201. }
  202. static int __init pcie_portdrv_init(void)
  203. {
  204. if (pcie_ports_disabled)
  205. return -EACCES;
  206. pcie_init_services();
  207. dmi_check_system(pcie_portdrv_dmi_table);
  208. return pci_register_driver(&pcie_portdriver);
  209. }
  210. device_initcall(pcie_portdrv_init);