pci-sysfs.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2002-2004 Greg Kroah-Hartman <[email protected]>
  4. * (C) Copyright 2002-2004 IBM Corp.
  5. * (C) Copyright 2003 Matthew Wilcox
  6. * (C) Copyright 2003 Hewlett-Packard
  7. * (C) Copyright 2004 Jon Smirl <[email protected]>
  8. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <[email protected]>
  9. *
  10. * File attributes for PCI devices
  11. *
  12. * Modeled after usb's driverfs.c
  13. */
  14. #include <linux/bitfield.h>
  15. #include <linux/kernel.h>
  16. #include <linux/sched.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/export.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/fs.h>
  23. #include <linux/capability.h>
  24. #include <linux/security.h>
  25. #include <linux/slab.h>
  26. #include <linux/vgaarb.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/msi.h>
  29. #include <linux/of.h>
  30. #include <linux/aperture.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sysfs_emit(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(revision, "0x%02x\n");
  49. pci_config_attr(class, "0x%06x\n");
  50. static ssize_t irq_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. #ifdef CONFIG_PCI_MSI
  56. /*
  57. * For MSI, show the first MSI IRQ; for all other cases including
  58. * MSI-X, show the legacy INTx IRQ.
  59. */
  60. if (pdev->msi_enabled)
  61. return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
  62. #endif
  63. return sysfs_emit(buf, "%u\n", pdev->irq);
  64. }
  65. static DEVICE_ATTR_RO(irq);
  66. static ssize_t broken_parity_status_show(struct device *dev,
  67. struct device_attribute *attr,
  68. char *buf)
  69. {
  70. struct pci_dev *pdev = to_pci_dev(dev);
  71. return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
  72. }
  73. static ssize_t broken_parity_status_store(struct device *dev,
  74. struct device_attribute *attr,
  75. const char *buf, size_t count)
  76. {
  77. struct pci_dev *pdev = to_pci_dev(dev);
  78. unsigned long val;
  79. if (kstrtoul(buf, 0, &val) < 0)
  80. return -EINVAL;
  81. pdev->broken_parity_status = !!val;
  82. return count;
  83. }
  84. static DEVICE_ATTR_RW(broken_parity_status);
  85. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  86. struct device_attribute *attr, char *buf)
  87. {
  88. const struct cpumask *mask;
  89. #ifdef CONFIG_NUMA
  90. if (dev_to_node(dev) == NUMA_NO_NODE)
  91. mask = cpu_online_mask;
  92. else
  93. mask = cpumask_of_node(dev_to_node(dev));
  94. #else
  95. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  96. #endif
  97. return cpumap_print_to_pagebuf(list, buf, mask);
  98. }
  99. static ssize_t local_cpus_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. return pci_dev_show_local_cpu(dev, false, attr, buf);
  103. }
  104. static DEVICE_ATTR_RO(local_cpus);
  105. static ssize_t local_cpulist_show(struct device *dev,
  106. struct device_attribute *attr, char *buf)
  107. {
  108. return pci_dev_show_local_cpu(dev, true, attr, buf);
  109. }
  110. static DEVICE_ATTR_RO(local_cpulist);
  111. /*
  112. * PCI Bus Class Devices
  113. */
  114. static ssize_t cpuaffinity_show(struct device *dev,
  115. struct device_attribute *attr, char *buf)
  116. {
  117. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  118. return cpumap_print_to_pagebuf(false, buf, cpumask);
  119. }
  120. static DEVICE_ATTR_RO(cpuaffinity);
  121. static ssize_t cpulistaffinity_show(struct device *dev,
  122. struct device_attribute *attr, char *buf)
  123. {
  124. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  125. return cpumap_print_to_pagebuf(true, buf, cpumask);
  126. }
  127. static DEVICE_ATTR_RO(cpulistaffinity);
  128. static ssize_t power_state_show(struct device *dev,
  129. struct device_attribute *attr, char *buf)
  130. {
  131. struct pci_dev *pdev = to_pci_dev(dev);
  132. return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
  133. }
  134. static DEVICE_ATTR_RO(power_state);
  135. /* show resources */
  136. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  137. char *buf)
  138. {
  139. struct pci_dev *pci_dev = to_pci_dev(dev);
  140. int i;
  141. int max;
  142. resource_size_t start, end;
  143. size_t len = 0;
  144. if (pci_dev->subordinate)
  145. max = DEVICE_COUNT_RESOURCE;
  146. else
  147. max = PCI_BRIDGE_RESOURCES;
  148. for (i = 0; i < max; i++) {
  149. struct resource *res = &pci_dev->resource[i];
  150. pci_resource_to_user(pci_dev, i, res, &start, &end);
  151. len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
  152. (unsigned long long)start,
  153. (unsigned long long)end,
  154. (unsigned long long)res->flags);
  155. }
  156. return len;
  157. }
  158. static DEVICE_ATTR_RO(resource);
  159. static ssize_t max_link_speed_show(struct device *dev,
  160. struct device_attribute *attr, char *buf)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. return sysfs_emit(buf, "%s\n",
  164. pci_speed_string(pcie_get_speed_cap(pdev)));
  165. }
  166. static DEVICE_ATTR_RO(max_link_speed);
  167. static ssize_t max_link_width_show(struct device *dev,
  168. struct device_attribute *attr, char *buf)
  169. {
  170. struct pci_dev *pdev = to_pci_dev(dev);
  171. return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
  172. }
  173. static DEVICE_ATTR_RO(max_link_width);
  174. static ssize_t current_link_speed_show(struct device *dev,
  175. struct device_attribute *attr, char *buf)
  176. {
  177. struct pci_dev *pci_dev = to_pci_dev(dev);
  178. u16 linkstat;
  179. int err;
  180. enum pci_bus_speed speed;
  181. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  182. if (err)
  183. return -EINVAL;
  184. speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
  185. return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
  186. }
  187. static DEVICE_ATTR_RO(current_link_speed);
  188. static ssize_t current_link_width_show(struct device *dev,
  189. struct device_attribute *attr, char *buf)
  190. {
  191. struct pci_dev *pci_dev = to_pci_dev(dev);
  192. u16 linkstat;
  193. int err;
  194. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  195. if (err)
  196. return -EINVAL;
  197. return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
  198. }
  199. static DEVICE_ATTR_RO(current_link_width);
  200. static ssize_t secondary_bus_number_show(struct device *dev,
  201. struct device_attribute *attr,
  202. char *buf)
  203. {
  204. struct pci_dev *pci_dev = to_pci_dev(dev);
  205. u8 sec_bus;
  206. int err;
  207. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  208. if (err)
  209. return -EINVAL;
  210. return sysfs_emit(buf, "%u\n", sec_bus);
  211. }
  212. static DEVICE_ATTR_RO(secondary_bus_number);
  213. static ssize_t subordinate_bus_number_show(struct device *dev,
  214. struct device_attribute *attr,
  215. char *buf)
  216. {
  217. struct pci_dev *pci_dev = to_pci_dev(dev);
  218. u8 sub_bus;
  219. int err;
  220. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  221. if (err)
  222. return -EINVAL;
  223. return sysfs_emit(buf, "%u\n", sub_bus);
  224. }
  225. static DEVICE_ATTR_RO(subordinate_bus_number);
  226. static ssize_t ari_enabled_show(struct device *dev,
  227. struct device_attribute *attr,
  228. char *buf)
  229. {
  230. struct pci_dev *pci_dev = to_pci_dev(dev);
  231. return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
  232. }
  233. static DEVICE_ATTR_RO(ari_enabled);
  234. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  235. char *buf)
  236. {
  237. struct pci_dev *pci_dev = to_pci_dev(dev);
  238. return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  239. pci_dev->vendor, pci_dev->device,
  240. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  241. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  242. (u8)(pci_dev->class));
  243. }
  244. static DEVICE_ATTR_RO(modalias);
  245. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  246. const char *buf, size_t count)
  247. {
  248. struct pci_dev *pdev = to_pci_dev(dev);
  249. unsigned long val;
  250. ssize_t result = 0;
  251. /* this can crash the machine when done on the "wrong" device */
  252. if (!capable(CAP_SYS_ADMIN))
  253. return -EPERM;
  254. if (kstrtoul(buf, 0, &val) < 0)
  255. return -EINVAL;
  256. device_lock(dev);
  257. if (dev->driver)
  258. result = -EBUSY;
  259. else if (val)
  260. result = pci_enable_device(pdev);
  261. else if (pci_is_enabled(pdev))
  262. pci_disable_device(pdev);
  263. else
  264. result = -EIO;
  265. device_unlock(dev);
  266. return result < 0 ? result : count;
  267. }
  268. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  269. char *buf)
  270. {
  271. struct pci_dev *pdev;
  272. pdev = to_pci_dev(dev);
  273. return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  274. }
  275. static DEVICE_ATTR_RW(enable);
  276. #ifdef CONFIG_NUMA
  277. static ssize_t numa_node_store(struct device *dev,
  278. struct device_attribute *attr, const char *buf,
  279. size_t count)
  280. {
  281. struct pci_dev *pdev = to_pci_dev(dev);
  282. int node;
  283. if (!capable(CAP_SYS_ADMIN))
  284. return -EPERM;
  285. if (kstrtoint(buf, 0, &node) < 0)
  286. return -EINVAL;
  287. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  288. return -EINVAL;
  289. if (node != NUMA_NO_NODE && !node_online(node))
  290. return -EINVAL;
  291. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  292. pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  293. node);
  294. dev->numa_node = node;
  295. return count;
  296. }
  297. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  298. char *buf)
  299. {
  300. return sysfs_emit(buf, "%d\n", dev->numa_node);
  301. }
  302. static DEVICE_ATTR_RW(numa_node);
  303. #endif
  304. static ssize_t dma_mask_bits_show(struct device *dev,
  305. struct device_attribute *attr, char *buf)
  306. {
  307. struct pci_dev *pdev = to_pci_dev(dev);
  308. return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
  309. }
  310. static DEVICE_ATTR_RO(dma_mask_bits);
  311. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  312. struct device_attribute *attr,
  313. char *buf)
  314. {
  315. return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
  316. }
  317. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  318. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  319. char *buf)
  320. {
  321. struct pci_dev *pdev = to_pci_dev(dev);
  322. struct pci_bus *subordinate = pdev->subordinate;
  323. return sysfs_emit(buf, "%u\n", subordinate ?
  324. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  325. : !pdev->no_msi);
  326. }
  327. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  328. const char *buf, size_t count)
  329. {
  330. struct pci_dev *pdev = to_pci_dev(dev);
  331. struct pci_bus *subordinate = pdev->subordinate;
  332. unsigned long val;
  333. if (!capable(CAP_SYS_ADMIN))
  334. return -EPERM;
  335. if (kstrtoul(buf, 0, &val) < 0)
  336. return -EINVAL;
  337. /*
  338. * "no_msi" and "bus_flags" only affect what happens when a driver
  339. * requests MSI or MSI-X. They don't affect any drivers that have
  340. * already requested MSI or MSI-X.
  341. */
  342. if (!subordinate) {
  343. pdev->no_msi = !val;
  344. pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
  345. val ? "allowed" : "disallowed");
  346. return count;
  347. }
  348. if (val)
  349. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  350. else
  351. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  352. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  353. val ? "allowed" : "disallowed");
  354. return count;
  355. }
  356. static DEVICE_ATTR_RW(msi_bus);
  357. static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
  358. {
  359. unsigned long val;
  360. struct pci_bus *b = NULL;
  361. if (kstrtoul(buf, 0, &val) < 0)
  362. return -EINVAL;
  363. if (val) {
  364. pci_lock_rescan_remove();
  365. while ((b = pci_find_next_bus(b)) != NULL)
  366. pci_rescan_bus(b);
  367. pci_unlock_rescan_remove();
  368. }
  369. return count;
  370. }
  371. static BUS_ATTR_WO(rescan);
  372. static struct attribute *pci_bus_attrs[] = {
  373. &bus_attr_rescan.attr,
  374. NULL,
  375. };
  376. static const struct attribute_group pci_bus_group = {
  377. .attrs = pci_bus_attrs,
  378. };
  379. const struct attribute_group *pci_bus_groups[] = {
  380. &pci_bus_group,
  381. NULL,
  382. };
  383. static ssize_t dev_rescan_store(struct device *dev,
  384. struct device_attribute *attr, const char *buf,
  385. size_t count)
  386. {
  387. unsigned long val;
  388. struct pci_dev *pdev = to_pci_dev(dev);
  389. if (kstrtoul(buf, 0, &val) < 0)
  390. return -EINVAL;
  391. if (val) {
  392. pci_lock_rescan_remove();
  393. pci_rescan_bus(pdev->bus);
  394. pci_unlock_rescan_remove();
  395. }
  396. return count;
  397. }
  398. static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
  399. dev_rescan_store);
  400. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  401. const char *buf, size_t count)
  402. {
  403. unsigned long val;
  404. if (kstrtoul(buf, 0, &val) < 0)
  405. return -EINVAL;
  406. if (val && device_remove_file_self(dev, attr))
  407. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  408. return count;
  409. }
  410. static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
  411. remove_store);
  412. static ssize_t bus_rescan_store(struct device *dev,
  413. struct device_attribute *attr,
  414. const char *buf, size_t count)
  415. {
  416. unsigned long val;
  417. struct pci_bus *bus = to_pci_bus(dev);
  418. if (kstrtoul(buf, 0, &val) < 0)
  419. return -EINVAL;
  420. if (val) {
  421. pci_lock_rescan_remove();
  422. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  423. pci_rescan_bus_bridge_resize(bus->self);
  424. else
  425. pci_rescan_bus(bus);
  426. pci_unlock_rescan_remove();
  427. }
  428. return count;
  429. }
  430. static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
  431. bus_rescan_store);
  432. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  433. static ssize_t d3cold_allowed_store(struct device *dev,
  434. struct device_attribute *attr,
  435. const char *buf, size_t count)
  436. {
  437. struct pci_dev *pdev = to_pci_dev(dev);
  438. unsigned long val;
  439. if (kstrtoul(buf, 0, &val) < 0)
  440. return -EINVAL;
  441. pdev->d3cold_allowed = !!val;
  442. pci_bridge_d3_update(pdev);
  443. pm_runtime_resume(dev);
  444. return count;
  445. }
  446. static ssize_t d3cold_allowed_show(struct device *dev,
  447. struct device_attribute *attr, char *buf)
  448. {
  449. struct pci_dev *pdev = to_pci_dev(dev);
  450. return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
  451. }
  452. static DEVICE_ATTR_RW(d3cold_allowed);
  453. #endif
  454. #ifdef CONFIG_OF
  455. static ssize_t devspec_show(struct device *dev,
  456. struct device_attribute *attr, char *buf)
  457. {
  458. struct pci_dev *pdev = to_pci_dev(dev);
  459. struct device_node *np = pci_device_to_OF_node(pdev);
  460. if (np == NULL)
  461. return 0;
  462. return sysfs_emit(buf, "%pOF\n", np);
  463. }
  464. static DEVICE_ATTR_RO(devspec);
  465. #endif
  466. static ssize_t driver_override_store(struct device *dev,
  467. struct device_attribute *attr,
  468. const char *buf, size_t count)
  469. {
  470. struct pci_dev *pdev = to_pci_dev(dev);
  471. int ret;
  472. ret = driver_set_override(dev, &pdev->driver_override, buf, count);
  473. if (ret)
  474. return ret;
  475. return count;
  476. }
  477. static ssize_t driver_override_show(struct device *dev,
  478. struct device_attribute *attr, char *buf)
  479. {
  480. struct pci_dev *pdev = to_pci_dev(dev);
  481. ssize_t len;
  482. device_lock(dev);
  483. len = sysfs_emit(buf, "%s\n", pdev->driver_override);
  484. device_unlock(dev);
  485. return len;
  486. }
  487. static DEVICE_ATTR_RW(driver_override);
  488. static struct attribute *pci_dev_attrs[] = {
  489. &dev_attr_power_state.attr,
  490. &dev_attr_resource.attr,
  491. &dev_attr_vendor.attr,
  492. &dev_attr_device.attr,
  493. &dev_attr_subsystem_vendor.attr,
  494. &dev_attr_subsystem_device.attr,
  495. &dev_attr_revision.attr,
  496. &dev_attr_class.attr,
  497. &dev_attr_irq.attr,
  498. &dev_attr_local_cpus.attr,
  499. &dev_attr_local_cpulist.attr,
  500. &dev_attr_modalias.attr,
  501. #ifdef CONFIG_NUMA
  502. &dev_attr_numa_node.attr,
  503. #endif
  504. &dev_attr_dma_mask_bits.attr,
  505. &dev_attr_consistent_dma_mask_bits.attr,
  506. &dev_attr_enable.attr,
  507. &dev_attr_broken_parity_status.attr,
  508. &dev_attr_msi_bus.attr,
  509. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  510. &dev_attr_d3cold_allowed.attr,
  511. #endif
  512. #ifdef CONFIG_OF
  513. &dev_attr_devspec.attr,
  514. #endif
  515. &dev_attr_driver_override.attr,
  516. &dev_attr_ari_enabled.attr,
  517. NULL,
  518. };
  519. static struct attribute *pci_bridge_attrs[] = {
  520. &dev_attr_subordinate_bus_number.attr,
  521. &dev_attr_secondary_bus_number.attr,
  522. NULL,
  523. };
  524. static struct attribute *pcie_dev_attrs[] = {
  525. &dev_attr_current_link_speed.attr,
  526. &dev_attr_current_link_width.attr,
  527. &dev_attr_max_link_width.attr,
  528. &dev_attr_max_link_speed.attr,
  529. NULL,
  530. };
  531. static struct attribute *pcibus_attrs[] = {
  532. &dev_attr_bus_rescan.attr,
  533. &dev_attr_cpuaffinity.attr,
  534. &dev_attr_cpulistaffinity.attr,
  535. NULL,
  536. };
  537. static const struct attribute_group pcibus_group = {
  538. .attrs = pcibus_attrs,
  539. };
  540. const struct attribute_group *pcibus_groups[] = {
  541. &pcibus_group,
  542. NULL,
  543. };
  544. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  545. char *buf)
  546. {
  547. struct pci_dev *pdev = to_pci_dev(dev);
  548. struct pci_dev *vga_dev = vga_default_device();
  549. if (vga_dev)
  550. return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
  551. return sysfs_emit(buf, "%u\n",
  552. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  553. IORESOURCE_ROM_SHADOW));
  554. }
  555. static DEVICE_ATTR_RO(boot_vga);
  556. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  557. struct bin_attribute *bin_attr, char *buf,
  558. loff_t off, size_t count)
  559. {
  560. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  561. unsigned int size = 64;
  562. loff_t init_off = off;
  563. u8 *data = (u8 *) buf;
  564. /* Several chips lock up trying to read undefined config space */
  565. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  566. size = dev->cfg_size;
  567. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  568. size = 128;
  569. if (off > size)
  570. return 0;
  571. if (off + count > size) {
  572. size -= off;
  573. count = size;
  574. } else {
  575. size = count;
  576. }
  577. pci_config_pm_runtime_get(dev);
  578. if ((off & 1) && size) {
  579. u8 val;
  580. pci_user_read_config_byte(dev, off, &val);
  581. data[off - init_off] = val;
  582. off++;
  583. size--;
  584. }
  585. if ((off & 3) && size > 2) {
  586. u16 val;
  587. pci_user_read_config_word(dev, off, &val);
  588. data[off - init_off] = val & 0xff;
  589. data[off - init_off + 1] = (val >> 8) & 0xff;
  590. off += 2;
  591. size -= 2;
  592. }
  593. while (size > 3) {
  594. u32 val;
  595. pci_user_read_config_dword(dev, off, &val);
  596. data[off - init_off] = val & 0xff;
  597. data[off - init_off + 1] = (val >> 8) & 0xff;
  598. data[off - init_off + 2] = (val >> 16) & 0xff;
  599. data[off - init_off + 3] = (val >> 24) & 0xff;
  600. off += 4;
  601. size -= 4;
  602. cond_resched();
  603. }
  604. if (size >= 2) {
  605. u16 val;
  606. pci_user_read_config_word(dev, off, &val);
  607. data[off - init_off] = val & 0xff;
  608. data[off - init_off + 1] = (val >> 8) & 0xff;
  609. off += 2;
  610. size -= 2;
  611. }
  612. if (size > 0) {
  613. u8 val;
  614. pci_user_read_config_byte(dev, off, &val);
  615. data[off - init_off] = val;
  616. }
  617. pci_config_pm_runtime_put(dev);
  618. return count;
  619. }
  620. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  621. struct bin_attribute *bin_attr, char *buf,
  622. loff_t off, size_t count)
  623. {
  624. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  625. unsigned int size = count;
  626. loff_t init_off = off;
  627. u8 *data = (u8 *) buf;
  628. int ret;
  629. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  630. if (ret)
  631. return ret;
  632. if (off > dev->cfg_size)
  633. return 0;
  634. if (off + count > dev->cfg_size) {
  635. size = dev->cfg_size - off;
  636. count = size;
  637. }
  638. pci_config_pm_runtime_get(dev);
  639. if ((off & 1) && size) {
  640. pci_user_write_config_byte(dev, off, data[off - init_off]);
  641. off++;
  642. size--;
  643. }
  644. if ((off & 3) && size > 2) {
  645. u16 val = data[off - init_off];
  646. val |= (u16) data[off - init_off + 1] << 8;
  647. pci_user_write_config_word(dev, off, val);
  648. off += 2;
  649. size -= 2;
  650. }
  651. while (size > 3) {
  652. u32 val = data[off - init_off];
  653. val |= (u32) data[off - init_off + 1] << 8;
  654. val |= (u32) data[off - init_off + 2] << 16;
  655. val |= (u32) data[off - init_off + 3] << 24;
  656. pci_user_write_config_dword(dev, off, val);
  657. off += 4;
  658. size -= 4;
  659. }
  660. if (size >= 2) {
  661. u16 val = data[off - init_off];
  662. val |= (u16) data[off - init_off + 1] << 8;
  663. pci_user_write_config_word(dev, off, val);
  664. off += 2;
  665. size -= 2;
  666. }
  667. if (size)
  668. pci_user_write_config_byte(dev, off, data[off - init_off]);
  669. pci_config_pm_runtime_put(dev);
  670. return count;
  671. }
  672. static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
  673. static struct bin_attribute *pci_dev_config_attrs[] = {
  674. &bin_attr_config,
  675. NULL,
  676. };
  677. static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj,
  678. struct bin_attribute *a, int n)
  679. {
  680. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  681. a->size = PCI_CFG_SPACE_SIZE;
  682. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  683. a->size = PCI_CFG_SPACE_EXP_SIZE;
  684. return a->attr.mode;
  685. }
  686. static const struct attribute_group pci_dev_config_attr_group = {
  687. .bin_attrs = pci_dev_config_attrs,
  688. .is_bin_visible = pci_dev_config_attr_is_visible,
  689. };
  690. #ifdef HAVE_PCI_LEGACY
  691. /**
  692. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  693. * @filp: open sysfs file
  694. * @kobj: kobject corresponding to file to read from
  695. * @bin_attr: struct bin_attribute for this file
  696. * @buf: buffer to store results
  697. * @off: offset into legacy I/O port space
  698. * @count: number of bytes to read
  699. *
  700. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  701. * callback routine (pci_legacy_read).
  702. */
  703. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  704. struct bin_attribute *bin_attr, char *buf,
  705. loff_t off, size_t count)
  706. {
  707. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  708. /* Only support 1, 2 or 4 byte accesses */
  709. if (count != 1 && count != 2 && count != 4)
  710. return -EINVAL;
  711. return pci_legacy_read(bus, off, (u32 *)buf, count);
  712. }
  713. /**
  714. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  715. * @filp: open sysfs file
  716. * @kobj: kobject corresponding to file to read from
  717. * @bin_attr: struct bin_attribute for this file
  718. * @buf: buffer containing value to be written
  719. * @off: offset into legacy I/O port space
  720. * @count: number of bytes to write
  721. *
  722. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  723. * callback routine (pci_legacy_write).
  724. */
  725. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  726. struct bin_attribute *bin_attr, char *buf,
  727. loff_t off, size_t count)
  728. {
  729. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  730. /* Only support 1, 2 or 4 byte accesses */
  731. if (count != 1 && count != 2 && count != 4)
  732. return -EINVAL;
  733. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  734. }
  735. /**
  736. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  737. * @filp: open sysfs file
  738. * @kobj: kobject corresponding to device to be mapped
  739. * @attr: struct bin_attribute for this file
  740. * @vma: struct vm_area_struct passed to mmap
  741. *
  742. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  743. * legacy memory space (first meg of bus space) into application virtual
  744. * memory space.
  745. */
  746. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  747. struct bin_attribute *attr,
  748. struct vm_area_struct *vma)
  749. {
  750. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  751. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  752. }
  753. /**
  754. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  755. * @filp: open sysfs file
  756. * @kobj: kobject corresponding to device to be mapped
  757. * @attr: struct bin_attribute for this file
  758. * @vma: struct vm_area_struct passed to mmap
  759. *
  760. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  761. * legacy IO space (first meg of bus space) into application virtual
  762. * memory space. Returns -ENOSYS if the operation isn't supported
  763. */
  764. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  765. struct bin_attribute *attr,
  766. struct vm_area_struct *vma)
  767. {
  768. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  769. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  770. }
  771. /**
  772. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  773. * @b: bus to create files under
  774. * @mmap_type: I/O port or memory
  775. *
  776. * Stub implementation. Can be overridden by arch if necessary.
  777. */
  778. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  779. enum pci_mmap_state mmap_type)
  780. {
  781. }
  782. /**
  783. * pci_create_legacy_files - create legacy I/O port and memory files
  784. * @b: bus to create files under
  785. *
  786. * Some platforms allow access to legacy I/O port and ISA memory space on
  787. * a per-bus basis. This routine creates the files and ties them into
  788. * their associated read, write and mmap files from pci-sysfs.c
  789. *
  790. * On error unwind, but don't propagate the error to the caller
  791. * as it is ok to set up the PCI bus without these files.
  792. */
  793. void pci_create_legacy_files(struct pci_bus *b)
  794. {
  795. int error;
  796. if (!sysfs_initialized)
  797. return;
  798. b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
  799. GFP_ATOMIC);
  800. if (!b->legacy_io)
  801. goto kzalloc_err;
  802. sysfs_bin_attr_init(b->legacy_io);
  803. b->legacy_io->attr.name = "legacy_io";
  804. b->legacy_io->size = 0xffff;
  805. b->legacy_io->attr.mode = 0600;
  806. b->legacy_io->read = pci_read_legacy_io;
  807. b->legacy_io->write = pci_write_legacy_io;
  808. b->legacy_io->mmap = pci_mmap_legacy_io;
  809. b->legacy_io->f_mapping = iomem_get_mapping;
  810. pci_adjust_legacy_attr(b, pci_mmap_io);
  811. error = device_create_bin_file(&b->dev, b->legacy_io);
  812. if (error)
  813. goto legacy_io_err;
  814. /* Allocated above after the legacy_io struct */
  815. b->legacy_mem = b->legacy_io + 1;
  816. sysfs_bin_attr_init(b->legacy_mem);
  817. b->legacy_mem->attr.name = "legacy_mem";
  818. b->legacy_mem->size = 1024*1024;
  819. b->legacy_mem->attr.mode = 0600;
  820. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  821. b->legacy_mem->f_mapping = iomem_get_mapping;
  822. pci_adjust_legacy_attr(b, pci_mmap_mem);
  823. error = device_create_bin_file(&b->dev, b->legacy_mem);
  824. if (error)
  825. goto legacy_mem_err;
  826. return;
  827. legacy_mem_err:
  828. device_remove_bin_file(&b->dev, b->legacy_io);
  829. legacy_io_err:
  830. kfree(b->legacy_io);
  831. b->legacy_io = NULL;
  832. kzalloc_err:
  833. dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
  834. }
  835. void pci_remove_legacy_files(struct pci_bus *b)
  836. {
  837. if (b->legacy_io) {
  838. device_remove_bin_file(&b->dev, b->legacy_io);
  839. device_remove_bin_file(&b->dev, b->legacy_mem);
  840. kfree(b->legacy_io); /* both are allocated here */
  841. }
  842. }
  843. #endif /* HAVE_PCI_LEGACY */
  844. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  845. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  846. enum pci_mmap_api mmap_api)
  847. {
  848. unsigned long nr, start, size;
  849. resource_size_t pci_start = 0, pci_end;
  850. if (pci_resource_len(pdev, resno) == 0)
  851. return 0;
  852. nr = vma_pages(vma);
  853. start = vma->vm_pgoff;
  854. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  855. if (mmap_api == PCI_MMAP_PROCFS) {
  856. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  857. &pci_start, &pci_end);
  858. pci_start >>= PAGE_SHIFT;
  859. }
  860. if (start >= pci_start && start < pci_start + size &&
  861. start + nr <= pci_start + size)
  862. return 1;
  863. return 0;
  864. }
  865. /**
  866. * pci_mmap_resource - map a PCI resource into user memory space
  867. * @kobj: kobject for mapping
  868. * @attr: struct bin_attribute for the file being mapped
  869. * @vma: struct vm_area_struct passed into the mmap
  870. * @write_combine: 1 for write_combine mapping
  871. *
  872. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  873. */
  874. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  875. struct vm_area_struct *vma, int write_combine)
  876. {
  877. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  878. int bar = (unsigned long)attr->private;
  879. enum pci_mmap_state mmap_type;
  880. struct resource *res = &pdev->resource[bar];
  881. int ret;
  882. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  883. if (ret)
  884. return ret;
  885. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  886. return -EINVAL;
  887. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
  888. return -EINVAL;
  889. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  890. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  891. }
  892. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  893. struct bin_attribute *attr,
  894. struct vm_area_struct *vma)
  895. {
  896. return pci_mmap_resource(kobj, attr, vma, 0);
  897. }
  898. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  899. struct bin_attribute *attr,
  900. struct vm_area_struct *vma)
  901. {
  902. return pci_mmap_resource(kobj, attr, vma, 1);
  903. }
  904. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  905. struct bin_attribute *attr, char *buf,
  906. loff_t off, size_t count, bool write)
  907. {
  908. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  909. int bar = (unsigned long)attr->private;
  910. unsigned long port = off;
  911. port += pci_resource_start(pdev, bar);
  912. if (port > pci_resource_end(pdev, bar))
  913. return 0;
  914. if (port + count - 1 > pci_resource_end(pdev, bar))
  915. return -EINVAL;
  916. switch (count) {
  917. case 1:
  918. if (write)
  919. outb(*(u8 *)buf, port);
  920. else
  921. *(u8 *)buf = inb(port);
  922. return 1;
  923. case 2:
  924. if (write)
  925. outw(*(u16 *)buf, port);
  926. else
  927. *(u16 *)buf = inw(port);
  928. return 2;
  929. case 4:
  930. if (write)
  931. outl(*(u32 *)buf, port);
  932. else
  933. *(u32 *)buf = inl(port);
  934. return 4;
  935. }
  936. return -EINVAL;
  937. }
  938. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  939. struct bin_attribute *attr, char *buf,
  940. loff_t off, size_t count)
  941. {
  942. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  943. }
  944. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  945. struct bin_attribute *attr, char *buf,
  946. loff_t off, size_t count)
  947. {
  948. int ret;
  949. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  950. if (ret)
  951. return ret;
  952. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  953. }
  954. /**
  955. * pci_remove_resource_files - cleanup resource files
  956. * @pdev: dev to cleanup
  957. *
  958. * If we created resource files for @pdev, remove them from sysfs and
  959. * free their resources.
  960. */
  961. static void pci_remove_resource_files(struct pci_dev *pdev)
  962. {
  963. int i;
  964. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  965. struct bin_attribute *res_attr;
  966. res_attr = pdev->res_attr[i];
  967. if (res_attr) {
  968. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  969. kfree(res_attr);
  970. }
  971. res_attr = pdev->res_attr_wc[i];
  972. if (res_attr) {
  973. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  974. kfree(res_attr);
  975. }
  976. }
  977. }
  978. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  979. {
  980. /* allocate attribute structure, piggyback attribute name */
  981. int name_len = write_combine ? 13 : 10;
  982. struct bin_attribute *res_attr;
  983. char *res_attr_name;
  984. int retval;
  985. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  986. if (!res_attr)
  987. return -ENOMEM;
  988. res_attr_name = (char *)(res_attr + 1);
  989. sysfs_bin_attr_init(res_attr);
  990. if (write_combine) {
  991. sprintf(res_attr_name, "resource%d_wc", num);
  992. res_attr->mmap = pci_mmap_resource_wc;
  993. } else {
  994. sprintf(res_attr_name, "resource%d", num);
  995. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  996. res_attr->read = pci_read_resource_io;
  997. res_attr->write = pci_write_resource_io;
  998. if (arch_can_pci_mmap_io())
  999. res_attr->mmap = pci_mmap_resource_uc;
  1000. } else {
  1001. res_attr->mmap = pci_mmap_resource_uc;
  1002. }
  1003. }
  1004. if (res_attr->mmap)
  1005. res_attr->f_mapping = iomem_get_mapping;
  1006. res_attr->attr.name = res_attr_name;
  1007. res_attr->attr.mode = 0600;
  1008. res_attr->size = pci_resource_len(pdev, num);
  1009. res_attr->private = (void *)(unsigned long)num;
  1010. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1011. if (retval) {
  1012. kfree(res_attr);
  1013. return retval;
  1014. }
  1015. if (write_combine)
  1016. pdev->res_attr_wc[num] = res_attr;
  1017. else
  1018. pdev->res_attr[num] = res_attr;
  1019. return 0;
  1020. }
  1021. /**
  1022. * pci_create_resource_files - create resource files in sysfs for @dev
  1023. * @pdev: dev in question
  1024. *
  1025. * Walk the resources in @pdev creating files for each resource available.
  1026. */
  1027. static int pci_create_resource_files(struct pci_dev *pdev)
  1028. {
  1029. int i;
  1030. int retval;
  1031. /* Expose the PCI resources from this device as files */
  1032. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  1033. /* skip empty resources */
  1034. if (!pci_resource_len(pdev, i))
  1035. continue;
  1036. retval = pci_create_attr(pdev, i, 0);
  1037. /* for prefetchable resources, create a WC mappable file */
  1038. if (!retval && arch_can_pci_mmap_wc() &&
  1039. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1040. retval = pci_create_attr(pdev, i, 1);
  1041. if (retval) {
  1042. pci_remove_resource_files(pdev);
  1043. return retval;
  1044. }
  1045. }
  1046. return 0;
  1047. }
  1048. #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
  1049. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1050. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1051. #endif
  1052. /**
  1053. * pci_write_rom - used to enable access to the PCI ROM display
  1054. * @filp: sysfs file
  1055. * @kobj: kernel object handle
  1056. * @bin_attr: struct bin_attribute for this file
  1057. * @buf: user input
  1058. * @off: file offset
  1059. * @count: number of byte in input
  1060. *
  1061. * writing anything except 0 enables it
  1062. */
  1063. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1064. struct bin_attribute *bin_attr, char *buf,
  1065. loff_t off, size_t count)
  1066. {
  1067. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1068. if ((off == 0) && (*buf == '0') && (count == 2))
  1069. pdev->rom_attr_enabled = 0;
  1070. else
  1071. pdev->rom_attr_enabled = 1;
  1072. return count;
  1073. }
  1074. /**
  1075. * pci_read_rom - read a PCI ROM
  1076. * @filp: sysfs file
  1077. * @kobj: kernel object handle
  1078. * @bin_attr: struct bin_attribute for this file
  1079. * @buf: where to put the data we read from the ROM
  1080. * @off: file offset
  1081. * @count: number of bytes to read
  1082. *
  1083. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1084. * device corresponding to @kobj.
  1085. */
  1086. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1087. struct bin_attribute *bin_attr, char *buf,
  1088. loff_t off, size_t count)
  1089. {
  1090. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1091. void __iomem *rom;
  1092. size_t size;
  1093. if (!pdev->rom_attr_enabled)
  1094. return -EINVAL;
  1095. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1096. if (!rom || !size)
  1097. return -EIO;
  1098. if (off >= size)
  1099. count = 0;
  1100. else {
  1101. if (off + count > size)
  1102. count = size - off;
  1103. memcpy_fromio(buf, rom + off, count);
  1104. }
  1105. pci_unmap_rom(pdev, rom);
  1106. return count;
  1107. }
  1108. static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
  1109. static struct bin_attribute *pci_dev_rom_attrs[] = {
  1110. &bin_attr_rom,
  1111. NULL,
  1112. };
  1113. static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
  1114. struct bin_attribute *a, int n)
  1115. {
  1116. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1117. size_t rom_size;
  1118. /* If the device has a ROM, try to expose it in sysfs. */
  1119. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1120. if (!rom_size)
  1121. return 0;
  1122. a->size = rom_size;
  1123. return a->attr.mode;
  1124. }
  1125. static const struct attribute_group pci_dev_rom_attr_group = {
  1126. .bin_attrs = pci_dev_rom_attrs,
  1127. .is_bin_visible = pci_dev_rom_attr_is_visible,
  1128. };
  1129. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1130. const char *buf, size_t count)
  1131. {
  1132. struct pci_dev *pdev = to_pci_dev(dev);
  1133. unsigned long val;
  1134. ssize_t result;
  1135. if (kstrtoul(buf, 0, &val) < 0)
  1136. return -EINVAL;
  1137. if (val != 1)
  1138. return -EINVAL;
  1139. pm_runtime_get_sync(dev);
  1140. result = pci_reset_function(pdev);
  1141. pm_runtime_put(dev);
  1142. if (result < 0)
  1143. return result;
  1144. return count;
  1145. }
  1146. static DEVICE_ATTR_WO(reset);
  1147. static struct attribute *pci_dev_reset_attrs[] = {
  1148. &dev_attr_reset.attr,
  1149. NULL,
  1150. };
  1151. static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
  1152. struct attribute *a, int n)
  1153. {
  1154. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1155. if (!pci_reset_supported(pdev))
  1156. return 0;
  1157. return a->mode;
  1158. }
  1159. static const struct attribute_group pci_dev_reset_attr_group = {
  1160. .attrs = pci_dev_reset_attrs,
  1161. .is_visible = pci_dev_reset_attr_is_visible,
  1162. };
  1163. #define pci_dev_resource_resize_attr(n) \
  1164. static ssize_t resource##n##_resize_show(struct device *dev, \
  1165. struct device_attribute *attr, \
  1166. char * buf) \
  1167. { \
  1168. struct pci_dev *pdev = to_pci_dev(dev); \
  1169. ssize_t ret; \
  1170. \
  1171. pci_config_pm_runtime_get(pdev); \
  1172. \
  1173. ret = sysfs_emit(buf, "%016llx\n", \
  1174. (u64)pci_rebar_get_possible_sizes(pdev, n)); \
  1175. \
  1176. pci_config_pm_runtime_put(pdev); \
  1177. \
  1178. return ret; \
  1179. } \
  1180. \
  1181. static ssize_t resource##n##_resize_store(struct device *dev, \
  1182. struct device_attribute *attr,\
  1183. const char *buf, size_t count)\
  1184. { \
  1185. struct pci_dev *pdev = to_pci_dev(dev); \
  1186. unsigned long size, flags; \
  1187. int ret, i; \
  1188. u16 cmd; \
  1189. \
  1190. if (kstrtoul(buf, 0, &size) < 0) \
  1191. return -EINVAL; \
  1192. \
  1193. device_lock(dev); \
  1194. if (dev->driver) { \
  1195. ret = -EBUSY; \
  1196. goto unlock; \
  1197. } \
  1198. \
  1199. pci_config_pm_runtime_get(pdev); \
  1200. \
  1201. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { \
  1202. ret = aperture_remove_conflicting_pci_devices(pdev, \
  1203. "resourceN_resize"); \
  1204. if (ret) \
  1205. goto pm_put; \
  1206. } \
  1207. \
  1208. pci_read_config_word(pdev, PCI_COMMAND, &cmd); \
  1209. pci_write_config_word(pdev, PCI_COMMAND, \
  1210. cmd & ~PCI_COMMAND_MEMORY); \
  1211. \
  1212. flags = pci_resource_flags(pdev, n); \
  1213. \
  1214. pci_remove_resource_files(pdev); \
  1215. \
  1216. for (i = 0; i < PCI_STD_NUM_BARS; i++) { \
  1217. if (pci_resource_len(pdev, i) && \
  1218. pci_resource_flags(pdev, i) == flags) \
  1219. pci_release_resource(pdev, i); \
  1220. } \
  1221. \
  1222. ret = pci_resize_resource(pdev, n, size); \
  1223. \
  1224. pci_assign_unassigned_bus_resources(pdev->bus); \
  1225. \
  1226. if (pci_create_resource_files(pdev)) \
  1227. pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");\
  1228. \
  1229. pci_write_config_word(pdev, PCI_COMMAND, cmd); \
  1230. pm_put: \
  1231. pci_config_pm_runtime_put(pdev); \
  1232. unlock: \
  1233. device_unlock(dev); \
  1234. \
  1235. return ret ? ret : count; \
  1236. } \
  1237. static DEVICE_ATTR_RW(resource##n##_resize)
  1238. pci_dev_resource_resize_attr(0);
  1239. pci_dev_resource_resize_attr(1);
  1240. pci_dev_resource_resize_attr(2);
  1241. pci_dev_resource_resize_attr(3);
  1242. pci_dev_resource_resize_attr(4);
  1243. pci_dev_resource_resize_attr(5);
  1244. static struct attribute *resource_resize_attrs[] = {
  1245. &dev_attr_resource0_resize.attr,
  1246. &dev_attr_resource1_resize.attr,
  1247. &dev_attr_resource2_resize.attr,
  1248. &dev_attr_resource3_resize.attr,
  1249. &dev_attr_resource4_resize.attr,
  1250. &dev_attr_resource5_resize.attr,
  1251. NULL,
  1252. };
  1253. static umode_t resource_resize_is_visible(struct kobject *kobj,
  1254. struct attribute *a, int n)
  1255. {
  1256. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1257. return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
  1258. }
  1259. static const struct attribute_group pci_dev_resource_resize_group = {
  1260. .attrs = resource_resize_attrs,
  1261. .is_visible = resource_resize_is_visible,
  1262. };
  1263. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1264. {
  1265. if (!sysfs_initialized)
  1266. return -EACCES;
  1267. return pci_create_resource_files(pdev);
  1268. }
  1269. /**
  1270. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1271. * @pdev: device whose entries we should free
  1272. *
  1273. * Cleanup when @pdev is removed from sysfs.
  1274. */
  1275. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1276. {
  1277. if (!sysfs_initialized)
  1278. return;
  1279. pci_remove_resource_files(pdev);
  1280. }
  1281. static int __init pci_sysfs_init(void)
  1282. {
  1283. struct pci_dev *pdev = NULL;
  1284. struct pci_bus *pbus = NULL;
  1285. int retval;
  1286. sysfs_initialized = 1;
  1287. for_each_pci_dev(pdev) {
  1288. retval = pci_create_sysfs_dev_files(pdev);
  1289. if (retval) {
  1290. pci_dev_put(pdev);
  1291. return retval;
  1292. }
  1293. }
  1294. while ((pbus = pci_find_next_bus(pbus)))
  1295. pci_create_legacy_files(pbus);
  1296. return 0;
  1297. }
  1298. late_initcall(pci_sysfs_init);
  1299. static struct attribute *pci_dev_dev_attrs[] = {
  1300. &dev_attr_boot_vga.attr,
  1301. NULL,
  1302. };
  1303. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1304. struct attribute *a, int n)
  1305. {
  1306. struct device *dev = kobj_to_dev(kobj);
  1307. struct pci_dev *pdev = to_pci_dev(dev);
  1308. if (a == &dev_attr_boot_vga.attr)
  1309. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1310. return 0;
  1311. return a->mode;
  1312. }
  1313. static struct attribute *pci_dev_hp_attrs[] = {
  1314. &dev_attr_remove.attr,
  1315. &dev_attr_dev_rescan.attr,
  1316. NULL,
  1317. };
  1318. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1319. struct attribute *a, int n)
  1320. {
  1321. struct device *dev = kobj_to_dev(kobj);
  1322. struct pci_dev *pdev = to_pci_dev(dev);
  1323. if (pdev->is_virtfn)
  1324. return 0;
  1325. return a->mode;
  1326. }
  1327. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1328. struct attribute *a, int n)
  1329. {
  1330. struct device *dev = kobj_to_dev(kobj);
  1331. struct pci_dev *pdev = to_pci_dev(dev);
  1332. if (pci_is_bridge(pdev))
  1333. return a->mode;
  1334. return 0;
  1335. }
  1336. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1337. struct attribute *a, int n)
  1338. {
  1339. struct device *dev = kobj_to_dev(kobj);
  1340. struct pci_dev *pdev = to_pci_dev(dev);
  1341. if (pci_is_pcie(pdev))
  1342. return a->mode;
  1343. return 0;
  1344. }
  1345. static const struct attribute_group pci_dev_group = {
  1346. .attrs = pci_dev_attrs,
  1347. };
  1348. const struct attribute_group *pci_dev_groups[] = {
  1349. &pci_dev_group,
  1350. &pci_dev_config_attr_group,
  1351. &pci_dev_rom_attr_group,
  1352. &pci_dev_reset_attr_group,
  1353. &pci_dev_reset_method_attr_group,
  1354. &pci_dev_vpd_attr_group,
  1355. #ifdef CONFIG_DMI
  1356. &pci_dev_smbios_attr_group,
  1357. #endif
  1358. #ifdef CONFIG_ACPI
  1359. &pci_dev_acpi_attr_group,
  1360. #endif
  1361. &pci_dev_resource_resize_group,
  1362. NULL,
  1363. };
  1364. static const struct attribute_group pci_dev_hp_attr_group = {
  1365. .attrs = pci_dev_hp_attrs,
  1366. .is_visible = pci_dev_hp_attrs_are_visible,
  1367. };
  1368. static const struct attribute_group pci_dev_attr_group = {
  1369. .attrs = pci_dev_dev_attrs,
  1370. .is_visible = pci_dev_attrs_are_visible,
  1371. };
  1372. static const struct attribute_group pci_bridge_attr_group = {
  1373. .attrs = pci_bridge_attrs,
  1374. .is_visible = pci_bridge_attrs_are_visible,
  1375. };
  1376. static const struct attribute_group pcie_dev_attr_group = {
  1377. .attrs = pcie_dev_attrs,
  1378. .is_visible = pcie_dev_attrs_are_visible,
  1379. };
  1380. static const struct attribute_group *pci_dev_attr_groups[] = {
  1381. &pci_dev_attr_group,
  1382. &pci_dev_hp_attr_group,
  1383. #ifdef CONFIG_PCI_IOV
  1384. &sriov_pf_dev_attr_group,
  1385. &sriov_vf_dev_attr_group,
  1386. #endif
  1387. &pci_bridge_attr_group,
  1388. &pcie_dev_attr_group,
  1389. #ifdef CONFIG_PCIEAER
  1390. &aer_stats_attr_group,
  1391. #endif
  1392. #ifdef CONFIG_PCIEASPM
  1393. &aspm_ctrl_attr_group,
  1394. #endif
  1395. NULL,
  1396. };
  1397. const struct device_type pci_dev_type = {
  1398. .groups = pci_dev_attr_groups,
  1399. };