cpqphp.h 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Compaq Hot Plug Controller Driver
  4. *
  5. * Copyright (C) 1995,2001 Compaq Computer Corporation
  6. * Copyright (C) 2001 Greg Kroah-Hartman ([email protected])
  7. * Copyright (C) 2001 IBM
  8. *
  9. * All rights reserved.
  10. *
  11. * Send feedback to <[email protected]>
  12. *
  13. */
  14. #ifndef _CPQPHP_H
  15. #define _CPQPHP_H
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h> /* for read? and write? functions */
  18. #include <linux/delay.h> /* for delays */
  19. #include <linux/mutex.h>
  20. #include <linux/sched/signal.h> /* for signal_pending() */
  21. #define MY_NAME "cpqphp"
  22. #define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt, MY_NAME, ## arg); } while (0)
  23. #define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
  24. #define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
  25. #define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
  26. struct smbios_system_slot {
  27. u8 type;
  28. u8 length;
  29. u16 handle;
  30. u8 name_string_num;
  31. u8 slot_type;
  32. u8 slot_width;
  33. u8 slot_current_usage;
  34. u8 slot_length;
  35. u16 slot_number;
  36. u8 properties1;
  37. u8 properties2;
  38. } __attribute__ ((packed));
  39. /* offsets to the smbios generic type based on the above structure layout */
  40. enum smbios_system_slot_offsets {
  41. SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
  42. SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
  43. SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
  44. SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
  45. SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
  46. SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
  47. SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
  48. SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
  49. SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
  50. SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
  51. SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
  52. };
  53. struct smbios_generic {
  54. u8 type;
  55. u8 length;
  56. u16 handle;
  57. } __attribute__ ((packed));
  58. /* offsets to the smbios generic type based on the above structure layout */
  59. enum smbios_generic_offsets {
  60. SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
  61. SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
  62. SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
  63. };
  64. struct smbios_entry_point {
  65. char anchor[4];
  66. u8 ep_checksum;
  67. u8 ep_length;
  68. u8 major_version;
  69. u8 minor_version;
  70. u16 max_size_entry;
  71. u8 ep_rev;
  72. u8 reserved[5];
  73. char int_anchor[5];
  74. u8 int_checksum;
  75. u16 st_length;
  76. u32 st_address;
  77. u16 number_of_entrys;
  78. u8 bcd_rev;
  79. } __attribute__ ((packed));
  80. /* offsets to the smbios entry point based on the above structure layout */
  81. enum smbios_entry_point_offsets {
  82. ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
  83. EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
  84. EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
  85. MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
  86. MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
  87. MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
  88. EP_REV = offsetof(struct smbios_entry_point, ep_rev),
  89. INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
  90. INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
  91. ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
  92. ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
  93. NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
  94. BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
  95. };
  96. struct ctrl_reg { /* offset */
  97. u8 slot_RST; /* 0x00 */
  98. u8 slot_enable; /* 0x01 */
  99. u16 misc; /* 0x02 */
  100. u32 led_control; /* 0x04 */
  101. u32 int_input_clear; /* 0x08 */
  102. u32 int_mask; /* 0x0a */
  103. u8 reserved0; /* 0x10 */
  104. u8 reserved1; /* 0x11 */
  105. u8 reserved2; /* 0x12 */
  106. u8 gen_output_AB; /* 0x13 */
  107. u32 non_int_input; /* 0x14 */
  108. u32 reserved3; /* 0x18 */
  109. u32 reserved4; /* 0x1a */
  110. u32 reserved5; /* 0x20 */
  111. u8 reserved6; /* 0x24 */
  112. u8 reserved7; /* 0x25 */
  113. u16 reserved8; /* 0x26 */
  114. u8 slot_mask; /* 0x28 */
  115. u8 reserved9; /* 0x29 */
  116. u8 reserved10; /* 0x2a */
  117. u8 reserved11; /* 0x2b */
  118. u8 slot_SERR; /* 0x2c */
  119. u8 slot_power; /* 0x2d */
  120. u8 reserved12; /* 0x2e */
  121. u8 reserved13; /* 0x2f */
  122. u8 next_curr_freq; /* 0x30 */
  123. u8 reset_freq_mode; /* 0x31 */
  124. } __attribute__ ((packed));
  125. /* offsets to the controller registers based on the above structure layout */
  126. enum ctrl_offsets {
  127. SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
  128. SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
  129. MISC = offsetof(struct ctrl_reg, misc),
  130. LED_CONTROL = offsetof(struct ctrl_reg, led_control),
  131. INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
  132. INT_MASK = offsetof(struct ctrl_reg, int_mask),
  133. CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
  134. CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
  135. CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
  136. GEN_OUTPUT_AB = offsetof(struct ctrl_reg, gen_output_AB),
  137. NON_INT_INPUT = offsetof(struct ctrl_reg, non_int_input),
  138. CTRL_RESERVED3 = offsetof(struct ctrl_reg, reserved3),
  139. CTRL_RESERVED4 = offsetof(struct ctrl_reg, reserved4),
  140. CTRL_RESERVED5 = offsetof(struct ctrl_reg, reserved5),
  141. CTRL_RESERVED6 = offsetof(struct ctrl_reg, reserved6),
  142. CTRL_RESERVED7 = offsetof(struct ctrl_reg, reserved7),
  143. CTRL_RESERVED8 = offsetof(struct ctrl_reg, reserved8),
  144. SLOT_MASK = offsetof(struct ctrl_reg, slot_mask),
  145. CTRL_RESERVED9 = offsetof(struct ctrl_reg, reserved9),
  146. CTRL_RESERVED10 = offsetof(struct ctrl_reg, reserved10),
  147. CTRL_RESERVED11 = offsetof(struct ctrl_reg, reserved11),
  148. SLOT_SERR = offsetof(struct ctrl_reg, slot_SERR),
  149. SLOT_POWER = offsetof(struct ctrl_reg, slot_power),
  150. NEXT_CURR_FREQ = offsetof(struct ctrl_reg, next_curr_freq),
  151. RESET_FREQ_MODE = offsetof(struct ctrl_reg, reset_freq_mode),
  152. };
  153. struct hrt {
  154. char sig0;
  155. char sig1;
  156. char sig2;
  157. char sig3;
  158. u16 unused_IRQ;
  159. u16 PCIIRQ;
  160. u8 number_of_entries;
  161. u8 revision;
  162. u16 reserved1;
  163. u32 reserved2;
  164. } __attribute__ ((packed));
  165. /* offsets to the hotplug resource table registers based on the above
  166. * structure layout
  167. */
  168. enum hrt_offsets {
  169. SIG0 = offsetof(struct hrt, sig0),
  170. SIG1 = offsetof(struct hrt, sig1),
  171. SIG2 = offsetof(struct hrt, sig2),
  172. SIG3 = offsetof(struct hrt, sig3),
  173. UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
  174. PCIIRQ = offsetof(struct hrt, PCIIRQ),
  175. NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
  176. REVISION = offsetof(struct hrt, revision),
  177. HRT_RESERVED1 = offsetof(struct hrt, reserved1),
  178. HRT_RESERVED2 = offsetof(struct hrt, reserved2),
  179. };
  180. struct slot_rt {
  181. u8 dev_func;
  182. u8 primary_bus;
  183. u8 secondary_bus;
  184. u8 max_bus;
  185. u16 io_base;
  186. u16 io_length;
  187. u16 mem_base;
  188. u16 mem_length;
  189. u16 pre_mem_base;
  190. u16 pre_mem_length;
  191. } __attribute__ ((packed));
  192. /* offsets to the hotplug slot resource table registers based on the above
  193. * structure layout
  194. */
  195. enum slot_rt_offsets {
  196. DEV_FUNC = offsetof(struct slot_rt, dev_func),
  197. PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
  198. SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
  199. MAX_BUS = offsetof(struct slot_rt, max_bus),
  200. IO_BASE = offsetof(struct slot_rt, io_base),
  201. IO_LENGTH = offsetof(struct slot_rt, io_length),
  202. MEM_BASE = offsetof(struct slot_rt, mem_base),
  203. MEM_LENGTH = offsetof(struct slot_rt, mem_length),
  204. PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
  205. PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
  206. };
  207. struct pci_func {
  208. struct pci_func *next;
  209. u8 bus;
  210. u8 device;
  211. u8 function;
  212. u8 is_a_board;
  213. u16 status;
  214. u8 configured;
  215. u8 switch_save;
  216. u8 presence_save;
  217. u32 base_length[0x06];
  218. u8 base_type[0x06];
  219. u16 reserved2;
  220. u32 config_space[0x20];
  221. struct pci_resource *mem_head;
  222. struct pci_resource *p_mem_head;
  223. struct pci_resource *io_head;
  224. struct pci_resource *bus_head;
  225. struct timer_list *p_task_event;
  226. struct pci_dev *pci_dev;
  227. };
  228. struct slot {
  229. struct slot *next;
  230. u8 bus;
  231. u8 device;
  232. u8 number;
  233. u8 is_a_board;
  234. u8 configured;
  235. u8 state;
  236. u8 switch_save;
  237. u8 presence_save;
  238. u32 capabilities;
  239. u16 reserved2;
  240. struct timer_list task_event;
  241. u8 hp_slot;
  242. struct controller *ctrl;
  243. void __iomem *p_sm_slot;
  244. struct hotplug_slot hotplug_slot;
  245. };
  246. struct pci_resource {
  247. struct pci_resource *next;
  248. u32 base;
  249. u32 length;
  250. };
  251. struct event_info {
  252. u32 event_type;
  253. u8 hp_slot;
  254. };
  255. struct controller {
  256. struct controller *next;
  257. u32 ctrl_int_comp;
  258. struct mutex crit_sect; /* critical section mutex */
  259. void __iomem *hpc_reg; /* cookie for our pci controller location */
  260. struct pci_resource *mem_head;
  261. struct pci_resource *p_mem_head;
  262. struct pci_resource *io_head;
  263. struct pci_resource *bus_head;
  264. struct pci_dev *pci_dev;
  265. struct pci_bus *pci_bus;
  266. struct event_info event_queue[10];
  267. struct slot *slot;
  268. u8 next_event;
  269. u8 interrupt;
  270. u8 cfgspc_irq;
  271. u8 bus; /* bus number for the pci hotplug controller */
  272. u8 rev;
  273. u8 slot_device_offset;
  274. u8 first_slot;
  275. u8 add_support;
  276. u8 push_flag;
  277. u8 push_button; /* 0 = no pushbutton, 1 = pushbutton present */
  278. u8 slot_switch_type; /* 0 = no switch, 1 = switch present */
  279. u8 defeature_PHP; /* 0 = PHP not supported, 1 = PHP supported */
  280. u8 alternate_base_address; /* 0 = not supported, 1 = supported */
  281. u8 pci_config_space; /* Index/data access to working registers 0 = not supported, 1 = supported */
  282. u8 pcix_speed_capability; /* PCI-X */
  283. u8 pcix_support; /* PCI-X */
  284. u16 vendor_id;
  285. struct work_struct int_task_event;
  286. wait_queue_head_t queue; /* sleep & wake process */
  287. struct dentry *dentry; /* debugfs dentry */
  288. };
  289. struct irq_mapping {
  290. u8 barber_pole;
  291. u8 valid_INT;
  292. u8 interrupt[4];
  293. };
  294. struct resource_lists {
  295. struct pci_resource *mem_head;
  296. struct pci_resource *p_mem_head;
  297. struct pci_resource *io_head;
  298. struct pci_resource *bus_head;
  299. struct irq_mapping *irqs;
  300. };
  301. #define ROM_PHY_ADDR 0x0F0000
  302. #define ROM_PHY_LEN 0x00ffff
  303. #define PCI_HPC_ID 0xA0F7
  304. #define PCI_SUB_HPC_ID 0xA2F7
  305. #define PCI_SUB_HPC_ID2 0xA2F8
  306. #define PCI_SUB_HPC_ID3 0xA2F9
  307. #define PCI_SUB_HPC_ID_INTC 0xA2FA
  308. #define PCI_SUB_HPC_ID4 0xA2FD
  309. #define INT_BUTTON_IGNORE 0
  310. #define INT_PRESENCE_ON 1
  311. #define INT_PRESENCE_OFF 2
  312. #define INT_SWITCH_CLOSE 3
  313. #define INT_SWITCH_OPEN 4
  314. #define INT_POWER_FAULT 5
  315. #define INT_POWER_FAULT_CLEAR 6
  316. #define INT_BUTTON_PRESS 7
  317. #define INT_BUTTON_RELEASE 8
  318. #define INT_BUTTON_CANCEL 9
  319. #define STATIC_STATE 0
  320. #define BLINKINGON_STATE 1
  321. #define BLINKINGOFF_STATE 2
  322. #define POWERON_STATE 3
  323. #define POWEROFF_STATE 4
  324. #define PCISLOT_INTERLOCK_CLOSED 0x00000001
  325. #define PCISLOT_ADAPTER_PRESENT 0x00000002
  326. #define PCISLOT_POWERED 0x00000004
  327. #define PCISLOT_66_MHZ_OPERATION 0x00000008
  328. #define PCISLOT_64_BIT_OPERATION 0x00000010
  329. #define PCISLOT_REPLACE_SUPPORTED 0x00000020
  330. #define PCISLOT_ADD_SUPPORTED 0x00000040
  331. #define PCISLOT_INTERLOCK_SUPPORTED 0x00000080
  332. #define PCISLOT_66_MHZ_SUPPORTED 0x00000100
  333. #define PCISLOT_64_BIT_SUPPORTED 0x00000200
  334. #define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
  335. #define INTERLOCK_OPEN 0x00000002
  336. #define ADD_NOT_SUPPORTED 0x00000003
  337. #define CARD_FUNCTIONING 0x00000005
  338. #define ADAPTER_NOT_SAME 0x00000006
  339. #define NO_ADAPTER_PRESENT 0x00000009
  340. #define NOT_ENOUGH_RESOURCES 0x0000000B
  341. #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
  342. #define POWER_FAILURE 0x0000000E
  343. #define REMOVE_NOT_SUPPORTED 0x00000003
  344. /*
  345. * error Messages
  346. */
  347. #define msg_initialization_err "Initialization failure, error=%d\n"
  348. #define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
  349. #define msg_HPC_non_compaq_or_intel "The PCI hot plug controller is not supported by this driver.\n"
  350. #define msg_HPC_not_supported "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
  351. #define msg_unable_to_save "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
  352. #define msg_button_on "PCI slot #%d - powering on due to button press.\n"
  353. #define msg_button_off "PCI slot #%d - powering off due to button press.\n"
  354. #define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
  355. #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
  356. /* debugfs functions for the hotplug controller info */
  357. void cpqhp_initialize_debugfs(void);
  358. void cpqhp_shutdown_debugfs(void);
  359. void cpqhp_create_debugfs_files(struct controller *ctrl);
  360. void cpqhp_remove_debugfs_files(struct controller *ctrl);
  361. /* controller functions */
  362. void cpqhp_pushbutton_thread(struct timer_list *t);
  363. irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data);
  364. int cpqhp_find_available_resources(struct controller *ctrl,
  365. void __iomem *rom_start);
  366. int cpqhp_event_start_thread(void);
  367. void cpqhp_event_stop_thread(void);
  368. struct pci_func *cpqhp_slot_create(unsigned char busnumber);
  369. struct pci_func *cpqhp_slot_find(unsigned char bus, unsigned char device,
  370. unsigned char index);
  371. int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func);
  372. int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func);
  373. int cpqhp_hardware_test(struct controller *ctrl, int test_num);
  374. /* resource functions */
  375. int cpqhp_resource_sort_and_combine(struct pci_resource **head);
  376. /* pci functions */
  377. int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
  378. int cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num,
  379. u8 slot);
  380. int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug);
  381. int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func);
  382. int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func);
  383. int cpqhp_configure_board(struct controller *ctrl, struct pci_func *func);
  384. int cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot);
  385. int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func);
  386. void cpqhp_destroy_board_resources(struct pci_func *func);
  387. int cpqhp_return_board_resources(struct pci_func *func,
  388. struct resource_lists *resources);
  389. void cpqhp_destroy_resource_list(struct resource_lists *resources);
  390. int cpqhp_configure_device(struct controller *ctrl, struct pci_func *func);
  391. int cpqhp_unconfigure_device(struct pci_func *func);
  392. /* Global variables */
  393. extern int cpqhp_debug;
  394. extern int cpqhp_legacy_mode;
  395. extern struct controller *cpqhp_ctrl_list;
  396. extern struct pci_func *cpqhp_slot_list[256];
  397. extern struct irq_routing_table *cpqhp_routing_table;
  398. /* these can be gotten rid of, but for debugging they are purty */
  399. extern u8 cpqhp_nic_irq;
  400. extern u8 cpqhp_disk_irq;
  401. /* inline functions */
  402. static inline const char *slot_name(struct slot *slot)
  403. {
  404. return hotplug_slot_name(&slot->hotplug_slot);
  405. }
  406. static inline struct slot *to_slot(struct hotplug_slot *hotplug_slot)
  407. {
  408. return container_of(hotplug_slot, struct slot, hotplug_slot);
  409. }
  410. /*
  411. * return_resource
  412. *
  413. * Puts node back in the resource list pointed to by head
  414. */
  415. static inline void return_resource(struct pci_resource **head,
  416. struct pci_resource *node)
  417. {
  418. if (!node || !head)
  419. return;
  420. node->next = *head;
  421. *head = node;
  422. }
  423. static inline void set_SOGO(struct controller *ctrl)
  424. {
  425. u16 misc;
  426. misc = readw(ctrl->hpc_reg + MISC);
  427. misc = (misc | 0x0001) & 0xFFFB;
  428. writew(misc, ctrl->hpc_reg + MISC);
  429. }
  430. static inline void amber_LED_on(struct controller *ctrl, u8 slot)
  431. {
  432. u32 led_control;
  433. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  434. led_control |= (0x01010000L << slot);
  435. writel(led_control, ctrl->hpc_reg + LED_CONTROL);
  436. }
  437. static inline void amber_LED_off(struct controller *ctrl, u8 slot)
  438. {
  439. u32 led_control;
  440. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  441. led_control &= ~(0x01010000L << slot);
  442. writel(led_control, ctrl->hpc_reg + LED_CONTROL);
  443. }
  444. static inline int read_amber_LED(struct controller *ctrl, u8 slot)
  445. {
  446. u32 led_control;
  447. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  448. led_control &= (0x01010000L << slot);
  449. return led_control ? 1 : 0;
  450. }
  451. static inline void green_LED_on(struct controller *ctrl, u8 slot)
  452. {
  453. u32 led_control;
  454. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  455. led_control |= 0x0101L << slot;
  456. writel(led_control, ctrl->hpc_reg + LED_CONTROL);
  457. }
  458. static inline void green_LED_off(struct controller *ctrl, u8 slot)
  459. {
  460. u32 led_control;
  461. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  462. led_control &= ~(0x0101L << slot);
  463. writel(led_control, ctrl->hpc_reg + LED_CONTROL);
  464. }
  465. static inline void green_LED_blink(struct controller *ctrl, u8 slot)
  466. {
  467. u32 led_control;
  468. led_control = readl(ctrl->hpc_reg + LED_CONTROL);
  469. led_control &= ~(0x0101L << slot);
  470. led_control |= (0x0001L << slot);
  471. writel(led_control, ctrl->hpc_reg + LED_CONTROL);
  472. }
  473. static inline void slot_disable(struct controller *ctrl, u8 slot)
  474. {
  475. u8 slot_enable;
  476. slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
  477. slot_enable &= ~(0x01 << slot);
  478. writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
  479. }
  480. static inline void slot_enable(struct controller *ctrl, u8 slot)
  481. {
  482. u8 slot_enable;
  483. slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
  484. slot_enable |= (0x01 << slot);
  485. writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
  486. }
  487. static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
  488. {
  489. u8 slot_enable;
  490. slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
  491. slot_enable &= (0x01 << slot);
  492. return slot_enable ? 1 : 0;
  493. }
  494. static inline u8 read_slot_enable(struct controller *ctrl)
  495. {
  496. return readb(ctrl->hpc_reg + SLOT_ENABLE);
  497. }
  498. /**
  499. * get_controller_speed - find the current frequency/mode of controller.
  500. *
  501. * @ctrl: controller to get frequency/mode for.
  502. *
  503. * Returns controller speed.
  504. */
  505. static inline u8 get_controller_speed(struct controller *ctrl)
  506. {
  507. u8 curr_freq;
  508. u16 misc;
  509. if (ctrl->pcix_support) {
  510. curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
  511. if ((curr_freq & 0xB0) == 0xB0)
  512. return PCI_SPEED_133MHz_PCIX;
  513. if ((curr_freq & 0xA0) == 0xA0)
  514. return PCI_SPEED_100MHz_PCIX;
  515. if ((curr_freq & 0x90) == 0x90)
  516. return PCI_SPEED_66MHz_PCIX;
  517. if (curr_freq & 0x10)
  518. return PCI_SPEED_66MHz;
  519. return PCI_SPEED_33MHz;
  520. }
  521. misc = readw(ctrl->hpc_reg + MISC);
  522. return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
  523. }
  524. /**
  525. * get_adapter_speed - find the max supported frequency/mode of adapter.
  526. *
  527. * @ctrl: hotplug controller.
  528. * @hp_slot: hotplug slot where adapter is installed.
  529. *
  530. * Returns adapter speed.
  531. */
  532. static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
  533. {
  534. u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
  535. dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
  536. if (ctrl->pcix_support) {
  537. if (temp_dword & (0x10000 << hp_slot))
  538. return PCI_SPEED_133MHz_PCIX;
  539. if (temp_dword & (0x100 << hp_slot))
  540. return PCI_SPEED_66MHz_PCIX;
  541. }
  542. if (temp_dword & (0x01 << hp_slot))
  543. return PCI_SPEED_66MHz;
  544. return PCI_SPEED_33MHz;
  545. }
  546. static inline void enable_slot_power(struct controller *ctrl, u8 slot)
  547. {
  548. u8 slot_power;
  549. slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
  550. slot_power |= (0x01 << slot);
  551. writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
  552. }
  553. static inline void disable_slot_power(struct controller *ctrl, u8 slot)
  554. {
  555. u8 slot_power;
  556. slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
  557. slot_power &= ~(0x01 << slot);
  558. writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
  559. }
  560. static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
  561. {
  562. u8 hp_slot;
  563. hp_slot = slot->device - ctrl->slot_device_offset;
  564. return read_amber_LED(ctrl, hp_slot);
  565. }
  566. static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
  567. {
  568. u8 hp_slot;
  569. hp_slot = slot->device - ctrl->slot_device_offset;
  570. return is_slot_enabled(ctrl, hp_slot);
  571. }
  572. static inline int cpq_get_latch_status(struct controller *ctrl,
  573. struct slot *slot)
  574. {
  575. u32 status;
  576. u8 hp_slot;
  577. hp_slot = slot->device - ctrl->slot_device_offset;
  578. dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d\n",
  579. __func__, slot->device, ctrl->slot_device_offset);
  580. status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
  581. return (status == 0) ? 1 : 0;
  582. }
  583. static inline int get_presence_status(struct controller *ctrl,
  584. struct slot *slot)
  585. {
  586. int presence_save = 0;
  587. u8 hp_slot;
  588. u32 tempdword;
  589. hp_slot = slot->device - ctrl->slot_device_offset;
  590. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  591. presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15))
  592. >> hp_slot) & 0x02;
  593. return presence_save;
  594. }
  595. static inline int wait_for_ctrl_irq(struct controller *ctrl)
  596. {
  597. DECLARE_WAITQUEUE(wait, current);
  598. int retval = 0;
  599. dbg("%s - start\n", __func__);
  600. add_wait_queue(&ctrl->queue, &wait);
  601. /* Sleep for up to 1 second to wait for the LED to change. */
  602. msleep_interruptible(1000);
  603. remove_wait_queue(&ctrl->queue, &wait);
  604. if (signal_pending(current))
  605. retval = -EINTR;
  606. dbg("%s - end\n", __func__);
  607. return retval;
  608. }
  609. #include <asm/pci_x86.h>
  610. static inline int cpqhp_routing_table_length(void)
  611. {
  612. BUG_ON(cpqhp_routing_table == NULL);
  613. return ((cpqhp_routing_table->size - sizeof(struct irq_routing_table)) /
  614. sizeof(struct irq_info));
  615. }
  616. #endif