Kconfig 8.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # PCI configuration
  4. #
  5. # select this to offer the PCI prompt
  6. config HAVE_PCI
  7. bool
  8. # select this to unconditionally force on PCI support
  9. config FORCE_PCI
  10. bool
  11. select HAVE_PCI
  12. select PCI
  13. menuconfig PCI
  14. bool "PCI support"
  15. depends on HAVE_PCI
  16. help
  17. This option enables support for the PCI local bus, including
  18. support for PCI-X and the foundations for PCI Express support.
  19. Say 'Y' here unless you know what you are doing.
  20. if PCI
  21. config PCI_DOMAINS
  22. bool
  23. depends on PCI
  24. config PCI_DOMAINS_GENERIC
  25. bool
  26. select PCI_DOMAINS
  27. config PCI_SYSCALL
  28. bool
  29. source "drivers/pci/pcie/Kconfig"
  30. config PCI_MSI
  31. bool "Message Signaled Interrupts (MSI and MSI-X)"
  32. select GENERIC_MSI_IRQ
  33. help
  34. This allows device drivers to enable MSI (Message Signaled
  35. Interrupts). Message Signaled Interrupts enable a device to
  36. generate an interrupt using an inbound Memory Write on its
  37. PCI bus instead of asserting a device IRQ pin.
  38. Use of PCI MSI interrupts can be disabled at kernel boot time
  39. by using the 'pci=nomsi' option. This disables MSI for the
  40. entire system.
  41. If you don't know what to do here, say Y.
  42. config PCI_MSI_IRQ_DOMAIN
  43. def_bool y
  44. depends on PCI_MSI
  45. select GENERIC_MSI_IRQ_DOMAIN
  46. config PCI_MSI_ARCH_FALLBACKS
  47. bool
  48. config PCI_QUIRKS
  49. default y
  50. bool "Enable PCI quirk workarounds" if EXPERT
  51. help
  52. This enables workarounds for various PCI chipset bugs/quirks.
  53. Disable this only if your target machine is unaffected by PCI
  54. quirks.
  55. config PCI_DEBUG
  56. bool "PCI Debugging"
  57. depends on DEBUG_KERNEL
  58. help
  59. Say Y here if you want the PCI core to produce a bunch of debug
  60. messages to the system log. Select this if you are having a
  61. problem with PCI support and want to see more of what is going on.
  62. When in doubt, say N.
  63. config PCI_REALLOC_ENABLE_AUTO
  64. bool "Enable PCI resource re-allocation detection"
  65. depends on PCI_IOV
  66. help
  67. Say Y here if you want the PCI core to detect if PCI resource
  68. re-allocation needs to be enabled. You can always use pci=realloc=on
  69. or pci=realloc=off to override it. It will automatically
  70. re-allocate PCI resources if SR-IOV BARs have not been allocated by
  71. the BIOS.
  72. When in doubt, say N.
  73. config PCI_STUB
  74. tristate "PCI Stub driver"
  75. help
  76. Say Y or M here if you want be able to reserve a PCI device
  77. when it is going to be assigned to a guest operating system.
  78. When in doubt, say N.
  79. config PCI_PF_STUB
  80. tristate "PCI PF Stub driver"
  81. depends on PCI_IOV
  82. help
  83. Say Y or M here if you want to enable support for devices that
  84. require SR-IOV support, while at the same time the PF (Physical
  85. Function) itself is not providing any actual services on the
  86. host itself such as storage or networking.
  87. When in doubt, say N.
  88. config XEN_PCIDEV_FRONTEND
  89. tristate "Xen PCI Frontend"
  90. depends on XEN_PV
  91. select PCI_XEN
  92. select XEN_XENBUS_FRONTEND
  93. default y
  94. help
  95. The PCI device frontend driver allows the kernel to import arbitrary
  96. PCI devices from a PCI backend to support PCI driver domains.
  97. config PCI_ATS
  98. bool
  99. config PCI_DOE
  100. bool
  101. config PCI_ECAM
  102. bool
  103. config PCI_LOCKLESS_CONFIG
  104. bool
  105. config PCI_BRIDGE_EMUL
  106. bool
  107. config PCI_IOV
  108. bool "PCI IOV support"
  109. select PCI_ATS
  110. help
  111. I/O Virtualization is a PCI feature supported by some devices
  112. which allows them to create virtual devices which share their
  113. physical resources.
  114. If unsure, say N.
  115. config PCI_PRI
  116. bool "PCI PRI support"
  117. select PCI_ATS
  118. help
  119. PRI is the PCI Page Request Interface. It allows PCI devices that are
  120. behind an IOMMU to recover from page faults.
  121. If unsure, say N.
  122. config PCI_PASID
  123. bool "PCI PASID support"
  124. select PCI_ATS
  125. help
  126. Process Address Space Identifiers (PASIDs) can be used by PCI devices
  127. to access more than one IO address space at the same time. To make
  128. use of this feature an IOMMU is required which also supports PASIDs.
  129. Select this option if you have such an IOMMU and want to compile the
  130. driver for it into your kernel.
  131. If unsure, say N.
  132. config PCI_P2PDMA
  133. bool "PCI peer-to-peer transfer support"
  134. depends on ZONE_DEVICE
  135. #
  136. # The need for the scatterlist DMA bus address flag means PCI P2PDMA
  137. # requires 64bit
  138. #
  139. depends on 64BIT
  140. select GENERIC_ALLOCATOR
  141. help
  142. Enableѕ drivers to do PCI peer-to-peer transactions to and from
  143. BARs that are exposed in other devices that are the part of
  144. the hierarchy where peer-to-peer DMA is guaranteed by the PCI
  145. specification to work (ie. anything below a single PCI bridge).
  146. Many PCIe root complexes do not support P2P transactions and
  147. it's hard to tell which support it at all, so at this time,
  148. P2P DMA transactions must be between devices behind the same root
  149. port.
  150. If unsure, say N.
  151. config PCI_LABEL
  152. def_bool y if (DMI || ACPI)
  153. select NLS
  154. config PCI_HYPERV
  155. tristate "Hyper-V PCI Frontend"
  156. depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS
  157. select PCI_HYPERV_INTERFACE
  158. help
  159. The PCI device frontend driver allows the kernel to import arbitrary
  160. PCI devices from a PCI backend to support PCI driver domains.
  161. choice
  162. prompt "PCI Express hierarchy optimization setting"
  163. default PCIE_BUS_DEFAULT
  164. depends on PCI && EXPERT
  165. help
  166. MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
  167. device parameters that affect performance and the ability to
  168. support hotplug and peer-to-peer DMA.
  169. The following choices set the MPS and MRRS optimization strategy
  170. at compile-time. The choices are the same as those offered for
  171. the kernel command-line parameter 'pci', i.e.,
  172. 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
  173. 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
  174. This is a compile-time setting and can be overridden by the above
  175. command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
  176. config PCIE_BUS_TUNE_OFF
  177. bool "Tune Off"
  178. depends on PCI
  179. help
  180. Use the BIOS defaults; don't touch MPS at all. This is the same
  181. as booting with 'pci=pcie_bus_tune_off'.
  182. config PCIE_BUS_DEFAULT
  183. bool "Default"
  184. depends on PCI
  185. help
  186. Default choice; ensure that the MPS matches upstream bridge.
  187. config PCIE_BUS_SAFE
  188. bool "Safe"
  189. depends on PCI
  190. help
  191. Use largest MPS that boot-time devices support. If you have a
  192. closed system with no possibility of adding new devices, this
  193. will use the largest MPS that's supported by all devices. This
  194. is the same as booting with 'pci=pcie_bus_safe'.
  195. config PCIE_BUS_PERFORMANCE
  196. bool "Performance"
  197. depends on PCI
  198. help
  199. Use MPS and MRRS for best performance. Ensure that a given
  200. device's MPS is no larger than its parent MPS, which allows us to
  201. keep all switches/bridges to the max MPS supported by their
  202. parent. This is the same as booting with 'pci=pcie_bus_perf'.
  203. config PCIE_BUS_PEER2PEER
  204. bool "Peer2peer"
  205. depends on PCI
  206. help
  207. Set MPS = 128 for all devices. MPS configuration effected by the
  208. other options could cause the MPS on one root port to be
  209. different than that of the MPS on another, which may cause
  210. hot-added devices or peer-to-peer DMA to fail. Set MPS to the
  211. smallest possible value (128B) system-wide to avoid these issues.
  212. This is the same as booting with 'pci=pcie_bus_peer2peer'.
  213. endchoice
  214. config VGA_ARB
  215. bool "VGA Arbitration" if EXPERT
  216. default y
  217. depends on (PCI && !S390)
  218. help
  219. Some "legacy" VGA devices implemented on PCI typically have the same
  220. hard-decoded addresses as they did on ISA. When multiple PCI devices
  221. are accessed at same time they need some kind of coordination. Please
  222. see Documentation/gpu/vgaarbiter.rst for more details. Select this to
  223. enable VGA arbiter.
  224. config VGA_ARB_MAX_GPUS
  225. int "Maximum number of GPUs"
  226. default 16
  227. depends on VGA_ARB
  228. help
  229. Reserves space in the kernel to maintain resource locking for
  230. multiple GPUS. The overhead for each GPU is very small.
  231. source "drivers/pci/hotplug/Kconfig"
  232. source "drivers/pci/controller/Kconfig"
  233. source "drivers/pci/endpoint/Kconfig"
  234. source "drivers/pci/switch/Kconfig"
  235. config SEC_PCIE
  236. depends on PCI_MSM
  237. bool "SEC_PCIE feature"
  238. config SEC_PCIE_DEV
  239. depends on PCI_MSM
  240. bool "SEC_PCIE_DEV dev feature"
  241. config SEC_PCIE_AER
  242. depends on PCI_MSM
  243. bool "SEC_PCIE_AER feature"
  244. config SEC_PCIE_L1SS
  245. depends on PCI_MSM
  246. depends on SEC_PCIE
  247. bool "SEC_PCIE_L1SS feature"
  248. config SEC_PANIC_PCIE_ERR
  249. depends on PCI_MSM
  250. depends on SEC_PCIE
  251. bool "SEC_PANIC_PCIE_ERR feature"
  252. config SEC_PCIE_KEEP_LINKBW
  253. depends on PCI_MSM
  254. depends on SEC_PCIE
  255. bool "SEC_PCIE_KEEP_LINKBW feature"
  256. endif