nvme.h 29 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. */
  5. #ifndef _NVME_H
  6. #define _NVME_H
  7. #include <linux/nvme.h>
  8. #include <linux/cdev.h>
  9. #include <linux/pci.h>
  10. #include <linux/kref.h>
  11. #include <linux/blk-mq.h>
  12. #include <linux/sed-opal.h>
  13. #include <linux/fault-inject.h>
  14. #include <linux/rcupdate.h>
  15. #include <linux/wait.h>
  16. #include <linux/t10-pi.h>
  17. #include <trace/events/block.h>
  18. extern unsigned int nvme_io_timeout;
  19. #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  20. extern unsigned int admin_timeout;
  21. #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
  22. #define NVME_DEFAULT_KATO 5
  23. #ifdef CONFIG_ARCH_NO_SG_CHAIN
  24. #define NVME_INLINE_SG_CNT 0
  25. #define NVME_INLINE_METADATA_SG_CNT 0
  26. #else
  27. #define NVME_INLINE_SG_CNT 2
  28. #define NVME_INLINE_METADATA_SG_CNT 1
  29. #endif
  30. /*
  31. * Default to a 4K page size, with the intention to update this
  32. * path in the future to accommodate architectures with differing
  33. * kernel and IO page sizes.
  34. */
  35. #define NVME_CTRL_PAGE_SHIFT 12
  36. #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
  37. extern struct workqueue_struct *nvme_wq;
  38. extern struct workqueue_struct *nvme_reset_wq;
  39. extern struct workqueue_struct *nvme_delete_wq;
  40. /*
  41. * List of workarounds for devices that required behavior not specified in
  42. * the standard.
  43. */
  44. enum nvme_quirks {
  45. /*
  46. * Prefers I/O aligned to a stripe size specified in a vendor
  47. * specific Identify field.
  48. */
  49. NVME_QUIRK_STRIPE_SIZE = (1 << 0),
  50. /*
  51. * The controller doesn't handle Identify value others than 0 or 1
  52. * correctly.
  53. */
  54. NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
  55. /*
  56. * The controller deterministically returns O's on reads to
  57. * logical blocks that deallocate was called on.
  58. */
  59. NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
  60. /*
  61. * The controller needs a delay before starts checking the device
  62. * readiness, which is done by reading the NVME_CSTS_RDY bit.
  63. */
  64. NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
  65. /*
  66. * APST should not be used.
  67. */
  68. NVME_QUIRK_NO_APST = (1 << 4),
  69. /*
  70. * The deepest sleep state should not be used.
  71. */
  72. NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
  73. /*
  74. * Set MEDIUM priority on SQ creation
  75. */
  76. NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
  77. /*
  78. * Ignore device provided subnqn.
  79. */
  80. NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
  81. /*
  82. * Broken Write Zeroes.
  83. */
  84. NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
  85. /*
  86. * Force simple suspend/resume path.
  87. */
  88. NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
  89. /*
  90. * Use only one interrupt vector for all queues
  91. */
  92. NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
  93. /*
  94. * Use non-standard 128 bytes SQEs.
  95. */
  96. NVME_QUIRK_128_BYTES_SQES = (1 << 12),
  97. /*
  98. * Prevent tag overlap between queues
  99. */
  100. NVME_QUIRK_SHARED_TAGS = (1 << 13),
  101. /*
  102. * Don't change the value of the temperature threshold feature
  103. */
  104. NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
  105. /*
  106. * The controller doesn't handle the Identify Namespace
  107. * Identification Descriptor list subcommand despite claiming
  108. * NVMe 1.3 compliance.
  109. */
  110. NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
  111. /*
  112. * The controller does not properly handle DMA addresses over
  113. * 48 bits.
  114. */
  115. NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
  116. /*
  117. * The controller requires the command_id value be limited, so skip
  118. * encoding the generation sequence number.
  119. */
  120. NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
  121. /*
  122. * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
  123. */
  124. NVME_QUIRK_BOGUS_NID = (1 << 18),
  125. /*
  126. * No temperature thresholds for channels other than 0 (Composite).
  127. */
  128. NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19),
  129. /*
  130. * Disables simple suspend/resume path.
  131. */
  132. NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20),
  133. };
  134. /*
  135. * Common request structure for NVMe passthrough. All drivers must have
  136. * this structure as the first member of their request-private data.
  137. */
  138. struct nvme_request {
  139. struct nvme_command *cmd;
  140. union nvme_result result;
  141. u8 genctr;
  142. u8 retries;
  143. u8 flags;
  144. u16 status;
  145. struct nvme_ctrl *ctrl;
  146. };
  147. /*
  148. * Mark a bio as coming in through the mpath node.
  149. */
  150. #define REQ_NVME_MPATH REQ_DRV
  151. enum {
  152. NVME_REQ_CANCELLED = (1 << 0),
  153. NVME_REQ_USERCMD = (1 << 1),
  154. };
  155. static inline struct nvme_request *nvme_req(struct request *req)
  156. {
  157. return blk_mq_rq_to_pdu(req);
  158. }
  159. static inline u16 nvme_req_qid(struct request *req)
  160. {
  161. if (!req->q->queuedata)
  162. return 0;
  163. return req->mq_hctx->queue_num + 1;
  164. }
  165. /* The below value is the specific amount of delay needed before checking
  166. * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
  167. * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
  168. * found empirically.
  169. */
  170. #define NVME_QUIRK_DELAY_AMOUNT 2300
  171. /*
  172. * enum nvme_ctrl_state: Controller state
  173. *
  174. * @NVME_CTRL_NEW: New controller just allocated, initial state
  175. * @NVME_CTRL_LIVE: Controller is connected and I/O capable
  176. * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
  177. * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
  178. * transport
  179. * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
  180. * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
  181. * disabled/failed immediately. This state comes
  182. * after all async event processing took place and
  183. * before ns removal and the controller deletion
  184. * progress
  185. * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
  186. * shutdown or removal. In this case we forcibly
  187. * kill all inflight I/O as they have no chance to
  188. * complete
  189. */
  190. enum nvme_ctrl_state {
  191. NVME_CTRL_NEW,
  192. NVME_CTRL_LIVE,
  193. NVME_CTRL_RESETTING,
  194. NVME_CTRL_CONNECTING,
  195. NVME_CTRL_DELETING,
  196. NVME_CTRL_DELETING_NOIO,
  197. NVME_CTRL_DEAD,
  198. };
  199. struct nvme_fault_inject {
  200. #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
  201. struct fault_attr attr;
  202. struct dentry *parent;
  203. bool dont_retry; /* DNR, do not retry */
  204. u16 status; /* status code */
  205. #endif
  206. };
  207. enum nvme_ctrl_flags {
  208. NVME_CTRL_FAILFAST_EXPIRED = 0,
  209. NVME_CTRL_ADMIN_Q_STOPPED = 1,
  210. NVME_CTRL_STARTED_ONCE = 2,
  211. };
  212. struct nvme_ctrl {
  213. bool comp_seen;
  214. enum nvme_ctrl_state state;
  215. bool identified;
  216. spinlock_t lock;
  217. struct mutex scan_lock;
  218. const struct nvme_ctrl_ops *ops;
  219. struct request_queue *admin_q;
  220. struct request_queue *connect_q;
  221. struct request_queue *fabrics_q;
  222. struct device *dev;
  223. int instance;
  224. int numa_node;
  225. struct blk_mq_tag_set *tagset;
  226. struct blk_mq_tag_set *admin_tagset;
  227. struct list_head namespaces;
  228. struct rw_semaphore namespaces_rwsem;
  229. struct device ctrl_device;
  230. struct device *device; /* char device */
  231. #ifdef CONFIG_NVME_HWMON
  232. struct device *hwmon_device;
  233. #endif
  234. struct cdev cdev;
  235. struct work_struct reset_work;
  236. struct work_struct delete_work;
  237. wait_queue_head_t state_wq;
  238. struct nvme_subsystem *subsys;
  239. struct list_head subsys_entry;
  240. struct opal_dev *opal_dev;
  241. char name[12];
  242. u16 cntlid;
  243. u32 ctrl_config;
  244. u16 mtfa;
  245. u32 queue_count;
  246. u64 cap;
  247. u32 max_hw_sectors;
  248. u32 max_segments;
  249. u32 max_integrity_segments;
  250. u32 max_discard_sectors;
  251. u32 max_discard_segments;
  252. u32 max_zeroes_sectors;
  253. #ifdef CONFIG_BLK_DEV_ZONED
  254. u32 max_zone_append;
  255. #endif
  256. u16 crdt[3];
  257. u16 oncs;
  258. u32 dmrsl;
  259. u16 oacs;
  260. u16 sqsize;
  261. u32 max_namespaces;
  262. atomic_t abort_limit;
  263. u8 vwc;
  264. u32 vs;
  265. u32 sgls;
  266. u16 kas;
  267. u8 npss;
  268. u8 apsta;
  269. u16 wctemp;
  270. u16 cctemp;
  271. u32 oaes;
  272. u32 aen_result;
  273. u32 ctratt;
  274. unsigned int shutdown_timeout;
  275. unsigned int kato;
  276. bool subsystem;
  277. unsigned long quirks;
  278. struct nvme_id_power_state psd[32];
  279. struct nvme_effects_log *effects;
  280. struct xarray cels;
  281. struct work_struct scan_work;
  282. struct work_struct async_event_work;
  283. struct delayed_work ka_work;
  284. struct delayed_work failfast_work;
  285. struct nvme_command ka_cmd;
  286. unsigned long ka_last_check_time;
  287. struct work_struct fw_act_work;
  288. unsigned long events;
  289. #ifdef CONFIG_NVME_MULTIPATH
  290. /* asymmetric namespace access: */
  291. u8 anacap;
  292. u8 anatt;
  293. u32 anagrpmax;
  294. u32 nanagrpid;
  295. struct mutex ana_lock;
  296. struct nvme_ana_rsp_hdr *ana_log_buf;
  297. size_t ana_log_size;
  298. struct timer_list anatt_timer;
  299. struct work_struct ana_work;
  300. #endif
  301. #ifdef CONFIG_NVME_AUTH
  302. struct work_struct dhchap_auth_work;
  303. struct list_head dhchap_auth_list;
  304. struct mutex dhchap_auth_mutex;
  305. struct nvme_dhchap_key *host_key;
  306. struct nvme_dhchap_key *ctrl_key;
  307. u16 transaction;
  308. #endif
  309. /* Power saving configuration */
  310. u64 ps_max_latency_us;
  311. bool apst_enabled;
  312. /* PCIe only: */
  313. u32 hmpre;
  314. u32 hmmin;
  315. u32 hmminds;
  316. u16 hmmaxd;
  317. /* Fabrics only */
  318. u32 ioccsz;
  319. u32 iorcsz;
  320. u16 icdoff;
  321. u16 maxcmd;
  322. int nr_reconnects;
  323. unsigned long flags;
  324. struct nvmf_ctrl_options *opts;
  325. struct page *discard_page;
  326. unsigned long discard_page_busy;
  327. struct nvme_fault_inject fault_inject;
  328. enum nvme_ctrl_type cntrltype;
  329. enum nvme_dctype dctype;
  330. };
  331. enum nvme_iopolicy {
  332. NVME_IOPOLICY_NUMA,
  333. NVME_IOPOLICY_RR,
  334. };
  335. struct nvme_subsystem {
  336. int instance;
  337. struct device dev;
  338. /*
  339. * Because we unregister the device on the last put we need
  340. * a separate refcount.
  341. */
  342. struct kref ref;
  343. struct list_head entry;
  344. struct mutex lock;
  345. struct list_head ctrls;
  346. struct list_head nsheads;
  347. char subnqn[NVMF_NQN_SIZE];
  348. char serial[20];
  349. char model[40];
  350. char firmware_rev[8];
  351. u8 cmic;
  352. enum nvme_subsys_type subtype;
  353. u16 vendor_id;
  354. u16 awupf; /* 0's based awupf value. */
  355. struct ida ns_ida;
  356. #ifdef CONFIG_NVME_MULTIPATH
  357. enum nvme_iopolicy iopolicy;
  358. #endif
  359. };
  360. /*
  361. * Container structure for uniqueue namespace identifiers.
  362. */
  363. struct nvme_ns_ids {
  364. u8 eui64[8];
  365. u8 nguid[16];
  366. uuid_t uuid;
  367. u8 csi;
  368. };
  369. /*
  370. * Anchor structure for namespaces. There is one for each namespace in a
  371. * NVMe subsystem that any of our controllers can see, and the namespace
  372. * structure for each controller is chained of it. For private namespaces
  373. * there is a 1:1 relation to our namespace structures, that is ->list
  374. * only ever has a single entry for private namespaces.
  375. */
  376. struct nvme_ns_head {
  377. struct list_head list;
  378. struct srcu_struct srcu;
  379. struct nvme_subsystem *subsys;
  380. unsigned ns_id;
  381. struct nvme_ns_ids ids;
  382. struct list_head entry;
  383. struct kref ref;
  384. bool shared;
  385. int instance;
  386. struct nvme_effects_log *effects;
  387. struct cdev cdev;
  388. struct device cdev_device;
  389. struct gendisk *disk;
  390. #ifdef CONFIG_NVME_MULTIPATH
  391. struct bio_list requeue_list;
  392. spinlock_t requeue_lock;
  393. struct work_struct requeue_work;
  394. struct mutex lock;
  395. unsigned long flags;
  396. #define NVME_NSHEAD_DISK_LIVE 0
  397. struct nvme_ns __rcu *current_path[];
  398. #endif
  399. };
  400. static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
  401. {
  402. return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
  403. }
  404. enum nvme_ns_features {
  405. NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
  406. NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
  407. };
  408. struct nvme_ns {
  409. struct list_head list;
  410. struct nvme_ctrl *ctrl;
  411. struct request_queue *queue;
  412. struct gendisk *disk;
  413. #ifdef CONFIG_NVME_MULTIPATH
  414. enum nvme_ana_state ana_state;
  415. u32 ana_grpid;
  416. #endif
  417. struct list_head siblings;
  418. struct kref kref;
  419. struct nvme_ns_head *head;
  420. int lba_shift;
  421. u16 ms;
  422. u16 pi_size;
  423. u16 sgs;
  424. u32 sws;
  425. u8 pi_type;
  426. u8 guard_type;
  427. #ifdef CONFIG_BLK_DEV_ZONED
  428. u64 zsze;
  429. #endif
  430. unsigned long features;
  431. unsigned long flags;
  432. #define NVME_NS_REMOVING 0
  433. #define NVME_NS_DEAD 1
  434. #define NVME_NS_ANA_PENDING 2
  435. #define NVME_NS_FORCE_RO 3
  436. #define NVME_NS_READY 4
  437. #define NVME_NS_STOPPED 5
  438. struct cdev cdev;
  439. struct device cdev_device;
  440. struct nvme_fault_inject fault_inject;
  441. };
  442. /* NVMe ns supports metadata actions by the controller (generate/strip) */
  443. static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
  444. {
  445. return ns->pi_type && ns->ms == ns->pi_size;
  446. }
  447. struct nvme_ctrl_ops {
  448. const char *name;
  449. struct module *module;
  450. unsigned int flags;
  451. #define NVME_F_FABRICS (1 << 0)
  452. #define NVME_F_METADATA_SUPPORTED (1 << 1)
  453. #define NVME_F_BLOCKING (1 << 2)
  454. const struct attribute_group **dev_attr_groups;
  455. int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
  456. int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
  457. int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
  458. void (*free_ctrl)(struct nvme_ctrl *ctrl);
  459. void (*submit_async_event)(struct nvme_ctrl *ctrl);
  460. void (*delete_ctrl)(struct nvme_ctrl *ctrl);
  461. void (*stop_ctrl)(struct nvme_ctrl *ctrl);
  462. int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
  463. void (*print_device_info)(struct nvme_ctrl *ctrl);
  464. bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
  465. };
  466. /*
  467. * nvme command_id is constructed as such:
  468. * | xxxx | xxxxxxxxxxxx |
  469. * gen request tag
  470. */
  471. #define nvme_genctr_mask(gen) (gen & 0xf)
  472. #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
  473. #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
  474. #define nvme_tag_from_cid(cid) (cid & 0xfff)
  475. static inline u16 nvme_cid(struct request *rq)
  476. {
  477. return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
  478. }
  479. static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
  480. u16 command_id)
  481. {
  482. u8 genctr = nvme_genctr_from_cid(command_id);
  483. u16 tag = nvme_tag_from_cid(command_id);
  484. struct request *rq;
  485. rq = blk_mq_tag_to_rq(tags, tag);
  486. if (unlikely(!rq)) {
  487. pr_err("could not locate request for tag %#x\n",
  488. tag);
  489. return NULL;
  490. }
  491. if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
  492. dev_err(nvme_req(rq)->ctrl->device,
  493. "request %#x genctr mismatch (got %#x expected %#x)\n",
  494. tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
  495. return NULL;
  496. }
  497. return rq;
  498. }
  499. static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
  500. u16 command_id)
  501. {
  502. return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
  503. }
  504. /*
  505. * Return the length of the string without the space padding
  506. */
  507. static inline int nvme_strlen(char *s, int len)
  508. {
  509. while (s[len - 1] == ' ')
  510. len--;
  511. return len;
  512. }
  513. static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
  514. {
  515. struct nvme_subsystem *subsys = ctrl->subsys;
  516. if (ctrl->ops->print_device_info) {
  517. ctrl->ops->print_device_info(ctrl);
  518. return;
  519. }
  520. dev_err(ctrl->device,
  521. "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
  522. nvme_strlen(subsys->model, sizeof(subsys->model)),
  523. subsys->model, nvme_strlen(subsys->firmware_rev,
  524. sizeof(subsys->firmware_rev)),
  525. subsys->firmware_rev);
  526. }
  527. #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
  528. void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
  529. const char *dev_name);
  530. void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
  531. void nvme_should_fail(struct request *req);
  532. #else
  533. static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
  534. const char *dev_name)
  535. {
  536. }
  537. static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
  538. {
  539. }
  540. static inline void nvme_should_fail(struct request *req) {}
  541. #endif
  542. bool nvme_wait_reset(struct nvme_ctrl *ctrl);
  543. int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
  544. static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
  545. {
  546. int ret;
  547. if (!ctrl->subsystem)
  548. return -ENOTTY;
  549. if (!nvme_wait_reset(ctrl))
  550. return -EBUSY;
  551. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
  552. if (ret)
  553. return ret;
  554. return nvme_try_sched_reset(ctrl);
  555. }
  556. /*
  557. * Convert a 512B sector number to a device logical block number.
  558. */
  559. static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
  560. {
  561. return sector >> (ns->lba_shift - SECTOR_SHIFT);
  562. }
  563. /*
  564. * Convert a device logical block number to a 512B sector number.
  565. */
  566. static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
  567. {
  568. return lba << (ns->lba_shift - SECTOR_SHIFT);
  569. }
  570. /*
  571. * Convert byte length to nvme's 0-based num dwords
  572. */
  573. static inline u32 nvme_bytes_to_numd(size_t len)
  574. {
  575. return (len >> 2) - 1;
  576. }
  577. static inline bool nvme_is_ana_error(u16 status)
  578. {
  579. switch (status & 0x7ff) {
  580. case NVME_SC_ANA_TRANSITION:
  581. case NVME_SC_ANA_INACCESSIBLE:
  582. case NVME_SC_ANA_PERSISTENT_LOSS:
  583. return true;
  584. default:
  585. return false;
  586. }
  587. }
  588. static inline bool nvme_is_path_error(u16 status)
  589. {
  590. /* check for a status code type of 'path related status' */
  591. return (status & 0x700) == 0x300;
  592. }
  593. /*
  594. * Fill in the status and result information from the CQE, and then figure out
  595. * if blk-mq will need to use IPI magic to complete the request, and if yes do
  596. * so. If not let the caller complete the request without an indirect function
  597. * call.
  598. */
  599. static inline bool nvme_try_complete_req(struct request *req, __le16 status,
  600. union nvme_result result)
  601. {
  602. struct nvme_request *rq = nvme_req(req);
  603. struct nvme_ctrl *ctrl = rq->ctrl;
  604. if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
  605. rq->genctr++;
  606. rq->status = le16_to_cpu(status) >> 1;
  607. rq->result = result;
  608. /* inject error when permitted by fault injection framework */
  609. nvme_should_fail(req);
  610. if (unlikely(blk_should_fake_timeout(req->q)))
  611. return true;
  612. return blk_mq_complete_request_remote(req);
  613. }
  614. static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
  615. {
  616. get_device(ctrl->device);
  617. }
  618. static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  619. {
  620. put_device(ctrl->device);
  621. }
  622. static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
  623. {
  624. return !qid &&
  625. nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
  626. }
  627. void nvme_complete_rq(struct request *req);
  628. void nvme_complete_batch_req(struct request *req);
  629. static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
  630. void (*fn)(struct request *rq))
  631. {
  632. struct request *req;
  633. rq_list_for_each(&iob->req_list, req) {
  634. fn(req);
  635. nvme_complete_batch_req(req);
  636. }
  637. blk_mq_end_request_batch(iob);
  638. }
  639. blk_status_t nvme_host_path_error(struct request *req);
  640. bool nvme_cancel_request(struct request *req, void *data);
  641. void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
  642. void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
  643. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  644. enum nvme_ctrl_state new_state);
  645. int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
  646. int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
  647. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
  648. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  649. const struct nvme_ctrl_ops *ops, unsigned long quirks);
  650. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
  651. void nvme_start_ctrl(struct nvme_ctrl *ctrl);
  652. void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
  653. int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl);
  654. int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
  655. const struct blk_mq_ops *ops, unsigned int cmd_size);
  656. void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
  657. int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
  658. const struct blk_mq_ops *ops, unsigned int nr_maps,
  659. unsigned int cmd_size);
  660. void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
  661. void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
  662. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  663. bool send);
  664. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  665. volatile union nvme_result *res);
  666. void nvme_stop_queues(struct nvme_ctrl *ctrl);
  667. void nvme_start_queues(struct nvme_ctrl *ctrl);
  668. void nvme_stop_admin_queue(struct nvme_ctrl *ctrl);
  669. void nvme_start_admin_queue(struct nvme_ctrl *ctrl);
  670. void nvme_kill_queues(struct nvme_ctrl *ctrl);
  671. void nvme_sync_queues(struct nvme_ctrl *ctrl);
  672. void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
  673. void nvme_unfreeze(struct nvme_ctrl *ctrl);
  674. void nvme_wait_freeze(struct nvme_ctrl *ctrl);
  675. int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
  676. void nvme_start_freeze(struct nvme_ctrl *ctrl);
  677. static inline enum req_op nvme_req_op(struct nvme_command *cmd)
  678. {
  679. return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  680. }
  681. #define NVME_QID_ANY -1
  682. void nvme_init_request(struct request *req, struct nvme_command *cmd);
  683. void nvme_cleanup_cmd(struct request *req);
  684. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
  685. blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
  686. struct request *req);
  687. bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
  688. bool queue_live);
  689. static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
  690. bool queue_live)
  691. {
  692. if (likely(ctrl->state == NVME_CTRL_LIVE))
  693. return true;
  694. if (ctrl->ops->flags & NVME_F_FABRICS &&
  695. ctrl->state == NVME_CTRL_DELETING)
  696. return queue_live;
  697. return __nvme_check_ready(ctrl, rq, queue_live);
  698. }
  699. /*
  700. * NSID shall be unique for all shared namespaces, or if at least one of the
  701. * following conditions is met:
  702. * 1. Namespace Management is supported by the controller
  703. * 2. ANA is supported by the controller
  704. * 3. NVM Set are supported by the controller
  705. *
  706. * In other case, private namespace are not required to report a unique NSID.
  707. */
  708. static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
  709. struct nvme_ns_head *head)
  710. {
  711. return head->shared ||
  712. (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
  713. (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
  714. (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
  715. }
  716. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  717. void *buf, unsigned bufflen);
  718. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  719. union nvme_result *result, void *buffer, unsigned bufflen,
  720. int qid, int at_head,
  721. blk_mq_req_flags_t flags);
  722. int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
  723. unsigned int dword11, void *buffer, size_t buflen,
  724. u32 *result);
  725. int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
  726. unsigned int dword11, void *buffer, size_t buflen,
  727. u32 *result);
  728. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
  729. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
  730. int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
  731. int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
  732. int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
  733. void nvme_queue_scan(struct nvme_ctrl *ctrl);
  734. int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
  735. void *log, size_t size, u64 offset);
  736. bool nvme_tryget_ns_head(struct nvme_ns_head *head);
  737. void nvme_put_ns_head(struct nvme_ns_head *head);
  738. int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
  739. const struct file_operations *fops, struct module *owner);
  740. void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
  741. int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  742. unsigned int cmd, unsigned long arg);
  743. long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
  744. int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
  745. unsigned int cmd, unsigned long arg);
  746. long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
  747. unsigned long arg);
  748. long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  749. unsigned long arg);
  750. int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
  751. struct io_comp_batch *iob, unsigned int poll_flags);
  752. int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
  753. struct io_comp_batch *iob, unsigned int poll_flags);
  754. int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
  755. unsigned int issue_flags);
  756. int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
  757. unsigned int issue_flags);
  758. int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  759. int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
  760. extern const struct attribute_group *nvme_ns_id_attr_groups[];
  761. extern const struct pr_ops nvme_pr_ops;
  762. extern const struct block_device_operations nvme_ns_head_ops;
  763. extern const struct attribute_group nvme_dev_attrs_group;
  764. struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
  765. #ifdef CONFIG_NVME_MULTIPATH
  766. static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
  767. {
  768. return ctrl->ana_log_buf != NULL;
  769. }
  770. void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
  771. void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
  772. void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
  773. void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
  774. void nvme_failover_req(struct request *req);
  775. void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
  776. int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
  777. void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
  778. void nvme_mpath_remove_disk(struct nvme_ns_head *head);
  779. int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
  780. void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
  781. void nvme_mpath_update(struct nvme_ctrl *ctrl);
  782. void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
  783. void nvme_mpath_stop(struct nvme_ctrl *ctrl);
  784. bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
  785. void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
  786. void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
  787. void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
  788. static inline void nvme_trace_bio_complete(struct request *req)
  789. {
  790. struct nvme_ns *ns = req->q->queuedata;
  791. if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
  792. trace_block_bio_complete(ns->head->disk->queue, req->bio);
  793. }
  794. extern bool multipath;
  795. extern struct device_attribute dev_attr_ana_grpid;
  796. extern struct device_attribute dev_attr_ana_state;
  797. extern struct device_attribute subsys_attr_iopolicy;
  798. #else
  799. #define multipath false
  800. static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
  801. {
  802. return false;
  803. }
  804. static inline void nvme_failover_req(struct request *req)
  805. {
  806. }
  807. static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
  808. {
  809. }
  810. static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
  811. struct nvme_ns_head *head)
  812. {
  813. return 0;
  814. }
  815. static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
  816. {
  817. }
  818. static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
  819. {
  820. }
  821. static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
  822. {
  823. return false;
  824. }
  825. static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
  826. {
  827. }
  828. static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
  829. {
  830. }
  831. static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
  832. {
  833. }
  834. static inline void nvme_trace_bio_complete(struct request *req)
  835. {
  836. }
  837. static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
  838. {
  839. }
  840. static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
  841. struct nvme_id_ctrl *id)
  842. {
  843. if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
  844. dev_warn(ctrl->device,
  845. "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
  846. return 0;
  847. }
  848. static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
  849. {
  850. }
  851. static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
  852. {
  853. }
  854. static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
  855. {
  856. }
  857. static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
  858. {
  859. }
  860. static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
  861. {
  862. }
  863. static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
  864. {
  865. }
  866. static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
  867. {
  868. }
  869. #endif /* CONFIG_NVME_MULTIPATH */
  870. int nvme_revalidate_zones(struct nvme_ns *ns);
  871. int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
  872. unsigned int nr_zones, report_zones_cb cb, void *data);
  873. #ifdef CONFIG_BLK_DEV_ZONED
  874. int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
  875. blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
  876. struct nvme_command *cmnd,
  877. enum nvme_zone_mgmt_action action);
  878. #else
  879. static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
  880. struct request *req, struct nvme_command *cmnd,
  881. enum nvme_zone_mgmt_action action)
  882. {
  883. return BLK_STS_NOTSUPP;
  884. }
  885. static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
  886. {
  887. dev_warn(ns->ctrl->device,
  888. "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
  889. return -EPROTONOSUPPORT;
  890. }
  891. #endif
  892. static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
  893. {
  894. return dev_to_disk(dev)->private_data;
  895. }
  896. #ifdef CONFIG_NVME_HWMON
  897. int nvme_hwmon_init(struct nvme_ctrl *ctrl);
  898. void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
  899. #else
  900. static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
  901. {
  902. return 0;
  903. }
  904. static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
  905. {
  906. }
  907. #endif
  908. static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
  909. {
  910. return ctrl->sgls & ((1 << 0) | (1 << 1));
  911. }
  912. #ifdef CONFIG_NVME_AUTH
  913. int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
  914. void nvme_auth_stop(struct nvme_ctrl *ctrl);
  915. int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
  916. int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
  917. void nvme_auth_free(struct nvme_ctrl *ctrl);
  918. #else
  919. static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
  920. {
  921. return 0;
  922. }
  923. static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
  924. static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
  925. {
  926. return -EPROTONOSUPPORT;
  927. }
  928. static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
  929. {
  930. return NVME_SC_AUTH_REQUIRED;
  931. }
  932. static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
  933. #endif
  934. u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  935. u8 opcode);
  936. int nvme_execute_passthru_rq(struct request *rq, u32 *effects);
  937. void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects,
  938. struct nvme_command *cmd, int status);
  939. struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
  940. struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
  941. void nvme_put_ns(struct nvme_ns *ns);
  942. static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
  943. {
  944. return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
  945. }
  946. #ifdef CONFIG_NVME_VERBOSE_ERRORS
  947. const unsigned char *nvme_get_error_status_str(u16 status);
  948. const unsigned char *nvme_get_opcode_str(u8 opcode);
  949. const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
  950. #else /* CONFIG_NVME_VERBOSE_ERRORS */
  951. static inline const unsigned char *nvme_get_error_status_str(u16 status)
  952. {
  953. return "I/O Error";
  954. }
  955. static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
  956. {
  957. return "I/O Cmd";
  958. }
  959. static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
  960. {
  961. return "Admin Cmd";
  962. }
  963. #endif /* CONFIG_NVME_VERBOSE_ERRORS */
  964. #endif /* _NVME_H */