i2c.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * I2C Link Layer for ST21NFCA HCI based Driver
  4. * Copyright (C) 2014 STMicroelectronics SAS. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/crc-ccitt.h>
  8. #include <linux/module.h>
  9. #include <linux/i2c.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/of_irq.h>
  12. #include <linux/of_gpio.h>
  13. #include <linux/acpi.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/delay.h>
  16. #include <linux/nfc.h>
  17. #include <linux/firmware.h>
  18. #include <net/nfc/hci.h>
  19. #include <net/nfc/llc.h>
  20. #include <net/nfc/nfc.h>
  21. #include "st21nfca.h"
  22. /*
  23. * Every frame starts with ST21NFCA_SOF_EOF and ends with ST21NFCA_SOF_EOF.
  24. * Because ST21NFCA_SOF_EOF is a possible data value, there is a mecanism
  25. * called byte stuffing has been introduced.
  26. *
  27. * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
  28. * - insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
  29. * - xor byte with ST21NFCA_BYTE_STUFFING_MASK
  30. */
  31. #define ST21NFCA_SOF_EOF 0x7e
  32. #define ST21NFCA_BYTE_STUFFING_MASK 0x20
  33. #define ST21NFCA_ESCAPE_BYTE_STUFFING 0x7d
  34. /* SOF + 00 */
  35. #define ST21NFCA_FRAME_HEADROOM 2
  36. /* 2 bytes crc + EOF */
  37. #define ST21NFCA_FRAME_TAILROOM 3
  38. #define IS_START_OF_FRAME(buf) (buf[0] == ST21NFCA_SOF_EOF && \
  39. buf[1] == 0)
  40. #define ST21NFCA_HCI_DRIVER_NAME "st21nfca_hci"
  41. #define ST21NFCA_HCI_I2C_DRIVER_NAME "st21nfca_hci_i2c"
  42. struct st21nfca_i2c_phy {
  43. struct i2c_client *i2c_dev;
  44. struct nfc_hci_dev *hdev;
  45. struct gpio_desc *gpiod_ena;
  46. struct st21nfca_se_status se_status;
  47. struct sk_buff *pending_skb;
  48. int current_read_len;
  49. /*
  50. * crc might have fail because i2c macro
  51. * is disable due to other interface activity
  52. */
  53. int crc_trials;
  54. int powered;
  55. int run_mode;
  56. /*
  57. * < 0 if hardware error occured (e.g. i2c err)
  58. * and prevents normal operation.
  59. */
  60. int hard_fault;
  61. struct mutex phy_lock;
  62. };
  63. static const u8 len_seq[] = { 16, 24, 12, 29 };
  64. static const u16 wait_tab[] = { 2, 3, 5, 15, 20, 40};
  65. #define I2C_DUMP_SKB(info, skb) \
  66. do { \
  67. pr_debug("%s:\n", info); \
  68. print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \
  69. 16, 1, (skb)->data, (skb)->len, 0); \
  70. } while (0)
  71. /*
  72. * In order to get the CLF in a known state we generate an internal reboot
  73. * using a proprietary command.
  74. * Once the reboot is completed, we expect to receive a ST21NFCA_SOF_EOF
  75. * fill buffer.
  76. */
  77. static int st21nfca_hci_platform_init(struct st21nfca_i2c_phy *phy)
  78. {
  79. u16 wait_reboot[] = { 50, 300, 1000 };
  80. char reboot_cmd[] = { 0x7E, 0x66, 0x48, 0xF6, 0x7E };
  81. u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE];
  82. int i, r = -1;
  83. for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
  84. r = i2c_master_send(phy->i2c_dev, reboot_cmd,
  85. sizeof(reboot_cmd));
  86. if (r < 0)
  87. msleep(wait_reboot[i]);
  88. }
  89. if (r < 0)
  90. return r;
  91. /* CLF is spending about 20ms to do an internal reboot */
  92. msleep(20);
  93. r = -1;
  94. for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
  95. r = i2c_master_recv(phy->i2c_dev, tmp,
  96. ST21NFCA_HCI_LLC_MAX_SIZE);
  97. if (r < 0)
  98. msleep(wait_reboot[i]);
  99. }
  100. if (r < 0)
  101. return r;
  102. for (i = 0; i < ST21NFCA_HCI_LLC_MAX_SIZE &&
  103. tmp[i] == ST21NFCA_SOF_EOF; i++)
  104. ;
  105. if (r != ST21NFCA_HCI_LLC_MAX_SIZE)
  106. return -ENODEV;
  107. usleep_range(1000, 1500);
  108. return 0;
  109. }
  110. static int st21nfca_hci_i2c_enable(void *phy_id)
  111. {
  112. struct st21nfca_i2c_phy *phy = phy_id;
  113. gpiod_set_value(phy->gpiod_ena, 1);
  114. phy->powered = 1;
  115. phy->run_mode = ST21NFCA_HCI_MODE;
  116. usleep_range(10000, 15000);
  117. return 0;
  118. }
  119. static void st21nfca_hci_i2c_disable(void *phy_id)
  120. {
  121. struct st21nfca_i2c_phy *phy = phy_id;
  122. gpiod_set_value(phy->gpiod_ena, 0);
  123. phy->powered = 0;
  124. }
  125. static void st21nfca_hci_add_len_crc(struct sk_buff *skb)
  126. {
  127. u16 crc;
  128. u8 tmp;
  129. *(u8 *)skb_push(skb, 1) = 0;
  130. crc = crc_ccitt(0xffff, skb->data, skb->len);
  131. crc = ~crc;
  132. tmp = crc & 0x00ff;
  133. skb_put_u8(skb, tmp);
  134. tmp = (crc >> 8) & 0x00ff;
  135. skb_put_u8(skb, tmp);
  136. }
  137. static void st21nfca_hci_remove_len_crc(struct sk_buff *skb)
  138. {
  139. skb_pull(skb, ST21NFCA_FRAME_HEADROOM);
  140. skb_trim(skb, skb->len - ST21NFCA_FRAME_TAILROOM);
  141. }
  142. /*
  143. * Writing a frame must not return the number of written bytes.
  144. * It must return either zero for success, or <0 for error.
  145. * In addition, it must not alter the skb
  146. */
  147. static int st21nfca_hci_i2c_write(void *phy_id, struct sk_buff *skb)
  148. {
  149. int r = -1, i, j;
  150. struct st21nfca_i2c_phy *phy = phy_id;
  151. struct i2c_client *client = phy->i2c_dev;
  152. u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE * 2];
  153. I2C_DUMP_SKB("st21nfca_hci_i2c_write", skb);
  154. if (phy->hard_fault != 0)
  155. return phy->hard_fault;
  156. /*
  157. * Compute CRC before byte stuffing computation on frame
  158. * Note st21nfca_hci_add_len_crc is doing a byte stuffing
  159. * on its own value
  160. */
  161. st21nfca_hci_add_len_crc(skb);
  162. /* add ST21NFCA_SOF_EOF on tail */
  163. skb_put_u8(skb, ST21NFCA_SOF_EOF);
  164. /* add ST21NFCA_SOF_EOF on head */
  165. *(u8 *)skb_push(skb, 1) = ST21NFCA_SOF_EOF;
  166. /*
  167. * Compute byte stuffing
  168. * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
  169. * insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
  170. * xor byte with ST21NFCA_BYTE_STUFFING_MASK
  171. */
  172. tmp[0] = skb->data[0];
  173. for (i = 1, j = 1; i < skb->len - 1; i++, j++) {
  174. if (skb->data[i] == ST21NFCA_SOF_EOF
  175. || skb->data[i] == ST21NFCA_ESCAPE_BYTE_STUFFING) {
  176. tmp[j] = ST21NFCA_ESCAPE_BYTE_STUFFING;
  177. j++;
  178. tmp[j] = skb->data[i] ^ ST21NFCA_BYTE_STUFFING_MASK;
  179. } else {
  180. tmp[j] = skb->data[i];
  181. }
  182. }
  183. tmp[j] = skb->data[i];
  184. j++;
  185. /*
  186. * Manage sleep mode
  187. * Try 3 times to send data with delay between each
  188. */
  189. mutex_lock(&phy->phy_lock);
  190. for (i = 0; i < ARRAY_SIZE(wait_tab) && r < 0; i++) {
  191. r = i2c_master_send(client, tmp, j);
  192. if (r < 0)
  193. msleep(wait_tab[i]);
  194. }
  195. mutex_unlock(&phy->phy_lock);
  196. if (r >= 0) {
  197. if (r != j)
  198. r = -EREMOTEIO;
  199. else
  200. r = 0;
  201. }
  202. st21nfca_hci_remove_len_crc(skb);
  203. return r;
  204. }
  205. static int get_frame_size(u8 *buf, int buflen)
  206. {
  207. int len = 0;
  208. if (buf[len + 1] == ST21NFCA_SOF_EOF)
  209. return 0;
  210. for (len = 1; len < buflen && buf[len] != ST21NFCA_SOF_EOF; len++)
  211. ;
  212. return len;
  213. }
  214. static int check_crc(u8 *buf, int buflen)
  215. {
  216. u16 crc;
  217. crc = crc_ccitt(0xffff, buf, buflen - 2);
  218. crc = ~crc;
  219. if (buf[buflen - 2] != (crc & 0xff) || buf[buflen - 1] != (crc >> 8)) {
  220. pr_err(ST21NFCA_HCI_DRIVER_NAME
  221. ": CRC error 0x%x != 0x%x 0x%x\n", crc, buf[buflen - 1],
  222. buf[buflen - 2]);
  223. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  224. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  225. 16, 2, buf, buflen, false);
  226. return -EPERM;
  227. }
  228. return 0;
  229. }
  230. /*
  231. * Prepare received data for upper layer.
  232. * Received data include byte stuffing, crc and sof/eof
  233. * which is not usable by hci part.
  234. * returns:
  235. * frame size without sof/eof, header and byte stuffing
  236. * -EBADMSG : frame was incorrect and discarded
  237. */
  238. static int st21nfca_hci_i2c_repack(struct sk_buff *skb)
  239. {
  240. int i, j, r, size;
  241. if (skb->len < 1 || (skb->len > 1 && skb->data[1] != 0))
  242. return -EBADMSG;
  243. size = get_frame_size(skb->data, skb->len);
  244. if (size > 0) {
  245. skb_trim(skb, size);
  246. /* remove ST21NFCA byte stuffing for upper layer */
  247. for (i = 1, j = 0; i < skb->len; i++) {
  248. if (skb->data[i + j] ==
  249. (u8) ST21NFCA_ESCAPE_BYTE_STUFFING) {
  250. skb->data[i] = skb->data[i + j + 1]
  251. | ST21NFCA_BYTE_STUFFING_MASK;
  252. i++;
  253. j++;
  254. }
  255. skb->data[i] = skb->data[i + j];
  256. }
  257. /* remove byte stuffing useless byte */
  258. skb_trim(skb, i - j);
  259. /* remove ST21NFCA_SOF_EOF from head */
  260. skb_pull(skb, 1);
  261. r = check_crc(skb->data, skb->len);
  262. if (r != 0)
  263. return -EBADMSG;
  264. /* remove headbyte */
  265. skb_pull(skb, 1);
  266. /* remove crc. Byte Stuffing is already removed here */
  267. skb_trim(skb, skb->len - 2);
  268. return skb->len;
  269. }
  270. return 0;
  271. }
  272. /*
  273. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  274. * that i2c bus will be flushed and that next read will start on a new frame.
  275. * returned skb contains only LLC header and payload.
  276. * returns:
  277. * frame size : if received frame is complete (find ST21NFCA_SOF_EOF at
  278. * end of read)
  279. * -EAGAIN : if received frame is incomplete (not find ST21NFCA_SOF_EOF
  280. * at end of read)
  281. * -EREMOTEIO : i2c read error (fatal)
  282. * -EBADMSG : frame was incorrect and discarded
  283. * (value returned from st21nfca_hci_i2c_repack)
  284. * -EIO : if no ST21NFCA_SOF_EOF is found after reaching
  285. * the read length end sequence
  286. */
  287. static int st21nfca_hci_i2c_read(struct st21nfca_i2c_phy *phy,
  288. struct sk_buff *skb)
  289. {
  290. int r, i;
  291. u8 len;
  292. u8 buf[ST21NFCA_HCI_LLC_MAX_PAYLOAD];
  293. struct i2c_client *client = phy->i2c_dev;
  294. if (phy->current_read_len < ARRAY_SIZE(len_seq)) {
  295. len = len_seq[phy->current_read_len];
  296. /*
  297. * Add retry mecanism
  298. * Operation on I2C interface may fail in case of operation on
  299. * RF or SWP interface
  300. */
  301. r = 0;
  302. mutex_lock(&phy->phy_lock);
  303. for (i = 0; i < ARRAY_SIZE(wait_tab) && r <= 0; i++) {
  304. r = i2c_master_recv(client, buf, len);
  305. if (r < 0)
  306. msleep(wait_tab[i]);
  307. }
  308. mutex_unlock(&phy->phy_lock);
  309. if (r != len) {
  310. phy->current_read_len = 0;
  311. return -EREMOTEIO;
  312. }
  313. /*
  314. * The first read sequence does not start with SOF.
  315. * Data is corrupeted so we drop it.
  316. */
  317. if (!phy->current_read_len && !IS_START_OF_FRAME(buf)) {
  318. skb_trim(skb, 0);
  319. phy->current_read_len = 0;
  320. return -EIO;
  321. } else if (phy->current_read_len && IS_START_OF_FRAME(buf)) {
  322. /*
  323. * Previous frame transmission was interrupted and
  324. * the frame got repeated.
  325. * Received frame start with ST21NFCA_SOF_EOF + 00.
  326. */
  327. skb_trim(skb, 0);
  328. phy->current_read_len = 0;
  329. }
  330. skb_put_data(skb, buf, len);
  331. if (skb->data[skb->len - 1] == ST21NFCA_SOF_EOF) {
  332. phy->current_read_len = 0;
  333. return st21nfca_hci_i2c_repack(skb);
  334. }
  335. phy->current_read_len++;
  336. return -EAGAIN;
  337. }
  338. return -EIO;
  339. }
  340. /*
  341. * Reads an shdlc frame from the chip. This is not as straightforward as it
  342. * seems. The frame format is data-crc, and corruption can occur anywhere
  343. * while transiting on i2c bus, such that we could read an invalid data.
  344. * The tricky case is when we read a corrupted data or crc. We must detect
  345. * this here in order to determine that data can be transmitted to the hci
  346. * core. This is the reason why we check the crc here.
  347. * The CLF will repeat a frame until we send a RR on that frame.
  348. *
  349. * On ST21NFCA, IRQ goes in idle when read starts. As no size information are
  350. * available in the incoming data, other IRQ might come. Every IRQ will trigger
  351. * a read sequence with different length and will fill the current frame.
  352. * The reception is complete once we reach a ST21NFCA_SOF_EOF.
  353. */
  354. static irqreturn_t st21nfca_hci_irq_thread_fn(int irq, void *phy_id)
  355. {
  356. struct st21nfca_i2c_phy *phy = phy_id;
  357. int r;
  358. if (!phy || irq != phy->i2c_dev->irq) {
  359. WARN_ON_ONCE(1);
  360. return IRQ_NONE;
  361. }
  362. if (phy->hard_fault != 0)
  363. return IRQ_HANDLED;
  364. r = st21nfca_hci_i2c_read(phy, phy->pending_skb);
  365. if (r == -EREMOTEIO) {
  366. phy->hard_fault = r;
  367. nfc_hci_recv_frame(phy->hdev, NULL);
  368. return IRQ_HANDLED;
  369. } else if (r == -EAGAIN || r == -EIO) {
  370. return IRQ_HANDLED;
  371. } else if (r == -EBADMSG && phy->crc_trials < ARRAY_SIZE(wait_tab)) {
  372. /*
  373. * With ST21NFCA, only one interface (I2C, RF or SWP)
  374. * may be active at a time.
  375. * Having incorrect crc is usually due to i2c macrocell
  376. * deactivation in the middle of a transmission.
  377. * It may generate corrupted data on i2c.
  378. * We give sometime to get i2c back.
  379. * The complete frame will be repeated.
  380. */
  381. msleep(wait_tab[phy->crc_trials]);
  382. phy->crc_trials++;
  383. phy->current_read_len = 0;
  384. kfree_skb(phy->pending_skb);
  385. } else if (r > 0) {
  386. /*
  387. * We succeeded to read data from the CLF and
  388. * data is valid.
  389. * Reset counter.
  390. */
  391. nfc_hci_recv_frame(phy->hdev, phy->pending_skb);
  392. phy->crc_trials = 0;
  393. } else {
  394. kfree_skb(phy->pending_skb);
  395. }
  396. phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
  397. if (phy->pending_skb == NULL) {
  398. phy->hard_fault = -ENOMEM;
  399. nfc_hci_recv_frame(phy->hdev, NULL);
  400. }
  401. return IRQ_HANDLED;
  402. }
  403. static const struct nfc_phy_ops i2c_phy_ops = {
  404. .write = st21nfca_hci_i2c_write,
  405. .enable = st21nfca_hci_i2c_enable,
  406. .disable = st21nfca_hci_i2c_disable,
  407. };
  408. static const struct acpi_gpio_params enable_gpios = { 1, 0, false };
  409. static const struct acpi_gpio_mapping acpi_st21nfca_gpios[] = {
  410. { "enable-gpios", &enable_gpios, 1 },
  411. {},
  412. };
  413. static int st21nfca_hci_i2c_probe(struct i2c_client *client,
  414. const struct i2c_device_id *id)
  415. {
  416. struct device *dev = &client->dev;
  417. struct st21nfca_i2c_phy *phy;
  418. int r;
  419. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  420. nfc_err(&client->dev, "Need I2C_FUNC_I2C\n");
  421. return -ENODEV;
  422. }
  423. phy = devm_kzalloc(&client->dev, sizeof(struct st21nfca_i2c_phy),
  424. GFP_KERNEL);
  425. if (!phy)
  426. return -ENOMEM;
  427. phy->i2c_dev = client;
  428. phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
  429. if (phy->pending_skb == NULL)
  430. return -ENOMEM;
  431. phy->current_read_len = 0;
  432. phy->crc_trials = 0;
  433. mutex_init(&phy->phy_lock);
  434. i2c_set_clientdata(client, phy);
  435. r = devm_acpi_dev_add_driver_gpios(dev, acpi_st21nfca_gpios);
  436. if (r)
  437. dev_dbg(dev, "Unable to add GPIO mapping table\n");
  438. /* Get EN GPIO from resource provider */
  439. phy->gpiod_ena = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
  440. if (IS_ERR(phy->gpiod_ena)) {
  441. nfc_err(dev, "Unable to get ENABLE GPIO\n");
  442. r = PTR_ERR(phy->gpiod_ena);
  443. goto out_free;
  444. }
  445. phy->se_status.is_ese_present =
  446. device_property_read_bool(&client->dev, "ese-present");
  447. phy->se_status.is_uicc_present =
  448. device_property_read_bool(&client->dev, "uicc-present");
  449. r = st21nfca_hci_platform_init(phy);
  450. if (r < 0) {
  451. nfc_err(&client->dev, "Unable to reboot st21nfca\n");
  452. goto out_free;
  453. }
  454. r = devm_request_threaded_irq(&client->dev, client->irq, NULL,
  455. st21nfca_hci_irq_thread_fn,
  456. IRQF_ONESHOT,
  457. ST21NFCA_HCI_DRIVER_NAME, phy);
  458. if (r < 0) {
  459. nfc_err(&client->dev, "Unable to register IRQ handler\n");
  460. goto out_free;
  461. }
  462. r = st21nfca_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME,
  463. ST21NFCA_FRAME_HEADROOM,
  464. ST21NFCA_FRAME_TAILROOM,
  465. ST21NFCA_HCI_LLC_MAX_PAYLOAD,
  466. &phy->hdev,
  467. &phy->se_status);
  468. if (r)
  469. goto out_free;
  470. return 0;
  471. out_free:
  472. kfree_skb(phy->pending_skb);
  473. return r;
  474. }
  475. static void st21nfca_hci_i2c_remove(struct i2c_client *client)
  476. {
  477. struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client);
  478. st21nfca_hci_remove(phy->hdev);
  479. if (phy->powered)
  480. st21nfca_hci_i2c_disable(phy);
  481. kfree_skb(phy->pending_skb);
  482. }
  483. static const struct i2c_device_id st21nfca_hci_i2c_id_table[] = {
  484. {ST21NFCA_HCI_DRIVER_NAME, 0},
  485. {}
  486. };
  487. MODULE_DEVICE_TABLE(i2c, st21nfca_hci_i2c_id_table);
  488. static const struct acpi_device_id st21nfca_hci_i2c_acpi_match[] __maybe_unused = {
  489. {"SMO2100", 0},
  490. {}
  491. };
  492. MODULE_DEVICE_TABLE(acpi, st21nfca_hci_i2c_acpi_match);
  493. static const struct of_device_id of_st21nfca_i2c_match[] __maybe_unused = {
  494. { .compatible = "st,st21nfca-i2c", },
  495. { .compatible = "st,st21nfca_i2c", },
  496. {}
  497. };
  498. MODULE_DEVICE_TABLE(of, of_st21nfca_i2c_match);
  499. static struct i2c_driver st21nfca_hci_i2c_driver = {
  500. .driver = {
  501. .name = ST21NFCA_HCI_I2C_DRIVER_NAME,
  502. .of_match_table = of_match_ptr(of_st21nfca_i2c_match),
  503. .acpi_match_table = ACPI_PTR(st21nfca_hci_i2c_acpi_match),
  504. },
  505. .probe = st21nfca_hci_i2c_probe,
  506. .id_table = st21nfca_hci_i2c_id_table,
  507. .remove = st21nfca_hci_i2c_remove,
  508. };
  509. module_i2c_driver(st21nfca_hci_i2c_driver);
  510. MODULE_LICENSE("GPL");
  511. MODULE_DESCRIPTION(DRIVER_DESC);