phy_common.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Link Layer for Samsung S3FWRN5 NCI based Driver
  4. *
  5. * Copyright (C) 2015 Samsung Electrnoics
  6. * Robert Baldyga <[email protected]>
  7. * Copyright (C) 2020 Samsung Electrnoics
  8. * Bongsu Jeon <[email protected]>
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include "phy_common.h"
  14. void s3fwrn5_phy_set_wake(void *phy_id, bool wake)
  15. {
  16. struct phy_common *phy = phy_id;
  17. mutex_lock(&phy->mutex);
  18. gpio_set_value(phy->gpio_fw_wake, wake);
  19. if (wake)
  20. msleep(S3FWRN5_EN_WAIT_TIME);
  21. mutex_unlock(&phy->mutex);
  22. }
  23. EXPORT_SYMBOL(s3fwrn5_phy_set_wake);
  24. bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode)
  25. {
  26. if (phy->mode == mode)
  27. return false;
  28. phy->mode = mode;
  29. gpio_set_value(phy->gpio_en, 1);
  30. gpio_set_value(phy->gpio_fw_wake, 0);
  31. if (mode == S3FWRN5_MODE_FW)
  32. gpio_set_value(phy->gpio_fw_wake, 1);
  33. if (mode != S3FWRN5_MODE_COLD) {
  34. msleep(S3FWRN5_EN_WAIT_TIME);
  35. gpio_set_value(phy->gpio_en, 0);
  36. msleep(S3FWRN5_EN_WAIT_TIME);
  37. }
  38. return true;
  39. }
  40. EXPORT_SYMBOL(s3fwrn5_phy_power_ctrl);
  41. void s3fwrn5_phy_set_mode(void *phy_id, enum s3fwrn5_mode mode)
  42. {
  43. struct phy_common *phy = phy_id;
  44. mutex_lock(&phy->mutex);
  45. s3fwrn5_phy_power_ctrl(phy, mode);
  46. mutex_unlock(&phy->mutex);
  47. }
  48. EXPORT_SYMBOL(s3fwrn5_phy_set_mode);
  49. enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id)
  50. {
  51. struct phy_common *phy = phy_id;
  52. enum s3fwrn5_mode mode;
  53. mutex_lock(&phy->mutex);
  54. mode = phy->mode;
  55. mutex_unlock(&phy->mutex);
  56. return mode;
  57. }
  58. EXPORT_SYMBOL(s3fwrn5_phy_get_mode);