fw_dnld.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Marvell NFC driver: Firmware downloader
  4. *
  5. * Copyright (C) 2015, Marvell International Ltd.
  6. */
  7. #include <linux/module.h>
  8. #include <asm/unaligned.h>
  9. #include <linux/firmware.h>
  10. #include <linux/nfc.h>
  11. #include <net/nfc/nci.h>
  12. #include <net/nfc/nci_core.h>
  13. #include "nfcmrvl.h"
  14. #define FW_DNLD_TIMEOUT 15000
  15. #define NCI_OP_PROPRIETARY_BOOT_CMD nci_opcode_pack(NCI_GID_PROPRIETARY, \
  16. NCI_OP_PROP_BOOT_CMD)
  17. /* FW download states */
  18. enum {
  19. STATE_RESET = 0,
  20. STATE_INIT,
  21. STATE_SET_REF_CLOCK,
  22. STATE_SET_HI_CONFIG,
  23. STATE_OPEN_LC,
  24. STATE_FW_DNLD,
  25. STATE_CLOSE_LC,
  26. STATE_BOOT
  27. };
  28. enum {
  29. SUBSTATE_WAIT_COMMAND = 0,
  30. SUBSTATE_WAIT_ACK_CREDIT,
  31. SUBSTATE_WAIT_NACK_CREDIT,
  32. SUBSTATE_WAIT_DATA_CREDIT,
  33. };
  34. /*
  35. * Patterns for responses
  36. */
  37. static const uint8_t nci_pattern_core_reset_ntf[] = {
  38. 0x60, 0x00, 0x02, 0xA0, 0x01
  39. };
  40. static const uint8_t nci_pattern_core_init_rsp[] = {
  41. 0x40, 0x01, 0x11
  42. };
  43. static const uint8_t nci_pattern_core_set_config_rsp[] = {
  44. 0x40, 0x02, 0x02, 0x00, 0x00
  45. };
  46. static const uint8_t nci_pattern_core_conn_create_rsp[] = {
  47. 0x40, 0x04, 0x04, 0x00
  48. };
  49. static const uint8_t nci_pattern_core_conn_close_rsp[] = {
  50. 0x40, 0x05, 0x01, 0x00
  51. };
  52. static const uint8_t nci_pattern_core_conn_credits_ntf[] = {
  53. 0x60, 0x06, 0x03, 0x01, NCI_CORE_LC_CONNID_PROP_FW_DL, 0x01
  54. };
  55. static const uint8_t nci_pattern_proprietary_boot_rsp[] = {
  56. 0x4F, 0x3A, 0x01, 0x00
  57. };
  58. static struct sk_buff *alloc_lc_skb(struct nfcmrvl_private *priv, uint8_t plen)
  59. {
  60. struct sk_buff *skb;
  61. struct nci_data_hdr *hdr;
  62. skb = nci_skb_alloc(priv->ndev, (NCI_DATA_HDR_SIZE + plen), GFP_KERNEL);
  63. if (!skb)
  64. return NULL;
  65. hdr = skb_put(skb, NCI_DATA_HDR_SIZE);
  66. hdr->conn_id = NCI_CORE_LC_CONNID_PROP_FW_DL;
  67. hdr->rfu = 0;
  68. hdr->plen = plen;
  69. nci_mt_set((__u8 *)hdr, NCI_MT_DATA_PKT);
  70. nci_pbf_set((__u8 *)hdr, NCI_PBF_LAST);
  71. return skb;
  72. }
  73. static void fw_dnld_over(struct nfcmrvl_private *priv, u32 error)
  74. {
  75. if (priv->fw_dnld.fw) {
  76. release_firmware(priv->fw_dnld.fw);
  77. priv->fw_dnld.fw = NULL;
  78. priv->fw_dnld.header = NULL;
  79. priv->fw_dnld.binary_config = NULL;
  80. }
  81. atomic_set(&priv->ndev->cmd_cnt, 0);
  82. if (timer_pending(&priv->ndev->cmd_timer))
  83. del_timer_sync(&priv->ndev->cmd_timer);
  84. if (timer_pending(&priv->fw_dnld.timer))
  85. del_timer_sync(&priv->fw_dnld.timer);
  86. nfc_info(priv->dev, "FW loading over (%d)]\n", error);
  87. if (error != 0) {
  88. /* failed, halt the chip to avoid power consumption */
  89. nfcmrvl_chip_halt(priv);
  90. }
  91. nfc_fw_download_done(priv->ndev->nfc_dev, priv->fw_dnld.name, error);
  92. }
  93. static void fw_dnld_timeout(struct timer_list *t)
  94. {
  95. struct nfcmrvl_private *priv = from_timer(priv, t, fw_dnld.timer);
  96. nfc_err(priv->dev, "FW loading timeout");
  97. priv->fw_dnld.state = STATE_RESET;
  98. fw_dnld_over(priv, -ETIMEDOUT);
  99. }
  100. static int process_state_reset(struct nfcmrvl_private *priv,
  101. const struct sk_buff *skb)
  102. {
  103. if (sizeof(nci_pattern_core_reset_ntf) != skb->len ||
  104. memcmp(skb->data, nci_pattern_core_reset_ntf,
  105. sizeof(nci_pattern_core_reset_ntf)))
  106. return -EINVAL;
  107. nfc_info(priv->dev, "BootROM reset, start fw download\n");
  108. /* Start FW download state machine */
  109. priv->fw_dnld.state = STATE_INIT;
  110. nci_send_cmd(priv->ndev, NCI_OP_CORE_INIT_CMD, 0, NULL);
  111. return 0;
  112. }
  113. static int process_state_init(struct nfcmrvl_private *priv,
  114. const struct sk_buff *skb)
  115. {
  116. struct nci_core_set_config_cmd cmd;
  117. if (sizeof(nci_pattern_core_init_rsp) >= skb->len ||
  118. memcmp(skb->data, nci_pattern_core_init_rsp,
  119. sizeof(nci_pattern_core_init_rsp)))
  120. return -EINVAL;
  121. cmd.num_params = 1;
  122. cmd.param.id = NFCMRVL_PROP_REF_CLOCK;
  123. cmd.param.len = 4;
  124. memcpy(cmd.param.val, &priv->fw_dnld.header->ref_clock, 4);
  125. nci_send_cmd(priv->ndev, NCI_OP_CORE_SET_CONFIG_CMD, 3 + cmd.param.len,
  126. &cmd);
  127. priv->fw_dnld.state = STATE_SET_REF_CLOCK;
  128. return 0;
  129. }
  130. static void create_lc(struct nfcmrvl_private *priv)
  131. {
  132. uint8_t param[2] = { NCI_CORE_LC_PROP_FW_DL, 0x0 };
  133. priv->fw_dnld.state = STATE_OPEN_LC;
  134. nci_send_cmd(priv->ndev, NCI_OP_CORE_CONN_CREATE_CMD, 2, param);
  135. }
  136. static int process_state_set_ref_clock(struct nfcmrvl_private *priv,
  137. const struct sk_buff *skb)
  138. {
  139. struct nci_core_set_config_cmd cmd;
  140. if (sizeof(nci_pattern_core_set_config_rsp) != skb->len ||
  141. memcmp(skb->data, nci_pattern_core_set_config_rsp, skb->len))
  142. return -EINVAL;
  143. cmd.num_params = 1;
  144. cmd.param.id = NFCMRVL_PROP_SET_HI_CONFIG;
  145. switch (priv->phy) {
  146. case NFCMRVL_PHY_UART:
  147. cmd.param.len = 5;
  148. memcpy(cmd.param.val,
  149. &priv->fw_dnld.binary_config->uart.baudrate,
  150. 4);
  151. cmd.param.val[4] =
  152. priv->fw_dnld.binary_config->uart.flow_control;
  153. break;
  154. case NFCMRVL_PHY_I2C:
  155. cmd.param.len = 5;
  156. memcpy(cmd.param.val,
  157. &priv->fw_dnld.binary_config->i2c.clk,
  158. 4);
  159. cmd.param.val[4] = 0;
  160. break;
  161. case NFCMRVL_PHY_SPI:
  162. cmd.param.len = 5;
  163. memcpy(cmd.param.val,
  164. &priv->fw_dnld.binary_config->spi.clk,
  165. 4);
  166. cmd.param.val[4] = 0;
  167. break;
  168. default:
  169. create_lc(priv);
  170. return 0;
  171. }
  172. priv->fw_dnld.state = STATE_SET_HI_CONFIG;
  173. nci_send_cmd(priv->ndev, NCI_OP_CORE_SET_CONFIG_CMD, 3 + cmd.param.len,
  174. &cmd);
  175. return 0;
  176. }
  177. static int process_state_set_hi_config(struct nfcmrvl_private *priv,
  178. const struct sk_buff *skb)
  179. {
  180. if (sizeof(nci_pattern_core_set_config_rsp) != skb->len ||
  181. memcmp(skb->data, nci_pattern_core_set_config_rsp, skb->len))
  182. return -EINVAL;
  183. create_lc(priv);
  184. return 0;
  185. }
  186. static int process_state_open_lc(struct nfcmrvl_private *priv,
  187. const struct sk_buff *skb)
  188. {
  189. if (sizeof(nci_pattern_core_conn_create_rsp) >= skb->len ||
  190. memcmp(skb->data, nci_pattern_core_conn_create_rsp,
  191. sizeof(nci_pattern_core_conn_create_rsp)))
  192. return -EINVAL;
  193. priv->fw_dnld.state = STATE_FW_DNLD;
  194. priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
  195. priv->fw_dnld.offset = priv->fw_dnld.binary_config->offset;
  196. return 0;
  197. }
  198. static int process_state_fw_dnld(struct nfcmrvl_private *priv,
  199. struct sk_buff *skb)
  200. {
  201. uint16_t len;
  202. uint16_t comp_len;
  203. struct sk_buff *out_skb;
  204. switch (priv->fw_dnld.substate) {
  205. case SUBSTATE_WAIT_COMMAND:
  206. /*
  207. * Command format:
  208. * B0..2: NCI header
  209. * B3 : Helper command (0xA5)
  210. * B4..5: le16 data size
  211. * B6..7: le16 data size complement (~)
  212. * B8..N: payload
  213. */
  214. /* Remove NCI HDR */
  215. skb_pull(skb, 3);
  216. if (skb->data[0] != HELPER_CMD_PACKET_FORMAT || skb->len != 5) {
  217. nfc_err(priv->dev, "bad command");
  218. return -EINVAL;
  219. }
  220. skb_pull(skb, 1);
  221. len = get_unaligned_le16(skb->data);
  222. skb_pull(skb, 2);
  223. comp_len = get_unaligned_le16(skb->data);
  224. memcpy(&comp_len, skb->data, 2);
  225. skb_pull(skb, 2);
  226. if (((~len) & 0xFFFF) != comp_len) {
  227. nfc_err(priv->dev, "bad len complement: %x %x %x",
  228. len, comp_len, (~len & 0xFFFF));
  229. out_skb = alloc_lc_skb(priv, 1);
  230. if (!out_skb)
  231. return -ENOMEM;
  232. skb_put_u8(out_skb, 0xBF);
  233. nci_send_frame(priv->ndev, out_skb);
  234. priv->fw_dnld.substate = SUBSTATE_WAIT_NACK_CREDIT;
  235. return 0;
  236. }
  237. priv->fw_dnld.chunk_len = len;
  238. out_skb = alloc_lc_skb(priv, 1);
  239. if (!out_skb)
  240. return -ENOMEM;
  241. skb_put_u8(out_skb, HELPER_ACK_PACKET_FORMAT);
  242. nci_send_frame(priv->ndev, out_skb);
  243. priv->fw_dnld.substate = SUBSTATE_WAIT_ACK_CREDIT;
  244. break;
  245. case SUBSTATE_WAIT_ACK_CREDIT:
  246. if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
  247. memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
  248. skb->len)) {
  249. nfc_err(priv->dev, "bad packet: waiting for credit");
  250. return -EINVAL;
  251. }
  252. if (priv->fw_dnld.chunk_len == 0) {
  253. /* FW Loading is done */
  254. uint8_t conn_id = NCI_CORE_LC_CONNID_PROP_FW_DL;
  255. priv->fw_dnld.state = STATE_CLOSE_LC;
  256. nci_send_cmd(priv->ndev, NCI_OP_CORE_CONN_CLOSE_CMD,
  257. 1, &conn_id);
  258. } else {
  259. out_skb = alloc_lc_skb(priv, priv->fw_dnld.chunk_len);
  260. if (!out_skb)
  261. return -ENOMEM;
  262. skb_put_data(out_skb,
  263. ((uint8_t *)priv->fw_dnld.fw->data) + priv->fw_dnld.offset,
  264. priv->fw_dnld.chunk_len);
  265. nci_send_frame(priv->ndev, out_skb);
  266. priv->fw_dnld.substate = SUBSTATE_WAIT_DATA_CREDIT;
  267. }
  268. break;
  269. case SUBSTATE_WAIT_DATA_CREDIT:
  270. if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
  271. memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
  272. skb->len)) {
  273. nfc_err(priv->dev, "bad packet: waiting for credit");
  274. return -EINVAL;
  275. }
  276. priv->fw_dnld.offset += priv->fw_dnld.chunk_len;
  277. priv->fw_dnld.chunk_len = 0;
  278. priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
  279. break;
  280. case SUBSTATE_WAIT_NACK_CREDIT:
  281. if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
  282. memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
  283. skb->len)) {
  284. nfc_err(priv->dev, "bad packet: waiting for credit");
  285. return -EINVAL;
  286. }
  287. priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
  288. break;
  289. }
  290. return 0;
  291. }
  292. static int process_state_close_lc(struct nfcmrvl_private *priv,
  293. const struct sk_buff *skb)
  294. {
  295. if (sizeof(nci_pattern_core_conn_close_rsp) != skb->len ||
  296. memcmp(skb->data, nci_pattern_core_conn_close_rsp, skb->len))
  297. return -EINVAL;
  298. priv->fw_dnld.state = STATE_BOOT;
  299. nci_send_cmd(priv->ndev, NCI_OP_PROPRIETARY_BOOT_CMD, 0, NULL);
  300. return 0;
  301. }
  302. static int process_state_boot(struct nfcmrvl_private *priv,
  303. const struct sk_buff *skb)
  304. {
  305. if (sizeof(nci_pattern_proprietary_boot_rsp) != skb->len ||
  306. memcmp(skb->data, nci_pattern_proprietary_boot_rsp, skb->len))
  307. return -EINVAL;
  308. /*
  309. * Update HI config to use the right configuration for the next
  310. * data exchanges.
  311. */
  312. priv->if_ops->nci_update_config(priv,
  313. &priv->fw_dnld.binary_config->config);
  314. if (priv->fw_dnld.binary_config == &priv->fw_dnld.header->helper) {
  315. /*
  316. * This is the case where an helper was needed and we have
  317. * uploaded it. Now we have to wait the next RESET NTF to start
  318. * FW download.
  319. */
  320. priv->fw_dnld.state = STATE_RESET;
  321. priv->fw_dnld.binary_config = &priv->fw_dnld.header->firmware;
  322. nfc_info(priv->dev, "FW loading: helper loaded");
  323. } else {
  324. nfc_info(priv->dev, "FW loading: firmware loaded");
  325. fw_dnld_over(priv, 0);
  326. }
  327. return 0;
  328. }
  329. static void fw_dnld_rx_work(struct work_struct *work)
  330. {
  331. int ret;
  332. struct sk_buff *skb;
  333. struct nfcmrvl_fw_dnld *fw_dnld = container_of(work,
  334. struct nfcmrvl_fw_dnld,
  335. rx_work);
  336. struct nfcmrvl_private *priv = container_of(fw_dnld,
  337. struct nfcmrvl_private,
  338. fw_dnld);
  339. while ((skb = skb_dequeue(&fw_dnld->rx_q))) {
  340. nfc_send_to_raw_sock(priv->ndev->nfc_dev, skb,
  341. RAW_PAYLOAD_NCI, NFC_DIRECTION_RX);
  342. switch (fw_dnld->state) {
  343. case STATE_RESET:
  344. ret = process_state_reset(priv, skb);
  345. break;
  346. case STATE_INIT:
  347. ret = process_state_init(priv, skb);
  348. break;
  349. case STATE_SET_REF_CLOCK:
  350. ret = process_state_set_ref_clock(priv, skb);
  351. break;
  352. case STATE_SET_HI_CONFIG:
  353. ret = process_state_set_hi_config(priv, skb);
  354. break;
  355. case STATE_OPEN_LC:
  356. ret = process_state_open_lc(priv, skb);
  357. break;
  358. case STATE_FW_DNLD:
  359. ret = process_state_fw_dnld(priv, skb);
  360. break;
  361. case STATE_CLOSE_LC:
  362. ret = process_state_close_lc(priv, skb);
  363. break;
  364. case STATE_BOOT:
  365. ret = process_state_boot(priv, skb);
  366. break;
  367. default:
  368. ret = -EFAULT;
  369. }
  370. kfree_skb(skb);
  371. if (ret != 0) {
  372. nfc_err(priv->dev, "FW loading error");
  373. fw_dnld_over(priv, ret);
  374. break;
  375. }
  376. }
  377. }
  378. int nfcmrvl_fw_dnld_init(struct nfcmrvl_private *priv)
  379. {
  380. char name[32];
  381. INIT_WORK(&priv->fw_dnld.rx_work, fw_dnld_rx_work);
  382. snprintf(name, sizeof(name), "%s_nfcmrvl_fw_dnld_rx_wq",
  383. dev_name(&priv->ndev->nfc_dev->dev));
  384. priv->fw_dnld.rx_wq = create_singlethread_workqueue(name);
  385. if (!priv->fw_dnld.rx_wq)
  386. return -ENOMEM;
  387. skb_queue_head_init(&priv->fw_dnld.rx_q);
  388. return 0;
  389. }
  390. void nfcmrvl_fw_dnld_deinit(struct nfcmrvl_private *priv)
  391. {
  392. destroy_workqueue(priv->fw_dnld.rx_wq);
  393. }
  394. void nfcmrvl_fw_dnld_recv_frame(struct nfcmrvl_private *priv,
  395. struct sk_buff *skb)
  396. {
  397. /* Discard command timer */
  398. if (timer_pending(&priv->ndev->cmd_timer))
  399. del_timer_sync(&priv->ndev->cmd_timer);
  400. /* Allow next command */
  401. atomic_set(&priv->ndev->cmd_cnt, 1);
  402. /* Queue and trigger rx work */
  403. skb_queue_tail(&priv->fw_dnld.rx_q, skb);
  404. queue_work(priv->fw_dnld.rx_wq, &priv->fw_dnld.rx_work);
  405. }
  406. void nfcmrvl_fw_dnld_abort(struct nfcmrvl_private *priv)
  407. {
  408. fw_dnld_over(priv, -EHOSTDOWN);
  409. }
  410. int nfcmrvl_fw_dnld_start(struct nci_dev *ndev, const char *firmware_name)
  411. {
  412. struct nfcmrvl_private *priv = nci_get_drvdata(ndev);
  413. struct nfcmrvl_fw_dnld *fw_dnld = &priv->fw_dnld;
  414. int res;
  415. if (!priv->support_fw_dnld)
  416. return -ENOTSUPP;
  417. if (!firmware_name || !firmware_name[0])
  418. return -EINVAL;
  419. strcpy(fw_dnld->name, firmware_name);
  420. /*
  421. * Retrieve FW binary file and parse it to initialize FW download
  422. * state machine.
  423. */
  424. /* Retrieve FW binary */
  425. res = request_firmware(&fw_dnld->fw, firmware_name,
  426. &ndev->nfc_dev->dev);
  427. if (res < 0) {
  428. nfc_err(priv->dev, "failed to retrieve FW %s", firmware_name);
  429. return -ENOENT;
  430. }
  431. fw_dnld->header = (const struct nfcmrvl_fw *) priv->fw_dnld.fw->data;
  432. if (fw_dnld->header->magic != NFCMRVL_FW_MAGIC ||
  433. fw_dnld->header->phy != priv->phy) {
  434. nfc_err(priv->dev, "bad firmware binary %s magic=0x%x phy=%d",
  435. firmware_name, fw_dnld->header->magic,
  436. fw_dnld->header->phy);
  437. release_firmware(fw_dnld->fw);
  438. fw_dnld->header = NULL;
  439. return -EINVAL;
  440. }
  441. if (fw_dnld->header->helper.offset != 0) {
  442. nfc_info(priv->dev, "loading helper");
  443. fw_dnld->binary_config = &fw_dnld->header->helper;
  444. } else {
  445. nfc_info(priv->dev, "loading firmware");
  446. fw_dnld->binary_config = &fw_dnld->header->firmware;
  447. }
  448. /* Configure a timer for timeout */
  449. timer_setup(&priv->fw_dnld.timer, fw_dnld_timeout, 0);
  450. mod_timer(&priv->fw_dnld.timer,
  451. jiffies + msecs_to_jiffies(FW_DNLD_TIMEOUT));
  452. /* Ronfigure HI to be sure that it is the bootrom values */
  453. priv->if_ops->nci_update_config(priv,
  454. &fw_dnld->header->bootrom.config);
  455. /* Allow first command */
  456. atomic_set(&priv->ndev->cmd_cnt, 1);
  457. /* First, reset the chip */
  458. priv->fw_dnld.state = STATE_RESET;
  459. nfcmrvl_chip_reset(priv);
  460. /* Now wait for CORE_RESET_NTF or timeout */
  461. return 0;
  462. }