t7xx_pci.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only
  2. *
  3. * Copyright (c) 2021, MediaTek Inc.
  4. * Copyright (c) 2021-2022, Intel Corporation.
  5. *
  6. * Authors:
  7. * Haijun Liu <[email protected]>
  8. * Ricardo Martinez <[email protected]>
  9. * Sreehari Kancharla <[email protected]>
  10. *
  11. * Contributors:
  12. * Amir Hanania <[email protected]>
  13. * Chiranjeevi Rapolu <[email protected]>
  14. * Moises Veleta <[email protected]>
  15. */
  16. #ifndef __T7XX_PCI_H__
  17. #define __T7XX_PCI_H__
  18. #include <linux/completion.h>
  19. #include <linux/irqreturn.h>
  20. #include <linux/mutex.h>
  21. #include <linux/pci.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/types.h>
  24. #include "t7xx_reg.h"
  25. /* struct t7xx_addr_base - holds base addresses
  26. * @pcie_mac_ireg_base: PCIe MAC register base
  27. * @pcie_ext_reg_base: used to calculate base addresses for CLDMA, DPMA and MHCCIF registers
  28. * @pcie_dev_reg_trsl_addr: used to calculate the register base address
  29. * @infracfg_ao_base: base address used in CLDMA reset operations
  30. * @mhccif_rc_base: host view of MHCCIF rc base addr
  31. */
  32. struct t7xx_addr_base {
  33. void __iomem *pcie_mac_ireg_base;
  34. void __iomem *pcie_ext_reg_base;
  35. u32 pcie_dev_reg_trsl_addr;
  36. void __iomem *infracfg_ao_base;
  37. void __iomem *mhccif_rc_base;
  38. };
  39. typedef irqreturn_t (*t7xx_intr_callback)(int irq, void *param);
  40. /* struct t7xx_pci_dev - MTK device context structure
  41. * @intr_handler: array of handler function for request_threaded_irq
  42. * @intr_thread: array of thread_fn for request_threaded_irq
  43. * @callback_param: array of cookie passed back to interrupt functions
  44. * @pdev: PCI device
  45. * @base_addr: memory base addresses of HW components
  46. * @md: modem interface
  47. * @ccmni_ctlb: context structure used to control the network data path
  48. * @rgu_pci_irq_en: RGU callback ISR registered and active
  49. * @md_pm_entities: list of pm entities
  50. * @md_pm_entity_mtx: protects md_pm_entities list
  51. * @pm_sr_ack: ack from the device when went to sleep or woke up
  52. * @md_pm_state: state for resume/suspend
  53. * @md_pm_lock: protects PCIe sleep lock
  54. * @sleep_disable_count: PCIe L1.2 lock counter
  55. * @sleep_lock_acquire: indicates that sleep has been disabled
  56. */
  57. struct t7xx_pci_dev {
  58. t7xx_intr_callback intr_handler[EXT_INT_NUM];
  59. t7xx_intr_callback intr_thread[EXT_INT_NUM];
  60. void *callback_param[EXT_INT_NUM];
  61. struct pci_dev *pdev;
  62. struct t7xx_addr_base base_addr;
  63. struct t7xx_modem *md;
  64. struct t7xx_ccmni_ctrl *ccmni_ctlb;
  65. bool rgu_pci_irq_en;
  66. struct completion init_done;
  67. /* Low Power Items */
  68. struct list_head md_pm_entities;
  69. struct mutex md_pm_entity_mtx; /* Protects MD PM entities list */
  70. struct completion pm_sr_ack;
  71. atomic_t md_pm_state;
  72. spinlock_t md_pm_lock; /* Protects PCI resource lock */
  73. unsigned int sleep_disable_count;
  74. struct completion sleep_lock_acquire;
  75. };
  76. enum t7xx_pm_id {
  77. PM_ENTITY_ID_CTRL1,
  78. PM_ENTITY_ID_CTRL2,
  79. PM_ENTITY_ID_DATA,
  80. PM_ENTITY_ID_INVALID
  81. };
  82. /* struct md_pm_entity - device power management entity
  83. * @entity: list of PM Entities
  84. * @suspend: callback invoked before sending D3 request to device
  85. * @suspend_late: callback invoked after getting D3 ACK from device
  86. * @resume_early: callback invoked before sending the resume request to device
  87. * @resume: callback invoked after getting resume ACK from device
  88. * @id: unique PM entity identifier
  89. * @entity_param: parameter passed to the registered callbacks
  90. *
  91. * This structure is used to indicate PM operations required by internal
  92. * HW modules such as CLDMA and DPMA.
  93. */
  94. struct md_pm_entity {
  95. struct list_head entity;
  96. int (*suspend)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
  97. void (*suspend_late)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
  98. void (*resume_early)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
  99. int (*resume)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
  100. enum t7xx_pm_id id;
  101. void *entity_param;
  102. };
  103. void t7xx_pci_disable_sleep(struct t7xx_pci_dev *t7xx_dev);
  104. void t7xx_pci_enable_sleep(struct t7xx_pci_dev *t7xx_dev);
  105. int t7xx_pci_sleep_disable_complete(struct t7xx_pci_dev *t7xx_dev);
  106. int t7xx_pci_pm_entity_register(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
  107. int t7xx_pci_pm_entity_unregister(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
  108. void t7xx_pci_pm_init_late(struct t7xx_pci_dev *t7xx_dev);
  109. void t7xx_pci_pm_exp_detected(struct t7xx_pci_dev *t7xx_dev);
  110. #endif /* __T7XX_PCI_H__ */