rtw8852b.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
  2. /* Copyright(c) 2019-2022 Realtek Corporation
  3. */
  4. #include "core.h"
  5. #include "mac.h"
  6. #include "reg.h"
  7. static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = {
  8. [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6,
  9. &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6,
  10. &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18,
  11. &rtw89_mac_size.ple_qt58},
  12. [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9,
  13. &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4,
  14. &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13,
  15. &rtw89_mac_size.ple_qt13},
  16. [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
  17. NULL},
  18. };
  19. static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev)
  20. {
  21. int ret;
  22. rtw89_write8_set(rtwdev, R_AX_SYS_FUNC_EN,
  23. B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN);
  24. rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x1);
  25. rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
  26. rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
  27. rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
  28. ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0xC7,
  29. FULL_BIT_MASK);
  30. if (ret)
  31. return ret;
  32. ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0xC7,
  33. FULL_BIT_MASK);
  34. if (ret)
  35. return ret;
  36. rtw89_write8(rtwdev, R_AX_PHYREG_SET, PHYREG_SET_XYN_CYCLE);
  37. return 0;
  38. }
  39. static int rtw8852b_mac_disable_bb_rf(struct rtw89_dev *rtwdev)
  40. {
  41. u8 wl_rfc_s0;
  42. u8 wl_rfc_s1;
  43. int ret;
  44. rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN,
  45. B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN);
  46. ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, &wl_rfc_s0);
  47. if (ret)
  48. return ret;
  49. wl_rfc_s0 &= ~XTAL_SI_RF00S_EN;
  50. ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, wl_rfc_s0,
  51. FULL_BIT_MASK);
  52. if (ret)
  53. return ret;
  54. ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, &wl_rfc_s1);
  55. if (ret)
  56. return ret;
  57. wl_rfc_s1 &= ~XTAL_SI_RF10S_EN;
  58. ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, wl_rfc_s1,
  59. FULL_BIT_MASK);
  60. return ret;
  61. }
  62. static const struct rtw89_chip_ops rtw8852b_chip_ops = {
  63. .enable_bb_rf = rtw8852b_mac_enable_bb_rf,
  64. .disable_bb_rf = rtw8852b_mac_disable_bb_rf,
  65. };
  66. const struct rtw89_chip_info rtw8852b_chip_info = {
  67. .chip_id = RTL8852B,
  68. .fifo_size = 196608,
  69. .dle_scc_rsvd_size = 98304,
  70. .dle_mem = rtw8852b_dle_mem_pcie,
  71. .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) |
  72. BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) |
  73. BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI),
  74. };
  75. EXPORT_SYMBOL(rtw8852b_chip_info);
  76. MODULE_FIRMWARE("rtw89/rtw8852b_fw.bin");
  77. MODULE_AUTHOR("Realtek Corporation");
  78. MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852B driver");
  79. MODULE_LICENSE("Dual BSD/GPL");