efuse.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright(c) 2009-2012 Realtek Corporation.*/
  3. #ifndef __RTL_EFUSE_H_
  4. #define __RTL_EFUSE_H_
  5. #define EFUSE_IC_ID_OFFSET 506
  6. #define EFUSE_MAX_WORD_UNIT 4
  7. #define EFUSE_INIT_MAP 0
  8. #define EFUSE_MODIFY_MAP 1
  9. #define PG_STATE_HEADER 0x01
  10. #define PG_STATE_WORD_0 0x02
  11. #define PG_STATE_WORD_1 0x04
  12. #define PG_STATE_WORD_2 0x08
  13. #define PG_STATE_WORD_3 0x10
  14. #define PG_STATE_DATA 0x20
  15. #define EFUSE_REPEAT_THRESHOLD_ 3
  16. #define EFUSE_ERROE_HANDLE 1
  17. struct efuse_map {
  18. u8 offset;
  19. u8 word_start;
  20. u8 byte_start;
  21. u8 byte_cnts;
  22. };
  23. struct pgpkt_struct {
  24. u8 offset;
  25. u8 word_en;
  26. u8 data[8];
  27. };
  28. enum efuse_data_item {
  29. EFUSE_CHIP_ID = 0,
  30. EFUSE_LDO_SETTING,
  31. EFUSE_CLK_SETTING,
  32. EFUSE_SDIO_SETTING,
  33. EFUSE_CCCR,
  34. EFUSE_SDIO_MODE,
  35. EFUSE_OCR,
  36. EFUSE_F0CIS,
  37. EFUSE_F1CIS,
  38. EFUSE_MAC_ADDR,
  39. EFUSE_EEPROM_VER,
  40. EFUSE_CHAN_PLAN,
  41. EFUSE_TXPW_TAB
  42. };
  43. enum {
  44. VOLTAGE_V25 = 0x03,
  45. LDOE25_SHIFT = 28,
  46. };
  47. struct efuse_priv {
  48. u8 id[2];
  49. u8 ldo_setting[2];
  50. u8 clk_setting[2];
  51. u8 cccr;
  52. u8 sdio_mode;
  53. u8 ocr[3];
  54. u8 cis0[17];
  55. u8 cis1[48];
  56. u8 mac_addr[6];
  57. u8 eeprom_verno;
  58. u8 channel_plan;
  59. u8 tx_power_b[14];
  60. u8 tx_power_g[14];
  61. };
  62. void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
  63. void efuse_initialize(struct ieee80211_hw *hw);
  64. u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
  65. int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
  66. void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
  67. void read_efuse(struct ieee80211_hw *hw, u16 _offset,
  68. u16 _size_byte, u8 *pbuf);
  69. void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
  70. u16 offset, u32 *value);
  71. void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
  72. u16 offset, u32 value);
  73. bool efuse_shadow_update(struct ieee80211_hw *hw);
  74. bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
  75. void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
  76. void efuse_force_write_vendor_id(struct ieee80211_hw *hw);
  77. void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
  78. void efuse_power_switch(struct ieee80211_hw *hw, u8 write, u8 pwrstate);
  79. int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
  80. int max_size, u8 *hwinfo, int *params);
  81. void rtl_fill_dummy(u8 *pfwbuf, u32 *pfwlen);
  82. void rtl_fw_page_write(struct ieee80211_hw *hw, u32 page, const u8 *buffer,
  83. u32 size);
  84. void rtl_fw_block_write(struct ieee80211_hw *hw, const u8 *buffer, u32 size);
  85. void rtl_efuse_ops_init(struct ieee80211_hw *hw);
  86. #endif