main.c 52 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/moduleparam.h>
  7. #include <linux/if_arp.h>
  8. #include <linux/etherdevice.h>
  9. #include <linux/rtnetlink.h>
  10. #include "wil6210.h"
  11. #include "txrx.h"
  12. #include "txrx_edma.h"
  13. #include "wmi.h"
  14. #include "boot_loader.h"
  15. #define WAIT_FOR_HALP_VOTE_MS 100
  16. #define WAIT_FOR_SCAN_ABORT_MS 1000
  17. #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
  18. #define WIL_BOARD_FILE_MAX_NAMELEN 128
  19. bool debug_fw; /* = false; */
  20. module_param(debug_fw, bool, 0444);
  21. MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
  22. static u8 oob_mode;
  23. module_param(oob_mode, byte, 0444);
  24. MODULE_PARM_DESC(oob_mode,
  25. " enable out of the box (OOB) mode in FW, for diagnostics and certification");
  26. bool no_fw_recovery;
  27. module_param(no_fw_recovery, bool, 0644);
  28. MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
  29. /* if not set via modparam, will be set to default value of 1/8 of
  30. * rx ring size during init flow
  31. */
  32. unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
  33. module_param(rx_ring_overflow_thrsh, ushort, 0444);
  34. MODULE_PARM_DESC(rx_ring_overflow_thrsh,
  35. " RX ring overflow threshold in descriptors.");
  36. /* We allow allocation of more than 1 page buffers to support large packets.
  37. * It is suboptimal behavior performance wise in case MTU above page size.
  38. */
  39. unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
  40. static int mtu_max_set(const char *val, const struct kernel_param *kp)
  41. {
  42. int ret;
  43. /* sets mtu_max directly. no need to restore it in case of
  44. * illegal value since we assume this will fail insmod
  45. */
  46. ret = param_set_uint(val, kp);
  47. if (ret)
  48. return ret;
  49. if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
  50. ret = -EINVAL;
  51. return ret;
  52. }
  53. static const struct kernel_param_ops mtu_max_ops = {
  54. .set = mtu_max_set,
  55. .get = param_get_uint,
  56. };
  57. module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
  58. MODULE_PARM_DESC(mtu_max, " Max MTU value.");
  59. static uint rx_ring_order;
  60. static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
  61. static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
  62. static int ring_order_set(const char *val, const struct kernel_param *kp)
  63. {
  64. int ret;
  65. uint x;
  66. ret = kstrtouint(val, 0, &x);
  67. if (ret)
  68. return ret;
  69. if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
  70. return -EINVAL;
  71. *((uint *)kp->arg) = x;
  72. return 0;
  73. }
  74. static const struct kernel_param_ops ring_order_ops = {
  75. .set = ring_order_set,
  76. .get = param_get_uint,
  77. };
  78. module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
  79. MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
  80. module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
  81. MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
  82. module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
  83. MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
  84. enum {
  85. WIL_BOOT_ERR,
  86. WIL_BOOT_VANILLA,
  87. WIL_BOOT_PRODUCTION,
  88. WIL_BOOT_DEVELOPMENT,
  89. };
  90. enum {
  91. WIL_SIG_STATUS_VANILLA = 0x0,
  92. WIL_SIG_STATUS_DEVELOPMENT = 0x1,
  93. WIL_SIG_STATUS_PRODUCTION = 0x2,
  94. WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
  95. };
  96. #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
  97. #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
  98. #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
  99. #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
  100. /* round up to be above 2 ms total */
  101. #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
  102. /*
  103. * Due to a hardware issue,
  104. * one has to read/write to/from NIC in 32-bit chunks;
  105. * regular memcpy_fromio and siblings will
  106. * not work on 64-bit platform - it uses 64-bit transactions
  107. *
  108. * Force 32-bit transactions to enable NIC on 64-bit platforms
  109. *
  110. * To avoid byte swap on big endian host, __raw_{read|write}l
  111. * should be used - {read|write}l would swap bytes to provide
  112. * little endian on PCI value in host endianness.
  113. */
  114. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  115. size_t count)
  116. {
  117. u32 *d = dst;
  118. const volatile u32 __iomem *s = src;
  119. for (; count >= 4; count -= 4)
  120. *d++ = __raw_readl(s++);
  121. if (unlikely(count)) {
  122. /* count can be 1..3 */
  123. u32 tmp = __raw_readl(s);
  124. memcpy(d, &tmp, count);
  125. }
  126. }
  127. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  128. size_t count)
  129. {
  130. volatile u32 __iomem *d = dst;
  131. const u32 *s = src;
  132. for (; count >= 4; count -= 4)
  133. __raw_writel(*s++, d++);
  134. if (unlikely(count)) {
  135. /* count can be 1..3 */
  136. u32 tmp = 0;
  137. memcpy(&tmp, s, count);
  138. __raw_writel(tmp, d);
  139. }
  140. }
  141. /* Device memory access is prohibited while reset or suspend.
  142. * wil_mem_access_lock protects accessing device memory in these cases
  143. */
  144. int wil_mem_access_lock(struct wil6210_priv *wil)
  145. {
  146. if (!down_read_trylock(&wil->mem_lock))
  147. return -EBUSY;
  148. if (test_bit(wil_status_suspending, wil->status) ||
  149. test_bit(wil_status_suspended, wil->status)) {
  150. up_read(&wil->mem_lock);
  151. return -EBUSY;
  152. }
  153. return 0;
  154. }
  155. void wil_mem_access_unlock(struct wil6210_priv *wil)
  156. {
  157. up_read(&wil->mem_lock);
  158. }
  159. static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
  160. {
  161. struct wil_ring *ring = &wil->ring_tx[id];
  162. struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
  163. lockdep_assert_held(&wil->mutex);
  164. if (!ring->va)
  165. return;
  166. wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
  167. spin_lock_bh(&txdata->lock);
  168. txdata->dot1x_open = false;
  169. txdata->mid = U8_MAX;
  170. txdata->enabled = 0; /* no Tx can be in progress or start anew */
  171. spin_unlock_bh(&txdata->lock);
  172. /* napi_synchronize waits for completion of the current NAPI but will
  173. * not prevent the next NAPI run.
  174. * Add a memory barrier to guarantee that txdata->enabled is zeroed
  175. * before napi_synchronize so that the next scheduled NAPI will not
  176. * handle this vring
  177. */
  178. wmb();
  179. /* make sure NAPI won't touch this vring */
  180. if (test_bit(wil_status_napi_en, wil->status))
  181. napi_synchronize(&wil->napi_tx);
  182. wil->txrx_ops.ring_fini_tx(wil, ring);
  183. }
  184. static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
  185. {
  186. int i;
  187. for (i = 0; i < wil->max_assoc_sta; i++) {
  188. if (wil->sta[i].mid == mid &&
  189. wil->sta[i].status == wil_sta_connected)
  190. return true;
  191. }
  192. return false;
  193. }
  194. static void wil_disconnect_cid_complete(struct wil6210_vif *vif, int cid,
  195. u16 reason_code)
  196. __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
  197. {
  198. uint i;
  199. struct wil6210_priv *wil = vif_to_wil(vif);
  200. struct net_device *ndev = vif_to_ndev(vif);
  201. struct wireless_dev *wdev = vif_to_wdev(vif);
  202. struct wil_sta_info *sta = &wil->sta[cid];
  203. int min_ring_id = wil_get_min_tx_ring_id(wil);
  204. might_sleep();
  205. wil_dbg_misc(wil,
  206. "disconnect_cid_complete: CID %d, MID %d, status %d\n",
  207. cid, sta->mid, sta->status);
  208. /* inform upper layers */
  209. if (sta->status != wil_sta_unused) {
  210. if (vif->mid != sta->mid) {
  211. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
  212. vif->mid);
  213. }
  214. switch (wdev->iftype) {
  215. case NL80211_IFTYPE_AP:
  216. case NL80211_IFTYPE_P2P_GO:
  217. /* AP-like interface */
  218. cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
  219. break;
  220. default:
  221. break;
  222. }
  223. sta->status = wil_sta_unused;
  224. sta->mid = U8_MAX;
  225. }
  226. /* reorder buffers */
  227. for (i = 0; i < WIL_STA_TID_NUM; i++) {
  228. struct wil_tid_ampdu_rx *r;
  229. spin_lock_bh(&sta->tid_rx_lock);
  230. r = sta->tid_rx[i];
  231. sta->tid_rx[i] = NULL;
  232. wil_tid_ampdu_rx_free(wil, r);
  233. spin_unlock_bh(&sta->tid_rx_lock);
  234. }
  235. /* crypto context */
  236. memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
  237. memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
  238. /* release vrings */
  239. for (i = min_ring_id; i < ARRAY_SIZE(wil->ring_tx); i++) {
  240. if (wil->ring2cid_tid[i][0] == cid)
  241. wil_ring_fini_tx(wil, i);
  242. }
  243. /* statistics */
  244. memset(&sta->stats, 0, sizeof(sta->stats));
  245. sta->stats.tx_latency_min_us = U32_MAX;
  246. wil_sta_info_amsdu_init(sta);
  247. }
  248. static void _wil6210_disconnect_complete(struct wil6210_vif *vif,
  249. const u8 *bssid, u16 reason_code)
  250. {
  251. struct wil6210_priv *wil = vif_to_wil(vif);
  252. int cid = -ENOENT;
  253. struct net_device *ndev;
  254. struct wireless_dev *wdev;
  255. ndev = vif_to_ndev(vif);
  256. wdev = vif_to_wdev(vif);
  257. might_sleep();
  258. wil_info(wil, "disconnect_complete: bssid=%pM, reason=%d\n",
  259. bssid, reason_code);
  260. /* Cases are:
  261. * - disconnect single STA, still connected
  262. * - disconnect single STA, already disconnected
  263. * - disconnect all
  264. *
  265. * For "disconnect all", there are 3 options:
  266. * - bssid == NULL
  267. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  268. * - bssid is our MAC address
  269. */
  270. if (bssid && !is_broadcast_ether_addr(bssid) &&
  271. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  272. cid = wil_find_cid(wil, vif->mid, bssid);
  273. wil_dbg_misc(wil,
  274. "Disconnect complete %pM, CID=%d, reason=%d\n",
  275. bssid, cid, reason_code);
  276. if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
  277. wil_disconnect_cid_complete(vif, cid, reason_code);
  278. } else { /* all */
  279. wil_dbg_misc(wil, "Disconnect complete all\n");
  280. for (cid = 0; cid < wil->max_assoc_sta; cid++)
  281. wil_disconnect_cid_complete(vif, cid, reason_code);
  282. }
  283. /* link state */
  284. switch (wdev->iftype) {
  285. case NL80211_IFTYPE_STATION:
  286. case NL80211_IFTYPE_P2P_CLIENT:
  287. wil_bcast_fini(vif);
  288. wil_update_net_queues_bh(wil, vif, NULL, true);
  289. netif_carrier_off(ndev);
  290. if (!wil_has_other_active_ifaces(wil, ndev, false, true))
  291. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  292. if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
  293. atomic_dec(&wil->connected_vifs);
  294. cfg80211_disconnected(ndev, reason_code,
  295. NULL, 0,
  296. vif->locally_generated_disc,
  297. GFP_KERNEL);
  298. vif->locally_generated_disc = false;
  299. } else if (test_bit(wil_vif_fwconnecting, vif->status)) {
  300. cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
  301. WLAN_STATUS_UNSPECIFIED_FAILURE,
  302. GFP_KERNEL);
  303. vif->bss = NULL;
  304. }
  305. clear_bit(wil_vif_fwconnecting, vif->status);
  306. clear_bit(wil_vif_ft_roam, vif->status);
  307. vif->ptk_rekey_state = WIL_REKEY_IDLE;
  308. break;
  309. case NL80211_IFTYPE_AP:
  310. case NL80211_IFTYPE_P2P_GO:
  311. if (!wil_vif_is_connected(wil, vif->mid)) {
  312. wil_update_net_queues_bh(wil, vif, NULL, true);
  313. if (test_and_clear_bit(wil_vif_fwconnected,
  314. vif->status))
  315. atomic_dec(&wil->connected_vifs);
  316. } else {
  317. wil_update_net_queues_bh(wil, vif, NULL, false);
  318. }
  319. break;
  320. default:
  321. break;
  322. }
  323. }
  324. static int wil_disconnect_cid(struct wil6210_vif *vif, int cid,
  325. u16 reason_code)
  326. {
  327. struct wil6210_priv *wil = vif_to_wil(vif);
  328. struct wireless_dev *wdev = vif_to_wdev(vif);
  329. struct wil_sta_info *sta = &wil->sta[cid];
  330. bool del_sta = false;
  331. might_sleep();
  332. wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
  333. cid, sta->mid, sta->status);
  334. if (sta->status == wil_sta_unused)
  335. return 0;
  336. if (vif->mid != sta->mid) {
  337. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", vif->mid);
  338. return -EINVAL;
  339. }
  340. /* inform lower layers */
  341. if (wdev->iftype == NL80211_IFTYPE_AP && disable_ap_sme)
  342. del_sta = true;
  343. /* disconnect by sending command disconnect/del_sta and wait
  344. * synchronously for WMI_DISCONNECT_EVENTID event.
  345. */
  346. return wmi_disconnect_sta(vif, sta->addr, reason_code, del_sta);
  347. }
  348. static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  349. u16 reason_code)
  350. {
  351. struct wil6210_priv *wil;
  352. struct net_device *ndev;
  353. int cid = -ENOENT;
  354. if (unlikely(!vif))
  355. return;
  356. wil = vif_to_wil(vif);
  357. ndev = vif_to_ndev(vif);
  358. might_sleep();
  359. wil_info(wil, "disconnect bssid=%pM, reason=%d\n", bssid, reason_code);
  360. /* Cases are:
  361. * - disconnect single STA, still connected
  362. * - disconnect single STA, already disconnected
  363. * - disconnect all
  364. *
  365. * For "disconnect all", there are 3 options:
  366. * - bssid == NULL
  367. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  368. * - bssid is our MAC address
  369. */
  370. if (bssid && !is_broadcast_ether_addr(bssid) &&
  371. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  372. cid = wil_find_cid(wil, vif->mid, bssid);
  373. wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
  374. bssid, cid, reason_code);
  375. if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
  376. wil_disconnect_cid(vif, cid, reason_code);
  377. } else { /* all */
  378. wil_dbg_misc(wil, "Disconnect all\n");
  379. for (cid = 0; cid < wil->max_assoc_sta; cid++)
  380. wil_disconnect_cid(vif, cid, reason_code);
  381. }
  382. /* call event handler manually after processing wmi_call,
  383. * to avoid deadlock - disconnect event handler acquires
  384. * wil->mutex while it is already held here
  385. */
  386. _wil6210_disconnect_complete(vif, bssid, reason_code);
  387. }
  388. void wil_disconnect_worker(struct work_struct *work)
  389. {
  390. struct wil6210_vif *vif = container_of(work,
  391. struct wil6210_vif, disconnect_worker);
  392. struct wil6210_priv *wil = vif_to_wil(vif);
  393. struct net_device *ndev = vif_to_ndev(vif);
  394. int rc;
  395. struct {
  396. struct wmi_cmd_hdr wmi;
  397. struct wmi_disconnect_event evt;
  398. } __packed reply;
  399. if (test_bit(wil_vif_fwconnected, vif->status))
  400. /* connect succeeded after all */
  401. return;
  402. if (!test_bit(wil_vif_fwconnecting, vif->status))
  403. /* already disconnected */
  404. return;
  405. memset(&reply, 0, sizeof(reply));
  406. rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
  407. WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
  408. WIL6210_DISCONNECT_TO_MS);
  409. if (rc) {
  410. wil_err(wil, "disconnect error %d\n", rc);
  411. return;
  412. }
  413. wil_update_net_queues_bh(wil, vif, NULL, true);
  414. netif_carrier_off(ndev);
  415. cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
  416. WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
  417. clear_bit(wil_vif_fwconnecting, vif->status);
  418. }
  419. static int wil_wait_for_recovery(struct wil6210_priv *wil)
  420. {
  421. if (wait_event_interruptible(wil->wq, wil->recovery_state !=
  422. fw_recovery_pending)) {
  423. wil_err(wil, "Interrupt, canceling recovery\n");
  424. return -ERESTARTSYS;
  425. }
  426. if (wil->recovery_state != fw_recovery_running) {
  427. wil_info(wil, "Recovery cancelled\n");
  428. return -EINTR;
  429. }
  430. wil_info(wil, "Proceed with recovery\n");
  431. return 0;
  432. }
  433. void wil_set_recovery_state(struct wil6210_priv *wil, int state)
  434. {
  435. wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
  436. wil->recovery_state, state);
  437. wil->recovery_state = state;
  438. wake_up_interruptible(&wil->wq);
  439. }
  440. bool wil_is_recovery_blocked(struct wil6210_priv *wil)
  441. {
  442. return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
  443. }
  444. static void wil_fw_error_worker(struct work_struct *work)
  445. {
  446. struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
  447. fw_error_worker);
  448. struct net_device *ndev = wil->main_ndev;
  449. struct wireless_dev *wdev;
  450. wil_dbg_misc(wil, "fw error worker\n");
  451. if (!ndev || !(ndev->flags & IFF_UP)) {
  452. wil_info(wil, "No recovery - interface is down\n");
  453. return;
  454. }
  455. wdev = ndev->ieee80211_ptr;
  456. /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
  457. * passed since last recovery attempt
  458. */
  459. if (time_is_after_jiffies(wil->last_fw_recovery +
  460. WIL6210_FW_RECOVERY_TO))
  461. wil->recovery_count++;
  462. else
  463. wil->recovery_count = 1; /* fw was alive for a long time */
  464. if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
  465. wil_err(wil, "too many recovery attempts (%d), giving up\n",
  466. wil->recovery_count);
  467. return;
  468. }
  469. wil->last_fw_recovery = jiffies;
  470. wil_info(wil, "fw error recovery requested (try %d)...\n",
  471. wil->recovery_count);
  472. if (!no_fw_recovery)
  473. wil->recovery_state = fw_recovery_running;
  474. if (wil_wait_for_recovery(wil) != 0)
  475. return;
  476. rtnl_lock();
  477. mutex_lock(&wil->mutex);
  478. /* Needs adaptation for multiple VIFs
  479. * need to go over all VIFs and consider the appropriate
  480. * recovery because each one can have different iftype.
  481. */
  482. switch (wdev->iftype) {
  483. case NL80211_IFTYPE_STATION:
  484. case NL80211_IFTYPE_P2P_CLIENT:
  485. case NL80211_IFTYPE_MONITOR:
  486. /* silent recovery, upper layers will see disconnect */
  487. __wil_down(wil);
  488. __wil_up(wil);
  489. break;
  490. case NL80211_IFTYPE_AP:
  491. case NL80211_IFTYPE_P2P_GO:
  492. if (no_fw_recovery) /* upper layers do recovery */
  493. break;
  494. /* silent recovery, upper layers will see disconnect */
  495. __wil_down(wil);
  496. __wil_up(wil);
  497. mutex_unlock(&wil->mutex);
  498. wil_cfg80211_ap_recovery(wil);
  499. mutex_lock(&wil->mutex);
  500. wil_info(wil, "... completed\n");
  501. break;
  502. default:
  503. wil_err(wil, "No recovery - unknown interface type %d\n",
  504. wdev->iftype);
  505. break;
  506. }
  507. mutex_unlock(&wil->mutex);
  508. rtnl_unlock();
  509. }
  510. static int wil_find_free_ring(struct wil6210_priv *wil)
  511. {
  512. int i;
  513. int min_ring_id = wil_get_min_tx_ring_id(wil);
  514. for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
  515. if (!wil->ring_tx[i].va)
  516. return i;
  517. }
  518. return -EINVAL;
  519. }
  520. int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
  521. {
  522. struct wil6210_priv *wil = vif_to_wil(vif);
  523. int rc = -EINVAL, ringid;
  524. if (cid < 0) {
  525. wil_err(wil, "No connection pending\n");
  526. goto out;
  527. }
  528. ringid = wil_find_free_ring(wil);
  529. if (ringid < 0) {
  530. wil_err(wil, "No free vring found\n");
  531. goto out;
  532. }
  533. wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
  534. cid, vif->mid, ringid);
  535. rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
  536. cid, 0);
  537. if (rc)
  538. wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
  539. cid, vif->mid, ringid);
  540. out:
  541. return rc;
  542. }
  543. int wil_bcast_init(struct wil6210_vif *vif)
  544. {
  545. struct wil6210_priv *wil = vif_to_wil(vif);
  546. int ri = vif->bcast_ring, rc;
  547. if (ri >= 0 && wil->ring_tx[ri].va)
  548. return 0;
  549. ri = wil_find_free_ring(wil);
  550. if (ri < 0)
  551. return ri;
  552. vif->bcast_ring = ri;
  553. rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
  554. if (rc)
  555. vif->bcast_ring = -1;
  556. return rc;
  557. }
  558. void wil_bcast_fini(struct wil6210_vif *vif)
  559. {
  560. struct wil6210_priv *wil = vif_to_wil(vif);
  561. int ri = vif->bcast_ring;
  562. if (ri < 0)
  563. return;
  564. vif->bcast_ring = -1;
  565. wil_ring_fini_tx(wil, ri);
  566. }
  567. void wil_bcast_fini_all(struct wil6210_priv *wil)
  568. {
  569. int i;
  570. struct wil6210_vif *vif;
  571. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  572. vif = wil->vifs[i];
  573. if (vif)
  574. wil_bcast_fini(vif);
  575. }
  576. }
  577. void wil_sta_info_amsdu_init(struct wil_sta_info *sta)
  578. {
  579. sta->amsdu_drop_sn = -1;
  580. sta->amsdu_drop_tid = -1;
  581. sta->amsdu_drop = 0;
  582. }
  583. int wil_priv_init(struct wil6210_priv *wil)
  584. {
  585. uint i;
  586. wil_dbg_misc(wil, "priv_init\n");
  587. memset(wil->sta, 0, sizeof(wil->sta));
  588. for (i = 0; i < WIL6210_MAX_CID; i++) {
  589. spin_lock_init(&wil->sta[i].tid_rx_lock);
  590. wil->sta[i].mid = U8_MAX;
  591. }
  592. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
  593. spin_lock_init(&wil->ring_tx_data[i].lock);
  594. wil->ring2cid_tid[i][0] = WIL6210_MAX_CID;
  595. }
  596. mutex_init(&wil->mutex);
  597. mutex_init(&wil->vif_mutex);
  598. mutex_init(&wil->wmi_mutex);
  599. mutex_init(&wil->halp.lock);
  600. init_completion(&wil->wmi_ready);
  601. init_completion(&wil->wmi_call);
  602. init_completion(&wil->halp.comp);
  603. INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
  604. INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
  605. INIT_LIST_HEAD(&wil->pending_wmi_ev);
  606. spin_lock_init(&wil->wmi_ev_lock);
  607. spin_lock_init(&wil->net_queue_lock);
  608. spin_lock_init(&wil->eap_lock);
  609. init_waitqueue_head(&wil->wq);
  610. init_rwsem(&wil->mem_lock);
  611. wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
  612. if (!wil->wmi_wq)
  613. return -EAGAIN;
  614. wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
  615. if (!wil->wq_service)
  616. goto out_wmi_wq;
  617. wil->last_fw_recovery = jiffies;
  618. wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
  619. wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
  620. wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
  621. wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
  622. if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
  623. rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
  624. wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT;
  625. wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
  626. WMI_WAKEUP_TRIGGER_BCAST;
  627. memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
  628. wil->ring_idle_trsh = 16;
  629. wil->reply_mid = U8_MAX;
  630. wil->max_vifs = 1;
  631. wil->max_assoc_sta = max_assoc_sta;
  632. /* edma configuration can be updated via debugfs before allocation */
  633. wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
  634. wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
  635. /* Rx status ring size should be bigger than the number of RX buffers
  636. * in order to prevent backpressure on the status ring, which may
  637. * cause HW freeze.
  638. */
  639. wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
  640. /* Number of RX buffer IDs should be bigger than the RX descriptor
  641. * ring size as in HW reorder flow, the HW can consume additional
  642. * buffers before releasing the previous ones.
  643. */
  644. wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
  645. wil->amsdu_en = true;
  646. return 0;
  647. out_wmi_wq:
  648. destroy_workqueue(wil->wmi_wq);
  649. return -EAGAIN;
  650. }
  651. void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
  652. {
  653. if (wil->platform_ops.bus_request) {
  654. wil->bus_request_kbps = kbps;
  655. wil->platform_ops.bus_request(wil->platform_handle, kbps);
  656. }
  657. }
  658. /**
  659. * wil6210_disconnect - disconnect one connection
  660. * @vif: virtual interface context
  661. * @bssid: peer to disconnect, NULL to disconnect all
  662. * @reason_code: Reason code for the Disassociation frame
  663. *
  664. * Disconnect and release associated resources. Issue WMI
  665. * command(s) to trigger MAC disconnect. When command was issued
  666. * successfully, call the wil6210_disconnect_complete function
  667. * to handle the event synchronously
  668. */
  669. void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  670. u16 reason_code)
  671. {
  672. struct wil6210_priv *wil = vif_to_wil(vif);
  673. wil_dbg_misc(wil, "disconnecting\n");
  674. del_timer_sync(&vif->connect_timer);
  675. _wil6210_disconnect(vif, bssid, reason_code);
  676. }
  677. /**
  678. * wil6210_disconnect_complete - handle disconnect event
  679. * @vif: virtual interface context
  680. * @bssid: peer to disconnect, NULL to disconnect all
  681. * @reason_code: Reason code for the Disassociation frame
  682. *
  683. * Release associated resources and indicate upper layers the
  684. * connection is terminated.
  685. */
  686. void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid,
  687. u16 reason_code)
  688. {
  689. struct wil6210_priv *wil = vif_to_wil(vif);
  690. wil_dbg_misc(wil, "got disconnect\n");
  691. del_timer_sync(&vif->connect_timer);
  692. _wil6210_disconnect_complete(vif, bssid, reason_code);
  693. }
  694. void wil_priv_deinit(struct wil6210_priv *wil)
  695. {
  696. wil_dbg_misc(wil, "priv_deinit\n");
  697. wil_set_recovery_state(wil, fw_recovery_idle);
  698. cancel_work_sync(&wil->fw_error_worker);
  699. wmi_event_flush(wil);
  700. destroy_workqueue(wil->wq_service);
  701. destroy_workqueue(wil->wmi_wq);
  702. kfree(wil->brd_info);
  703. }
  704. static void wil_shutdown_bl(struct wil6210_priv *wil)
  705. {
  706. u32 val;
  707. wil_s(wil, RGF_USER_BL +
  708. offsetof(struct bl_dedicated_registers_v1,
  709. bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
  710. usleep_range(100, 150);
  711. val = wil_r(wil, RGF_USER_BL +
  712. offsetof(struct bl_dedicated_registers_v1,
  713. bl_shutdown_handshake));
  714. if (val & BL_SHUTDOWN_HS_RTD) {
  715. wil_dbg_misc(wil, "BL is ready for halt\n");
  716. return;
  717. }
  718. wil_err(wil, "BL did not report ready for halt\n");
  719. }
  720. /* this format is used by ARC embedded CPU for instruction memory */
  721. static inline u32 ARC_me_imm32(u32 d)
  722. {
  723. return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
  724. }
  725. /* defines access to interrupt vectors for wil_freeze_bl */
  726. #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8)
  727. /* ARC long jump instruction */
  728. #define ARC_JAL_INST (0x20200f80)
  729. static void wil_freeze_bl(struct wil6210_priv *wil)
  730. {
  731. u32 jal, upc, saved;
  732. u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
  733. jal = wil_r(wil, wil->iccm_base + ivt3);
  734. if (jal != ARC_me_imm32(ARC_JAL_INST)) {
  735. wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
  736. return;
  737. }
  738. /* prevent the target from entering deep sleep
  739. * and disabling memory access
  740. */
  741. saved = wil_r(wil, RGF_USER_USAGE_8);
  742. wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
  743. usleep_range(20, 25); /* let the BL process the bit */
  744. /* redirect to endless loop in the INT_L1 context and let it trap */
  745. wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
  746. usleep_range(20, 25); /* let the BL get into the trap */
  747. /* verify the BL is frozen */
  748. upc = wil_r(wil, RGF_USER_CPU_PC);
  749. if (upc < ivt3 || (upc > (ivt3 + 8)))
  750. wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
  751. wil_w(wil, RGF_USER_USAGE_8, saved);
  752. }
  753. static void wil_bl_prepare_halt(struct wil6210_priv *wil)
  754. {
  755. u32 tmp, ver;
  756. /* before halting device CPU driver must make sure BL is not accessing
  757. * host memory. This is done differently depending on BL version:
  758. * 1. For very old BL versions the procedure is skipped
  759. * (not supported).
  760. * 2. For old BL version we use a special trick to freeze the BL
  761. * 3. For new BL versions we shutdown the BL using handshake procedure.
  762. */
  763. tmp = wil_r(wil, RGF_USER_BL +
  764. offsetof(struct bl_dedicated_registers_v0,
  765. boot_loader_struct_version));
  766. if (!tmp) {
  767. wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
  768. return;
  769. }
  770. tmp = wil_r(wil, RGF_USER_BL +
  771. offsetof(struct bl_dedicated_registers_v1,
  772. bl_shutdown_handshake));
  773. ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
  774. if (ver > 0)
  775. wil_shutdown_bl(wil);
  776. else
  777. wil_freeze_bl(wil);
  778. }
  779. static inline void wil_halt_cpu(struct wil6210_priv *wil)
  780. {
  781. if (wil->hw_version >= HW_VER_TALYN_MB) {
  782. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
  783. BIT_USER_USER_CPU_MAN_RST);
  784. wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
  785. BIT_USER_MAC_CPU_MAN_RST);
  786. } else {
  787. wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
  788. wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST);
  789. }
  790. }
  791. static inline void wil_release_cpu(struct wil6210_priv *wil)
  792. {
  793. /* Start CPU */
  794. if (wil->hw_version >= HW_VER_TALYN_MB)
  795. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
  796. else
  797. wil_w(wil, RGF_USER_USER_CPU_0, 1);
  798. }
  799. static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
  800. {
  801. wil_info(wil, "oob_mode to %d\n", mode);
  802. switch (mode) {
  803. case 0:
  804. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
  805. BIT_USER_OOB_R2_MODE);
  806. break;
  807. case 1:
  808. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  809. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  810. break;
  811. case 2:
  812. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  813. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  814. break;
  815. default:
  816. wil_err(wil, "invalid oob_mode: %d\n", mode);
  817. }
  818. }
  819. static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
  820. {
  821. int delay = 0;
  822. u32 x, x1 = 0;
  823. /* wait until device ready. */
  824. if (no_flash) {
  825. msleep(PMU_READY_DELAY_MS);
  826. wil_dbg_misc(wil, "Reset completed\n");
  827. } else {
  828. do {
  829. msleep(RST_DELAY);
  830. x = wil_r(wil, RGF_USER_BL +
  831. offsetof(struct bl_dedicated_registers_v0,
  832. boot_loader_ready));
  833. if (x1 != x) {
  834. wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
  835. x1, x);
  836. x1 = x;
  837. }
  838. if (delay++ > RST_COUNT) {
  839. wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
  840. x);
  841. return -ETIME;
  842. }
  843. } while (x != BL_READY);
  844. wil_dbg_misc(wil, "Reset completed in %d ms\n",
  845. delay * RST_DELAY);
  846. }
  847. return 0;
  848. }
  849. static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
  850. {
  851. u32 otp_hw;
  852. u8 signature_status;
  853. bool otp_signature_err;
  854. bool hw_section_done;
  855. u32 otp_qc_secured;
  856. int delay = 0;
  857. /* Wait for OTP signature test to complete */
  858. usleep_range(2000, 2200);
  859. wil->boot_config = WIL_BOOT_ERR;
  860. /* Poll until OTP signature status is valid.
  861. * In vanilla and development modes, when signature test is complete
  862. * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
  863. * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
  864. * for signature status change to 2 or 3.
  865. */
  866. do {
  867. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  868. signature_status = WIL_GET_BITS(otp_hw, 8, 9);
  869. otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
  870. if (otp_signature_err &&
  871. signature_status == WIL_SIG_STATUS_VANILLA) {
  872. wil->boot_config = WIL_BOOT_VANILLA;
  873. break;
  874. }
  875. if (otp_signature_err &&
  876. signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
  877. wil->boot_config = WIL_BOOT_DEVELOPMENT;
  878. break;
  879. }
  880. if (!otp_signature_err &&
  881. signature_status == WIL_SIG_STATUS_PRODUCTION) {
  882. wil->boot_config = WIL_BOOT_PRODUCTION;
  883. break;
  884. }
  885. if (!otp_signature_err &&
  886. signature_status ==
  887. WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
  888. /* Unrecognized OTP signature found. Possibly a
  889. * corrupted production signature, access control
  890. * is applied as in production mode, therefore
  891. * do not fail
  892. */
  893. wil->boot_config = WIL_BOOT_PRODUCTION;
  894. break;
  895. }
  896. if (delay++ > OTP_HW_COUNT)
  897. break;
  898. usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
  899. } while (!otp_signature_err && signature_status == 0);
  900. if (wil->boot_config == WIL_BOOT_ERR) {
  901. wil_err(wil,
  902. "invalid boot config, signature_status %d otp_signature_err %d\n",
  903. signature_status, otp_signature_err);
  904. return -ETIME;
  905. }
  906. wil_dbg_misc(wil,
  907. "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
  908. delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
  909. if (wil->boot_config == WIL_BOOT_VANILLA)
  910. /* Assuming not SPI boot (currently not supported) */
  911. goto out;
  912. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  913. delay = 0;
  914. while (!hw_section_done) {
  915. msleep(RST_DELAY);
  916. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  917. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  918. if (delay++ > RST_COUNT) {
  919. wil_err(wil, "TO waiting for hw_section_done\n");
  920. return -ETIME;
  921. }
  922. }
  923. wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
  924. otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
  925. wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
  926. wil_dbg_misc(wil, "secured boot is %sabled\n",
  927. wil->secured_boot ? "en" : "dis");
  928. out:
  929. wil_dbg_misc(wil, "Reset completed\n");
  930. return 0;
  931. }
  932. static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
  933. {
  934. u32 x;
  935. int rc;
  936. wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
  937. if (wil->hw_version < HW_VER_TALYN) {
  938. /* Clear MAC link up */
  939. wil_s(wil, RGF_HP_CTRL, BIT(15));
  940. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0,
  941. BIT_HPAL_PERST_FROM_PAD);
  942. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
  943. }
  944. wil_halt_cpu(wil);
  945. if (!no_flash) {
  946. /* clear all boot loader "ready" bits */
  947. wil_w(wil, RGF_USER_BL +
  948. offsetof(struct bl_dedicated_registers_v0,
  949. boot_loader_ready), 0);
  950. /* this should be safe to write even with old BLs */
  951. wil_w(wil, RGF_USER_BL +
  952. offsetof(struct bl_dedicated_registers_v1,
  953. bl_shutdown_handshake), 0);
  954. }
  955. /* Clear Fw Download notification */
  956. wil_c(wil, RGF_USER_USAGE_6, BIT(0));
  957. wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
  958. /* XTAL stabilization should take about 3ms */
  959. usleep_range(5000, 7000);
  960. x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
  961. if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
  962. wil_err(wil, "Xtal stabilization timeout\n"
  963. "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
  964. return -ETIME;
  965. }
  966. /* switch 10k to XTAL*/
  967. wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
  968. /* 40 MHz */
  969. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
  970. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
  971. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
  972. if (wil->hw_version >= HW_VER_TALYN_MB) {
  973. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
  974. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  975. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
  976. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  977. } else {
  978. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
  979. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  980. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
  981. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  982. }
  983. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
  984. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
  985. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
  986. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
  987. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
  988. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  989. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
  990. /* reset A2 PCIE AHB */
  991. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
  992. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  993. if (wil->hw_version == HW_VER_TALYN_MB)
  994. rc = wil_wait_device_ready_talyn_mb(wil);
  995. else
  996. rc = wil_wait_device_ready(wil, no_flash);
  997. if (rc)
  998. return rc;
  999. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
  1000. /* enable fix for HW bug related to the SA/DA swap in AP Rx */
  1001. wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
  1002. BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
  1003. if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
  1004. /* Reset OTP HW vectors to fit 40MHz */
  1005. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
  1006. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
  1007. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
  1008. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
  1009. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
  1010. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
  1011. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
  1012. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
  1013. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
  1014. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
  1015. wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
  1016. }
  1017. return 0;
  1018. }
  1019. static void wil_collect_fw_info(struct wil6210_priv *wil)
  1020. {
  1021. struct wiphy *wiphy = wil_to_wiphy(wil);
  1022. u8 retry_short;
  1023. int rc;
  1024. wil_refresh_fw_capabilities(wil);
  1025. rc = wmi_get_mgmt_retry(wil, &retry_short);
  1026. if (!rc) {
  1027. wiphy->retry_short = retry_short;
  1028. wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
  1029. }
  1030. }
  1031. void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
  1032. {
  1033. struct wiphy *wiphy = wil_to_wiphy(wil);
  1034. int features;
  1035. wil->keep_radio_on_during_sleep =
  1036. test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
  1037. wil->platform_capa) &&
  1038. test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
  1039. wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
  1040. wil->keep_radio_on_during_sleep);
  1041. if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
  1042. wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
  1043. else
  1044. wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
  1045. if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
  1046. wiphy->max_sched_scan_reqs = 1;
  1047. wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
  1048. wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
  1049. wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
  1050. wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
  1051. }
  1052. if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
  1053. wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
  1054. if (wil->platform_ops.set_features) {
  1055. features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
  1056. wil->fw_capabilities) &&
  1057. test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
  1058. wil->platform_capa)) ?
  1059. BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
  1060. if (wil->n_msi == 3)
  1061. features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
  1062. wil->platform_ops.set_features(wil->platform_handle, features);
  1063. }
  1064. if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
  1065. wil->fw_capabilities)) {
  1066. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
  1067. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
  1068. } else {
  1069. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
  1070. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
  1071. }
  1072. update_supported_bands(wil);
  1073. }
  1074. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
  1075. {
  1076. le32_to_cpus(&r->base);
  1077. le16_to_cpus(&r->entry_size);
  1078. le16_to_cpus(&r->size);
  1079. le32_to_cpus(&r->tail);
  1080. le32_to_cpus(&r->head);
  1081. }
  1082. /* construct actual board file name to use */
  1083. void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
  1084. {
  1085. const char *board_file;
  1086. const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
  1087. WIL_FW_NAME_TALYN;
  1088. if (wil->board_file) {
  1089. board_file = wil->board_file;
  1090. } else {
  1091. /* If specific FW file is used for Talyn,
  1092. * use specific board file
  1093. */
  1094. if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
  1095. board_file = WIL_BRD_NAME_TALYN;
  1096. else
  1097. board_file = WIL_BOARD_FILE_NAME;
  1098. }
  1099. strscpy(buf, board_file, len);
  1100. }
  1101. static int wil_get_bl_info(struct wil6210_priv *wil)
  1102. {
  1103. struct net_device *ndev = wil->main_ndev;
  1104. struct wiphy *wiphy = wil_to_wiphy(wil);
  1105. union {
  1106. struct bl_dedicated_registers_v0 bl0;
  1107. struct bl_dedicated_registers_v1 bl1;
  1108. } bl;
  1109. u32 bl_ver;
  1110. u8 *mac;
  1111. u16 rf_status;
  1112. wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
  1113. sizeof(bl));
  1114. bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
  1115. mac = bl.bl0.mac_address;
  1116. if (bl_ver == 0) {
  1117. le32_to_cpus(&bl.bl0.rf_type);
  1118. le32_to_cpus(&bl.bl0.baseband_type);
  1119. rf_status = 0; /* actually, unknown */
  1120. wil_info(wil,
  1121. "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
  1122. bl_ver, mac,
  1123. bl.bl0.rf_type, bl.bl0.baseband_type);
  1124. wil_info(wil, "Boot Loader build unknown for struct v0\n");
  1125. } else {
  1126. le16_to_cpus(&bl.bl1.rf_type);
  1127. rf_status = le16_to_cpu(bl.bl1.rf_status);
  1128. le32_to_cpus(&bl.bl1.baseband_type);
  1129. le16_to_cpus(&bl.bl1.bl_version_subminor);
  1130. le16_to_cpus(&bl.bl1.bl_version_build);
  1131. wil_info(wil,
  1132. "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
  1133. bl_ver, mac,
  1134. bl.bl1.rf_type, rf_status,
  1135. bl.bl1.baseband_type);
  1136. wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
  1137. bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
  1138. bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
  1139. }
  1140. if (!is_valid_ether_addr(mac)) {
  1141. wil_err(wil, "BL: Invalid MAC %pM\n", mac);
  1142. return -EINVAL;
  1143. }
  1144. ether_addr_copy(ndev->perm_addr, mac);
  1145. ether_addr_copy(wiphy->perm_addr, mac);
  1146. if (!is_valid_ether_addr(ndev->dev_addr))
  1147. eth_hw_addr_set(ndev, mac);
  1148. if (rf_status) {/* bad RF cable? */
  1149. wil_err(wil, "RF communication error 0x%04x",
  1150. rf_status);
  1151. return -EAGAIN;
  1152. }
  1153. return 0;
  1154. }
  1155. static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
  1156. {
  1157. u32 bl_assert_code, bl_assert_blink, bl_magic_number;
  1158. u32 bl_ver = wil_r(wil, RGF_USER_BL +
  1159. offsetof(struct bl_dedicated_registers_v0,
  1160. boot_loader_struct_version));
  1161. if (bl_ver < 2)
  1162. return;
  1163. bl_assert_code = wil_r(wil, RGF_USER_BL +
  1164. offsetof(struct bl_dedicated_registers_v1,
  1165. bl_assert_code));
  1166. bl_assert_blink = wil_r(wil, RGF_USER_BL +
  1167. offsetof(struct bl_dedicated_registers_v1,
  1168. bl_assert_blink));
  1169. bl_magic_number = wil_r(wil, RGF_USER_BL +
  1170. offsetof(struct bl_dedicated_registers_v1,
  1171. bl_magic_number));
  1172. if (is_err) {
  1173. wil_err(wil,
  1174. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1175. bl_assert_code, bl_assert_blink, bl_magic_number);
  1176. } else {
  1177. wil_dbg_misc(wil,
  1178. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1179. bl_assert_code, bl_assert_blink, bl_magic_number);
  1180. }
  1181. }
  1182. static int wil_get_otp_info(struct wil6210_priv *wil)
  1183. {
  1184. struct net_device *ndev = wil->main_ndev;
  1185. struct wiphy *wiphy = wil_to_wiphy(wil);
  1186. u8 mac[8];
  1187. int mac_addr;
  1188. /* OEM MAC has precedence */
  1189. mac_addr = RGF_OTP_OEM_MAC;
  1190. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), sizeof(mac));
  1191. if (is_valid_ether_addr(mac)) {
  1192. wil_info(wil, "using OEM MAC %pM\n", mac);
  1193. } else {
  1194. if (wil->hw_version >= HW_VER_TALYN_MB)
  1195. mac_addr = RGF_OTP_MAC_TALYN_MB;
  1196. else
  1197. mac_addr = RGF_OTP_MAC;
  1198. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
  1199. sizeof(mac));
  1200. }
  1201. if (!is_valid_ether_addr(mac)) {
  1202. wil_err(wil, "Invalid MAC %pM\n", mac);
  1203. return -EINVAL;
  1204. }
  1205. ether_addr_copy(ndev->perm_addr, mac);
  1206. ether_addr_copy(wiphy->perm_addr, mac);
  1207. if (!is_valid_ether_addr(ndev->dev_addr))
  1208. eth_hw_addr_set(ndev, mac);
  1209. return 0;
  1210. }
  1211. static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
  1212. {
  1213. ulong to = msecs_to_jiffies(2000);
  1214. ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
  1215. if (0 == left) {
  1216. wil_err(wil, "Firmware not ready\n");
  1217. return -ETIME;
  1218. } else {
  1219. wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
  1220. jiffies_to_msecs(to-left), wil->hw_version);
  1221. }
  1222. return 0;
  1223. }
  1224. void wil_abort_scan(struct wil6210_vif *vif, bool sync)
  1225. {
  1226. struct wil6210_priv *wil = vif_to_wil(vif);
  1227. int rc;
  1228. struct cfg80211_scan_info info = {
  1229. .aborted = true,
  1230. };
  1231. lockdep_assert_held(&wil->vif_mutex);
  1232. if (!vif->scan_request)
  1233. return;
  1234. wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
  1235. del_timer_sync(&vif->scan_timer);
  1236. mutex_unlock(&wil->vif_mutex);
  1237. rc = wmi_abort_scan(vif);
  1238. if (!rc && sync)
  1239. wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
  1240. msecs_to_jiffies(
  1241. WAIT_FOR_SCAN_ABORT_MS));
  1242. mutex_lock(&wil->vif_mutex);
  1243. if (vif->scan_request) {
  1244. cfg80211_scan_done(vif->scan_request, &info);
  1245. vif->scan_request = NULL;
  1246. }
  1247. }
  1248. void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
  1249. {
  1250. int i;
  1251. lockdep_assert_held(&wil->vif_mutex);
  1252. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1253. struct wil6210_vif *vif = wil->vifs[i];
  1254. if (vif)
  1255. wil_abort_scan(vif, sync);
  1256. }
  1257. }
  1258. int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
  1259. {
  1260. int rc;
  1261. if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
  1262. wil_err(wil, "set_power_mgmt not supported\n");
  1263. return -EOPNOTSUPP;
  1264. }
  1265. rc = wmi_ps_dev_profile_cfg(wil, ps_profile);
  1266. if (rc)
  1267. wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
  1268. else
  1269. wil->ps_profile = ps_profile;
  1270. return rc;
  1271. }
  1272. static void wil_pre_fw_config(struct wil6210_priv *wil)
  1273. {
  1274. wil_clear_fw_log_addr(wil);
  1275. /* Mark FW as loaded from host */
  1276. wil_s(wil, RGF_USER_USAGE_6, 1);
  1277. /* clear any interrupts which on-card-firmware
  1278. * may have set
  1279. */
  1280. wil6210_clear_irq(wil);
  1281. /* CAF_ICR - clear and mask */
  1282. /* it is W1C, clear by writing back same value */
  1283. if (wil->hw_version < HW_VER_TALYN_MB) {
  1284. wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
  1285. wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
  1286. }
  1287. /* clear PAL_UNIT_ICR (potential D0->D3 leftover)
  1288. * In Talyn-MB host cannot access this register due to
  1289. * access control, hence PAL_UNIT_ICR is cleared by the FW
  1290. */
  1291. if (wil->hw_version < HW_VER_TALYN_MB)
  1292. wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
  1293. 0);
  1294. if (wil->fw_calib_result > 0) {
  1295. __le32 val = cpu_to_le32(wil->fw_calib_result |
  1296. (CALIB_RESULT_SIGNATURE << 8));
  1297. wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
  1298. }
  1299. }
  1300. static int wil_restore_vifs(struct wil6210_priv *wil)
  1301. {
  1302. struct wil6210_vif *vif;
  1303. struct net_device *ndev;
  1304. struct wireless_dev *wdev;
  1305. int i, rc;
  1306. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1307. vif = wil->vifs[i];
  1308. if (!vif)
  1309. continue;
  1310. vif->ap_isolate = 0;
  1311. if (vif->mid) {
  1312. ndev = vif_to_ndev(vif);
  1313. wdev = vif_to_wdev(vif);
  1314. rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
  1315. wdev->iftype);
  1316. if (rc) {
  1317. wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
  1318. i, wdev->iftype, rc);
  1319. return rc;
  1320. }
  1321. }
  1322. }
  1323. return 0;
  1324. }
  1325. /*
  1326. * Clear FW and ucode log start addr to indicate FW log is not ready. The host
  1327. * driver clears the addresses before FW starts and FW initializes the address
  1328. * when it is ready to send logs.
  1329. */
  1330. void wil_clear_fw_log_addr(struct wil6210_priv *wil)
  1331. {
  1332. /* FW log addr */
  1333. wil_w(wil, RGF_USER_USAGE_1, 0);
  1334. /* ucode log addr */
  1335. wil_w(wil, RGF_USER_USAGE_2, 0);
  1336. wil_dbg_misc(wil, "Cleared FW and ucode log address");
  1337. }
  1338. /*
  1339. * We reset all the structures, and we reset the UMAC.
  1340. * After calling this routine, you're expected to reload
  1341. * the firmware.
  1342. */
  1343. int wil_reset(struct wil6210_priv *wil, bool load_fw)
  1344. {
  1345. int rc, i;
  1346. unsigned long status_flags = BIT(wil_status_resetting);
  1347. int no_flash;
  1348. struct wil6210_vif *vif;
  1349. wil_dbg_misc(wil, "reset\n");
  1350. WARN_ON(!mutex_is_locked(&wil->mutex));
  1351. WARN_ON(test_bit(wil_status_napi_en, wil->status));
  1352. if (debug_fw) {
  1353. static const u8 mac[ETH_ALEN] = {
  1354. 0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
  1355. };
  1356. struct net_device *ndev = wil->main_ndev;
  1357. ether_addr_copy(ndev->perm_addr, mac);
  1358. eth_hw_addr_set(ndev, ndev->perm_addr);
  1359. return 0;
  1360. }
  1361. if (wil->hw_version == HW_VER_UNKNOWN)
  1362. return -ENODEV;
  1363. if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa) &&
  1364. wil->hw_version < HW_VER_TALYN_MB) {
  1365. wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
  1366. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
  1367. }
  1368. if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
  1369. wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
  1370. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
  1371. }
  1372. if (wil->platform_ops.notify) {
  1373. rc = wil->platform_ops.notify(wil->platform_handle,
  1374. WIL_PLATFORM_EVT_PRE_RESET);
  1375. if (rc)
  1376. wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
  1377. rc);
  1378. }
  1379. set_bit(wil_status_resetting, wil->status);
  1380. mutex_lock(&wil->vif_mutex);
  1381. wil_abort_scan_all_vifs(wil, false);
  1382. mutex_unlock(&wil->vif_mutex);
  1383. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1384. vif = wil->vifs[i];
  1385. if (vif) {
  1386. cancel_work_sync(&vif->disconnect_worker);
  1387. wil6210_disconnect(vif, NULL,
  1388. WLAN_REASON_DEAUTH_LEAVING);
  1389. vif->ptk_rekey_state = WIL_REKEY_IDLE;
  1390. }
  1391. }
  1392. wil_bcast_fini_all(wil);
  1393. /* Disable device led before reset*/
  1394. wmi_led_cfg(wil, false);
  1395. down_write(&wil->mem_lock);
  1396. /* prevent NAPI from being scheduled and prevent wmi commands */
  1397. mutex_lock(&wil->wmi_mutex);
  1398. if (test_bit(wil_status_suspending, wil->status))
  1399. status_flags |= BIT(wil_status_suspending);
  1400. bitmap_and(wil->status, wil->status, &status_flags,
  1401. wil_status_last);
  1402. wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
  1403. mutex_unlock(&wil->wmi_mutex);
  1404. wil_mask_irq(wil);
  1405. wmi_event_flush(wil);
  1406. flush_workqueue(wil->wq_service);
  1407. flush_workqueue(wil->wmi_wq);
  1408. no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
  1409. if (!no_flash)
  1410. wil_bl_crash_info(wil, false);
  1411. wil_disable_irq(wil);
  1412. rc = wil_target_reset(wil, no_flash);
  1413. wil6210_clear_irq(wil);
  1414. wil_enable_irq(wil);
  1415. wil->txrx_ops.rx_fini(wil);
  1416. wil->txrx_ops.tx_fini(wil);
  1417. if (rc) {
  1418. if (!no_flash)
  1419. wil_bl_crash_info(wil, true);
  1420. goto out;
  1421. }
  1422. if (no_flash) {
  1423. rc = wil_get_otp_info(wil);
  1424. } else {
  1425. rc = wil_get_bl_info(wil);
  1426. if (rc == -EAGAIN && !load_fw)
  1427. /* ignore RF error if not going up */
  1428. rc = 0;
  1429. }
  1430. if (rc)
  1431. goto out;
  1432. wil_set_oob_mode(wil, oob_mode);
  1433. if (load_fw) {
  1434. char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
  1435. if (wil->secured_boot) {
  1436. wil_err(wil, "secured boot is not supported\n");
  1437. up_write(&wil->mem_lock);
  1438. return -ENOTSUPP;
  1439. }
  1440. board_file[0] = '\0';
  1441. wil_get_board_file(wil, board_file, sizeof(board_file));
  1442. wil_info(wil, "Use firmware <%s> + board <%s>\n",
  1443. wil->wil_fw_name, board_file);
  1444. if (!no_flash)
  1445. wil_bl_prepare_halt(wil);
  1446. wil_halt_cpu(wil);
  1447. memset(wil->fw_version, 0, sizeof(wil->fw_version));
  1448. /* Loading f/w from the file */
  1449. rc = wil_request_firmware(wil, wil->wil_fw_name, true);
  1450. if (rc)
  1451. goto out;
  1452. if (wil->num_of_brd_entries)
  1453. rc = wil_request_board(wil, board_file);
  1454. else
  1455. rc = wil_request_firmware(wil, board_file, true);
  1456. if (rc)
  1457. goto out;
  1458. wil_pre_fw_config(wil);
  1459. wil_release_cpu(wil);
  1460. }
  1461. /* init after reset */
  1462. reinit_completion(&wil->wmi_ready);
  1463. reinit_completion(&wil->wmi_call);
  1464. reinit_completion(&wil->halp.comp);
  1465. clear_bit(wil_status_resetting, wil->status);
  1466. up_write(&wil->mem_lock);
  1467. if (load_fw) {
  1468. wil_unmask_irq(wil);
  1469. /* we just started MAC, wait for FW ready */
  1470. rc = wil_wait_for_fw_ready(wil);
  1471. if (rc)
  1472. return rc;
  1473. /* check FW is responsive */
  1474. rc = wmi_echo(wil);
  1475. if (rc) {
  1476. wil_err(wil, "wmi_echo failed, rc %d\n", rc);
  1477. return rc;
  1478. }
  1479. wil->txrx_ops.configure_interrupt_moderation(wil);
  1480. /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
  1481. * while there is back-pressure from Host during RX
  1482. */
  1483. if (wil->hw_version >= HW_VER_TALYN_MB)
  1484. wil_s(wil, RGF_DMA_MISC_CTL,
  1485. BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
  1486. rc = wil_restore_vifs(wil);
  1487. if (rc) {
  1488. wil_err(wil, "failed to restore vifs, rc %d\n", rc);
  1489. return rc;
  1490. }
  1491. wil_collect_fw_info(wil);
  1492. if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
  1493. wil_ps_update(wil, wil->ps_profile);
  1494. if (wil->platform_ops.notify) {
  1495. rc = wil->platform_ops.notify(wil->platform_handle,
  1496. WIL_PLATFORM_EVT_FW_RDY);
  1497. if (rc) {
  1498. wil_err(wil, "FW_RDY notify failed, rc %d\n",
  1499. rc);
  1500. rc = 0;
  1501. }
  1502. }
  1503. }
  1504. return rc;
  1505. out:
  1506. up_write(&wil->mem_lock);
  1507. clear_bit(wil_status_resetting, wil->status);
  1508. return rc;
  1509. }
  1510. void wil_fw_error_recovery(struct wil6210_priv *wil)
  1511. {
  1512. wil_dbg_misc(wil, "starting fw error recovery\n");
  1513. if (test_bit(wil_status_resetting, wil->status)) {
  1514. wil_info(wil, "Reset already in progress\n");
  1515. return;
  1516. }
  1517. wil->recovery_state = fw_recovery_pending;
  1518. schedule_work(&wil->fw_error_worker);
  1519. }
  1520. int __wil_up(struct wil6210_priv *wil)
  1521. {
  1522. struct net_device *ndev = wil->main_ndev;
  1523. struct wireless_dev *wdev = ndev->ieee80211_ptr;
  1524. int rc;
  1525. WARN_ON(!mutex_is_locked(&wil->mutex));
  1526. rc = wil_reset(wil, true);
  1527. if (rc)
  1528. return rc;
  1529. /* Rx RING. After MAC and beacon */
  1530. if (rx_ring_order == 0)
  1531. rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ?
  1532. WIL_RX_RING_SIZE_ORDER_DEFAULT :
  1533. WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT;
  1534. rc = wil->txrx_ops.rx_init(wil, rx_ring_order);
  1535. if (rc)
  1536. return rc;
  1537. rc = wil->txrx_ops.tx_init(wil);
  1538. if (rc)
  1539. return rc;
  1540. switch (wdev->iftype) {
  1541. case NL80211_IFTYPE_STATION:
  1542. wil_dbg_misc(wil, "type: STATION\n");
  1543. ndev->type = ARPHRD_ETHER;
  1544. break;
  1545. case NL80211_IFTYPE_AP:
  1546. wil_dbg_misc(wil, "type: AP\n");
  1547. ndev->type = ARPHRD_ETHER;
  1548. break;
  1549. case NL80211_IFTYPE_P2P_CLIENT:
  1550. wil_dbg_misc(wil, "type: P2P_CLIENT\n");
  1551. ndev->type = ARPHRD_ETHER;
  1552. break;
  1553. case NL80211_IFTYPE_P2P_GO:
  1554. wil_dbg_misc(wil, "type: P2P_GO\n");
  1555. ndev->type = ARPHRD_ETHER;
  1556. break;
  1557. case NL80211_IFTYPE_MONITOR:
  1558. wil_dbg_misc(wil, "type: Monitor\n");
  1559. ndev->type = ARPHRD_IEEE80211_RADIOTAP;
  1560. /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
  1561. break;
  1562. default:
  1563. return -EOPNOTSUPP;
  1564. }
  1565. /* MAC address - pre-requisite for other commands */
  1566. wmi_set_mac_address(wil, ndev->dev_addr);
  1567. wil_dbg_misc(wil, "NAPI enable\n");
  1568. napi_enable(&wil->napi_rx);
  1569. napi_enable(&wil->napi_tx);
  1570. set_bit(wil_status_napi_en, wil->status);
  1571. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  1572. return 0;
  1573. }
  1574. int wil_up(struct wil6210_priv *wil)
  1575. {
  1576. int rc;
  1577. wil_dbg_misc(wil, "up\n");
  1578. mutex_lock(&wil->mutex);
  1579. rc = __wil_up(wil);
  1580. mutex_unlock(&wil->mutex);
  1581. return rc;
  1582. }
  1583. int __wil_down(struct wil6210_priv *wil)
  1584. {
  1585. int rc;
  1586. WARN_ON(!mutex_is_locked(&wil->mutex));
  1587. set_bit(wil_status_resetting, wil->status);
  1588. wil6210_bus_request(wil, 0);
  1589. wil_disable_irq(wil);
  1590. if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
  1591. napi_disable(&wil->napi_rx);
  1592. napi_disable(&wil->napi_tx);
  1593. wil_dbg_misc(wil, "NAPI disable\n");
  1594. }
  1595. wil_enable_irq(wil);
  1596. mutex_lock(&wil->vif_mutex);
  1597. wil_p2p_stop_radio_operations(wil);
  1598. wil_abort_scan_all_vifs(wil, false);
  1599. mutex_unlock(&wil->vif_mutex);
  1600. rc = wil_reset(wil, false);
  1601. return rc;
  1602. }
  1603. int wil_down(struct wil6210_priv *wil)
  1604. {
  1605. int rc;
  1606. wil_dbg_misc(wil, "down\n");
  1607. wil_set_recovery_state(wil, fw_recovery_idle);
  1608. mutex_lock(&wil->mutex);
  1609. rc = __wil_down(wil);
  1610. mutex_unlock(&wil->mutex);
  1611. return rc;
  1612. }
  1613. int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
  1614. {
  1615. int i;
  1616. int rc = -ENOENT;
  1617. for (i = 0; i < wil->max_assoc_sta; i++) {
  1618. if (wil->sta[i].mid == mid &&
  1619. wil->sta[i].status != wil_sta_unused &&
  1620. ether_addr_equal(wil->sta[i].addr, mac)) {
  1621. rc = i;
  1622. break;
  1623. }
  1624. }
  1625. return rc;
  1626. }
  1627. void wil_halp_vote(struct wil6210_priv *wil)
  1628. {
  1629. unsigned long rc;
  1630. unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
  1631. if (wil->hw_version >= HW_VER_TALYN_MB)
  1632. return;
  1633. mutex_lock(&wil->halp.lock);
  1634. wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
  1635. wil->halp.ref_cnt);
  1636. if (++wil->halp.ref_cnt == 1) {
  1637. reinit_completion(&wil->halp.comp);
  1638. /* mark to IRQ context to handle HALP ICR */
  1639. wil->halp.handle_icr = true;
  1640. wil6210_set_halp(wil);
  1641. rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
  1642. if (!rc) {
  1643. wil_err(wil, "HALP vote timed out\n");
  1644. /* Mask HALP as done in case the interrupt is raised */
  1645. wil->halp.handle_icr = false;
  1646. wil6210_mask_halp(wil);
  1647. } else {
  1648. wil_dbg_irq(wil,
  1649. "halp_vote: HALP vote completed after %d ms\n",
  1650. jiffies_to_msecs(to_jiffies - rc));
  1651. }
  1652. }
  1653. wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
  1654. wil->halp.ref_cnt);
  1655. mutex_unlock(&wil->halp.lock);
  1656. }
  1657. void wil_halp_unvote(struct wil6210_priv *wil)
  1658. {
  1659. if (wil->hw_version >= HW_VER_TALYN_MB)
  1660. return;
  1661. WARN_ON(wil->halp.ref_cnt == 0);
  1662. mutex_lock(&wil->halp.lock);
  1663. wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
  1664. wil->halp.ref_cnt);
  1665. if (--wil->halp.ref_cnt == 0) {
  1666. wil6210_clear_halp(wil);
  1667. wil_dbg_irq(wil, "HALP unvote\n");
  1668. }
  1669. wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
  1670. wil->halp.ref_cnt);
  1671. mutex_unlock(&wil->halp.lock);
  1672. }
  1673. void wil_init_txrx_ops(struct wil6210_priv *wil)
  1674. {
  1675. if (wil->use_enhanced_dma_hw)
  1676. wil_init_txrx_ops_edma(wil);
  1677. else
  1678. wil_init_txrx_ops_legacy_dma(wil);
  1679. }