txrx.c 23 KB

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  1. /*
  2. * Copyright (c) 2013 Eugene Krasnikov <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #include <linux/random.h>
  18. #include "txrx.h"
  19. static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
  20. {
  21. return 100 - ((bd->phy_stat0 >> 24) & 0xff);
  22. }
  23. static inline int get_snr(struct wcn36xx_rx_bd *bd)
  24. {
  25. return ((bd->phy_stat1 >> 24) & 0xff);
  26. }
  27. struct wcn36xx_rate {
  28. u16 bitrate;
  29. u16 mcs_or_legacy_index;
  30. enum mac80211_rx_encoding encoding;
  31. enum mac80211_rx_encoding_flags encoding_flags;
  32. enum rate_info_bw bw;
  33. };
  34. /* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used
  35. * for 11A Channels.
  36. */
  37. static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104,
  38. 108, 112, 116, 120, 124, 128, 132, 136, 140,
  39. 149, 153, 157, 161, 165, 144 };
  40. static const struct wcn36xx_rate wcn36xx_rate_table[] = {
  41. /* 11b rates */
  42. { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  43. { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  44. { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  45. { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  46. /* 11b SP (short preamble) */
  47. { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
  48. { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
  49. { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
  50. { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
  51. /* 11ag */
  52. { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  53. { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  54. { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  55. { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  56. { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  57. { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  58. { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  59. { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
  60. /* 11n */
  61. { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  62. { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  63. { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  64. { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  65. { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  66. { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  67. { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  68. { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  69. /* 11n SGI */
  70. { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  71. { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  72. { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  73. { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  74. { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  75. { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  76. { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  77. { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  78. /* 11n GF (greenfield) */
  79. { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  80. { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  81. { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  82. { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  83. { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  84. { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  85. { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  86. { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
  87. /* 11n CB (channel bonding) */
  88. { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  89. { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  90. { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  91. { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  92. { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  93. { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  94. { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  95. { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  96. /* 11n CB + SGI */
  97. { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  98. { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  99. { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  100. { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  101. { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  102. { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  103. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  104. { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  105. /* 11n GF + CB */
  106. { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  107. { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  108. { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  109. { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  110. { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  111. { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  112. { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  113. { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
  114. /* 11ac reserved indices */
  115. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  116. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  117. /* 11ac 20 MHz 800ns GI MCS 0-8 */
  118. { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  119. { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  120. { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  121. { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  122. { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  123. { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  124. { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  125. { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  126. { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 },
  127. /* 11ac reserved indices */
  128. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  129. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  130. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  131. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  132. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  133. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  134. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  135. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  136. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  137. /* 11ac 20 MHz 400ns SGI MCS 6-8 */
  138. { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  139. { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  140. { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
  141. /* 11ac reserved indices */
  142. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  143. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  144. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  145. /* 11ac 40 MHz 800ns GI MCS 0-9 */
  146. { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  147. { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  148. { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  149. { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  150. { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  151. { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  152. { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  153. { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  154. { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  155. { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  156. { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 },
  157. /* 11ac reserved indices */
  158. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  159. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  160. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  161. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  162. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  163. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  164. /* 11ac 40 MHz 400ns SGI MCS 5-7 */
  165. { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  166. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  167. { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  168. /* 11ac reserved index */
  169. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  170. /* 11ac 40 MHz 400ns SGI MCS 5-7 */
  171. { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  172. { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  173. /* 11ac reserved index */
  174. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  175. /* 11ac 80 MHz 800ns GI MCS 0-7 */
  176. { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80},
  177. { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80},
  178. { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80},
  179. { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80},
  180. { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80},
  181. { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80},
  182. { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80},
  183. { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80},
  184. /* 11 ac reserved index */
  185. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  186. /* 11ac 80 MHz 800 ns GI MCS 8-9 */
  187. { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80},
  188. { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80},
  189. /* 11 ac reserved indices */
  190. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  191. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  192. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  193. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  194. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  195. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  196. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  197. /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
  198. { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
  199. { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
  200. /* 11ac reserved index */
  201. { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
  202. /* 11ac 80 MHz 400ns SGI MCS 8-9 */
  203. { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
  204. { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
  205. };
  206. static struct sk_buff *wcn36xx_unchain_msdu(struct sk_buff_head *amsdu)
  207. {
  208. struct sk_buff *skb, *first;
  209. int total_len = 0;
  210. int space;
  211. first = __skb_dequeue(amsdu);
  212. skb_queue_walk(amsdu, skb)
  213. total_len += skb->len;
  214. space = total_len - skb_tailroom(first);
  215. if (space > 0 && pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0) {
  216. __skb_queue_head(amsdu, first);
  217. return NULL;
  218. }
  219. /* Walk list again, copying contents into msdu_head */
  220. while ((skb = __skb_dequeue(amsdu))) {
  221. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  222. skb->len);
  223. dev_kfree_skb_irq(skb);
  224. }
  225. return first;
  226. }
  227. static void __skb_queue_purge_irq(struct sk_buff_head *list)
  228. {
  229. struct sk_buff *skb;
  230. while ((skb = __skb_dequeue(list)) != NULL)
  231. dev_kfree_skb_irq(skb);
  232. }
  233. static void wcn36xx_update_survey(struct wcn36xx *wcn, int rssi, int snr,
  234. int band, int freq)
  235. {
  236. static struct ieee80211_channel *channel;
  237. struct ieee80211_supported_band *sband;
  238. int idx;
  239. int i;
  240. u8 snr_sample = snr & 0xff;
  241. idx = 0;
  242. if (band == NL80211_BAND_5GHZ)
  243. idx = wcn->hw->wiphy->bands[NL80211_BAND_2GHZ]->n_channels;
  244. sband = wcn->hw->wiphy->bands[band];
  245. channel = sband->channels;
  246. for (i = 0; i < sband->n_channels; i++, channel++) {
  247. if (channel->center_freq == freq) {
  248. idx += i;
  249. break;
  250. }
  251. }
  252. spin_lock(&wcn->survey_lock);
  253. wcn->chan_survey[idx].rssi = rssi;
  254. wcn->chan_survey[idx].snr = snr;
  255. spin_unlock(&wcn->survey_lock);
  256. add_device_randomness(&snr_sample, sizeof(snr_sample));
  257. }
  258. int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
  259. {
  260. struct ieee80211_rx_status status;
  261. const struct wcn36xx_rate *rate;
  262. struct ieee80211_hdr *hdr;
  263. struct wcn36xx_rx_bd *bd;
  264. u16 fc, sn;
  265. /*
  266. * All fields must be 0, otherwise it can lead to
  267. * unexpected consequences.
  268. */
  269. memset(&status, 0, sizeof(status));
  270. bd = (struct wcn36xx_rx_bd *)skb->data;
  271. buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
  272. wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
  273. "BD <<< ", (char *)bd,
  274. sizeof(struct wcn36xx_rx_bd));
  275. if (bd->pdu.mpdu_data_off <= bd->pdu.mpdu_header_off ||
  276. bd->pdu.mpdu_len < bd->pdu.mpdu_header_len)
  277. goto drop;
  278. if (bd->asf && !bd->esf) { /* chained A-MSDU chunks */
  279. /* Sanity check */
  280. if (bd->pdu.mpdu_data_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE)
  281. goto drop;
  282. skb_put(skb, bd->pdu.mpdu_data_off + bd->pdu.mpdu_len);
  283. skb_pull(skb, bd->pdu.mpdu_data_off);
  284. /* Only set status for first chained BD (with mac header) */
  285. goto done;
  286. }
  287. if (bd->pdu.mpdu_header_off < sizeof(*bd) ||
  288. bd->pdu.mpdu_header_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE)
  289. goto drop;
  290. skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
  291. skb_pull(skb, bd->pdu.mpdu_header_off);
  292. hdr = (struct ieee80211_hdr *) skb->data;
  293. fc = __le16_to_cpu(hdr->frame_control);
  294. sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
  295. status.mactime = 10;
  296. status.signal = -get_rssi0(bd);
  297. status.antenna = 1;
  298. status.flag = 0;
  299. status.rx_flags = 0;
  300. status.flag |= RX_FLAG_IV_STRIPPED |
  301. RX_FLAG_MMIC_STRIPPED |
  302. RX_FLAG_DECRYPTED;
  303. wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag);
  304. if (bd->scan_learn) {
  305. /* If packet originate from hardware scanning, extract the
  306. * band/channel from bd descriptor.
  307. */
  308. u8 hwch = (bd->reserved0 << 4) + bd->rx_ch;
  309. if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) {
  310. status.band = NL80211_BAND_5GHZ;
  311. status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1],
  312. status.band);
  313. } else {
  314. status.band = NL80211_BAND_2GHZ;
  315. status.freq = ieee80211_channel_to_frequency(hwch, status.band);
  316. }
  317. } else {
  318. status.band = WCN36XX_BAND(wcn);
  319. status.freq = WCN36XX_CENTER_FREQ(wcn);
  320. }
  321. wcn36xx_update_survey(wcn, status.signal, get_snr(bd),
  322. status.band, status.freq);
  323. if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) {
  324. rate = &wcn36xx_rate_table[bd->rate_id];
  325. status.encoding = rate->encoding;
  326. status.enc_flags = rate->encoding_flags;
  327. status.bw = rate->bw;
  328. status.rate_idx = rate->mcs_or_legacy_index;
  329. status.nss = 1;
  330. if (status.band == NL80211_BAND_5GHZ &&
  331. status.encoding == RX_ENC_LEGACY &&
  332. status.rate_idx >= 4) {
  333. /* no dsss rates in 5Ghz rates table */
  334. status.rate_idx -= 4;
  335. }
  336. } else {
  337. status.encoding = 0;
  338. status.bw = 0;
  339. status.enc_flags = 0;
  340. status.rate_idx = 0;
  341. }
  342. if (ieee80211_is_beacon(hdr->frame_control) ||
  343. ieee80211_is_probe_resp(hdr->frame_control))
  344. status.boottime_ns = ktime_get_boottime_ns();
  345. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  346. if (ieee80211_is_beacon(hdr->frame_control)) {
  347. wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
  348. skb, skb->len, fc, sn);
  349. wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
  350. (char *)skb->data, skb->len);
  351. } else {
  352. wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
  353. skb, skb->len, fc, sn);
  354. wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
  355. (char *)skb->data, skb->len);
  356. }
  357. done:
  358. /* Chained AMSDU ? slow path */
  359. if (unlikely(bd->asf && !(bd->lsf && bd->esf))) {
  360. if (bd->esf && !skb_queue_empty(&wcn->amsdu)) {
  361. wcn36xx_err("Discarding non complete chain");
  362. __skb_queue_purge_irq(&wcn->amsdu);
  363. }
  364. __skb_queue_tail(&wcn->amsdu, skb);
  365. if (!bd->lsf)
  366. return 0; /* Not the last AMSDU, wait for more */
  367. skb = wcn36xx_unchain_msdu(&wcn->amsdu);
  368. if (!skb)
  369. goto drop;
  370. }
  371. ieee80211_rx_irqsafe(wcn->hw, skb);
  372. return 0;
  373. drop: /* drop everything */
  374. wcn36xx_err("Drop frame! skb:%p len:%u hoff:%u doff:%u asf=%u esf=%u lsf=%u\n",
  375. skb, bd->pdu.mpdu_len, bd->pdu.mpdu_header_off,
  376. bd->pdu.mpdu_data_off, bd->asf, bd->esf, bd->lsf);
  377. dev_kfree_skb_irq(skb);
  378. __skb_queue_purge_irq(&wcn->amsdu);
  379. return -EINVAL;
  380. }
  381. static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
  382. u32 mpdu_header_len,
  383. u32 len,
  384. u16 tid)
  385. {
  386. bd->pdu.mpdu_header_len = mpdu_header_len;
  387. bd->pdu.mpdu_header_off = sizeof(*bd);
  388. bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
  389. bd->pdu.mpdu_header_off;
  390. bd->pdu.mpdu_len = len;
  391. bd->pdu.tid = tid;
  392. }
  393. static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn,
  394. u8 *addr)
  395. {
  396. struct wcn36xx_vif *vif_priv = NULL;
  397. struct ieee80211_vif *vif = NULL;
  398. list_for_each_entry(vif_priv, &wcn->vif_list, list) {
  399. vif = wcn36xx_priv_to_vif(vif_priv);
  400. if (memcmp(vif->addr, addr, ETH_ALEN) == 0)
  401. return vif_priv;
  402. }
  403. wcn36xx_warn("vif %pM not found\n", addr);
  404. return NULL;
  405. }
  406. static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn,
  407. struct wcn36xx_sta *sta_priv,
  408. struct sk_buff *skb)
  409. {
  410. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  411. struct ieee80211_sta *sta;
  412. u8 *qc, tid;
  413. if (!conf_is_ht(&wcn->hw->conf))
  414. return;
  415. sta = wcn36xx_priv_to_sta(sta_priv);
  416. if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control)))
  417. return;
  418. if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
  419. return;
  420. qc = ieee80211_get_qos_ctl(hdr);
  421. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  422. spin_lock(&sta_priv->ampdu_lock);
  423. if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE)
  424. goto out_unlock;
  425. if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) {
  426. sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START;
  427. sta_priv->non_agg_frame_ct = 0;
  428. ieee80211_start_tx_ba_session(sta, tid, 0);
  429. }
  430. out_unlock:
  431. spin_unlock(&sta_priv->ampdu_lock);
  432. }
  433. static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
  434. struct wcn36xx *wcn,
  435. struct wcn36xx_vif **vif_priv,
  436. struct wcn36xx_sta *sta_priv,
  437. struct sk_buff *skb,
  438. bool bcast)
  439. {
  440. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  441. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  442. struct ieee80211_vif *vif = NULL;
  443. struct wcn36xx_vif *__vif_priv = NULL;
  444. bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control);
  445. u16 tid = 0;
  446. bd->bd_rate = WCN36XX_BD_RATE_DATA;
  447. /*
  448. * For not unicast frames mac80211 will not set sta pointer so use
  449. * self_sta_index instead.
  450. */
  451. if (sta_priv) {
  452. __vif_priv = sta_priv->vif;
  453. vif = wcn36xx_priv_to_vif(__vif_priv);
  454. bd->dpu_sign = sta_priv->ucast_dpu_sign;
  455. if (vif->type == NL80211_IFTYPE_STATION) {
  456. bd->sta_index = sta_priv->bss_sta_index;
  457. bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
  458. } else if (vif->type == NL80211_IFTYPE_AP ||
  459. vif->type == NL80211_IFTYPE_ADHOC ||
  460. vif->type == NL80211_IFTYPE_MESH_POINT) {
  461. bd->sta_index = sta_priv->sta_index;
  462. bd->dpu_desc_idx = sta_priv->dpu_desc_index;
  463. }
  464. } else {
  465. __vif_priv = get_vif_by_addr(wcn, hdr->addr2);
  466. bd->sta_index = __vif_priv->self_sta_index;
  467. bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
  468. bd->dpu_sign = __vif_priv->self_ucast_dpu_sign;
  469. }
  470. if (is_data_qos) {
  471. tid = ieee80211_get_tid(hdr);
  472. /* TID->QID is one-to-one mapping */
  473. bd->queue_id = tid;
  474. bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_QOS;
  475. } else {
  476. bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
  477. }
  478. if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT ||
  479. (sta_priv && !sta_priv->is_data_encrypted)) {
  480. bd->dpu_ne = 1;
  481. }
  482. if (ieee80211_is_any_nullfunc(hdr->frame_control)) {
  483. /* Don't use a regular queue for null packet (no ampdu) */
  484. bd->queue_id = WCN36XX_TX_U_WQ_ID;
  485. bd->bd_rate = WCN36XX_BD_RATE_CTRL;
  486. if (ieee80211_is_qos_nullfunc(hdr->frame_control))
  487. bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST;
  488. }
  489. if (bcast) {
  490. bd->ub = 1;
  491. bd->ack_policy = 1;
  492. }
  493. *vif_priv = __vif_priv;
  494. wcn36xx_set_tx_pdu(bd,
  495. is_data_qos ?
  496. sizeof(struct ieee80211_qos_hdr) :
  497. sizeof(struct ieee80211_hdr_3addr),
  498. skb->len, tid);
  499. if (sta_priv && is_data_qos)
  500. wcn36xx_tx_start_ampdu(wcn, sta_priv, skb);
  501. }
  502. static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
  503. struct wcn36xx *wcn,
  504. struct wcn36xx_vif **vif_priv,
  505. struct sk_buff *skb,
  506. bool bcast)
  507. {
  508. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  509. struct wcn36xx_vif *__vif_priv =
  510. get_vif_by_addr(wcn, hdr->addr2);
  511. bd->sta_index = __vif_priv->self_sta_index;
  512. bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
  513. bd->dpu_ne = 1;
  514. /* default rate for unicast */
  515. if (ieee80211_is_mgmt(hdr->frame_control))
  516. bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ?
  517. WCN36XX_BD_RATE_CTRL :
  518. WCN36XX_BD_RATE_MGMT;
  519. else if (ieee80211_is_ctl(hdr->frame_control))
  520. bd->bd_rate = WCN36XX_BD_RATE_CTRL;
  521. else
  522. wcn36xx_warn("frame control type unknown\n");
  523. /*
  524. * In joining state trick hardware that probe is sent as
  525. * unicast even if address is broadcast.
  526. */
  527. if (__vif_priv->is_joining &&
  528. ieee80211_is_probe_req(hdr->frame_control))
  529. bcast = false;
  530. if (bcast) {
  531. /* broadcast */
  532. bd->ub = 1;
  533. /* No ack needed not unicast */
  534. bd->ack_policy = 1;
  535. bd->queue_id = WCN36XX_TX_B_WQ_ID;
  536. } else
  537. bd->queue_id = WCN36XX_TX_U_WQ_ID;
  538. *vif_priv = __vif_priv;
  539. bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
  540. wcn36xx_set_tx_pdu(bd,
  541. ieee80211_is_data_qos(hdr->frame_control) ?
  542. sizeof(struct ieee80211_qos_hdr) :
  543. sizeof(struct ieee80211_hdr_3addr),
  544. skb->len, WCN36XX_TID);
  545. }
  546. int wcn36xx_start_tx(struct wcn36xx *wcn,
  547. struct wcn36xx_sta *sta_priv,
  548. struct sk_buff *skb)
  549. {
  550. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  551. struct wcn36xx_vif *vif_priv = NULL;
  552. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  553. bool is_low = ieee80211_is_data(hdr->frame_control);
  554. bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
  555. is_multicast_ether_addr(hdr->addr1);
  556. bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) &&
  557. !(info->flags & IEEE80211_TX_CTL_NO_ACK);
  558. struct wcn36xx_tx_bd bd;
  559. int ret;
  560. memset(&bd, 0, sizeof(bd));
  561. wcn36xx_dbg(WCN36XX_DBG_TX,
  562. "tx skb %p len %d fc %04x sn %d %s %s\n",
  563. skb, skb->len, __le16_to_cpu(hdr->frame_control),
  564. IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
  565. is_low ? "low" : "high", bcast ? "bcast" : "ucast");
  566. wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
  567. bd.dpu_rf = WCN36XX_BMU_WQ_TX;
  568. if (unlikely(ack_ind)) {
  569. wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
  570. /* Only one at a time is supported by fw. Stop the TX queues
  571. * until the ack status gets back.
  572. */
  573. ieee80211_stop_queues(wcn->hw);
  574. /* Request ack indication from the firmware */
  575. bd.tx_comp = 1;
  576. }
  577. /* Data frames served first*/
  578. if (is_low)
  579. wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast);
  580. else
  581. /* MGMT and CTRL frames are handeld here*/
  582. wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast);
  583. buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32));
  584. bd.tx_bd_sign = 0xbdbdbdbd;
  585. ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low);
  586. if (unlikely(ret && ack_ind)) {
  587. /* If the skb has not been transmitted, resume TX queue */
  588. ieee80211_wake_queues(wcn->hw);
  589. }
  590. return ret;
  591. }
  592. void wcn36xx_process_tx_rate(struct ani_global_class_a_stats_info *stats, struct rate_info *info)
  593. {
  594. /* tx_rate is in units of 500kbps; mac80211 wants them in 100kbps */
  595. if (stats->tx_rate_flags & HAL_TX_RATE_LEGACY)
  596. info->legacy = stats->tx_rate * 5;
  597. info->flags = 0;
  598. info->mcs = stats->mcs_index;
  599. info->nss = 1;
  600. if (stats->tx_rate_flags & (HAL_TX_RATE_HT20 | HAL_TX_RATE_HT40))
  601. info->flags |= RATE_INFO_FLAGS_MCS;
  602. if (stats->tx_rate_flags & (HAL_TX_RATE_VHT20 | HAL_TX_RATE_VHT40 | HAL_TX_RATE_VHT80))
  603. info->flags |= RATE_INFO_FLAGS_VHT_MCS;
  604. if (stats->tx_rate_flags & HAL_TX_RATE_SGI)
  605. info->flags |= RATE_INFO_FLAGS_SHORT_GI;
  606. if (stats->tx_rate_flags & (HAL_TX_RATE_HT20 | HAL_TX_RATE_VHT20))
  607. info->bw = RATE_INFO_BW_20;
  608. if (stats->tx_rate_flags & (HAL_TX_RATE_HT40 | HAL_TX_RATE_VHT40))
  609. info->bw = RATE_INFO_BW_40;
  610. if (stats->tx_rate_flags & HAL_TX_RATE_VHT80)
  611. info->bw = RATE_INFO_BW_80;
  612. }