ax88179_178a.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
  4. *
  5. * Copyright (C) 2011-2013 ASIX
  6. */
  7. #include <linux/module.h>
  8. #include <linux/etherdevice.h>
  9. #include <linux/mii.h>
  10. #include <linux/usb.h>
  11. #include <linux/crc32.h>
  12. #include <linux/usb/usbnet.h>
  13. #include <uapi/linux/mdio.h>
  14. #include <linux/mdio.h>
  15. #define AX88179_PHY_ID 0x03
  16. #define AX_EEPROM_LEN 0x100
  17. #define AX88179_EEPROM_MAGIC 0x17900b95
  18. #define AX_MCAST_FLTSIZE 8
  19. #define AX_MAX_MCAST 64
  20. #define AX_INT_PPLS_LINK ((u32)BIT(16))
  21. #define AX_RXHDR_L4_TYPE_MASK 0x1c
  22. #define AX_RXHDR_L4_TYPE_UDP 4
  23. #define AX_RXHDR_L4_TYPE_TCP 16
  24. #define AX_RXHDR_L3CSUM_ERR 2
  25. #define AX_RXHDR_L4CSUM_ERR 1
  26. #define AX_RXHDR_CRC_ERR ((u32)BIT(29))
  27. #define AX_RXHDR_DROP_ERR ((u32)BIT(31))
  28. #define AX_ACCESS_MAC 0x01
  29. #define AX_ACCESS_PHY 0x02
  30. #define AX_ACCESS_EEPROM 0x04
  31. #define AX_ACCESS_EFUS 0x05
  32. #define AX_RELOAD_EEPROM_EFUSE 0x06
  33. #define AX_PAUSE_WATERLVL_HIGH 0x54
  34. #define AX_PAUSE_WATERLVL_LOW 0x55
  35. #define PHYSICAL_LINK_STATUS 0x02
  36. #define AX_USB_SS 0x04
  37. #define AX_USB_HS 0x02
  38. #define GENERAL_STATUS 0x03
  39. /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
  40. #define AX_SECLD 0x04
  41. #define AX_SROM_ADDR 0x07
  42. #define AX_SROM_CMD 0x0a
  43. #define EEP_RD 0x04
  44. #define EEP_BUSY 0x10
  45. #define AX_SROM_DATA_LOW 0x08
  46. #define AX_SROM_DATA_HIGH 0x09
  47. #define AX_RX_CTL 0x0b
  48. #define AX_RX_CTL_DROPCRCERR 0x0100
  49. #define AX_RX_CTL_IPE 0x0200
  50. #define AX_RX_CTL_START 0x0080
  51. #define AX_RX_CTL_AP 0x0020
  52. #define AX_RX_CTL_AM 0x0010
  53. #define AX_RX_CTL_AB 0x0008
  54. #define AX_RX_CTL_AMALL 0x0002
  55. #define AX_RX_CTL_PRO 0x0001
  56. #define AX_RX_CTL_STOP 0x0000
  57. #define AX_NODE_ID 0x10
  58. #define AX_MULFLTARY 0x16
  59. #define AX_MEDIUM_STATUS_MODE 0x22
  60. #define AX_MEDIUM_GIGAMODE 0x01
  61. #define AX_MEDIUM_FULL_DUPLEX 0x02
  62. #define AX_MEDIUM_EN_125MHZ 0x08
  63. #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
  64. #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
  65. #define AX_MEDIUM_RECEIVE_EN 0x100
  66. #define AX_MEDIUM_PS 0x200
  67. #define AX_MEDIUM_JUMBO_EN 0x8040
  68. #define AX_MONITOR_MOD 0x24
  69. #define AX_MONITOR_MODE_RWLC 0x02
  70. #define AX_MONITOR_MODE_RWMP 0x04
  71. #define AX_MONITOR_MODE_PMEPOL 0x20
  72. #define AX_MONITOR_MODE_PMETYPE 0x40
  73. #define AX_GPIO_CTRL 0x25
  74. #define AX_GPIO_CTRL_GPIO3EN 0x80
  75. #define AX_GPIO_CTRL_GPIO2EN 0x40
  76. #define AX_GPIO_CTRL_GPIO1EN 0x20
  77. #define AX_PHYPWR_RSTCTL 0x26
  78. #define AX_PHYPWR_RSTCTL_BZ 0x0010
  79. #define AX_PHYPWR_RSTCTL_IPRL 0x0020
  80. #define AX_PHYPWR_RSTCTL_AT 0x1000
  81. #define AX_RX_BULKIN_QCTRL 0x2e
  82. #define AX_CLK_SELECT 0x33
  83. #define AX_CLK_SELECT_BCS 0x01
  84. #define AX_CLK_SELECT_ACS 0x02
  85. #define AX_CLK_SELECT_ULR 0x08
  86. #define AX_RXCOE_CTL 0x34
  87. #define AX_RXCOE_IP 0x01
  88. #define AX_RXCOE_TCP 0x02
  89. #define AX_RXCOE_UDP 0x04
  90. #define AX_RXCOE_TCPV6 0x20
  91. #define AX_RXCOE_UDPV6 0x40
  92. #define AX_TXCOE_CTL 0x35
  93. #define AX_TXCOE_IP 0x01
  94. #define AX_TXCOE_TCP 0x02
  95. #define AX_TXCOE_UDP 0x04
  96. #define AX_TXCOE_TCPV6 0x20
  97. #define AX_TXCOE_UDPV6 0x40
  98. #define AX_LEDCTRL 0x73
  99. #define GMII_PHY_PHYSR 0x11
  100. #define GMII_PHY_PHYSR_SMASK 0xc000
  101. #define GMII_PHY_PHYSR_GIGA 0x8000
  102. #define GMII_PHY_PHYSR_100 0x4000
  103. #define GMII_PHY_PHYSR_FULL 0x2000
  104. #define GMII_PHY_PHYSR_LINK 0x400
  105. #define GMII_LED_ACT 0x1a
  106. #define GMII_LED_ACTIVE_MASK 0xff8f
  107. #define GMII_LED0_ACTIVE BIT(4)
  108. #define GMII_LED1_ACTIVE BIT(5)
  109. #define GMII_LED2_ACTIVE BIT(6)
  110. #define GMII_LED_LINK 0x1c
  111. #define GMII_LED_LINK_MASK 0xf888
  112. #define GMII_LED0_LINK_10 BIT(0)
  113. #define GMII_LED0_LINK_100 BIT(1)
  114. #define GMII_LED0_LINK_1000 BIT(2)
  115. #define GMII_LED1_LINK_10 BIT(4)
  116. #define GMII_LED1_LINK_100 BIT(5)
  117. #define GMII_LED1_LINK_1000 BIT(6)
  118. #define GMII_LED2_LINK_10 BIT(8)
  119. #define GMII_LED2_LINK_100 BIT(9)
  120. #define GMII_LED2_LINK_1000 BIT(10)
  121. #define LED0_ACTIVE BIT(0)
  122. #define LED0_LINK_10 BIT(1)
  123. #define LED0_LINK_100 BIT(2)
  124. #define LED0_LINK_1000 BIT(3)
  125. #define LED0_FD BIT(4)
  126. #define LED0_USB3_MASK 0x001f
  127. #define LED1_ACTIVE BIT(5)
  128. #define LED1_LINK_10 BIT(6)
  129. #define LED1_LINK_100 BIT(7)
  130. #define LED1_LINK_1000 BIT(8)
  131. #define LED1_FD BIT(9)
  132. #define LED1_USB3_MASK 0x03e0
  133. #define LED2_ACTIVE BIT(10)
  134. #define LED2_LINK_1000 BIT(13)
  135. #define LED2_LINK_100 BIT(12)
  136. #define LED2_LINK_10 BIT(11)
  137. #define LED2_FD BIT(14)
  138. #define LED_VALID BIT(15)
  139. #define LED2_USB3_MASK 0x7c00
  140. #define GMII_PHYPAGE 0x1e
  141. #define GMII_PHY_PAGE_SELECT 0x1f
  142. #define GMII_PHY_PGSEL_EXT 0x0007
  143. #define GMII_PHY_PGSEL_PAGE0 0x0000
  144. #define GMII_PHY_PGSEL_PAGE3 0x0003
  145. #define GMII_PHY_PGSEL_PAGE5 0x0005
  146. static int ax88179_reset(struct usbnet *dev);
  147. struct ax88179_data {
  148. u8 eee_enabled;
  149. u8 eee_active;
  150. u16 rxctl;
  151. u8 in_pm;
  152. u32 wol_supported;
  153. u32 wolopts;
  154. };
  155. struct ax88179_int_data {
  156. __le32 intdata1;
  157. __le32 intdata2;
  158. };
  159. static const struct {
  160. unsigned char ctrl, timer_l, timer_h, size, ifg;
  161. } AX88179_BULKIN_SIZE[] = {
  162. {7, 0x4f, 0, 0x12, 0xff},
  163. {7, 0x20, 3, 0x16, 0xff},
  164. {7, 0xae, 7, 0x18, 0xff},
  165. {7, 0xcc, 0x4c, 0x18, 8},
  166. };
  167. static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
  168. {
  169. struct ax88179_data *ax179_data = dev->driver_priv;
  170. ax179_data->in_pm = pm_mode;
  171. }
  172. static int ax88179_in_pm(struct usbnet *dev)
  173. {
  174. struct ax88179_data *ax179_data = dev->driver_priv;
  175. return ax179_data->in_pm;
  176. }
  177. static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  178. u16 size, void *data)
  179. {
  180. int ret;
  181. int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  182. BUG_ON(!dev);
  183. if (!ax88179_in_pm(dev))
  184. fn = usbnet_read_cmd;
  185. else
  186. fn = usbnet_read_cmd_nopm;
  187. ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  188. value, index, data, size);
  189. if (unlikely(ret < 0))
  190. netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
  191. index, ret);
  192. return ret;
  193. }
  194. static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  195. u16 size, const void *data)
  196. {
  197. int ret;
  198. int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
  199. BUG_ON(!dev);
  200. if (!ax88179_in_pm(dev))
  201. fn = usbnet_write_cmd;
  202. else
  203. fn = usbnet_write_cmd_nopm;
  204. ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  205. value, index, data, size);
  206. if (unlikely(ret < 0))
  207. netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
  208. index, ret);
  209. return ret;
  210. }
  211. static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
  212. u16 index, u16 size, void *data)
  213. {
  214. u16 buf;
  215. if (2 == size) {
  216. buf = *((u16 *)data);
  217. cpu_to_le16s(&buf);
  218. usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
  219. USB_RECIP_DEVICE, value, index, &buf,
  220. size);
  221. } else {
  222. usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
  223. USB_RECIP_DEVICE, value, index, data,
  224. size);
  225. }
  226. }
  227. static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  228. u16 size, void *data)
  229. {
  230. int ret;
  231. if (2 == size) {
  232. u16 buf = 0;
  233. ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
  234. le16_to_cpus(&buf);
  235. *((u16 *)data) = buf;
  236. } else if (4 == size) {
  237. u32 buf = 0;
  238. ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
  239. le32_to_cpus(&buf);
  240. *((u32 *)data) = buf;
  241. } else {
  242. ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
  243. }
  244. return ret;
  245. }
  246. static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  247. u16 size, const void *data)
  248. {
  249. int ret;
  250. if (2 == size) {
  251. u16 buf;
  252. buf = *((u16 *)data);
  253. cpu_to_le16s(&buf);
  254. ret = __ax88179_write_cmd(dev, cmd, value, index,
  255. size, &buf);
  256. } else {
  257. ret = __ax88179_write_cmd(dev, cmd, value, index,
  258. size, data);
  259. }
  260. return ret;
  261. }
  262. static void ax88179_status(struct usbnet *dev, struct urb *urb)
  263. {
  264. struct ax88179_int_data *event;
  265. u32 link;
  266. if (urb->actual_length < 8)
  267. return;
  268. event = urb->transfer_buffer;
  269. le32_to_cpus((void *)&event->intdata1);
  270. link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
  271. if (netif_carrier_ok(dev->net) != link) {
  272. usbnet_link_change(dev, link, 1);
  273. netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
  274. }
  275. }
  276. static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
  277. {
  278. struct usbnet *dev = netdev_priv(netdev);
  279. u16 res;
  280. ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
  281. return res;
  282. }
  283. static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
  284. int val)
  285. {
  286. struct usbnet *dev = netdev_priv(netdev);
  287. u16 res = (u16) val;
  288. ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
  289. }
  290. static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
  291. u16 devad)
  292. {
  293. u16 tmp16;
  294. int ret;
  295. tmp16 = devad;
  296. ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  297. MII_MMD_CTRL, 2, &tmp16);
  298. tmp16 = prtad;
  299. ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  300. MII_MMD_DATA, 2, &tmp16);
  301. tmp16 = devad | MII_MMD_CTRL_NOINCR;
  302. ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  303. MII_MMD_CTRL, 2, &tmp16);
  304. return ret;
  305. }
  306. static int
  307. ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
  308. {
  309. int ret;
  310. u16 tmp16;
  311. ax88179_phy_mmd_indirect(dev, prtad, devad);
  312. ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  313. MII_MMD_DATA, 2, &tmp16);
  314. if (ret < 0)
  315. return ret;
  316. return tmp16;
  317. }
  318. static int
  319. ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
  320. u16 data)
  321. {
  322. int ret;
  323. ax88179_phy_mmd_indirect(dev, prtad, devad);
  324. ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  325. MII_MMD_DATA, 2, &data);
  326. if (ret < 0)
  327. return ret;
  328. return 0;
  329. }
  330. static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
  331. {
  332. struct usbnet *dev = usb_get_intfdata(intf);
  333. struct ax88179_data *priv = dev->driver_priv;
  334. u16 tmp16;
  335. u8 tmp8;
  336. ax88179_set_pm_mode(dev, true);
  337. usbnet_suspend(intf, message);
  338. /* Enable WoL */
  339. if (priv->wolopts) {
  340. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
  341. 1, 1, &tmp8);
  342. if (priv->wolopts & WAKE_PHY)
  343. tmp8 |= AX_MONITOR_MODE_RWLC;
  344. if (priv->wolopts & WAKE_MAGIC)
  345. tmp8 |= AX_MONITOR_MODE_RWMP;
  346. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
  347. 1, 1, &tmp8);
  348. }
  349. /* Disable RX path */
  350. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  351. 2, 2, &tmp16);
  352. tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
  353. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  354. 2, 2, &tmp16);
  355. /* Force bulk-in zero length */
  356. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
  357. 2, 2, &tmp16);
  358. tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
  359. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
  360. 2, 2, &tmp16);
  361. /* change clock */
  362. tmp8 = 0;
  363. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
  364. /* Configure RX control register => stop operation */
  365. tmp16 = AX_RX_CTL_STOP;
  366. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
  367. ax88179_set_pm_mode(dev, false);
  368. return 0;
  369. }
  370. /* This function is used to enable the autodetach function. */
  371. /* This function is determined by offset 0x43 of EEPROM */
  372. static int ax88179_auto_detach(struct usbnet *dev)
  373. {
  374. u16 tmp16;
  375. u8 tmp8;
  376. if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
  377. return 0;
  378. if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
  379. return 0;
  380. /* Enable Auto Detach bit */
  381. tmp8 = 0;
  382. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
  383. tmp8 |= AX_CLK_SELECT_ULR;
  384. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
  385. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
  386. tmp16 |= AX_PHYPWR_RSTCTL_AT;
  387. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
  388. return 0;
  389. }
  390. static int ax88179_resume(struct usb_interface *intf)
  391. {
  392. struct usbnet *dev = usb_get_intfdata(intf);
  393. ax88179_set_pm_mode(dev, true);
  394. usbnet_link_change(dev, 0, 0);
  395. ax88179_reset(dev);
  396. ax88179_set_pm_mode(dev, false);
  397. return usbnet_resume(intf);
  398. }
  399. static void
  400. ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  401. {
  402. struct usbnet *dev = netdev_priv(net);
  403. struct ax88179_data *priv = dev->driver_priv;
  404. wolinfo->supported = priv->wol_supported;
  405. wolinfo->wolopts = priv->wolopts;
  406. }
  407. static int
  408. ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  409. {
  410. struct usbnet *dev = netdev_priv(net);
  411. struct ax88179_data *priv = dev->driver_priv;
  412. if (wolinfo->wolopts & ~(priv->wol_supported))
  413. return -EINVAL;
  414. priv->wolopts = wolinfo->wolopts;
  415. return 0;
  416. }
  417. static int ax88179_get_eeprom_len(struct net_device *net)
  418. {
  419. return AX_EEPROM_LEN;
  420. }
  421. static int
  422. ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
  423. u8 *data)
  424. {
  425. struct usbnet *dev = netdev_priv(net);
  426. u16 *eeprom_buff;
  427. int first_word, last_word;
  428. int i, ret;
  429. if (eeprom->len == 0)
  430. return -EINVAL;
  431. eeprom->magic = AX88179_EEPROM_MAGIC;
  432. first_word = eeprom->offset >> 1;
  433. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  434. eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
  435. GFP_KERNEL);
  436. if (!eeprom_buff)
  437. return -ENOMEM;
  438. /* ax88179/178A returns 2 bytes from eeprom on read */
  439. for (i = first_word; i <= last_word; i++) {
  440. ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
  441. &eeprom_buff[i - first_word]);
  442. if (ret < 0) {
  443. kfree(eeprom_buff);
  444. return -EIO;
  445. }
  446. }
  447. memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
  448. kfree(eeprom_buff);
  449. return 0;
  450. }
  451. static int
  452. ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
  453. u8 *data)
  454. {
  455. struct usbnet *dev = netdev_priv(net);
  456. u16 *eeprom_buff;
  457. int first_word;
  458. int last_word;
  459. int ret;
  460. int i;
  461. netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
  462. eeprom->len, eeprom->offset, eeprom->magic);
  463. if (eeprom->len == 0)
  464. return -EINVAL;
  465. if (eeprom->magic != AX88179_EEPROM_MAGIC)
  466. return -EINVAL;
  467. first_word = eeprom->offset >> 1;
  468. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  469. eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
  470. GFP_KERNEL);
  471. if (!eeprom_buff)
  472. return -ENOMEM;
  473. /* align data to 16 bit boundaries, read the missing data from
  474. the EEPROM */
  475. if (eeprom->offset & 1) {
  476. ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
  477. &eeprom_buff[0]);
  478. if (ret < 0) {
  479. netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
  480. goto free;
  481. }
  482. }
  483. if ((eeprom->offset + eeprom->len) & 1) {
  484. ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
  485. &eeprom_buff[last_word - first_word]);
  486. if (ret < 0) {
  487. netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
  488. goto free;
  489. }
  490. }
  491. memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
  492. for (i = first_word; i <= last_word; i++) {
  493. netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
  494. i, eeprom_buff[i - first_word]);
  495. ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
  496. &eeprom_buff[i - first_word]);
  497. if (ret < 0) {
  498. netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
  499. goto free;
  500. }
  501. msleep(20);
  502. }
  503. /* reload EEPROM data */
  504. ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
  505. if (ret < 0) {
  506. netdev_err(net, "Failed to reload EEPROM data\n");
  507. goto free;
  508. }
  509. ret = 0;
  510. free:
  511. kfree(eeprom_buff);
  512. return ret;
  513. }
  514. static int ax88179_get_link_ksettings(struct net_device *net,
  515. struct ethtool_link_ksettings *cmd)
  516. {
  517. struct usbnet *dev = netdev_priv(net);
  518. mii_ethtool_get_link_ksettings(&dev->mii, cmd);
  519. return 0;
  520. }
  521. static int ax88179_set_link_ksettings(struct net_device *net,
  522. const struct ethtool_link_ksettings *cmd)
  523. {
  524. struct usbnet *dev = netdev_priv(net);
  525. return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
  526. }
  527. static int
  528. ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
  529. {
  530. int val;
  531. /* Get Supported EEE */
  532. val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
  533. MDIO_MMD_PCS);
  534. if (val < 0)
  535. return val;
  536. data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
  537. /* Get advertisement EEE */
  538. val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
  539. MDIO_MMD_AN);
  540. if (val < 0)
  541. return val;
  542. data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
  543. /* Get LP advertisement EEE */
  544. val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
  545. MDIO_MMD_AN);
  546. if (val < 0)
  547. return val;
  548. data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
  549. return 0;
  550. }
  551. static int
  552. ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
  553. {
  554. u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
  555. return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
  556. MDIO_MMD_AN, tmp16);
  557. }
  558. static int ax88179_chk_eee(struct usbnet *dev)
  559. {
  560. struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
  561. struct ax88179_data *priv = dev->driver_priv;
  562. mii_ethtool_gset(&dev->mii, &ecmd);
  563. if (ecmd.duplex & DUPLEX_FULL) {
  564. int eee_lp, eee_cap, eee_adv;
  565. u32 lp, cap, adv, supported = 0;
  566. eee_cap = ax88179_phy_read_mmd_indirect(dev,
  567. MDIO_PCS_EEE_ABLE,
  568. MDIO_MMD_PCS);
  569. if (eee_cap < 0) {
  570. priv->eee_active = 0;
  571. return false;
  572. }
  573. cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
  574. if (!cap) {
  575. priv->eee_active = 0;
  576. return false;
  577. }
  578. eee_lp = ax88179_phy_read_mmd_indirect(dev,
  579. MDIO_AN_EEE_LPABLE,
  580. MDIO_MMD_AN);
  581. if (eee_lp < 0) {
  582. priv->eee_active = 0;
  583. return false;
  584. }
  585. eee_adv = ax88179_phy_read_mmd_indirect(dev,
  586. MDIO_AN_EEE_ADV,
  587. MDIO_MMD_AN);
  588. if (eee_adv < 0) {
  589. priv->eee_active = 0;
  590. return false;
  591. }
  592. adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
  593. lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
  594. supported = (ecmd.speed == SPEED_1000) ?
  595. SUPPORTED_1000baseT_Full :
  596. SUPPORTED_100baseT_Full;
  597. if (!(lp & adv & supported)) {
  598. priv->eee_active = 0;
  599. return false;
  600. }
  601. priv->eee_active = 1;
  602. return true;
  603. }
  604. priv->eee_active = 0;
  605. return false;
  606. }
  607. static void ax88179_disable_eee(struct usbnet *dev)
  608. {
  609. u16 tmp16;
  610. tmp16 = GMII_PHY_PGSEL_PAGE3;
  611. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  612. GMII_PHY_PAGE_SELECT, 2, &tmp16);
  613. tmp16 = 0x3246;
  614. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  615. MII_PHYADDR, 2, &tmp16);
  616. tmp16 = GMII_PHY_PGSEL_PAGE0;
  617. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  618. GMII_PHY_PAGE_SELECT, 2, &tmp16);
  619. }
  620. static void ax88179_enable_eee(struct usbnet *dev)
  621. {
  622. u16 tmp16;
  623. tmp16 = GMII_PHY_PGSEL_PAGE3;
  624. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  625. GMII_PHY_PAGE_SELECT, 2, &tmp16);
  626. tmp16 = 0x3247;
  627. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  628. MII_PHYADDR, 2, &tmp16);
  629. tmp16 = GMII_PHY_PGSEL_PAGE5;
  630. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  631. GMII_PHY_PAGE_SELECT, 2, &tmp16);
  632. tmp16 = 0x0680;
  633. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  634. MII_BMSR, 2, &tmp16);
  635. tmp16 = GMII_PHY_PGSEL_PAGE0;
  636. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  637. GMII_PHY_PAGE_SELECT, 2, &tmp16);
  638. }
  639. static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
  640. {
  641. struct usbnet *dev = netdev_priv(net);
  642. struct ax88179_data *priv = dev->driver_priv;
  643. edata->eee_enabled = priv->eee_enabled;
  644. edata->eee_active = priv->eee_active;
  645. return ax88179_ethtool_get_eee(dev, edata);
  646. }
  647. static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
  648. {
  649. struct usbnet *dev = netdev_priv(net);
  650. struct ax88179_data *priv = dev->driver_priv;
  651. int ret;
  652. priv->eee_enabled = edata->eee_enabled;
  653. if (!priv->eee_enabled) {
  654. ax88179_disable_eee(dev);
  655. } else {
  656. priv->eee_enabled = ax88179_chk_eee(dev);
  657. if (!priv->eee_enabled)
  658. return -EOPNOTSUPP;
  659. ax88179_enable_eee(dev);
  660. }
  661. ret = ax88179_ethtool_set_eee(dev, edata);
  662. if (ret)
  663. return ret;
  664. mii_nway_restart(&dev->mii);
  665. usbnet_link_change(dev, 0, 0);
  666. return ret;
  667. }
  668. static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
  669. {
  670. struct usbnet *dev = netdev_priv(net);
  671. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  672. }
  673. static const struct ethtool_ops ax88179_ethtool_ops = {
  674. .get_link = ethtool_op_get_link,
  675. .get_msglevel = usbnet_get_msglevel,
  676. .set_msglevel = usbnet_set_msglevel,
  677. .get_wol = ax88179_get_wol,
  678. .set_wol = ax88179_set_wol,
  679. .get_eeprom_len = ax88179_get_eeprom_len,
  680. .get_eeprom = ax88179_get_eeprom,
  681. .set_eeprom = ax88179_set_eeprom,
  682. .get_eee = ax88179_get_eee,
  683. .set_eee = ax88179_set_eee,
  684. .nway_reset = usbnet_nway_reset,
  685. .get_link_ksettings = ax88179_get_link_ksettings,
  686. .set_link_ksettings = ax88179_set_link_ksettings,
  687. .get_ts_info = ethtool_op_get_ts_info,
  688. };
  689. static void ax88179_set_multicast(struct net_device *net)
  690. {
  691. struct usbnet *dev = netdev_priv(net);
  692. struct ax88179_data *data = dev->driver_priv;
  693. u8 *m_filter = ((u8 *)dev->data);
  694. data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
  695. if (net->flags & IFF_PROMISC) {
  696. data->rxctl |= AX_RX_CTL_PRO;
  697. } else if (net->flags & IFF_ALLMULTI ||
  698. netdev_mc_count(net) > AX_MAX_MCAST) {
  699. data->rxctl |= AX_RX_CTL_AMALL;
  700. } else if (netdev_mc_empty(net)) {
  701. /* just broadcast and directed */
  702. } else {
  703. /* We use dev->data for our 8 byte filter buffer
  704. * to avoid allocating memory that is tricky to free later
  705. */
  706. u32 crc_bits;
  707. struct netdev_hw_addr *ha;
  708. memset(m_filter, 0, AX_MCAST_FLTSIZE);
  709. netdev_for_each_mc_addr(ha, net) {
  710. crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
  711. *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
  712. }
  713. ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
  714. AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
  715. m_filter);
  716. data->rxctl |= AX_RX_CTL_AM;
  717. }
  718. ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
  719. 2, 2, &data->rxctl);
  720. }
  721. static int
  722. ax88179_set_features(struct net_device *net, netdev_features_t features)
  723. {
  724. u8 tmp;
  725. struct usbnet *dev = netdev_priv(net);
  726. netdev_features_t changed = net->features ^ features;
  727. if (changed & NETIF_F_IP_CSUM) {
  728. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
  729. tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
  730. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
  731. }
  732. if (changed & NETIF_F_IPV6_CSUM) {
  733. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
  734. tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
  735. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
  736. }
  737. if (changed & NETIF_F_RXCSUM) {
  738. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
  739. tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
  740. AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
  741. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
  742. }
  743. return 0;
  744. }
  745. static int ax88179_change_mtu(struct net_device *net, int new_mtu)
  746. {
  747. struct usbnet *dev = netdev_priv(net);
  748. u16 tmp16;
  749. net->mtu = new_mtu;
  750. dev->hard_mtu = net->mtu + net->hard_header_len;
  751. if (net->mtu > 1500) {
  752. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  753. 2, 2, &tmp16);
  754. tmp16 |= AX_MEDIUM_JUMBO_EN;
  755. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  756. 2, 2, &tmp16);
  757. } else {
  758. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  759. 2, 2, &tmp16);
  760. tmp16 &= ~AX_MEDIUM_JUMBO_EN;
  761. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  762. 2, 2, &tmp16);
  763. }
  764. /* max qlen depend on hard_mtu and rx_urb_size */
  765. usbnet_update_max_qlen(dev);
  766. return 0;
  767. }
  768. static int ax88179_set_mac_addr(struct net_device *net, void *p)
  769. {
  770. struct usbnet *dev = netdev_priv(net);
  771. struct sockaddr *addr = p;
  772. int ret;
  773. if (netif_running(net))
  774. return -EBUSY;
  775. if (!is_valid_ether_addr(addr->sa_data))
  776. return -EADDRNOTAVAIL;
  777. eth_hw_addr_set(net, addr->sa_data);
  778. /* Set the MAC address */
  779. ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
  780. ETH_ALEN, net->dev_addr);
  781. if (ret < 0)
  782. return ret;
  783. return 0;
  784. }
  785. static const struct net_device_ops ax88179_netdev_ops = {
  786. .ndo_open = usbnet_open,
  787. .ndo_stop = usbnet_stop,
  788. .ndo_start_xmit = usbnet_start_xmit,
  789. .ndo_tx_timeout = usbnet_tx_timeout,
  790. .ndo_get_stats64 = dev_get_tstats64,
  791. .ndo_change_mtu = ax88179_change_mtu,
  792. .ndo_set_mac_address = ax88179_set_mac_addr,
  793. .ndo_validate_addr = eth_validate_addr,
  794. .ndo_eth_ioctl = ax88179_ioctl,
  795. .ndo_set_rx_mode = ax88179_set_multicast,
  796. .ndo_set_features = ax88179_set_features,
  797. };
  798. static int ax88179_check_eeprom(struct usbnet *dev)
  799. {
  800. u8 i, buf, eeprom[20];
  801. u16 csum, delay = HZ / 10;
  802. unsigned long jtimeout;
  803. /* Read EEPROM content */
  804. for (i = 0; i < 6; i++) {
  805. buf = i;
  806. if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
  807. 1, 1, &buf) < 0)
  808. return -EINVAL;
  809. buf = EEP_RD;
  810. if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
  811. 1, 1, &buf) < 0)
  812. return -EINVAL;
  813. jtimeout = jiffies + delay;
  814. do {
  815. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
  816. 1, 1, &buf);
  817. if (time_after(jiffies, jtimeout))
  818. return -EINVAL;
  819. } while (buf & EEP_BUSY);
  820. __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
  821. 2, 2, &eeprom[i * 2]);
  822. if ((i == 0) && (eeprom[0] == 0xFF))
  823. return -EINVAL;
  824. }
  825. csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
  826. csum = (csum >> 8) + (csum & 0xff);
  827. if ((csum + eeprom[10]) != 0xff)
  828. return -EINVAL;
  829. return 0;
  830. }
  831. static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
  832. {
  833. u8 i;
  834. u8 efuse[64];
  835. u16 csum = 0;
  836. if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
  837. return -EINVAL;
  838. if (*efuse == 0xFF)
  839. return -EINVAL;
  840. for (i = 0; i < 64; i++)
  841. csum = csum + efuse[i];
  842. while (csum > 255)
  843. csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
  844. if (csum != 0xFF)
  845. return -EINVAL;
  846. *ledmode = (efuse[51] << 8) | efuse[52];
  847. return 0;
  848. }
  849. static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
  850. {
  851. u16 led;
  852. /* Loaded the old eFuse LED Mode */
  853. if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
  854. return -EINVAL;
  855. led >>= 8;
  856. switch (led) {
  857. case 0xFF:
  858. led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
  859. LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
  860. LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
  861. break;
  862. case 0xFE:
  863. led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
  864. break;
  865. case 0xFD:
  866. led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
  867. LED2_LINK_10 | LED_VALID;
  868. break;
  869. case 0xFC:
  870. led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
  871. LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
  872. break;
  873. default:
  874. led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
  875. LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
  876. LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
  877. break;
  878. }
  879. *ledvalue = led;
  880. return 0;
  881. }
  882. static int ax88179_led_setting(struct usbnet *dev)
  883. {
  884. u8 ledfd, value = 0;
  885. u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
  886. unsigned long jtimeout;
  887. /* Check AX88179 version. UA1 or UA2*/
  888. ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
  889. if (!(value & AX_SECLD)) { /* UA1 */
  890. value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
  891. AX_GPIO_CTRL_GPIO1EN;
  892. if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
  893. 1, 1, &value) < 0)
  894. return -EINVAL;
  895. }
  896. /* Check EEPROM */
  897. if (!ax88179_check_eeprom(dev)) {
  898. value = 0x42;
  899. if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
  900. 1, 1, &value) < 0)
  901. return -EINVAL;
  902. value = EEP_RD;
  903. if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
  904. 1, 1, &value) < 0)
  905. return -EINVAL;
  906. jtimeout = jiffies + delay;
  907. do {
  908. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
  909. 1, 1, &value);
  910. if (time_after(jiffies, jtimeout))
  911. return -EINVAL;
  912. } while (value & EEP_BUSY);
  913. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
  914. 1, 1, &value);
  915. ledvalue = (value << 8);
  916. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
  917. 1, 1, &value);
  918. ledvalue |= value;
  919. /* load internal ROM for defaule setting */
  920. if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
  921. ax88179_convert_old_led(dev, &ledvalue);
  922. } else if (!ax88179_check_efuse(dev, &ledvalue)) {
  923. if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
  924. ax88179_convert_old_led(dev, &ledvalue);
  925. } else {
  926. ax88179_convert_old_led(dev, &ledvalue);
  927. }
  928. tmp = GMII_PHY_PGSEL_EXT;
  929. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  930. GMII_PHY_PAGE_SELECT, 2, &tmp);
  931. tmp = 0x2c;
  932. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  933. GMII_PHYPAGE, 2, &tmp);
  934. ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  935. GMII_LED_ACT, 2, &ledact);
  936. ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  937. GMII_LED_LINK, 2, &ledlink);
  938. ledact &= GMII_LED_ACTIVE_MASK;
  939. ledlink &= GMII_LED_LINK_MASK;
  940. if (ledvalue & LED0_ACTIVE)
  941. ledact |= GMII_LED0_ACTIVE;
  942. if (ledvalue & LED1_ACTIVE)
  943. ledact |= GMII_LED1_ACTIVE;
  944. if (ledvalue & LED2_ACTIVE)
  945. ledact |= GMII_LED2_ACTIVE;
  946. if (ledvalue & LED0_LINK_10)
  947. ledlink |= GMII_LED0_LINK_10;
  948. if (ledvalue & LED1_LINK_10)
  949. ledlink |= GMII_LED1_LINK_10;
  950. if (ledvalue & LED2_LINK_10)
  951. ledlink |= GMII_LED2_LINK_10;
  952. if (ledvalue & LED0_LINK_100)
  953. ledlink |= GMII_LED0_LINK_100;
  954. if (ledvalue & LED1_LINK_100)
  955. ledlink |= GMII_LED1_LINK_100;
  956. if (ledvalue & LED2_LINK_100)
  957. ledlink |= GMII_LED2_LINK_100;
  958. if (ledvalue & LED0_LINK_1000)
  959. ledlink |= GMII_LED0_LINK_1000;
  960. if (ledvalue & LED1_LINK_1000)
  961. ledlink |= GMII_LED1_LINK_1000;
  962. if (ledvalue & LED2_LINK_1000)
  963. ledlink |= GMII_LED2_LINK_1000;
  964. tmp = ledact;
  965. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  966. GMII_LED_ACT, 2, &tmp);
  967. tmp = ledlink;
  968. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  969. GMII_LED_LINK, 2, &tmp);
  970. tmp = GMII_PHY_PGSEL_PAGE0;
  971. ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  972. GMII_PHY_PAGE_SELECT, 2, &tmp);
  973. /* LED full duplex setting */
  974. ledfd = 0;
  975. if (ledvalue & LED0_FD)
  976. ledfd |= 0x01;
  977. else if ((ledvalue & LED0_USB3_MASK) == 0)
  978. ledfd |= 0x02;
  979. if (ledvalue & LED1_FD)
  980. ledfd |= 0x04;
  981. else if ((ledvalue & LED1_USB3_MASK) == 0)
  982. ledfd |= 0x08;
  983. if (ledvalue & LED2_FD)
  984. ledfd |= 0x10;
  985. else if ((ledvalue & LED2_USB3_MASK) == 0)
  986. ledfd |= 0x20;
  987. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
  988. return 0;
  989. }
  990. static void ax88179_get_mac_addr(struct usbnet *dev)
  991. {
  992. u8 mac[ETH_ALEN];
  993. memset(mac, 0, sizeof(mac));
  994. /* Maybe the boot loader passed the MAC address via device tree */
  995. if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
  996. netif_dbg(dev, ifup, dev->net,
  997. "MAC address read from device tree");
  998. } else {
  999. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
  1000. ETH_ALEN, mac);
  1001. netif_dbg(dev, ifup, dev->net,
  1002. "MAC address read from ASIX chip");
  1003. }
  1004. if (is_valid_ether_addr(mac)) {
  1005. eth_hw_addr_set(dev->net, mac);
  1006. } else {
  1007. netdev_info(dev->net, "invalid MAC address, using random\n");
  1008. eth_hw_addr_random(dev->net);
  1009. }
  1010. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
  1011. dev->net->dev_addr);
  1012. }
  1013. static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
  1014. {
  1015. struct ax88179_data *ax179_data;
  1016. usbnet_get_endpoints(dev, intf);
  1017. ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
  1018. if (!ax179_data)
  1019. return -ENOMEM;
  1020. dev->driver_priv = ax179_data;
  1021. dev->net->netdev_ops = &ax88179_netdev_ops;
  1022. dev->net->ethtool_ops = &ax88179_ethtool_ops;
  1023. dev->net->needed_headroom = 8;
  1024. dev->net->max_mtu = 4088;
  1025. /* Initialize MII structure */
  1026. dev->mii.dev = dev->net;
  1027. dev->mii.mdio_read = ax88179_mdio_read;
  1028. dev->mii.mdio_write = ax88179_mdio_write;
  1029. dev->mii.phy_id_mask = 0xff;
  1030. dev->mii.reg_num_mask = 0xff;
  1031. dev->mii.phy_id = 0x03;
  1032. dev->mii.supports_gmii = 1;
  1033. dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
  1034. NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
  1035. dev->net->hw_features |= dev->net->features;
  1036. netif_set_tso_max_size(dev->net, 16384);
  1037. ax88179_reset(dev);
  1038. return 0;
  1039. }
  1040. static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
  1041. {
  1042. struct ax88179_data *ax179_data = dev->driver_priv;
  1043. u16 tmp16;
  1044. /* Configure RX control register => stop operation */
  1045. tmp16 = AX_RX_CTL_STOP;
  1046. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
  1047. tmp16 = 0;
  1048. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
  1049. /* Power down ethernet PHY */
  1050. tmp16 = 0;
  1051. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
  1052. kfree(ax179_data);
  1053. }
  1054. static void
  1055. ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
  1056. {
  1057. skb->ip_summed = CHECKSUM_NONE;
  1058. /* checksum error bit is set */
  1059. if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
  1060. (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
  1061. return;
  1062. /* It must be a TCP or UDP packet with a valid checksum */
  1063. if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
  1064. ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
  1065. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1066. }
  1067. static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  1068. {
  1069. struct sk_buff *ax_skb;
  1070. int pkt_cnt;
  1071. u32 rx_hdr;
  1072. u16 hdr_off;
  1073. u32 *pkt_hdr;
  1074. /* At the end of the SKB, there's a header telling us how many packets
  1075. * are bundled into this buffer and where we can find an array of
  1076. * per-packet metadata (which contains elements encoded into u16).
  1077. */
  1078. /* SKB contents for current firmware:
  1079. * <packet 1> <padding>
  1080. * ...
  1081. * <packet N> <padding>
  1082. * <per-packet metadata entry 1> <dummy header>
  1083. * ...
  1084. * <per-packet metadata entry N> <dummy header>
  1085. * <padding2> <rx_hdr>
  1086. *
  1087. * where:
  1088. * <packet N> contains pkt_len bytes:
  1089. * 2 bytes of IP alignment pseudo header
  1090. * packet received
  1091. * <per-packet metadata entry N> contains 4 bytes:
  1092. * pkt_len and fields AX_RXHDR_*
  1093. * <padding> 0-7 bytes to terminate at
  1094. * 8 bytes boundary (64-bit).
  1095. * <padding2> 4 bytes to make rx_hdr terminate at
  1096. * 8 bytes boundary (64-bit)
  1097. * <dummy-header> contains 4 bytes:
  1098. * pkt_len=0 and AX_RXHDR_DROP_ERR
  1099. * <rx-hdr> contains 4 bytes:
  1100. * pkt_cnt and hdr_off (offset of
  1101. * <per-packet metadata entry 1>)
  1102. *
  1103. * pkt_cnt is number of entrys in the per-packet metadata.
  1104. * In current firmware there is 2 entrys per packet.
  1105. * The first points to the packet and the
  1106. * second is a dummy header.
  1107. * This was done probably to align fields in 64-bit and
  1108. * maintain compatibility with old firmware.
  1109. * This code assumes that <dummy header> and <padding2> are
  1110. * optional.
  1111. */
  1112. if (skb->len < 4)
  1113. return 0;
  1114. skb_trim(skb, skb->len - 4);
  1115. rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
  1116. pkt_cnt = (u16)rx_hdr;
  1117. hdr_off = (u16)(rx_hdr >> 16);
  1118. if (pkt_cnt == 0)
  1119. return 0;
  1120. /* Make sure that the bounds of the metadata array are inside the SKB
  1121. * (and in front of the counter at the end).
  1122. */
  1123. if (pkt_cnt * 4 + hdr_off > skb->len)
  1124. return 0;
  1125. pkt_hdr = (u32 *)(skb->data + hdr_off);
  1126. /* Packets must not overlap the metadata array */
  1127. skb_trim(skb, hdr_off);
  1128. for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
  1129. u16 pkt_len_plus_padd;
  1130. u16 pkt_len;
  1131. le32_to_cpus(pkt_hdr);
  1132. pkt_len = (*pkt_hdr >> 16) & 0x1fff;
  1133. pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
  1134. /* Skip dummy header used for alignment
  1135. */
  1136. if (pkt_len == 0)
  1137. continue;
  1138. if (pkt_len_plus_padd > skb->len)
  1139. return 0;
  1140. /* Check CRC or runt packet */
  1141. if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
  1142. pkt_len < 2 + ETH_HLEN) {
  1143. dev->net->stats.rx_errors++;
  1144. skb_pull(skb, pkt_len_plus_padd);
  1145. continue;
  1146. }
  1147. /* last packet */
  1148. if (pkt_len_plus_padd == skb->len) {
  1149. skb_trim(skb, pkt_len);
  1150. /* Skip IP alignment pseudo header */
  1151. skb_pull(skb, 2);
  1152. skb->truesize = SKB_TRUESIZE(pkt_len_plus_padd);
  1153. ax88179_rx_checksum(skb, pkt_hdr);
  1154. return 1;
  1155. }
  1156. ax_skb = skb_clone(skb, GFP_ATOMIC);
  1157. if (!ax_skb)
  1158. return 0;
  1159. skb_trim(ax_skb, pkt_len);
  1160. /* Skip IP alignment pseudo header */
  1161. skb_pull(ax_skb, 2);
  1162. skb->truesize = pkt_len_plus_padd +
  1163. SKB_DATA_ALIGN(sizeof(struct sk_buff));
  1164. ax88179_rx_checksum(ax_skb, pkt_hdr);
  1165. usbnet_skb_return(dev, ax_skb);
  1166. skb_pull(skb, pkt_len_plus_padd);
  1167. }
  1168. return 0;
  1169. }
  1170. static struct sk_buff *
  1171. ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
  1172. {
  1173. u32 tx_hdr1, tx_hdr2;
  1174. int frame_size = dev->maxpacket;
  1175. int headroom;
  1176. void *ptr;
  1177. tx_hdr1 = skb->len;
  1178. tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
  1179. if (((skb->len + 8) % frame_size) == 0)
  1180. tx_hdr2 |= 0x80008000; /* Enable padding */
  1181. headroom = skb_headroom(skb) - 8;
  1182. if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
  1183. return NULL;
  1184. if ((skb_header_cloned(skb) || headroom < 0) &&
  1185. pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
  1186. dev_kfree_skb_any(skb);
  1187. return NULL;
  1188. }
  1189. ptr = skb_push(skb, 8);
  1190. put_unaligned_le32(tx_hdr1, ptr);
  1191. put_unaligned_le32(tx_hdr2, ptr + 4);
  1192. usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
  1193. return skb;
  1194. }
  1195. static int ax88179_link_reset(struct usbnet *dev)
  1196. {
  1197. struct ax88179_data *ax179_data = dev->driver_priv;
  1198. u8 tmp[5], link_sts;
  1199. u16 mode, tmp16, delay = HZ / 10;
  1200. u32 tmp32 = 0x40000000;
  1201. unsigned long jtimeout;
  1202. jtimeout = jiffies + delay;
  1203. while (tmp32 & 0x40000000) {
  1204. mode = 0;
  1205. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
  1206. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
  1207. &ax179_data->rxctl);
  1208. /*link up, check the usb device control TX FIFO full or empty*/
  1209. ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
  1210. if (time_after(jiffies, jtimeout))
  1211. return 0;
  1212. }
  1213. mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  1214. AX_MEDIUM_RXFLOW_CTRLEN;
  1215. ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
  1216. 1, 1, &link_sts);
  1217. ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  1218. GMII_PHY_PHYSR, 2, &tmp16);
  1219. if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
  1220. return 0;
  1221. } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
  1222. mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
  1223. if (dev->net->mtu > 1500)
  1224. mode |= AX_MEDIUM_JUMBO_EN;
  1225. if (link_sts & AX_USB_SS)
  1226. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  1227. else if (link_sts & AX_USB_HS)
  1228. memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
  1229. else
  1230. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  1231. } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
  1232. mode |= AX_MEDIUM_PS;
  1233. if (link_sts & (AX_USB_SS | AX_USB_HS))
  1234. memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
  1235. else
  1236. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  1237. } else {
  1238. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  1239. }
  1240. /* RX bulk configuration */
  1241. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  1242. dev->rx_urb_size = (1024 * (tmp[3] + 2));
  1243. if (tmp16 & GMII_PHY_PHYSR_FULL)
  1244. mode |= AX_MEDIUM_FULL_DUPLEX;
  1245. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  1246. 2, 2, &mode);
  1247. ax179_data->eee_enabled = ax88179_chk_eee(dev);
  1248. netif_carrier_on(dev->net);
  1249. return 0;
  1250. }
  1251. static int ax88179_reset(struct usbnet *dev)
  1252. {
  1253. u8 buf[5];
  1254. u16 *tmp16;
  1255. u8 *tmp;
  1256. struct ax88179_data *ax179_data = dev->driver_priv;
  1257. struct ethtool_eee eee_data;
  1258. tmp16 = (u16 *)buf;
  1259. tmp = (u8 *)buf;
  1260. /* Power up ethernet PHY */
  1261. *tmp16 = 0;
  1262. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  1263. *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
  1264. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  1265. msleep(500);
  1266. *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
  1267. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
  1268. msleep(200);
  1269. /* Ethernet PHY Auto Detach*/
  1270. ax88179_auto_detach(dev);
  1271. /* Read MAC address from DTB or asix chip */
  1272. ax88179_get_mac_addr(dev);
  1273. memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
  1274. /* RX bulk configuration */
  1275. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  1276. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  1277. dev->rx_urb_size = 1024 * 20;
  1278. *tmp = 0x34;
  1279. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
  1280. *tmp = 0x52;
  1281. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
  1282. 1, 1, tmp);
  1283. /* Enable checksum offload */
  1284. *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
  1285. AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
  1286. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
  1287. *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
  1288. AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
  1289. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
  1290. /* Configure RX control register => start operation */
  1291. *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
  1292. AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
  1293. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
  1294. *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
  1295. AX_MONITOR_MODE_RWMP;
  1296. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
  1297. /* Configure default medium type => giga */
  1298. *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  1299. AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
  1300. AX_MEDIUM_GIGAMODE;
  1301. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  1302. 2, 2, tmp16);
  1303. /* Check if WoL is supported */
  1304. ax179_data->wol_supported = 0;
  1305. if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
  1306. 1, 1, &tmp) > 0)
  1307. ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
  1308. ax88179_led_setting(dev);
  1309. ax179_data->eee_enabled = 0;
  1310. ax179_data->eee_active = 0;
  1311. ax88179_disable_eee(dev);
  1312. ax88179_ethtool_get_eee(dev, &eee_data);
  1313. eee_data.advertised = 0;
  1314. ax88179_ethtool_set_eee(dev, &eee_data);
  1315. /* Restart autoneg */
  1316. mii_nway_restart(&dev->mii);
  1317. usbnet_link_change(dev, 0, 0);
  1318. return 0;
  1319. }
  1320. static int ax88179_stop(struct usbnet *dev)
  1321. {
  1322. u16 tmp16;
  1323. ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  1324. 2, 2, &tmp16);
  1325. tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
  1326. ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  1327. 2, 2, &tmp16);
  1328. return 0;
  1329. }
  1330. static const struct driver_info ax88179_info = {
  1331. .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
  1332. .bind = ax88179_bind,
  1333. .unbind = ax88179_unbind,
  1334. .status = ax88179_status,
  1335. .link_reset = ax88179_link_reset,
  1336. .reset = ax88179_reset,
  1337. .stop = ax88179_stop,
  1338. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1339. .rx_fixup = ax88179_rx_fixup,
  1340. .tx_fixup = ax88179_tx_fixup,
  1341. };
  1342. static const struct driver_info ax88178a_info = {
  1343. .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
  1344. .bind = ax88179_bind,
  1345. .unbind = ax88179_unbind,
  1346. .status = ax88179_status,
  1347. .link_reset = ax88179_link_reset,
  1348. .reset = ax88179_reset,
  1349. .stop = ax88179_stop,
  1350. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1351. .rx_fixup = ax88179_rx_fixup,
  1352. .tx_fixup = ax88179_tx_fixup,
  1353. };
  1354. static const struct driver_info cypress_GX3_info = {
  1355. .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
  1356. .bind = ax88179_bind,
  1357. .unbind = ax88179_unbind,
  1358. .status = ax88179_status,
  1359. .link_reset = ax88179_link_reset,
  1360. .reset = ax88179_reset,
  1361. .stop = ax88179_stop,
  1362. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1363. .rx_fixup = ax88179_rx_fixup,
  1364. .tx_fixup = ax88179_tx_fixup,
  1365. };
  1366. static const struct driver_info dlink_dub1312_info = {
  1367. .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
  1368. .bind = ax88179_bind,
  1369. .unbind = ax88179_unbind,
  1370. .status = ax88179_status,
  1371. .link_reset = ax88179_link_reset,
  1372. .reset = ax88179_reset,
  1373. .stop = ax88179_stop,
  1374. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1375. .rx_fixup = ax88179_rx_fixup,
  1376. .tx_fixup = ax88179_tx_fixup,
  1377. };
  1378. static const struct driver_info sitecom_info = {
  1379. .description = "Sitecom USB 3.0 to Gigabit Adapter",
  1380. .bind = ax88179_bind,
  1381. .unbind = ax88179_unbind,
  1382. .status = ax88179_status,
  1383. .link_reset = ax88179_link_reset,
  1384. .reset = ax88179_reset,
  1385. .stop = ax88179_stop,
  1386. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1387. .rx_fixup = ax88179_rx_fixup,
  1388. .tx_fixup = ax88179_tx_fixup,
  1389. };
  1390. static const struct driver_info samsung_info = {
  1391. .description = "Samsung USB Ethernet Adapter",
  1392. .bind = ax88179_bind,
  1393. .unbind = ax88179_unbind,
  1394. .status = ax88179_status,
  1395. .link_reset = ax88179_link_reset,
  1396. .reset = ax88179_reset,
  1397. .stop = ax88179_stop,
  1398. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1399. .rx_fixup = ax88179_rx_fixup,
  1400. .tx_fixup = ax88179_tx_fixup,
  1401. };
  1402. static const struct driver_info lenovo_info = {
  1403. .description = "Lenovo OneLinkDock Gigabit LAN",
  1404. .bind = ax88179_bind,
  1405. .unbind = ax88179_unbind,
  1406. .status = ax88179_status,
  1407. .link_reset = ax88179_link_reset,
  1408. .reset = ax88179_reset,
  1409. .stop = ax88179_stop,
  1410. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1411. .rx_fixup = ax88179_rx_fixup,
  1412. .tx_fixup = ax88179_tx_fixup,
  1413. };
  1414. static const struct driver_info belkin_info = {
  1415. .description = "Belkin USB Ethernet Adapter",
  1416. .bind = ax88179_bind,
  1417. .unbind = ax88179_unbind,
  1418. .status = ax88179_status,
  1419. .link_reset = ax88179_link_reset,
  1420. .reset = ax88179_reset,
  1421. .stop = ax88179_stop,
  1422. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1423. .rx_fixup = ax88179_rx_fixup,
  1424. .tx_fixup = ax88179_tx_fixup,
  1425. };
  1426. static const struct driver_info toshiba_info = {
  1427. .description = "Toshiba USB Ethernet Adapter",
  1428. .bind = ax88179_bind,
  1429. .unbind = ax88179_unbind,
  1430. .status = ax88179_status,
  1431. .link_reset = ax88179_link_reset,
  1432. .reset = ax88179_reset,
  1433. .stop = ax88179_stop,
  1434. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1435. .rx_fixup = ax88179_rx_fixup,
  1436. .tx_fixup = ax88179_tx_fixup,
  1437. };
  1438. static const struct driver_info mct_info = {
  1439. .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
  1440. .bind = ax88179_bind,
  1441. .unbind = ax88179_unbind,
  1442. .status = ax88179_status,
  1443. .link_reset = ax88179_link_reset,
  1444. .reset = ax88179_reset,
  1445. .stop = ax88179_stop,
  1446. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1447. .rx_fixup = ax88179_rx_fixup,
  1448. .tx_fixup = ax88179_tx_fixup,
  1449. };
  1450. static const struct driver_info at_umc2000_info = {
  1451. .description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
  1452. .bind = ax88179_bind,
  1453. .unbind = ax88179_unbind,
  1454. .status = ax88179_status,
  1455. .link_reset = ax88179_link_reset,
  1456. .reset = ax88179_reset,
  1457. .stop = ax88179_stop,
  1458. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1459. .rx_fixup = ax88179_rx_fixup,
  1460. .tx_fixup = ax88179_tx_fixup,
  1461. };
  1462. static const struct driver_info at_umc200_info = {
  1463. .description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
  1464. .bind = ax88179_bind,
  1465. .unbind = ax88179_unbind,
  1466. .status = ax88179_status,
  1467. .link_reset = ax88179_link_reset,
  1468. .reset = ax88179_reset,
  1469. .stop = ax88179_stop,
  1470. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1471. .rx_fixup = ax88179_rx_fixup,
  1472. .tx_fixup = ax88179_tx_fixup,
  1473. };
  1474. static const struct driver_info at_umc2000sp_info = {
  1475. .description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
  1476. .bind = ax88179_bind,
  1477. .unbind = ax88179_unbind,
  1478. .status = ax88179_status,
  1479. .link_reset = ax88179_link_reset,
  1480. .reset = ax88179_reset,
  1481. .stop = ax88179_stop,
  1482. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  1483. .rx_fixup = ax88179_rx_fixup,
  1484. .tx_fixup = ax88179_tx_fixup,
  1485. };
  1486. static const struct usb_device_id products[] = {
  1487. {
  1488. /* ASIX AX88179 10/100/1000 */
  1489. USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
  1490. .driver_info = (unsigned long)&ax88179_info,
  1491. }, {
  1492. /* ASIX AX88178A 10/100/1000 */
  1493. USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
  1494. .driver_info = (unsigned long)&ax88178a_info,
  1495. }, {
  1496. /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
  1497. USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
  1498. .driver_info = (unsigned long)&cypress_GX3_info,
  1499. }, {
  1500. /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
  1501. USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
  1502. .driver_info = (unsigned long)&dlink_dub1312_info,
  1503. }, {
  1504. /* Sitecom USB 3.0 to Gigabit Adapter */
  1505. USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
  1506. .driver_info = (unsigned long)&sitecom_info,
  1507. }, {
  1508. /* Samsung USB Ethernet Adapter */
  1509. USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
  1510. .driver_info = (unsigned long)&samsung_info,
  1511. }, {
  1512. /* Lenovo OneLinkDock Gigabit LAN */
  1513. USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
  1514. .driver_info = (unsigned long)&lenovo_info,
  1515. }, {
  1516. /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
  1517. USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
  1518. .driver_info = (unsigned long)&belkin_info,
  1519. }, {
  1520. /* Toshiba USB 3.0 GBit Ethernet Adapter */
  1521. USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
  1522. .driver_info = (unsigned long)&toshiba_info,
  1523. }, {
  1524. /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
  1525. USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
  1526. .driver_info = (unsigned long)&mct_info,
  1527. }, {
  1528. /* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
  1529. USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
  1530. .driver_info = (unsigned long)&at_umc2000_info,
  1531. }, {
  1532. /* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
  1533. USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
  1534. .driver_info = (unsigned long)&at_umc200_info,
  1535. }, {
  1536. /* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
  1537. USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
  1538. .driver_info = (unsigned long)&at_umc2000sp_info,
  1539. },
  1540. { },
  1541. };
  1542. MODULE_DEVICE_TABLE(usb, products);
  1543. static struct usb_driver ax88179_178a_driver = {
  1544. .name = "ax88179_178a",
  1545. .id_table = products,
  1546. .probe = usbnet_probe,
  1547. .suspend = ax88179_suspend,
  1548. .resume = ax88179_resume,
  1549. .reset_resume = ax88179_resume,
  1550. .disconnect = usbnet_disconnect,
  1551. .supports_autosuspend = 1,
  1552. .disable_hub_initiated_lpm = 1,
  1553. };
  1554. module_usb_driver(ax88179_178a_driver);
  1555. MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
  1556. MODULE_LICENSE("GPL");