phylink.c 99 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * phylink models the MAC to optional PHY connection, supporting
  4. * technologies such as SFP cages where the PHY is hot-pluggable.
  5. *
  6. * Copyright (C) 2015 Russell King
  7. */
  8. #include <linux/acpi.h>
  9. #include <linux/ethtool.h>
  10. #include <linux/export.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/netdevice.h>
  13. #include <linux/of.h>
  14. #include <linux/of_mdio.h>
  15. #include <linux/phy.h>
  16. #include <linux/phy_fixed.h>
  17. #include <linux/phylink.h>
  18. #include <linux/rtnetlink.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/timer.h>
  21. #include <linux/workqueue.h>
  22. #include "sfp.h"
  23. #include "swphy.h"
  24. #define SUPPORTED_INTERFACES \
  25. (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  26. SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  27. #define ADVERTISED_INTERFACES \
  28. (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  29. ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  30. enum {
  31. PHYLINK_DISABLE_STOPPED,
  32. PHYLINK_DISABLE_LINK,
  33. PHYLINK_DISABLE_MAC_WOL,
  34. };
  35. /**
  36. * struct phylink - internal data type for phylink
  37. */
  38. struct phylink {
  39. /* private: */
  40. struct net_device *netdev;
  41. const struct phylink_mac_ops *mac_ops;
  42. struct phylink_config *config;
  43. struct phylink_pcs *pcs;
  44. struct device *dev;
  45. unsigned int old_link_state:1;
  46. unsigned long phylink_disable_state; /* bitmask of disables */
  47. struct phy_device *phydev;
  48. phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  49. u8 cfg_link_an_mode; /* MLO_AN_xxx */
  50. u8 cur_link_an_mode;
  51. u8 link_port; /* The current non-phy ethtool port */
  52. __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  53. /* The link configuration settings */
  54. struct phylink_link_state link_config;
  55. /* The current settings */
  56. phy_interface_t cur_interface;
  57. struct gpio_desc *link_gpio;
  58. unsigned int link_irq;
  59. struct timer_list link_poll;
  60. void (*get_fixed_state)(struct net_device *dev,
  61. struct phylink_link_state *s);
  62. struct mutex state_mutex;
  63. struct phylink_link_state phy_state;
  64. struct work_struct resolve;
  65. bool mac_link_dropped;
  66. bool using_mac_select_pcs;
  67. struct sfp_bus *sfp_bus;
  68. bool sfp_may_have_phy;
  69. DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  70. __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  71. u8 sfp_port;
  72. };
  73. #define phylink_printk(level, pl, fmt, ...) \
  74. do { \
  75. if ((pl)->config->type == PHYLINK_NETDEV) \
  76. netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  77. else if ((pl)->config->type == PHYLINK_DEV) \
  78. dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  79. } while (0)
  80. #define phylink_err(pl, fmt, ...) \
  81. phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
  82. #define phylink_warn(pl, fmt, ...) \
  83. phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
  84. #define phylink_info(pl, fmt, ...) \
  85. phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
  86. #if defined(CONFIG_DYNAMIC_DEBUG)
  87. #define phylink_dbg(pl, fmt, ...) \
  88. do { \
  89. if ((pl)->config->type == PHYLINK_NETDEV) \
  90. netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
  91. else if ((pl)->config->type == PHYLINK_DEV) \
  92. dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
  93. } while (0)
  94. #elif defined(DEBUG)
  95. #define phylink_dbg(pl, fmt, ...) \
  96. phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
  97. #else
  98. #define phylink_dbg(pl, fmt, ...) \
  99. ({ \
  100. if (0) \
  101. phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
  102. })
  103. #endif
  104. /**
  105. * phylink_set_port_modes() - set the port type modes in the ethtool mask
  106. * @mask: ethtool link mode mask
  107. *
  108. * Sets all the port type modes in the ethtool mask. MAC drivers should
  109. * use this in their 'validate' callback.
  110. */
  111. void phylink_set_port_modes(unsigned long *mask)
  112. {
  113. phylink_set(mask, TP);
  114. phylink_set(mask, AUI);
  115. phylink_set(mask, MII);
  116. phylink_set(mask, FIBRE);
  117. phylink_set(mask, BNC);
  118. phylink_set(mask, Backplane);
  119. }
  120. EXPORT_SYMBOL_GPL(phylink_set_port_modes);
  121. static int phylink_is_empty_linkmode(const unsigned long *linkmode)
  122. {
  123. __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
  124. phylink_set_port_modes(tmp);
  125. phylink_set(tmp, Autoneg);
  126. phylink_set(tmp, Pause);
  127. phylink_set(tmp, Asym_Pause);
  128. return linkmode_subset(linkmode, tmp);
  129. }
  130. static const char *phylink_an_mode_str(unsigned int mode)
  131. {
  132. static const char *modestr[] = {
  133. [MLO_AN_PHY] = "phy",
  134. [MLO_AN_FIXED] = "fixed",
  135. [MLO_AN_INBAND] = "inband",
  136. };
  137. return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
  138. }
  139. /**
  140. * phylink_interface_max_speed() - get the maximum speed of a phy interface
  141. * @interface: phy interface mode defined by &typedef phy_interface_t
  142. *
  143. * Determine the maximum speed of a phy interface. This is intended to help
  144. * determine the correct speed to pass to the MAC when the phy is performing
  145. * rate matching.
  146. *
  147. * Return: The maximum speed of @interface
  148. */
  149. static int phylink_interface_max_speed(phy_interface_t interface)
  150. {
  151. switch (interface) {
  152. case PHY_INTERFACE_MODE_100BASEX:
  153. case PHY_INTERFACE_MODE_REVRMII:
  154. case PHY_INTERFACE_MODE_RMII:
  155. case PHY_INTERFACE_MODE_SMII:
  156. case PHY_INTERFACE_MODE_REVMII:
  157. case PHY_INTERFACE_MODE_MII:
  158. return SPEED_100;
  159. case PHY_INTERFACE_MODE_TBI:
  160. case PHY_INTERFACE_MODE_MOCA:
  161. case PHY_INTERFACE_MODE_RTBI:
  162. case PHY_INTERFACE_MODE_1000BASEX:
  163. case PHY_INTERFACE_MODE_1000BASEKX:
  164. case PHY_INTERFACE_MODE_TRGMII:
  165. case PHY_INTERFACE_MODE_RGMII_TXID:
  166. case PHY_INTERFACE_MODE_RGMII_RXID:
  167. case PHY_INTERFACE_MODE_RGMII_ID:
  168. case PHY_INTERFACE_MODE_RGMII:
  169. case PHY_INTERFACE_MODE_QSGMII:
  170. case PHY_INTERFACE_MODE_QUSGMII:
  171. case PHY_INTERFACE_MODE_SGMII:
  172. case PHY_INTERFACE_MODE_GMII:
  173. return SPEED_1000;
  174. case PHY_INTERFACE_MODE_2500BASEX:
  175. return SPEED_2500;
  176. case PHY_INTERFACE_MODE_5GBASER:
  177. return SPEED_5000;
  178. case PHY_INTERFACE_MODE_XGMII:
  179. case PHY_INTERFACE_MODE_RXAUI:
  180. case PHY_INTERFACE_MODE_XAUI:
  181. case PHY_INTERFACE_MODE_10GBASER:
  182. case PHY_INTERFACE_MODE_10GKR:
  183. case PHY_INTERFACE_MODE_USXGMII:
  184. return SPEED_10000;
  185. case PHY_INTERFACE_MODE_25GBASER:
  186. return SPEED_25000;
  187. case PHY_INTERFACE_MODE_XLGMII:
  188. return SPEED_40000;
  189. case PHY_INTERFACE_MODE_INTERNAL:
  190. case PHY_INTERFACE_MODE_NA:
  191. case PHY_INTERFACE_MODE_MAX:
  192. /* No idea! Garbage in, unknown out */
  193. return SPEED_UNKNOWN;
  194. }
  195. /* If we get here, someone forgot to add an interface mode above */
  196. WARN_ON_ONCE(1);
  197. return SPEED_UNKNOWN;
  198. }
  199. /**
  200. * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
  201. * @linkmodes: ethtool linkmode mask (must be already initialised)
  202. * @caps: bitmask of MAC capabilities
  203. *
  204. * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
  205. * supported by the @caps. @linkmodes must have been initialised previously.
  206. */
  207. void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
  208. {
  209. if (caps & MAC_SYM_PAUSE)
  210. __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
  211. if (caps & MAC_ASYM_PAUSE)
  212. __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
  213. if (caps & MAC_10HD)
  214. __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
  215. if (caps & MAC_10FD) {
  216. __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
  217. __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
  218. }
  219. if (caps & MAC_100HD) {
  220. __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
  221. __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
  222. }
  223. if (caps & MAC_100FD) {
  224. __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
  225. __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
  226. __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
  227. }
  228. if (caps & MAC_1000HD)
  229. __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
  230. if (caps & MAC_1000FD) {
  231. __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
  232. __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
  233. __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
  234. __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
  235. }
  236. if (caps & MAC_2500FD) {
  237. __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
  238. __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
  239. }
  240. if (caps & MAC_5000FD)
  241. __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
  242. if (caps & MAC_10000FD) {
  243. __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
  244. __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
  245. __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
  246. __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
  247. __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
  248. __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
  249. __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
  250. __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
  251. __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
  252. }
  253. if (caps & MAC_25000FD) {
  254. __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
  255. __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
  256. __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
  257. }
  258. if (caps & MAC_40000FD) {
  259. __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
  260. __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
  261. __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
  262. __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
  263. }
  264. if (caps & MAC_50000FD) {
  265. __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
  266. __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
  267. __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
  268. __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
  269. __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
  270. __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
  271. __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
  272. linkmodes);
  273. __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
  274. }
  275. if (caps & MAC_56000FD) {
  276. __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
  277. __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
  278. __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
  279. __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
  280. }
  281. if (caps & MAC_100000FD) {
  282. __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
  283. __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
  284. __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
  285. __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
  286. linkmodes);
  287. __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
  288. __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
  289. __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
  290. __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
  291. linkmodes);
  292. __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
  293. __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
  294. __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
  295. __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
  296. linkmodes);
  297. __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
  298. __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
  299. }
  300. if (caps & MAC_200000FD) {
  301. __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
  302. __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
  303. __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
  304. linkmodes);
  305. __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
  306. __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
  307. __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
  308. __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
  309. __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
  310. linkmodes);
  311. __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
  312. __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
  313. }
  314. if (caps & MAC_400000FD) {
  315. __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
  316. __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
  317. __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
  318. linkmodes);
  319. __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
  320. __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
  321. __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
  322. __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
  323. __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
  324. linkmodes);
  325. __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
  326. __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
  327. }
  328. }
  329. EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
  330. static struct {
  331. unsigned long mask;
  332. int speed;
  333. unsigned int duplex;
  334. } phylink_caps_params[] = {
  335. { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
  336. { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
  337. { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
  338. { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
  339. { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
  340. { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
  341. { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
  342. { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
  343. { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
  344. { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
  345. { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
  346. { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
  347. { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
  348. { MAC_100FD, SPEED_100, DUPLEX_FULL },
  349. { MAC_100HD, SPEED_100, DUPLEX_HALF },
  350. { MAC_10FD, SPEED_10, DUPLEX_FULL },
  351. { MAC_10HD, SPEED_10, DUPLEX_HALF },
  352. };
  353. /**
  354. * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
  355. * @speed: the speed to search for
  356. * @duplex: the duplex to search for
  357. *
  358. * Find the mac capability for a given speed and duplex.
  359. *
  360. * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
  361. * there were no matches.
  362. */
  363. static unsigned long phylink_cap_from_speed_duplex(int speed,
  364. unsigned int duplex)
  365. {
  366. int i;
  367. for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
  368. if (speed == phylink_caps_params[i].speed &&
  369. duplex == phylink_caps_params[i].duplex)
  370. return phylink_caps_params[i].mask;
  371. }
  372. return 0;
  373. }
  374. /**
  375. * phylink_get_capabilities() - get capabilities for a given MAC
  376. * @interface: phy interface mode defined by &typedef phy_interface_t
  377. * @mac_capabilities: bitmask of MAC capabilities
  378. * @rate_matching: type of rate matching being performed
  379. *
  380. * Get the MAC capabilities that are supported by the @interface mode and
  381. * @mac_capabilities.
  382. */
  383. unsigned long phylink_get_capabilities(phy_interface_t interface,
  384. unsigned long mac_capabilities,
  385. int rate_matching)
  386. {
  387. int max_speed = phylink_interface_max_speed(interface);
  388. unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
  389. unsigned long matched_caps = 0;
  390. switch (interface) {
  391. case PHY_INTERFACE_MODE_USXGMII:
  392. caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
  393. fallthrough;
  394. case PHY_INTERFACE_MODE_RGMII_TXID:
  395. case PHY_INTERFACE_MODE_RGMII_RXID:
  396. case PHY_INTERFACE_MODE_RGMII_ID:
  397. case PHY_INTERFACE_MODE_RGMII:
  398. case PHY_INTERFACE_MODE_QSGMII:
  399. case PHY_INTERFACE_MODE_QUSGMII:
  400. case PHY_INTERFACE_MODE_SGMII:
  401. case PHY_INTERFACE_MODE_GMII:
  402. caps |= MAC_1000HD | MAC_1000FD;
  403. fallthrough;
  404. case PHY_INTERFACE_MODE_REVRMII:
  405. case PHY_INTERFACE_MODE_RMII:
  406. case PHY_INTERFACE_MODE_SMII:
  407. case PHY_INTERFACE_MODE_REVMII:
  408. case PHY_INTERFACE_MODE_MII:
  409. caps |= MAC_10HD | MAC_10FD;
  410. fallthrough;
  411. case PHY_INTERFACE_MODE_100BASEX:
  412. caps |= MAC_100HD | MAC_100FD;
  413. break;
  414. case PHY_INTERFACE_MODE_TBI:
  415. case PHY_INTERFACE_MODE_MOCA:
  416. case PHY_INTERFACE_MODE_RTBI:
  417. case PHY_INTERFACE_MODE_1000BASEX:
  418. caps |= MAC_1000HD;
  419. fallthrough;
  420. case PHY_INTERFACE_MODE_1000BASEKX:
  421. case PHY_INTERFACE_MODE_TRGMII:
  422. caps |= MAC_1000FD;
  423. break;
  424. case PHY_INTERFACE_MODE_2500BASEX:
  425. caps |= MAC_2500FD;
  426. break;
  427. case PHY_INTERFACE_MODE_5GBASER:
  428. caps |= MAC_5000FD;
  429. break;
  430. case PHY_INTERFACE_MODE_XGMII:
  431. case PHY_INTERFACE_MODE_RXAUI:
  432. case PHY_INTERFACE_MODE_XAUI:
  433. case PHY_INTERFACE_MODE_10GBASER:
  434. case PHY_INTERFACE_MODE_10GKR:
  435. caps |= MAC_10000FD;
  436. break;
  437. case PHY_INTERFACE_MODE_25GBASER:
  438. caps |= MAC_25000FD;
  439. break;
  440. case PHY_INTERFACE_MODE_XLGMII:
  441. caps |= MAC_40000FD;
  442. break;
  443. case PHY_INTERFACE_MODE_INTERNAL:
  444. caps |= ~0;
  445. break;
  446. case PHY_INTERFACE_MODE_NA:
  447. case PHY_INTERFACE_MODE_MAX:
  448. break;
  449. }
  450. switch (rate_matching) {
  451. case RATE_MATCH_OPEN_LOOP:
  452. /* TODO */
  453. fallthrough;
  454. case RATE_MATCH_NONE:
  455. matched_caps = 0;
  456. break;
  457. case RATE_MATCH_PAUSE: {
  458. /* The MAC must support asymmetric pause towards the local
  459. * device for this. We could allow just symmetric pause, but
  460. * then we might have to renegotiate if the link partner
  461. * doesn't support pause. This is because there's no way to
  462. * accept pause frames without transmitting them if we only
  463. * support symmetric pause.
  464. */
  465. if (!(mac_capabilities & MAC_SYM_PAUSE) ||
  466. !(mac_capabilities & MAC_ASYM_PAUSE))
  467. break;
  468. /* We can't adapt if the MAC doesn't support the interface's
  469. * max speed at full duplex.
  470. */
  471. if (mac_capabilities &
  472. phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
  473. /* Although a duplex-matching phy might exist, we
  474. * conservatively remove these modes because the MAC
  475. * will not be aware of the half-duplex nature of the
  476. * link.
  477. */
  478. matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
  479. matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
  480. }
  481. break;
  482. }
  483. case RATE_MATCH_CRS:
  484. /* The MAC must support half duplex at the interface's max
  485. * speed.
  486. */
  487. if (mac_capabilities &
  488. phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
  489. matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
  490. matched_caps &= mac_capabilities;
  491. }
  492. break;
  493. }
  494. return (caps & mac_capabilities) | matched_caps;
  495. }
  496. EXPORT_SYMBOL_GPL(phylink_get_capabilities);
  497. /**
  498. * phylink_generic_validate() - generic validate() callback implementation
  499. * @config: a pointer to a &struct phylink_config.
  500. * @supported: ethtool bitmask for supported link modes.
  501. * @state: a pointer to a &struct phylink_link_state.
  502. *
  503. * Generic implementation of the validate() callback that MAC drivers can
  504. * use when they pass the range of supported interfaces and MAC capabilities.
  505. * This makes use of phylink_get_linkmodes().
  506. */
  507. void phylink_generic_validate(struct phylink_config *config,
  508. unsigned long *supported,
  509. struct phylink_link_state *state)
  510. {
  511. __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  512. unsigned long caps;
  513. phylink_set_port_modes(mask);
  514. phylink_set(mask, Autoneg);
  515. caps = phylink_get_capabilities(state->interface,
  516. config->mac_capabilities,
  517. state->rate_matching);
  518. phylink_caps_to_linkmodes(mask, caps);
  519. linkmode_and(supported, supported, mask);
  520. linkmode_and(state->advertising, state->advertising, mask);
  521. }
  522. EXPORT_SYMBOL_GPL(phylink_generic_validate);
  523. static int phylink_validate_mac_and_pcs(struct phylink *pl,
  524. unsigned long *supported,
  525. struct phylink_link_state *state)
  526. {
  527. struct phylink_pcs *pcs;
  528. int ret;
  529. /* Get the PCS for this interface mode */
  530. if (pl->using_mac_select_pcs) {
  531. pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
  532. if (IS_ERR(pcs))
  533. return PTR_ERR(pcs);
  534. } else {
  535. pcs = pl->pcs;
  536. }
  537. if (pcs) {
  538. /* The PCS, if present, must be setup before phylink_create()
  539. * has been called. If the ops is not initialised, print an
  540. * error and backtrace rather than oopsing the kernel.
  541. */
  542. if (!pcs->ops) {
  543. phylink_err(pl, "interface %s: uninitialised PCS\n",
  544. phy_modes(state->interface));
  545. dump_stack();
  546. return -EINVAL;
  547. }
  548. /* Validate the link parameters with the PCS */
  549. if (pcs->ops->pcs_validate) {
  550. ret = pcs->ops->pcs_validate(pcs, supported, state);
  551. if (ret < 0 || phylink_is_empty_linkmode(supported))
  552. return -EINVAL;
  553. /* Ensure the advertising mask is a subset of the
  554. * supported mask.
  555. */
  556. linkmode_and(state->advertising, state->advertising,
  557. supported);
  558. }
  559. }
  560. /* Then validate the link parameters with the MAC */
  561. pl->mac_ops->validate(pl->config, supported, state);
  562. return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
  563. }
  564. static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
  565. struct phylink_link_state *state,
  566. const unsigned long *interfaces)
  567. {
  568. __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
  569. __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
  570. __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
  571. struct phylink_link_state t;
  572. int intf;
  573. for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
  574. if (test_bit(intf, interfaces)) {
  575. linkmode_copy(s, supported);
  576. t = *state;
  577. t.interface = intf;
  578. if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
  579. linkmode_or(all_s, all_s, s);
  580. linkmode_or(all_adv, all_adv, t.advertising);
  581. }
  582. }
  583. }
  584. linkmode_copy(supported, all_s);
  585. linkmode_copy(state->advertising, all_adv);
  586. return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
  587. }
  588. static int phylink_validate(struct phylink *pl, unsigned long *supported,
  589. struct phylink_link_state *state)
  590. {
  591. const unsigned long *interfaces = pl->config->supported_interfaces;
  592. if (!phy_interface_empty(interfaces)) {
  593. if (state->interface == PHY_INTERFACE_MODE_NA)
  594. return phylink_validate_mask(pl, supported, state,
  595. interfaces);
  596. if (!test_bit(state->interface, interfaces))
  597. return -EINVAL;
  598. }
  599. return phylink_validate_mac_and_pcs(pl, supported, state);
  600. }
  601. static int phylink_parse_fixedlink(struct phylink *pl,
  602. struct fwnode_handle *fwnode)
  603. {
  604. struct fwnode_handle *fixed_node;
  605. const struct phy_setting *s;
  606. struct gpio_desc *desc;
  607. u32 speed;
  608. int ret;
  609. fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
  610. if (fixed_node) {
  611. ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
  612. pl->link_config.speed = speed;
  613. pl->link_config.duplex = DUPLEX_HALF;
  614. if (fwnode_property_read_bool(fixed_node, "full-duplex"))
  615. pl->link_config.duplex = DUPLEX_FULL;
  616. /* We treat the "pause" and "asym-pause" terminology as
  617. * defining the link partner's ability.
  618. */
  619. if (fwnode_property_read_bool(fixed_node, "pause"))
  620. __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  621. pl->link_config.lp_advertising);
  622. if (fwnode_property_read_bool(fixed_node, "asym-pause"))
  623. __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  624. pl->link_config.lp_advertising);
  625. if (ret == 0) {
  626. desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
  627. GPIOD_IN, "?");
  628. if (!IS_ERR(desc))
  629. pl->link_gpio = desc;
  630. else if (desc == ERR_PTR(-EPROBE_DEFER))
  631. ret = -EPROBE_DEFER;
  632. }
  633. fwnode_handle_put(fixed_node);
  634. if (ret)
  635. return ret;
  636. } else {
  637. u32 prop[5];
  638. ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
  639. NULL, 0);
  640. if (ret != ARRAY_SIZE(prop)) {
  641. phylink_err(pl, "broken fixed-link?\n");
  642. return -EINVAL;
  643. }
  644. ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
  645. prop, ARRAY_SIZE(prop));
  646. if (!ret) {
  647. pl->link_config.duplex = prop[1] ?
  648. DUPLEX_FULL : DUPLEX_HALF;
  649. pl->link_config.speed = prop[2];
  650. if (prop[3])
  651. __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  652. pl->link_config.lp_advertising);
  653. if (prop[4])
  654. __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  655. pl->link_config.lp_advertising);
  656. }
  657. }
  658. if (pl->link_config.speed > SPEED_1000 &&
  659. pl->link_config.duplex != DUPLEX_FULL)
  660. phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
  661. pl->link_config.speed);
  662. bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
  663. linkmode_copy(pl->link_config.advertising, pl->supported);
  664. phylink_validate(pl, pl->supported, &pl->link_config);
  665. s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
  666. pl->supported, true);
  667. linkmode_zero(pl->supported);
  668. phylink_set(pl->supported, MII);
  669. phylink_set(pl->supported, Pause);
  670. phylink_set(pl->supported, Asym_Pause);
  671. phylink_set(pl->supported, Autoneg);
  672. if (s) {
  673. __set_bit(s->bit, pl->supported);
  674. __set_bit(s->bit, pl->link_config.lp_advertising);
  675. } else {
  676. phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
  677. pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
  678. pl->link_config.speed);
  679. }
  680. linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
  681. pl->supported);
  682. pl->link_config.link = 1;
  683. pl->link_config.an_complete = 1;
  684. return 0;
  685. }
  686. static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
  687. {
  688. struct fwnode_handle *dn;
  689. const char *managed;
  690. dn = fwnode_get_named_child_node(fwnode, "fixed-link");
  691. if (dn || fwnode_property_present(fwnode, "fixed-link"))
  692. pl->cfg_link_an_mode = MLO_AN_FIXED;
  693. fwnode_handle_put(dn);
  694. if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
  695. strcmp(managed, "in-band-status") == 0) ||
  696. pl->config->ovr_an_inband) {
  697. if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
  698. phylink_err(pl,
  699. "can't use both fixed-link and in-band-status\n");
  700. return -EINVAL;
  701. }
  702. linkmode_zero(pl->supported);
  703. phylink_set(pl->supported, MII);
  704. phylink_set(pl->supported, Autoneg);
  705. phylink_set(pl->supported, Asym_Pause);
  706. phylink_set(pl->supported, Pause);
  707. pl->link_config.an_enabled = true;
  708. pl->cfg_link_an_mode = MLO_AN_INBAND;
  709. switch (pl->link_config.interface) {
  710. case PHY_INTERFACE_MODE_SGMII:
  711. case PHY_INTERFACE_MODE_QSGMII:
  712. case PHY_INTERFACE_MODE_QUSGMII:
  713. case PHY_INTERFACE_MODE_RGMII:
  714. case PHY_INTERFACE_MODE_RGMII_ID:
  715. case PHY_INTERFACE_MODE_RGMII_RXID:
  716. case PHY_INTERFACE_MODE_RGMII_TXID:
  717. case PHY_INTERFACE_MODE_RTBI:
  718. phylink_set(pl->supported, 10baseT_Half);
  719. phylink_set(pl->supported, 10baseT_Full);
  720. phylink_set(pl->supported, 100baseT_Half);
  721. phylink_set(pl->supported, 100baseT_Full);
  722. phylink_set(pl->supported, 1000baseT_Half);
  723. phylink_set(pl->supported, 1000baseT_Full);
  724. break;
  725. case PHY_INTERFACE_MODE_1000BASEX:
  726. phylink_set(pl->supported, 1000baseX_Full);
  727. break;
  728. case PHY_INTERFACE_MODE_2500BASEX:
  729. phylink_set(pl->supported, 2500baseX_Full);
  730. break;
  731. case PHY_INTERFACE_MODE_5GBASER:
  732. phylink_set(pl->supported, 5000baseT_Full);
  733. break;
  734. case PHY_INTERFACE_MODE_25GBASER:
  735. phylink_set(pl->supported, 25000baseCR_Full);
  736. phylink_set(pl->supported, 25000baseKR_Full);
  737. phylink_set(pl->supported, 25000baseSR_Full);
  738. fallthrough;
  739. case PHY_INTERFACE_MODE_USXGMII:
  740. case PHY_INTERFACE_MODE_10GKR:
  741. case PHY_INTERFACE_MODE_10GBASER:
  742. phylink_set(pl->supported, 10baseT_Half);
  743. phylink_set(pl->supported, 10baseT_Full);
  744. phylink_set(pl->supported, 100baseT_Half);
  745. phylink_set(pl->supported, 100baseT_Full);
  746. phylink_set(pl->supported, 1000baseT_Half);
  747. phylink_set(pl->supported, 1000baseT_Full);
  748. phylink_set(pl->supported, 1000baseX_Full);
  749. phylink_set(pl->supported, 1000baseKX_Full);
  750. phylink_set(pl->supported, 2500baseT_Full);
  751. phylink_set(pl->supported, 2500baseX_Full);
  752. phylink_set(pl->supported, 5000baseT_Full);
  753. phylink_set(pl->supported, 10000baseT_Full);
  754. phylink_set(pl->supported, 10000baseKR_Full);
  755. phylink_set(pl->supported, 10000baseKX4_Full);
  756. phylink_set(pl->supported, 10000baseCR_Full);
  757. phylink_set(pl->supported, 10000baseSR_Full);
  758. phylink_set(pl->supported, 10000baseLR_Full);
  759. phylink_set(pl->supported, 10000baseLRM_Full);
  760. phylink_set(pl->supported, 10000baseER_Full);
  761. break;
  762. case PHY_INTERFACE_MODE_XLGMII:
  763. phylink_set(pl->supported, 25000baseCR_Full);
  764. phylink_set(pl->supported, 25000baseKR_Full);
  765. phylink_set(pl->supported, 25000baseSR_Full);
  766. phylink_set(pl->supported, 40000baseKR4_Full);
  767. phylink_set(pl->supported, 40000baseCR4_Full);
  768. phylink_set(pl->supported, 40000baseSR4_Full);
  769. phylink_set(pl->supported, 40000baseLR4_Full);
  770. phylink_set(pl->supported, 50000baseCR2_Full);
  771. phylink_set(pl->supported, 50000baseKR2_Full);
  772. phylink_set(pl->supported, 50000baseSR2_Full);
  773. phylink_set(pl->supported, 50000baseKR_Full);
  774. phylink_set(pl->supported, 50000baseSR_Full);
  775. phylink_set(pl->supported, 50000baseCR_Full);
  776. phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
  777. phylink_set(pl->supported, 50000baseDR_Full);
  778. phylink_set(pl->supported, 100000baseKR4_Full);
  779. phylink_set(pl->supported, 100000baseSR4_Full);
  780. phylink_set(pl->supported, 100000baseCR4_Full);
  781. phylink_set(pl->supported, 100000baseLR4_ER4_Full);
  782. phylink_set(pl->supported, 100000baseKR2_Full);
  783. phylink_set(pl->supported, 100000baseSR2_Full);
  784. phylink_set(pl->supported, 100000baseCR2_Full);
  785. phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
  786. phylink_set(pl->supported, 100000baseDR2_Full);
  787. break;
  788. default:
  789. phylink_err(pl,
  790. "incorrect link mode %s for in-band status\n",
  791. phy_modes(pl->link_config.interface));
  792. return -EINVAL;
  793. }
  794. linkmode_copy(pl->link_config.advertising, pl->supported);
  795. if (phylink_validate(pl, pl->supported, &pl->link_config)) {
  796. phylink_err(pl,
  797. "failed to validate link configuration for in-band status\n");
  798. return -EINVAL;
  799. }
  800. /* Check if MAC/PCS also supports Autoneg. */
  801. pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
  802. }
  803. return 0;
  804. }
  805. static void phylink_apply_manual_flow(struct phylink *pl,
  806. struct phylink_link_state *state)
  807. {
  808. /* If autoneg is disabled, pause AN is also disabled */
  809. if (!state->an_enabled)
  810. state->pause &= ~MLO_PAUSE_AN;
  811. /* Manual configuration of pause modes */
  812. if (!(pl->link_config.pause & MLO_PAUSE_AN))
  813. state->pause = pl->link_config.pause;
  814. }
  815. static void phylink_resolve_flow(struct phylink_link_state *state)
  816. {
  817. bool tx_pause, rx_pause;
  818. state->pause = MLO_PAUSE_NONE;
  819. if (state->duplex == DUPLEX_FULL) {
  820. linkmode_resolve_pause(state->advertising,
  821. state->lp_advertising,
  822. &tx_pause, &rx_pause);
  823. if (tx_pause)
  824. state->pause |= MLO_PAUSE_TX;
  825. if (rx_pause)
  826. state->pause |= MLO_PAUSE_RX;
  827. }
  828. }
  829. static void phylink_pcs_poll_stop(struct phylink *pl)
  830. {
  831. if (pl->cfg_link_an_mode == MLO_AN_INBAND)
  832. del_timer(&pl->link_poll);
  833. }
  834. static void phylink_pcs_poll_start(struct phylink *pl)
  835. {
  836. if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
  837. mod_timer(&pl->link_poll, jiffies + HZ);
  838. }
  839. static void phylink_mac_config(struct phylink *pl,
  840. const struct phylink_link_state *state)
  841. {
  842. phylink_dbg(pl,
  843. "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
  844. __func__, phylink_an_mode_str(pl->cur_link_an_mode),
  845. phy_modes(state->interface),
  846. phy_speed_to_str(state->speed),
  847. phy_duplex_to_str(state->duplex),
  848. phy_rate_matching_to_str(state->rate_matching),
  849. __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
  850. state->pause, state->link, state->an_enabled);
  851. pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
  852. }
  853. static void phylink_mac_pcs_an_restart(struct phylink *pl)
  854. {
  855. if (pl->link_config.an_enabled &&
  856. phy_interface_mode_is_8023z(pl->link_config.interface) &&
  857. phylink_autoneg_inband(pl->cur_link_an_mode)) {
  858. if (pl->pcs)
  859. pl->pcs->ops->pcs_an_restart(pl->pcs);
  860. else if (pl->config->legacy_pre_march2020)
  861. pl->mac_ops->mac_an_restart(pl->config);
  862. }
  863. }
  864. static void phylink_major_config(struct phylink *pl, bool restart,
  865. const struct phylink_link_state *state)
  866. {
  867. struct phylink_pcs *pcs = NULL;
  868. bool pcs_changed = false;
  869. int err;
  870. phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
  871. if (pl->using_mac_select_pcs) {
  872. pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
  873. if (IS_ERR(pcs)) {
  874. phylink_err(pl,
  875. "mac_select_pcs unexpectedly failed: %pe\n",
  876. pcs);
  877. return;
  878. }
  879. pcs_changed = pcs && pl->pcs != pcs;
  880. }
  881. phylink_pcs_poll_stop(pl);
  882. if (pl->mac_ops->mac_prepare) {
  883. err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
  884. state->interface);
  885. if (err < 0) {
  886. phylink_err(pl, "mac_prepare failed: %pe\n",
  887. ERR_PTR(err));
  888. return;
  889. }
  890. }
  891. /* If we have a new PCS, switch to the new PCS after preparing the MAC
  892. * for the change.
  893. */
  894. if (pcs_changed)
  895. pl->pcs = pcs;
  896. phylink_mac_config(pl, state);
  897. if (pl->pcs) {
  898. err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
  899. state->interface,
  900. state->advertising,
  901. !!(pl->link_config.pause &
  902. MLO_PAUSE_AN));
  903. if (err < 0)
  904. phylink_err(pl, "pcs_config failed: %pe\n",
  905. ERR_PTR(err));
  906. if (err > 0)
  907. restart = true;
  908. }
  909. if (restart)
  910. phylink_mac_pcs_an_restart(pl);
  911. if (pl->mac_ops->mac_finish) {
  912. err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
  913. state->interface);
  914. if (err < 0)
  915. phylink_err(pl, "mac_finish failed: %pe\n",
  916. ERR_PTR(err));
  917. }
  918. phylink_pcs_poll_start(pl);
  919. }
  920. /*
  921. * Reconfigure for a change of inband advertisement.
  922. * If we have a separate PCS, we only need to call its pcs_config() method,
  923. * and then restart AN if it indicates something changed. Otherwise, we do
  924. * the full MAC reconfiguration.
  925. */
  926. static int phylink_change_inband_advert(struct phylink *pl)
  927. {
  928. int ret;
  929. if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
  930. return 0;
  931. if (!pl->pcs && pl->config->legacy_pre_march2020) {
  932. /* Legacy method */
  933. phylink_mac_config(pl, &pl->link_config);
  934. phylink_mac_pcs_an_restart(pl);
  935. return 0;
  936. }
  937. phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
  938. phylink_an_mode_str(pl->cur_link_an_mode),
  939. phy_modes(pl->link_config.interface),
  940. __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
  941. pl->link_config.pause);
  942. /* Modern PCS-based method; update the advert at the PCS, and
  943. * restart negotiation if the pcs_config() helper indicates that
  944. * the programmed advertisement has changed.
  945. */
  946. ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
  947. pl->link_config.interface,
  948. pl->link_config.advertising,
  949. !!(pl->link_config.pause &
  950. MLO_PAUSE_AN));
  951. if (ret < 0)
  952. return ret;
  953. if (ret > 0)
  954. phylink_mac_pcs_an_restart(pl);
  955. return 0;
  956. }
  957. static void phylink_mac_pcs_get_state(struct phylink *pl,
  958. struct phylink_link_state *state)
  959. {
  960. linkmode_copy(state->advertising, pl->link_config.advertising);
  961. linkmode_zero(state->lp_advertising);
  962. state->interface = pl->link_config.interface;
  963. state->an_enabled = pl->link_config.an_enabled;
  964. state->rate_matching = pl->link_config.rate_matching;
  965. if (state->an_enabled) {
  966. state->speed = SPEED_UNKNOWN;
  967. state->duplex = DUPLEX_UNKNOWN;
  968. state->pause = MLO_PAUSE_NONE;
  969. } else {
  970. state->speed = pl->link_config.speed;
  971. state->duplex = pl->link_config.duplex;
  972. state->pause = pl->link_config.pause;
  973. }
  974. state->an_complete = 0;
  975. state->link = 1;
  976. if (pl->pcs)
  977. pl->pcs->ops->pcs_get_state(pl->pcs, state);
  978. else if (pl->mac_ops->mac_pcs_get_state &&
  979. pl->config->legacy_pre_march2020)
  980. pl->mac_ops->mac_pcs_get_state(pl->config, state);
  981. else
  982. state->link = 0;
  983. }
  984. /* The fixed state is... fixed except for the link state,
  985. * which may be determined by a GPIO or a callback.
  986. */
  987. static void phylink_get_fixed_state(struct phylink *pl,
  988. struct phylink_link_state *state)
  989. {
  990. *state = pl->link_config;
  991. if (pl->config->get_fixed_state)
  992. pl->config->get_fixed_state(pl->config, state);
  993. else if (pl->link_gpio)
  994. state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
  995. phylink_resolve_flow(state);
  996. }
  997. static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
  998. {
  999. struct phylink_link_state link_state;
  1000. switch (pl->cur_link_an_mode) {
  1001. case MLO_AN_PHY:
  1002. link_state = pl->phy_state;
  1003. break;
  1004. case MLO_AN_FIXED:
  1005. phylink_get_fixed_state(pl, &link_state);
  1006. break;
  1007. case MLO_AN_INBAND:
  1008. link_state = pl->link_config;
  1009. if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
  1010. link_state.pause = MLO_PAUSE_NONE;
  1011. break;
  1012. default: /* can't happen */
  1013. return;
  1014. }
  1015. link_state.link = false;
  1016. phylink_apply_manual_flow(pl, &link_state);
  1017. phylink_major_config(pl, force_restart, &link_state);
  1018. }
  1019. static const char *phylink_pause_to_str(int pause)
  1020. {
  1021. switch (pause & MLO_PAUSE_TXRX_MASK) {
  1022. case MLO_PAUSE_TX | MLO_PAUSE_RX:
  1023. return "rx/tx";
  1024. case MLO_PAUSE_TX:
  1025. return "tx";
  1026. case MLO_PAUSE_RX:
  1027. return "rx";
  1028. default:
  1029. return "off";
  1030. }
  1031. }
  1032. static void phylink_link_up(struct phylink *pl,
  1033. struct phylink_link_state link_state)
  1034. {
  1035. struct net_device *ndev = pl->netdev;
  1036. int speed, duplex;
  1037. bool rx_pause;
  1038. speed = link_state.speed;
  1039. duplex = link_state.duplex;
  1040. rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
  1041. switch (link_state.rate_matching) {
  1042. case RATE_MATCH_PAUSE:
  1043. /* The PHY is doing rate matchion from the media rate (in
  1044. * the link_state) to the interface speed, and will send
  1045. * pause frames to the MAC to limit its transmission speed.
  1046. */
  1047. speed = phylink_interface_max_speed(link_state.interface);
  1048. duplex = DUPLEX_FULL;
  1049. rx_pause = true;
  1050. break;
  1051. case RATE_MATCH_CRS:
  1052. /* The PHY is doing rate matchion from the media rate (in
  1053. * the link_state) to the interface speed, and will cause
  1054. * collisions to the MAC to limit its transmission speed.
  1055. */
  1056. speed = phylink_interface_max_speed(link_state.interface);
  1057. duplex = DUPLEX_HALF;
  1058. break;
  1059. }
  1060. pl->cur_interface = link_state.interface;
  1061. if (pl->pcs && pl->pcs->ops->pcs_link_up)
  1062. pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
  1063. pl->cur_interface, speed, duplex);
  1064. pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
  1065. pl->cur_interface, speed, duplex,
  1066. !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
  1067. if (ndev)
  1068. netif_carrier_on(ndev);
  1069. phylink_info(pl,
  1070. "Link is Up - %s/%s - flow control %s\n",
  1071. phy_speed_to_str(link_state.speed),
  1072. phy_duplex_to_str(link_state.duplex),
  1073. phylink_pause_to_str(link_state.pause));
  1074. }
  1075. static void phylink_link_down(struct phylink *pl)
  1076. {
  1077. struct net_device *ndev = pl->netdev;
  1078. if (ndev)
  1079. netif_carrier_off(ndev);
  1080. pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
  1081. pl->cur_interface);
  1082. phylink_info(pl, "Link is Down\n");
  1083. }
  1084. static void phylink_resolve(struct work_struct *w)
  1085. {
  1086. struct phylink *pl = container_of(w, struct phylink, resolve);
  1087. struct phylink_link_state link_state;
  1088. struct net_device *ndev = pl->netdev;
  1089. bool mac_config = false;
  1090. bool retrigger = false;
  1091. bool cur_link_state;
  1092. mutex_lock(&pl->state_mutex);
  1093. if (pl->netdev)
  1094. cur_link_state = netif_carrier_ok(ndev);
  1095. else
  1096. cur_link_state = pl->old_link_state;
  1097. if (pl->phylink_disable_state) {
  1098. pl->mac_link_dropped = false;
  1099. link_state.link = false;
  1100. } else if (pl->mac_link_dropped) {
  1101. link_state.link = false;
  1102. retrigger = true;
  1103. } else {
  1104. switch (pl->cur_link_an_mode) {
  1105. case MLO_AN_PHY:
  1106. link_state = pl->phy_state;
  1107. phylink_apply_manual_flow(pl, &link_state);
  1108. mac_config = link_state.link;
  1109. break;
  1110. case MLO_AN_FIXED:
  1111. phylink_get_fixed_state(pl, &link_state);
  1112. mac_config = link_state.link;
  1113. break;
  1114. case MLO_AN_INBAND:
  1115. phylink_mac_pcs_get_state(pl, &link_state);
  1116. /* The PCS may have a latching link-fail indicator.
  1117. * If the link was up, bring the link down and
  1118. * re-trigger the resolve. Otherwise, re-read the
  1119. * PCS state to get the current status of the link.
  1120. */
  1121. if (!link_state.link) {
  1122. if (cur_link_state)
  1123. retrigger = true;
  1124. else
  1125. phylink_mac_pcs_get_state(pl,
  1126. &link_state);
  1127. }
  1128. /* If we have a phy, the "up" state is the union of
  1129. * both the PHY and the MAC
  1130. */
  1131. if (pl->phydev)
  1132. link_state.link &= pl->phy_state.link;
  1133. /* Only update if the PHY link is up */
  1134. if (pl->phydev && pl->phy_state.link) {
  1135. /* If the interface has changed, force a
  1136. * link down event if the link isn't already
  1137. * down, and re-resolve.
  1138. */
  1139. if (link_state.interface !=
  1140. pl->phy_state.interface) {
  1141. retrigger = true;
  1142. link_state.link = false;
  1143. }
  1144. link_state.interface = pl->phy_state.interface;
  1145. /* If we are doing rate matching, then the
  1146. * link speed/duplex comes from the PHY
  1147. */
  1148. if (pl->phy_state.rate_matching) {
  1149. link_state.rate_matching =
  1150. pl->phy_state.rate_matching;
  1151. link_state.speed = pl->phy_state.speed;
  1152. link_state.duplex =
  1153. pl->phy_state.duplex;
  1154. }
  1155. /* If we have a PHY, we need to update with
  1156. * the PHY flow control bits.
  1157. */
  1158. link_state.pause = pl->phy_state.pause;
  1159. mac_config = true;
  1160. }
  1161. phylink_apply_manual_flow(pl, &link_state);
  1162. break;
  1163. }
  1164. }
  1165. if (mac_config) {
  1166. if (link_state.interface != pl->link_config.interface) {
  1167. /* The interface has changed, force the link down and
  1168. * then reconfigure.
  1169. */
  1170. if (cur_link_state) {
  1171. phylink_link_down(pl);
  1172. cur_link_state = false;
  1173. }
  1174. phylink_major_config(pl, false, &link_state);
  1175. pl->link_config.interface = link_state.interface;
  1176. } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
  1177. /* The interface remains unchanged, only the speed,
  1178. * duplex or pause settings have changed. Call the
  1179. * old mac_config() method to configure the MAC/PCS
  1180. * only if we do not have a legacy MAC driver.
  1181. */
  1182. phylink_mac_config(pl, &link_state);
  1183. }
  1184. }
  1185. if (link_state.link != cur_link_state) {
  1186. pl->old_link_state = link_state.link;
  1187. if (!link_state.link)
  1188. phylink_link_down(pl);
  1189. else
  1190. phylink_link_up(pl, link_state);
  1191. }
  1192. if (!link_state.link && retrigger) {
  1193. pl->mac_link_dropped = false;
  1194. queue_work(system_power_efficient_wq, &pl->resolve);
  1195. }
  1196. mutex_unlock(&pl->state_mutex);
  1197. }
  1198. static void phylink_run_resolve(struct phylink *pl)
  1199. {
  1200. if (!pl->phylink_disable_state)
  1201. queue_work(system_power_efficient_wq, &pl->resolve);
  1202. }
  1203. static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
  1204. {
  1205. unsigned long state = pl->phylink_disable_state;
  1206. set_bit(bit, &pl->phylink_disable_state);
  1207. if (state == 0) {
  1208. queue_work(system_power_efficient_wq, &pl->resolve);
  1209. flush_work(&pl->resolve);
  1210. }
  1211. }
  1212. static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
  1213. {
  1214. clear_bit(bit, &pl->phylink_disable_state);
  1215. phylink_run_resolve(pl);
  1216. }
  1217. static void phylink_fixed_poll(struct timer_list *t)
  1218. {
  1219. struct phylink *pl = container_of(t, struct phylink, link_poll);
  1220. mod_timer(t, jiffies + HZ);
  1221. phylink_run_resolve(pl);
  1222. }
  1223. static const struct sfp_upstream_ops sfp_phylink_ops;
  1224. static int phylink_register_sfp(struct phylink *pl,
  1225. struct fwnode_handle *fwnode)
  1226. {
  1227. struct sfp_bus *bus;
  1228. int ret;
  1229. if (!fwnode)
  1230. return 0;
  1231. bus = sfp_bus_find_fwnode(fwnode);
  1232. if (IS_ERR(bus)) {
  1233. phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
  1234. return PTR_ERR(bus);
  1235. }
  1236. pl->sfp_bus = bus;
  1237. ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
  1238. sfp_bus_put(bus);
  1239. return ret;
  1240. }
  1241. /**
  1242. * phylink_create() - create a phylink instance
  1243. * @config: a pointer to the target &struct phylink_config
  1244. * @fwnode: a pointer to a &struct fwnode_handle describing the network
  1245. * interface
  1246. * @iface: the desired link mode defined by &typedef phy_interface_t
  1247. * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
  1248. *
  1249. * Create a new phylink instance, and parse the link parameters found in @np.
  1250. * This will parse in-band modes, fixed-link or SFP configuration.
  1251. *
  1252. * Note: the rtnl lock must not be held when calling this function.
  1253. *
  1254. * Returns a pointer to a &struct phylink, or an error-pointer value. Users
  1255. * must use IS_ERR() to check for errors from this function.
  1256. */
  1257. struct phylink *phylink_create(struct phylink_config *config,
  1258. struct fwnode_handle *fwnode,
  1259. phy_interface_t iface,
  1260. const struct phylink_mac_ops *mac_ops)
  1261. {
  1262. bool using_mac_select_pcs = false;
  1263. struct phylink *pl;
  1264. int ret;
  1265. if (mac_ops->mac_select_pcs &&
  1266. mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
  1267. ERR_PTR(-EOPNOTSUPP))
  1268. using_mac_select_pcs = true;
  1269. /* Validate the supplied configuration */
  1270. if (using_mac_select_pcs &&
  1271. phy_interface_empty(config->supported_interfaces)) {
  1272. dev_err(config->dev,
  1273. "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
  1274. return ERR_PTR(-EINVAL);
  1275. }
  1276. pl = kzalloc(sizeof(*pl), GFP_KERNEL);
  1277. if (!pl)
  1278. return ERR_PTR(-ENOMEM);
  1279. mutex_init(&pl->state_mutex);
  1280. INIT_WORK(&pl->resolve, phylink_resolve);
  1281. pl->config = config;
  1282. if (config->type == PHYLINK_NETDEV) {
  1283. pl->netdev = to_net_dev(config->dev);
  1284. netif_carrier_off(pl->netdev);
  1285. } else if (config->type == PHYLINK_DEV) {
  1286. pl->dev = config->dev;
  1287. } else {
  1288. kfree(pl);
  1289. return ERR_PTR(-EINVAL);
  1290. }
  1291. pl->using_mac_select_pcs = using_mac_select_pcs;
  1292. pl->phy_state.interface = iface;
  1293. pl->link_interface = iface;
  1294. if (iface == PHY_INTERFACE_MODE_MOCA)
  1295. pl->link_port = PORT_BNC;
  1296. else
  1297. pl->link_port = PORT_MII;
  1298. pl->link_config.interface = iface;
  1299. pl->link_config.pause = MLO_PAUSE_AN;
  1300. pl->link_config.speed = SPEED_UNKNOWN;
  1301. pl->link_config.duplex = DUPLEX_UNKNOWN;
  1302. pl->link_config.an_enabled = true;
  1303. pl->mac_ops = mac_ops;
  1304. __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
  1305. timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
  1306. bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
  1307. linkmode_copy(pl->link_config.advertising, pl->supported);
  1308. phylink_validate(pl, pl->supported, &pl->link_config);
  1309. ret = phylink_parse_mode(pl, fwnode);
  1310. if (ret < 0) {
  1311. kfree(pl);
  1312. return ERR_PTR(ret);
  1313. }
  1314. if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
  1315. ret = phylink_parse_fixedlink(pl, fwnode);
  1316. if (ret < 0) {
  1317. kfree(pl);
  1318. return ERR_PTR(ret);
  1319. }
  1320. }
  1321. pl->cur_link_an_mode = pl->cfg_link_an_mode;
  1322. ret = phylink_register_sfp(pl, fwnode);
  1323. if (ret < 0) {
  1324. kfree(pl);
  1325. return ERR_PTR(ret);
  1326. }
  1327. return pl;
  1328. }
  1329. EXPORT_SYMBOL_GPL(phylink_create);
  1330. /**
  1331. * phylink_destroy() - cleanup and destroy the phylink instance
  1332. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1333. *
  1334. * Destroy a phylink instance. Any PHY that has been attached must have been
  1335. * cleaned up via phylink_disconnect_phy() prior to calling this function.
  1336. *
  1337. * Note: the rtnl lock must not be held when calling this function.
  1338. */
  1339. void phylink_destroy(struct phylink *pl)
  1340. {
  1341. sfp_bus_del_upstream(pl->sfp_bus);
  1342. if (pl->link_gpio)
  1343. gpiod_put(pl->link_gpio);
  1344. cancel_work_sync(&pl->resolve);
  1345. kfree(pl);
  1346. }
  1347. EXPORT_SYMBOL_GPL(phylink_destroy);
  1348. /**
  1349. * phylink_expects_phy() - Determine if phylink expects a phy to be attached
  1350. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1351. *
  1352. * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
  1353. * no PHY is needed.
  1354. *
  1355. * Returns true if phylink will be expecting a PHY.
  1356. */
  1357. bool phylink_expects_phy(struct phylink *pl)
  1358. {
  1359. if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
  1360. (pl->cfg_link_an_mode == MLO_AN_INBAND &&
  1361. phy_interface_mode_is_8023z(pl->link_config.interface)))
  1362. return false;
  1363. return true;
  1364. }
  1365. EXPORT_SYMBOL_GPL(phylink_expects_phy);
  1366. static void phylink_phy_change(struct phy_device *phydev, bool up)
  1367. {
  1368. struct phylink *pl = phydev->phylink;
  1369. bool tx_pause, rx_pause;
  1370. phy_get_pause(phydev, &tx_pause, &rx_pause);
  1371. mutex_lock(&pl->state_mutex);
  1372. pl->phy_state.speed = phydev->speed;
  1373. pl->phy_state.duplex = phydev->duplex;
  1374. pl->phy_state.rate_matching = phydev->rate_matching;
  1375. pl->phy_state.pause = MLO_PAUSE_NONE;
  1376. if (tx_pause)
  1377. pl->phy_state.pause |= MLO_PAUSE_TX;
  1378. if (rx_pause)
  1379. pl->phy_state.pause |= MLO_PAUSE_RX;
  1380. pl->phy_state.interface = phydev->interface;
  1381. pl->phy_state.link = up;
  1382. mutex_unlock(&pl->state_mutex);
  1383. phylink_run_resolve(pl);
  1384. phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
  1385. phy_modes(phydev->interface),
  1386. phy_speed_to_str(phydev->speed),
  1387. phy_duplex_to_str(phydev->duplex),
  1388. phy_rate_matching_to_str(phydev->rate_matching),
  1389. phylink_pause_to_str(pl->phy_state.pause));
  1390. }
  1391. static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
  1392. phy_interface_t interface)
  1393. {
  1394. struct phylink_link_state config;
  1395. __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  1396. char *irq_str;
  1397. int ret;
  1398. /*
  1399. * This is the new way of dealing with flow control for PHYs,
  1400. * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
  1401. * phy drivers should not set SUPPORTED_[Asym_]Pause") except
  1402. * using our validate call to the MAC, we rely upon the MAC
  1403. * clearing the bits from both supported and advertising fields.
  1404. */
  1405. phy_support_asym_pause(phy);
  1406. memset(&config, 0, sizeof(config));
  1407. linkmode_copy(supported, phy->supported);
  1408. linkmode_copy(config.advertising, phy->advertising);
  1409. /* Check whether we would use rate matching for the proposed interface
  1410. * mode.
  1411. */
  1412. config.rate_matching = phy_get_rate_matching(phy, interface);
  1413. /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
  1414. * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
  1415. * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
  1416. * their Serdes is either unnecessary or not reasonable.
  1417. *
  1418. * For these which switch interface modes, we really need to know which
  1419. * interface modes the PHY supports to properly work out which ethtool
  1420. * linkmodes can be supported. For now, as a work-around, we validate
  1421. * against all interface modes, which may lead to more ethtool link
  1422. * modes being advertised than are actually supported.
  1423. */
  1424. if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
  1425. interface != PHY_INTERFACE_MODE_RXAUI &&
  1426. interface != PHY_INTERFACE_MODE_XAUI &&
  1427. interface != PHY_INTERFACE_MODE_USXGMII)
  1428. config.interface = PHY_INTERFACE_MODE_NA;
  1429. else
  1430. config.interface = interface;
  1431. ret = phylink_validate(pl, supported, &config);
  1432. if (ret) {
  1433. phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
  1434. phy_modes(config.interface),
  1435. __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
  1436. __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
  1437. ERR_PTR(ret));
  1438. return ret;
  1439. }
  1440. phy->phylink = pl;
  1441. phy->phy_link_change = phylink_phy_change;
  1442. irq_str = phy_attached_info_irq(phy);
  1443. phylink_info(pl,
  1444. "PHY [%s] driver [%s] (irq=%s)\n",
  1445. dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
  1446. kfree(irq_str);
  1447. mutex_lock(&phy->lock);
  1448. mutex_lock(&pl->state_mutex);
  1449. pl->phydev = phy;
  1450. pl->phy_state.interface = interface;
  1451. pl->phy_state.pause = MLO_PAUSE_NONE;
  1452. pl->phy_state.speed = SPEED_UNKNOWN;
  1453. pl->phy_state.duplex = DUPLEX_UNKNOWN;
  1454. pl->phy_state.rate_matching = RATE_MATCH_NONE;
  1455. linkmode_copy(pl->supported, supported);
  1456. linkmode_copy(pl->link_config.advertising, config.advertising);
  1457. /* Restrict the phy advertisement according to the MAC support. */
  1458. linkmode_copy(phy->advertising, config.advertising);
  1459. mutex_unlock(&pl->state_mutex);
  1460. mutex_unlock(&phy->lock);
  1461. phylink_dbg(pl,
  1462. "phy: %s setting supported %*pb advertising %*pb\n",
  1463. phy_modes(interface),
  1464. __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
  1465. __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
  1466. if (phy_interrupt_is_valid(phy))
  1467. phy_request_interrupt(phy);
  1468. if (pl->config->mac_managed_pm)
  1469. phy->mac_managed_pm = true;
  1470. return 0;
  1471. }
  1472. static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
  1473. phy_interface_t interface)
  1474. {
  1475. if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
  1476. (pl->cfg_link_an_mode == MLO_AN_INBAND &&
  1477. phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
  1478. return -EINVAL;
  1479. if (pl->phydev)
  1480. return -EBUSY;
  1481. return phy_attach_direct(pl->netdev, phy, 0, interface);
  1482. }
  1483. /**
  1484. * phylink_connect_phy() - connect a PHY to the phylink instance
  1485. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1486. * @phy: a pointer to a &struct phy_device.
  1487. *
  1488. * Connect @phy to the phylink instance specified by @pl by calling
  1489. * phy_attach_direct(). Configure the @phy according to the MAC driver's
  1490. * capabilities, start the PHYLIB state machine and enable any interrupts
  1491. * that the PHY supports.
  1492. *
  1493. * This updates the phylink's ethtool supported and advertising link mode
  1494. * masks.
  1495. *
  1496. * Returns 0 on success or a negative errno.
  1497. */
  1498. int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
  1499. {
  1500. int ret;
  1501. /* Use PHY device/driver interface */
  1502. if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
  1503. pl->link_interface = phy->interface;
  1504. pl->link_config.interface = pl->link_interface;
  1505. }
  1506. ret = phylink_attach_phy(pl, phy, pl->link_interface);
  1507. if (ret < 0)
  1508. return ret;
  1509. ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
  1510. if (ret)
  1511. phy_detach(phy);
  1512. return ret;
  1513. }
  1514. EXPORT_SYMBOL_GPL(phylink_connect_phy);
  1515. /**
  1516. * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
  1517. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1518. * @dn: a pointer to a &struct device_node.
  1519. * @flags: PHY-specific flags to communicate to the PHY device driver
  1520. *
  1521. * Connect the phy specified in the device node @dn to the phylink instance
  1522. * specified by @pl. Actions specified in phylink_connect_phy() will be
  1523. * performed.
  1524. *
  1525. * Returns 0 on success or a negative errno.
  1526. */
  1527. int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
  1528. u32 flags)
  1529. {
  1530. return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
  1531. }
  1532. EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
  1533. /**
  1534. * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
  1535. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1536. * @fwnode: a pointer to a &struct fwnode_handle.
  1537. * @flags: PHY-specific flags to communicate to the PHY device driver
  1538. *
  1539. * Connect the phy specified @fwnode to the phylink instance specified
  1540. * by @pl.
  1541. *
  1542. * Returns 0 on success or a negative errno.
  1543. */
  1544. int phylink_fwnode_phy_connect(struct phylink *pl,
  1545. struct fwnode_handle *fwnode,
  1546. u32 flags)
  1547. {
  1548. struct fwnode_handle *phy_fwnode;
  1549. struct phy_device *phy_dev;
  1550. int ret;
  1551. /* Fixed links and 802.3z are handled without needing a PHY */
  1552. if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
  1553. (pl->cfg_link_an_mode == MLO_AN_INBAND &&
  1554. phy_interface_mode_is_8023z(pl->link_interface)))
  1555. return 0;
  1556. phy_fwnode = fwnode_get_phy_node(fwnode);
  1557. if (IS_ERR(phy_fwnode)) {
  1558. if (pl->cfg_link_an_mode == MLO_AN_PHY)
  1559. return -ENODEV;
  1560. return 0;
  1561. }
  1562. phy_dev = fwnode_phy_find_device(phy_fwnode);
  1563. /* We're done with the phy_node handle */
  1564. fwnode_handle_put(phy_fwnode);
  1565. if (!phy_dev)
  1566. return -ENODEV;
  1567. /* Use PHY device/driver interface */
  1568. if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
  1569. pl->link_interface = phy_dev->interface;
  1570. pl->link_config.interface = pl->link_interface;
  1571. }
  1572. ret = phy_attach_direct(pl->netdev, phy_dev, flags,
  1573. pl->link_interface);
  1574. phy_device_free(phy_dev);
  1575. if (ret)
  1576. return ret;
  1577. ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
  1578. if (ret)
  1579. phy_detach(phy_dev);
  1580. return ret;
  1581. }
  1582. EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
  1583. /**
  1584. * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
  1585. * instance.
  1586. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1587. *
  1588. * Disconnect any current PHY from the phylink instance described by @pl.
  1589. */
  1590. void phylink_disconnect_phy(struct phylink *pl)
  1591. {
  1592. struct phy_device *phy;
  1593. ASSERT_RTNL();
  1594. phy = pl->phydev;
  1595. if (phy) {
  1596. mutex_lock(&phy->lock);
  1597. mutex_lock(&pl->state_mutex);
  1598. pl->phydev = NULL;
  1599. mutex_unlock(&pl->state_mutex);
  1600. mutex_unlock(&phy->lock);
  1601. flush_work(&pl->resolve);
  1602. phy_disconnect(phy);
  1603. }
  1604. }
  1605. EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
  1606. /**
  1607. * phylink_mac_change() - notify phylink of a change in MAC state
  1608. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1609. * @up: indicates whether the link is currently up.
  1610. *
  1611. * The MAC driver should call this driver when the state of its link
  1612. * changes (eg, link failure, new negotiation results, etc.)
  1613. */
  1614. void phylink_mac_change(struct phylink *pl, bool up)
  1615. {
  1616. if (!up)
  1617. pl->mac_link_dropped = true;
  1618. phylink_run_resolve(pl);
  1619. phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
  1620. }
  1621. EXPORT_SYMBOL_GPL(phylink_mac_change);
  1622. static irqreturn_t phylink_link_handler(int irq, void *data)
  1623. {
  1624. struct phylink *pl = data;
  1625. phylink_run_resolve(pl);
  1626. return IRQ_HANDLED;
  1627. }
  1628. /**
  1629. * phylink_start() - start a phylink instance
  1630. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1631. *
  1632. * Start the phylink instance specified by @pl, configuring the MAC for the
  1633. * desired link mode(s) and negotiation style. This should be called from the
  1634. * network device driver's &struct net_device_ops ndo_open() method.
  1635. */
  1636. void phylink_start(struct phylink *pl)
  1637. {
  1638. bool poll = false;
  1639. ASSERT_RTNL();
  1640. phylink_info(pl, "configuring for %s/%s link mode\n",
  1641. phylink_an_mode_str(pl->cur_link_an_mode),
  1642. phy_modes(pl->link_config.interface));
  1643. /* Always set the carrier off */
  1644. if (pl->netdev)
  1645. netif_carrier_off(pl->netdev);
  1646. /* Apply the link configuration to the MAC when starting. This allows
  1647. * a fixed-link to start with the correct parameters, and also
  1648. * ensures that we set the appropriate advertisement for Serdes links.
  1649. *
  1650. * Restart autonegotiation if using 802.3z to ensure that the link
  1651. * parameters are properly negotiated. This is necessary for DSA
  1652. * switches using 802.3z negotiation to ensure they see our modes.
  1653. */
  1654. phylink_mac_initial_config(pl, true);
  1655. phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
  1656. if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
  1657. int irq = gpiod_to_irq(pl->link_gpio);
  1658. if (irq > 0) {
  1659. if (!request_irq(irq, phylink_link_handler,
  1660. IRQF_TRIGGER_RISING |
  1661. IRQF_TRIGGER_FALLING,
  1662. "netdev link", pl))
  1663. pl->link_irq = irq;
  1664. else
  1665. irq = 0;
  1666. }
  1667. if (irq <= 0)
  1668. poll = true;
  1669. }
  1670. switch (pl->cfg_link_an_mode) {
  1671. case MLO_AN_FIXED:
  1672. poll |= pl->config->poll_fixed_state;
  1673. break;
  1674. case MLO_AN_INBAND:
  1675. if (pl->pcs)
  1676. poll |= pl->pcs->poll;
  1677. break;
  1678. }
  1679. if (poll)
  1680. mod_timer(&pl->link_poll, jiffies + HZ);
  1681. if (pl->phydev)
  1682. phy_start(pl->phydev);
  1683. if (pl->sfp_bus)
  1684. sfp_upstream_start(pl->sfp_bus);
  1685. }
  1686. EXPORT_SYMBOL_GPL(phylink_start);
  1687. /**
  1688. * phylink_stop() - stop a phylink instance
  1689. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1690. *
  1691. * Stop the phylink instance specified by @pl. This should be called from the
  1692. * network device driver's &struct net_device_ops ndo_stop() method. The
  1693. * network device's carrier state should not be changed prior to calling this
  1694. * function.
  1695. *
  1696. * This will synchronously bring down the link if the link is not already
  1697. * down (in other words, it will trigger a mac_link_down() method call.)
  1698. */
  1699. void phylink_stop(struct phylink *pl)
  1700. {
  1701. ASSERT_RTNL();
  1702. if (pl->sfp_bus)
  1703. sfp_upstream_stop(pl->sfp_bus);
  1704. if (pl->phydev)
  1705. phy_stop(pl->phydev);
  1706. del_timer_sync(&pl->link_poll);
  1707. if (pl->link_irq) {
  1708. free_irq(pl->link_irq, pl);
  1709. pl->link_irq = 0;
  1710. }
  1711. phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
  1712. }
  1713. EXPORT_SYMBOL_GPL(phylink_stop);
  1714. /**
  1715. * phylink_suspend() - handle a network device suspend event
  1716. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1717. * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
  1718. *
  1719. * Handle a network device suspend event. There are several cases:
  1720. *
  1721. * - If Wake-on-Lan is not active, we can bring down the link between
  1722. * the MAC and PHY by calling phylink_stop().
  1723. * - If Wake-on-Lan is active, and being handled only by the PHY, we
  1724. * can also bring down the link between the MAC and PHY.
  1725. * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
  1726. * still needs to receive packets, so we can not bring the link down.
  1727. */
  1728. void phylink_suspend(struct phylink *pl, bool mac_wol)
  1729. {
  1730. ASSERT_RTNL();
  1731. if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
  1732. /* Wake-on-Lan enabled, MAC handling */
  1733. mutex_lock(&pl->state_mutex);
  1734. /* Stop the resolver bringing the link up */
  1735. __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
  1736. /* Disable the carrier, to prevent transmit timeouts,
  1737. * but one would hope all packets have been sent. This
  1738. * also means phylink_resolve() will do nothing.
  1739. */
  1740. if (pl->netdev)
  1741. netif_carrier_off(pl->netdev);
  1742. else
  1743. pl->old_link_state = false;
  1744. /* We do not call mac_link_down() here as we want the
  1745. * link to remain up to receive the WoL packets.
  1746. */
  1747. mutex_unlock(&pl->state_mutex);
  1748. } else {
  1749. phylink_stop(pl);
  1750. }
  1751. }
  1752. EXPORT_SYMBOL_GPL(phylink_suspend);
  1753. /**
  1754. * phylink_resume() - handle a network device resume event
  1755. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1756. *
  1757. * Undo the effects of phylink_suspend(), returning the link to an
  1758. * operational state.
  1759. */
  1760. void phylink_resume(struct phylink *pl)
  1761. {
  1762. ASSERT_RTNL();
  1763. if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
  1764. /* Wake-on-Lan enabled, MAC handling */
  1765. /* Call mac_link_down() so we keep the overall state balanced.
  1766. * Do this under the state_mutex lock for consistency. This
  1767. * will cause a "Link Down" message to be printed during
  1768. * resume, which is harmless - the true link state will be
  1769. * printed when we run a resolve.
  1770. */
  1771. mutex_lock(&pl->state_mutex);
  1772. phylink_link_down(pl);
  1773. mutex_unlock(&pl->state_mutex);
  1774. /* Re-apply the link parameters so that all the settings get
  1775. * restored to the MAC.
  1776. */
  1777. phylink_mac_initial_config(pl, true);
  1778. /* Re-enable and re-resolve the link parameters */
  1779. phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
  1780. } else {
  1781. phylink_start(pl);
  1782. }
  1783. }
  1784. EXPORT_SYMBOL_GPL(phylink_resume);
  1785. /**
  1786. * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
  1787. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1788. * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
  1789. *
  1790. * Read the wake on lan parameters from the PHY attached to the phylink
  1791. * instance specified by @pl. If no PHY is currently attached, report no
  1792. * support for wake on lan.
  1793. */
  1794. void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
  1795. {
  1796. ASSERT_RTNL();
  1797. wol->supported = 0;
  1798. wol->wolopts = 0;
  1799. if (pl->phydev)
  1800. phy_ethtool_get_wol(pl->phydev, wol);
  1801. }
  1802. EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
  1803. /**
  1804. * phylink_ethtool_set_wol() - set wake on lan parameters
  1805. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1806. * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
  1807. *
  1808. * Set the wake on lan parameters for the PHY attached to the phylink
  1809. * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
  1810. * error.
  1811. *
  1812. * Returns zero on success or negative errno code.
  1813. */
  1814. int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
  1815. {
  1816. int ret = -EOPNOTSUPP;
  1817. ASSERT_RTNL();
  1818. if (pl->phydev)
  1819. ret = phy_ethtool_set_wol(pl->phydev, wol);
  1820. return ret;
  1821. }
  1822. EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
  1823. static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
  1824. {
  1825. __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
  1826. linkmode_zero(mask);
  1827. phylink_set_port_modes(mask);
  1828. linkmode_and(dst, dst, mask);
  1829. linkmode_or(dst, dst, b);
  1830. }
  1831. static void phylink_get_ksettings(const struct phylink_link_state *state,
  1832. struct ethtool_link_ksettings *kset)
  1833. {
  1834. phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
  1835. linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
  1836. if (kset->base.rate_matching == RATE_MATCH_NONE) {
  1837. kset->base.speed = state->speed;
  1838. kset->base.duplex = state->duplex;
  1839. }
  1840. kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
  1841. AUTONEG_DISABLE;
  1842. }
  1843. /**
  1844. * phylink_ethtool_ksettings_get() - get the current link settings
  1845. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1846. * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
  1847. *
  1848. * Read the current link settings for the phylink instance specified by @pl.
  1849. * This will be the link settings read from the MAC, PHY or fixed link
  1850. * settings depending on the current negotiation mode.
  1851. */
  1852. int phylink_ethtool_ksettings_get(struct phylink *pl,
  1853. struct ethtool_link_ksettings *kset)
  1854. {
  1855. struct phylink_link_state link_state;
  1856. ASSERT_RTNL();
  1857. if (pl->phydev)
  1858. phy_ethtool_ksettings_get(pl->phydev, kset);
  1859. else
  1860. kset->base.port = pl->link_port;
  1861. linkmode_copy(kset->link_modes.supported, pl->supported);
  1862. switch (pl->cur_link_an_mode) {
  1863. case MLO_AN_FIXED:
  1864. /* We are using fixed settings. Report these as the
  1865. * current link settings - and note that these also
  1866. * represent the supported speeds/duplex/pause modes.
  1867. */
  1868. phylink_get_fixed_state(pl, &link_state);
  1869. phylink_get_ksettings(&link_state, kset);
  1870. break;
  1871. case MLO_AN_INBAND:
  1872. /* If there is a phy attached, then use the reported
  1873. * settings from the phy with no modification.
  1874. */
  1875. if (pl->phydev)
  1876. break;
  1877. phylink_mac_pcs_get_state(pl, &link_state);
  1878. /* The MAC is reporting the link results from its own PCS
  1879. * layer via in-band status. Report these as the current
  1880. * link settings.
  1881. */
  1882. phylink_get_ksettings(&link_state, kset);
  1883. break;
  1884. }
  1885. return 0;
  1886. }
  1887. EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
  1888. /**
  1889. * phylink_ethtool_ksettings_set() - set the link settings
  1890. * @pl: a pointer to a &struct phylink returned from phylink_create()
  1891. * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
  1892. */
  1893. int phylink_ethtool_ksettings_set(struct phylink *pl,
  1894. const struct ethtool_link_ksettings *kset)
  1895. {
  1896. __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
  1897. struct phylink_link_state config;
  1898. const struct phy_setting *s;
  1899. ASSERT_RTNL();
  1900. if (pl->phydev) {
  1901. /* We can rely on phylib for this update; we also do not need
  1902. * to update the pl->link_config settings:
  1903. * - the configuration returned via ksettings_get() will come
  1904. * from phylib whenever a PHY is present.
  1905. * - link_config.interface will be updated by the PHY calling
  1906. * back via phylink_phy_change() and a subsequent resolve.
  1907. * - initial link configuration for PHY mode comes from the
  1908. * last phy state updated via phylink_phy_change().
  1909. * - other configuration changes (e.g. pause modes) are
  1910. * performed directly via phylib.
  1911. * - if in in-band mode with a PHY, the link configuration
  1912. * is passed on the link from the PHY, and all of
  1913. * link_config.{speed,duplex,an_enabled,pause} are not used.
  1914. * - the only possible use would be link_config.advertising
  1915. * pause modes when in 1000base-X mode with a PHY, but in
  1916. * the presence of a PHY, this should not be changed as that
  1917. * should be determined from the media side advertisement.
  1918. */
  1919. return phy_ethtool_ksettings_set(pl->phydev, kset);
  1920. }
  1921. config = pl->link_config;
  1922. /* Mask out unsupported advertisements */
  1923. linkmode_and(config.advertising, kset->link_modes.advertising,
  1924. pl->supported);
  1925. /* FIXME: should we reject autoneg if phy/mac does not support it? */
  1926. switch (kset->base.autoneg) {
  1927. case AUTONEG_DISABLE:
  1928. /* Autonegotiation disabled, select a suitable speed and
  1929. * duplex.
  1930. */
  1931. s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
  1932. pl->supported, false);
  1933. if (!s)
  1934. return -EINVAL;
  1935. /* If we have a fixed link, refuse to change link parameters.
  1936. * If the link parameters match, accept them but do nothing.
  1937. */
  1938. if (pl->cur_link_an_mode == MLO_AN_FIXED) {
  1939. if (s->speed != pl->link_config.speed ||
  1940. s->duplex != pl->link_config.duplex)
  1941. return -EINVAL;
  1942. return 0;
  1943. }
  1944. config.speed = s->speed;
  1945. config.duplex = s->duplex;
  1946. break;
  1947. case AUTONEG_ENABLE:
  1948. /* If we have a fixed link, allow autonegotiation (since that
  1949. * is our default case) but do not allow the advertisement to
  1950. * be changed. If the advertisement matches, simply return.
  1951. */
  1952. if (pl->cur_link_an_mode == MLO_AN_FIXED) {
  1953. if (!linkmode_equal(config.advertising,
  1954. pl->link_config.advertising))
  1955. return -EINVAL;
  1956. return 0;
  1957. }
  1958. config.speed = SPEED_UNKNOWN;
  1959. config.duplex = DUPLEX_UNKNOWN;
  1960. break;
  1961. default:
  1962. return -EINVAL;
  1963. }
  1964. /* We have ruled out the case with a PHY attached, and the
  1965. * fixed-link cases. All that is left are in-band links.
  1966. */
  1967. config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
  1968. linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
  1969. config.an_enabled);
  1970. /* If this link is with an SFP, ensure that changes to advertised modes
  1971. * also cause the associated interface to be selected such that the
  1972. * link can be configured correctly.
  1973. */
  1974. if (pl->sfp_bus) {
  1975. config.interface = sfp_select_interface(pl->sfp_bus,
  1976. config.advertising);
  1977. if (config.interface == PHY_INTERFACE_MODE_NA) {
  1978. phylink_err(pl,
  1979. "selection of interface failed, advertisement %*pb\n",
  1980. __ETHTOOL_LINK_MODE_MASK_NBITS,
  1981. config.advertising);
  1982. return -EINVAL;
  1983. }
  1984. /* Revalidate with the selected interface */
  1985. linkmode_copy(support, pl->supported);
  1986. if (phylink_validate(pl, support, &config)) {
  1987. phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
  1988. phylink_an_mode_str(pl->cur_link_an_mode),
  1989. phy_modes(config.interface),
  1990. __ETHTOOL_LINK_MODE_MASK_NBITS, support);
  1991. return -EINVAL;
  1992. }
  1993. } else {
  1994. /* Validate without changing the current supported mask. */
  1995. linkmode_copy(support, pl->supported);
  1996. if (phylink_validate(pl, support, &config))
  1997. return -EINVAL;
  1998. }
  1999. /* If autonegotiation is enabled, we must have an advertisement */
  2000. if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
  2001. return -EINVAL;
  2002. mutex_lock(&pl->state_mutex);
  2003. pl->link_config.speed = config.speed;
  2004. pl->link_config.duplex = config.duplex;
  2005. pl->link_config.an_enabled = config.an_enabled;
  2006. if (pl->link_config.interface != config.interface) {
  2007. /* The interface changed, e.g. 1000base-X <-> 2500base-X */
  2008. /* We need to force the link down, then change the interface */
  2009. if (pl->old_link_state) {
  2010. phylink_link_down(pl);
  2011. pl->old_link_state = false;
  2012. }
  2013. if (!test_bit(PHYLINK_DISABLE_STOPPED,
  2014. &pl->phylink_disable_state))
  2015. phylink_major_config(pl, false, &config);
  2016. pl->link_config.interface = config.interface;
  2017. linkmode_copy(pl->link_config.advertising, config.advertising);
  2018. } else if (!linkmode_equal(pl->link_config.advertising,
  2019. config.advertising)) {
  2020. linkmode_copy(pl->link_config.advertising, config.advertising);
  2021. phylink_change_inband_advert(pl);
  2022. }
  2023. mutex_unlock(&pl->state_mutex);
  2024. return 0;
  2025. }
  2026. EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
  2027. /**
  2028. * phylink_ethtool_nway_reset() - restart negotiation
  2029. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2030. *
  2031. * Restart negotiation for the phylink instance specified by @pl. This will
  2032. * cause any attached phy to restart negotiation with the link partner, and
  2033. * if the MAC is in a BaseX mode, the MAC will also be requested to restart
  2034. * negotiation.
  2035. *
  2036. * Returns zero on success, or negative error code.
  2037. */
  2038. int phylink_ethtool_nway_reset(struct phylink *pl)
  2039. {
  2040. int ret = 0;
  2041. ASSERT_RTNL();
  2042. if (pl->phydev)
  2043. ret = phy_restart_aneg(pl->phydev);
  2044. phylink_mac_pcs_an_restart(pl);
  2045. return ret;
  2046. }
  2047. EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
  2048. /**
  2049. * phylink_ethtool_get_pauseparam() - get the current pause parameters
  2050. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2051. * @pause: a pointer to a &struct ethtool_pauseparam
  2052. */
  2053. void phylink_ethtool_get_pauseparam(struct phylink *pl,
  2054. struct ethtool_pauseparam *pause)
  2055. {
  2056. ASSERT_RTNL();
  2057. pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
  2058. pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
  2059. pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
  2060. }
  2061. EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
  2062. /**
  2063. * phylink_ethtool_set_pauseparam() - set the current pause parameters
  2064. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2065. * @pause: a pointer to a &struct ethtool_pauseparam
  2066. */
  2067. int phylink_ethtool_set_pauseparam(struct phylink *pl,
  2068. struct ethtool_pauseparam *pause)
  2069. {
  2070. struct phylink_link_state *config = &pl->link_config;
  2071. bool manual_changed;
  2072. int pause_state;
  2073. ASSERT_RTNL();
  2074. if (pl->cur_link_an_mode == MLO_AN_FIXED)
  2075. return -EOPNOTSUPP;
  2076. if (!phylink_test(pl->supported, Pause) &&
  2077. !phylink_test(pl->supported, Asym_Pause))
  2078. return -EOPNOTSUPP;
  2079. if (!phylink_test(pl->supported, Asym_Pause) &&
  2080. pause->rx_pause != pause->tx_pause)
  2081. return -EINVAL;
  2082. pause_state = 0;
  2083. if (pause->autoneg)
  2084. pause_state |= MLO_PAUSE_AN;
  2085. if (pause->rx_pause)
  2086. pause_state |= MLO_PAUSE_RX;
  2087. if (pause->tx_pause)
  2088. pause_state |= MLO_PAUSE_TX;
  2089. mutex_lock(&pl->state_mutex);
  2090. /*
  2091. * See the comments for linkmode_set_pause(), wrt the deficiencies
  2092. * with the current implementation. A solution to this issue would
  2093. * be:
  2094. * ethtool Local device
  2095. * rx tx Pause AsymDir
  2096. * 0 0 0 0
  2097. * 1 0 1 1
  2098. * 0 1 0 1
  2099. * 1 1 1 1
  2100. * and then use the ethtool rx/tx enablement status to mask the
  2101. * rx/tx pause resolution.
  2102. */
  2103. linkmode_set_pause(config->advertising, pause->tx_pause,
  2104. pause->rx_pause);
  2105. manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
  2106. (!(pause_state & MLO_PAUSE_AN) &&
  2107. (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
  2108. config->pause = pause_state;
  2109. /* Update our in-band advertisement, triggering a renegotiation if
  2110. * the advertisement changed.
  2111. */
  2112. if (!pl->phydev)
  2113. phylink_change_inband_advert(pl);
  2114. mutex_unlock(&pl->state_mutex);
  2115. /* If we have a PHY, a change of the pause frame advertisement will
  2116. * cause phylib to renegotiate (if AN is enabled) which will in turn
  2117. * call our phylink_phy_change() and trigger a resolve. Note that
  2118. * we can't hold our state mutex while calling phy_set_asym_pause().
  2119. */
  2120. if (pl->phydev)
  2121. phy_set_asym_pause(pl->phydev, pause->rx_pause,
  2122. pause->tx_pause);
  2123. /* If the manual pause settings changed, make sure we trigger a
  2124. * resolve to update their state; we can not guarantee that the
  2125. * link will cycle.
  2126. */
  2127. if (manual_changed) {
  2128. pl->mac_link_dropped = true;
  2129. phylink_run_resolve(pl);
  2130. }
  2131. return 0;
  2132. }
  2133. EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
  2134. /**
  2135. * phylink_get_eee_err() - read the energy efficient ethernet error
  2136. * counter
  2137. * @pl: a pointer to a &struct phylink returned from phylink_create().
  2138. *
  2139. * Read the Energy Efficient Ethernet error counter from the PHY associated
  2140. * with the phylink instance specified by @pl.
  2141. *
  2142. * Returns positive error counter value, or negative error code.
  2143. */
  2144. int phylink_get_eee_err(struct phylink *pl)
  2145. {
  2146. int ret = 0;
  2147. ASSERT_RTNL();
  2148. if (pl->phydev)
  2149. ret = phy_get_eee_err(pl->phydev);
  2150. return ret;
  2151. }
  2152. EXPORT_SYMBOL_GPL(phylink_get_eee_err);
  2153. /**
  2154. * phylink_init_eee() - init and check the EEE features
  2155. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2156. * @clk_stop_enable: allow PHY to stop receive clock
  2157. *
  2158. * Must be called either with RTNL held or within mac_link_up()
  2159. */
  2160. int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
  2161. {
  2162. int ret = -EOPNOTSUPP;
  2163. if (pl->phydev)
  2164. ret = phy_init_eee(pl->phydev, clk_stop_enable);
  2165. return ret;
  2166. }
  2167. EXPORT_SYMBOL_GPL(phylink_init_eee);
  2168. /**
  2169. * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
  2170. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2171. * @eee: a pointer to a &struct ethtool_eee for the read parameters
  2172. */
  2173. int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
  2174. {
  2175. int ret = -EOPNOTSUPP;
  2176. ASSERT_RTNL();
  2177. if (pl->phydev)
  2178. ret = phy_ethtool_get_eee(pl->phydev, eee);
  2179. return ret;
  2180. }
  2181. EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
  2182. /**
  2183. * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
  2184. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2185. * @eee: a pointer to a &struct ethtool_eee for the desired parameters
  2186. */
  2187. int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
  2188. {
  2189. int ret = -EOPNOTSUPP;
  2190. ASSERT_RTNL();
  2191. if (pl->phydev)
  2192. ret = phy_ethtool_set_eee(pl->phydev, eee);
  2193. return ret;
  2194. }
  2195. EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
  2196. /* This emulates MII registers for a fixed-mode phy operating as per the
  2197. * passed in state. "aneg" defines if we report negotiation is possible.
  2198. *
  2199. * FIXME: should deal with negotiation state too.
  2200. */
  2201. static int phylink_mii_emul_read(unsigned int reg,
  2202. struct phylink_link_state *state)
  2203. {
  2204. struct fixed_phy_status fs;
  2205. unsigned long *lpa = state->lp_advertising;
  2206. int val;
  2207. fs.link = state->link;
  2208. fs.speed = state->speed;
  2209. fs.duplex = state->duplex;
  2210. fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
  2211. fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
  2212. val = swphy_read_reg(reg, &fs);
  2213. if (reg == MII_BMSR) {
  2214. if (!state->an_complete)
  2215. val &= ~BMSR_ANEGCOMPLETE;
  2216. }
  2217. return val;
  2218. }
  2219. static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
  2220. unsigned int reg)
  2221. {
  2222. struct phy_device *phydev = pl->phydev;
  2223. int prtad, devad;
  2224. if (mdio_phy_id_is_c45(phy_id)) {
  2225. prtad = mdio_phy_id_prtad(phy_id);
  2226. devad = mdio_phy_id_devad(phy_id);
  2227. return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
  2228. reg);
  2229. }
  2230. if (phydev->is_c45) {
  2231. switch (reg) {
  2232. case MII_BMCR:
  2233. case MII_BMSR:
  2234. case MII_PHYSID1:
  2235. case MII_PHYSID2:
  2236. devad = __ffs(phydev->c45_ids.mmds_present);
  2237. break;
  2238. case MII_ADVERTISE:
  2239. case MII_LPA:
  2240. if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
  2241. return -EINVAL;
  2242. devad = MDIO_MMD_AN;
  2243. if (reg == MII_ADVERTISE)
  2244. reg = MDIO_AN_ADVERTISE;
  2245. else
  2246. reg = MDIO_AN_LPA;
  2247. break;
  2248. default:
  2249. return -EINVAL;
  2250. }
  2251. prtad = phy_id;
  2252. return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
  2253. reg);
  2254. }
  2255. return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
  2256. }
  2257. static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
  2258. unsigned int reg, unsigned int val)
  2259. {
  2260. struct phy_device *phydev = pl->phydev;
  2261. int prtad, devad;
  2262. if (mdio_phy_id_is_c45(phy_id)) {
  2263. prtad = mdio_phy_id_prtad(phy_id);
  2264. devad = mdio_phy_id_devad(phy_id);
  2265. return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
  2266. reg, val);
  2267. }
  2268. if (phydev->is_c45) {
  2269. switch (reg) {
  2270. case MII_BMCR:
  2271. case MII_BMSR:
  2272. case MII_PHYSID1:
  2273. case MII_PHYSID2:
  2274. devad = __ffs(phydev->c45_ids.mmds_present);
  2275. break;
  2276. case MII_ADVERTISE:
  2277. case MII_LPA:
  2278. if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
  2279. return -EINVAL;
  2280. devad = MDIO_MMD_AN;
  2281. if (reg == MII_ADVERTISE)
  2282. reg = MDIO_AN_ADVERTISE;
  2283. else
  2284. reg = MDIO_AN_LPA;
  2285. break;
  2286. default:
  2287. return -EINVAL;
  2288. }
  2289. return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
  2290. reg, val);
  2291. }
  2292. return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
  2293. }
  2294. static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
  2295. unsigned int reg)
  2296. {
  2297. struct phylink_link_state state;
  2298. int val = 0xffff;
  2299. switch (pl->cur_link_an_mode) {
  2300. case MLO_AN_FIXED:
  2301. if (phy_id == 0) {
  2302. phylink_get_fixed_state(pl, &state);
  2303. val = phylink_mii_emul_read(reg, &state);
  2304. }
  2305. break;
  2306. case MLO_AN_PHY:
  2307. return -EOPNOTSUPP;
  2308. case MLO_AN_INBAND:
  2309. if (phy_id == 0) {
  2310. phylink_mac_pcs_get_state(pl, &state);
  2311. val = phylink_mii_emul_read(reg, &state);
  2312. }
  2313. break;
  2314. }
  2315. return val & 0xffff;
  2316. }
  2317. static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
  2318. unsigned int reg, unsigned int val)
  2319. {
  2320. switch (pl->cur_link_an_mode) {
  2321. case MLO_AN_FIXED:
  2322. break;
  2323. case MLO_AN_PHY:
  2324. return -EOPNOTSUPP;
  2325. case MLO_AN_INBAND:
  2326. break;
  2327. }
  2328. return 0;
  2329. }
  2330. /**
  2331. * phylink_mii_ioctl() - generic mii ioctl interface
  2332. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2333. * @ifr: a pointer to a &struct ifreq for socket ioctls
  2334. * @cmd: ioctl cmd to execute
  2335. *
  2336. * Perform the specified MII ioctl on the PHY attached to the phylink instance
  2337. * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
  2338. *
  2339. * Returns: zero on success or negative error code.
  2340. *
  2341. * %SIOCGMIIPHY:
  2342. * read register from the current PHY.
  2343. * %SIOCGMIIREG:
  2344. * read register from the specified PHY.
  2345. * %SIOCSMIIREG:
  2346. * set a register on the specified PHY.
  2347. */
  2348. int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
  2349. {
  2350. struct mii_ioctl_data *mii = if_mii(ifr);
  2351. int ret;
  2352. ASSERT_RTNL();
  2353. if (pl->phydev) {
  2354. /* PHYs only exist for MLO_AN_PHY and SGMII */
  2355. switch (cmd) {
  2356. case SIOCGMIIPHY:
  2357. mii->phy_id = pl->phydev->mdio.addr;
  2358. fallthrough;
  2359. case SIOCGMIIREG:
  2360. ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
  2361. if (ret >= 0) {
  2362. mii->val_out = ret;
  2363. ret = 0;
  2364. }
  2365. break;
  2366. case SIOCSMIIREG:
  2367. ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
  2368. mii->val_in);
  2369. break;
  2370. default:
  2371. ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
  2372. break;
  2373. }
  2374. } else {
  2375. switch (cmd) {
  2376. case SIOCGMIIPHY:
  2377. mii->phy_id = 0;
  2378. fallthrough;
  2379. case SIOCGMIIREG:
  2380. ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
  2381. if (ret >= 0) {
  2382. mii->val_out = ret;
  2383. ret = 0;
  2384. }
  2385. break;
  2386. case SIOCSMIIREG:
  2387. ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
  2388. mii->val_in);
  2389. break;
  2390. default:
  2391. ret = -EOPNOTSUPP;
  2392. break;
  2393. }
  2394. }
  2395. return ret;
  2396. }
  2397. EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
  2398. /**
  2399. * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
  2400. * link partners
  2401. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2402. * @sync: perform action synchronously
  2403. *
  2404. * If we have a PHY that is not part of a SFP module, then set the speed
  2405. * as described in the phy_speed_down() function. Please see this function
  2406. * for a description of the @sync parameter.
  2407. *
  2408. * Returns zero if there is no PHY, otherwise as per phy_speed_down().
  2409. */
  2410. int phylink_speed_down(struct phylink *pl, bool sync)
  2411. {
  2412. int ret = 0;
  2413. ASSERT_RTNL();
  2414. if (!pl->sfp_bus && pl->phydev)
  2415. ret = phy_speed_down(pl->phydev, sync);
  2416. return ret;
  2417. }
  2418. EXPORT_SYMBOL_GPL(phylink_speed_down);
  2419. /**
  2420. * phylink_speed_up() - restore the advertised speeds prior to the call to
  2421. * phylink_speed_down()
  2422. * @pl: a pointer to a &struct phylink returned from phylink_create()
  2423. *
  2424. * If we have a PHY that is not part of a SFP module, then restore the
  2425. * PHY speeds as per phy_speed_up().
  2426. *
  2427. * Returns zero if there is no PHY, otherwise as per phy_speed_up().
  2428. */
  2429. int phylink_speed_up(struct phylink *pl)
  2430. {
  2431. int ret = 0;
  2432. ASSERT_RTNL();
  2433. if (!pl->sfp_bus && pl->phydev)
  2434. ret = phy_speed_up(pl->phydev);
  2435. return ret;
  2436. }
  2437. EXPORT_SYMBOL_GPL(phylink_speed_up);
  2438. static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
  2439. {
  2440. struct phylink *pl = upstream;
  2441. pl->netdev->sfp_bus = bus;
  2442. }
  2443. static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
  2444. {
  2445. struct phylink *pl = upstream;
  2446. pl->netdev->sfp_bus = NULL;
  2447. }
  2448. static const phy_interface_t phylink_sfp_interface_preference[] = {
  2449. PHY_INTERFACE_MODE_25GBASER,
  2450. PHY_INTERFACE_MODE_USXGMII,
  2451. PHY_INTERFACE_MODE_10GBASER,
  2452. PHY_INTERFACE_MODE_5GBASER,
  2453. PHY_INTERFACE_MODE_2500BASEX,
  2454. PHY_INTERFACE_MODE_SGMII,
  2455. PHY_INTERFACE_MODE_1000BASEX,
  2456. PHY_INTERFACE_MODE_100BASEX,
  2457. };
  2458. static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
  2459. static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
  2460. const unsigned long *intf)
  2461. {
  2462. phy_interface_t interface;
  2463. size_t i;
  2464. interface = PHY_INTERFACE_MODE_NA;
  2465. for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
  2466. if (test_bit(phylink_sfp_interface_preference[i], intf)) {
  2467. interface = phylink_sfp_interface_preference[i];
  2468. break;
  2469. }
  2470. return interface;
  2471. }
  2472. static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
  2473. unsigned long *supported,
  2474. struct phylink_link_state *state)
  2475. {
  2476. bool changed = false;
  2477. phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
  2478. phylink_an_mode_str(mode), phy_modes(state->interface),
  2479. __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
  2480. if (!linkmode_equal(pl->supported, supported)) {
  2481. linkmode_copy(pl->supported, supported);
  2482. changed = true;
  2483. }
  2484. if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
  2485. linkmode_copy(pl->link_config.advertising, state->advertising);
  2486. changed = true;
  2487. }
  2488. if (pl->cur_link_an_mode != mode ||
  2489. pl->link_config.interface != state->interface) {
  2490. pl->cur_link_an_mode = mode;
  2491. pl->link_config.interface = state->interface;
  2492. changed = true;
  2493. phylink_info(pl, "switched to %s/%s link mode\n",
  2494. phylink_an_mode_str(mode),
  2495. phy_modes(state->interface));
  2496. }
  2497. if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
  2498. &pl->phylink_disable_state))
  2499. phylink_mac_initial_config(pl, false);
  2500. }
  2501. static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
  2502. struct phy_device *phy)
  2503. {
  2504. __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
  2505. __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
  2506. struct phylink_link_state config;
  2507. phy_interface_t iface;
  2508. int ret;
  2509. linkmode_copy(support, phy->supported);
  2510. memset(&config, 0, sizeof(config));
  2511. linkmode_copy(config.advertising, phy->advertising);
  2512. config.interface = PHY_INTERFACE_MODE_NA;
  2513. config.speed = SPEED_UNKNOWN;
  2514. config.duplex = DUPLEX_UNKNOWN;
  2515. config.pause = MLO_PAUSE_AN;
  2516. config.an_enabled = pl->link_config.an_enabled;
  2517. /* Ignore errors if we're expecting a PHY to attach later */
  2518. ret = phylink_validate(pl, support, &config);
  2519. if (ret) {
  2520. phylink_err(pl, "validation with support %*pb failed: %pe\n",
  2521. __ETHTOOL_LINK_MODE_MASK_NBITS, support,
  2522. ERR_PTR(ret));
  2523. return ret;
  2524. }
  2525. iface = sfp_select_interface(pl->sfp_bus, config.advertising);
  2526. if (iface == PHY_INTERFACE_MODE_NA) {
  2527. phylink_err(pl,
  2528. "selection of interface failed, advertisement %*pb\n",
  2529. __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
  2530. return -EINVAL;
  2531. }
  2532. config.interface = iface;
  2533. linkmode_copy(support1, support);
  2534. ret = phylink_validate(pl, support1, &config);
  2535. if (ret) {
  2536. phylink_err(pl,
  2537. "validation of %s/%s with support %*pb failed: %pe\n",
  2538. phylink_an_mode_str(mode),
  2539. phy_modes(config.interface),
  2540. __ETHTOOL_LINK_MODE_MASK_NBITS, support,
  2541. ERR_PTR(ret));
  2542. return ret;
  2543. }
  2544. pl->link_port = pl->sfp_port;
  2545. phylink_sfp_set_config(pl, mode, support, &config);
  2546. return 0;
  2547. }
  2548. static int phylink_sfp_config_optical(struct phylink *pl)
  2549. {
  2550. __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
  2551. DECLARE_PHY_INTERFACE_MASK(interfaces);
  2552. struct phylink_link_state config;
  2553. phy_interface_t interface;
  2554. int ret;
  2555. phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
  2556. (int)PHY_INTERFACE_MODE_MAX,
  2557. pl->config->supported_interfaces,
  2558. (int)PHY_INTERFACE_MODE_MAX,
  2559. pl->sfp_interfaces);
  2560. /* Find the union of the supported interfaces by the PCS/MAC and
  2561. * the SFP module.
  2562. */
  2563. phy_interface_and(interfaces, pl->config->supported_interfaces,
  2564. pl->sfp_interfaces);
  2565. if (phy_interface_empty(interfaces)) {
  2566. phylink_err(pl, "unsupported SFP module: no common interface modes\n");
  2567. return -EINVAL;
  2568. }
  2569. memset(&config, 0, sizeof(config));
  2570. linkmode_copy(support, pl->sfp_support);
  2571. linkmode_copy(config.advertising, pl->sfp_support);
  2572. config.speed = SPEED_UNKNOWN;
  2573. config.duplex = DUPLEX_UNKNOWN;
  2574. config.pause = MLO_PAUSE_AN;
  2575. config.an_enabled = true;
  2576. /* For all the interfaces that are supported, reduce the sfp_support
  2577. * mask to only those link modes that can be supported.
  2578. */
  2579. ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
  2580. if (ret) {
  2581. phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
  2582. __ETHTOOL_LINK_MODE_MASK_NBITS, support);
  2583. return ret;
  2584. }
  2585. interface = phylink_choose_sfp_interface(pl, interfaces);
  2586. if (interface == PHY_INTERFACE_MODE_NA) {
  2587. phylink_err(pl, "failed to select SFP interface\n");
  2588. return -EINVAL;
  2589. }
  2590. phylink_dbg(pl, "optical SFP: chosen %s interface\n",
  2591. phy_modes(interface));
  2592. config.interface = interface;
  2593. /* Ignore errors if we're expecting a PHY to attach later */
  2594. ret = phylink_validate(pl, support, &config);
  2595. if (ret) {
  2596. phylink_err(pl, "validation with support %*pb failed: %pe\n",
  2597. __ETHTOOL_LINK_MODE_MASK_NBITS, support,
  2598. ERR_PTR(ret));
  2599. return ret;
  2600. }
  2601. pl->link_port = pl->sfp_port;
  2602. phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
  2603. return 0;
  2604. }
  2605. static int phylink_sfp_module_insert(void *upstream,
  2606. const struct sfp_eeprom_id *id)
  2607. {
  2608. struct phylink *pl = upstream;
  2609. ASSERT_RTNL();
  2610. linkmode_zero(pl->sfp_support);
  2611. phy_interface_zero(pl->sfp_interfaces);
  2612. sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
  2613. pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
  2614. /* If this module may have a PHY connecting later, defer until later */
  2615. pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
  2616. if (pl->sfp_may_have_phy)
  2617. return 0;
  2618. return phylink_sfp_config_optical(pl);
  2619. }
  2620. static int phylink_sfp_module_start(void *upstream)
  2621. {
  2622. struct phylink *pl = upstream;
  2623. /* If this SFP module has a PHY, start the PHY now. */
  2624. if (pl->phydev) {
  2625. phy_start(pl->phydev);
  2626. return 0;
  2627. }
  2628. /* If the module may have a PHY but we didn't detect one we
  2629. * need to configure the MAC here.
  2630. */
  2631. if (!pl->sfp_may_have_phy)
  2632. return 0;
  2633. return phylink_sfp_config_optical(pl);
  2634. }
  2635. static void phylink_sfp_module_stop(void *upstream)
  2636. {
  2637. struct phylink *pl = upstream;
  2638. /* If this SFP module has a PHY, stop it. */
  2639. if (pl->phydev)
  2640. phy_stop(pl->phydev);
  2641. }
  2642. static void phylink_sfp_link_down(void *upstream)
  2643. {
  2644. struct phylink *pl = upstream;
  2645. ASSERT_RTNL();
  2646. phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
  2647. }
  2648. static void phylink_sfp_link_up(void *upstream)
  2649. {
  2650. struct phylink *pl = upstream;
  2651. ASSERT_RTNL();
  2652. phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
  2653. }
  2654. /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
  2655. * or 802.3z control word, so inband will not work.
  2656. */
  2657. static bool phylink_phy_no_inband(struct phy_device *phy)
  2658. {
  2659. return phy->is_c45 &&
  2660. (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
  2661. }
  2662. static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
  2663. {
  2664. struct phylink *pl = upstream;
  2665. phy_interface_t interface;
  2666. u8 mode;
  2667. int ret;
  2668. /*
  2669. * This is the new way of dealing with flow control for PHYs,
  2670. * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
  2671. * phy drivers should not set SUPPORTED_[Asym_]Pause") except
  2672. * using our validate call to the MAC, we rely upon the MAC
  2673. * clearing the bits from both supported and advertising fields.
  2674. */
  2675. phy_support_asym_pause(phy);
  2676. if (phylink_phy_no_inband(phy))
  2677. mode = MLO_AN_PHY;
  2678. else
  2679. mode = MLO_AN_INBAND;
  2680. /* Set the PHY's host supported interfaces */
  2681. phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
  2682. pl->config->supported_interfaces);
  2683. /* Do the initial configuration */
  2684. ret = phylink_sfp_config_phy(pl, mode, phy);
  2685. if (ret < 0)
  2686. return ret;
  2687. interface = pl->link_config.interface;
  2688. ret = phylink_attach_phy(pl, phy, interface);
  2689. if (ret < 0)
  2690. return ret;
  2691. ret = phylink_bringup_phy(pl, phy, interface);
  2692. if (ret)
  2693. phy_detach(phy);
  2694. return ret;
  2695. }
  2696. static void phylink_sfp_disconnect_phy(void *upstream)
  2697. {
  2698. phylink_disconnect_phy(upstream);
  2699. }
  2700. static const struct sfp_upstream_ops sfp_phylink_ops = {
  2701. .attach = phylink_sfp_attach,
  2702. .detach = phylink_sfp_detach,
  2703. .module_insert = phylink_sfp_module_insert,
  2704. .module_start = phylink_sfp_module_start,
  2705. .module_stop = phylink_sfp_module_stop,
  2706. .link_up = phylink_sfp_link_up,
  2707. .link_down = phylink_sfp_link_down,
  2708. .connect_phy = phylink_sfp_connect_phy,
  2709. .disconnect_phy = phylink_sfp_disconnect_phy,
  2710. };
  2711. /* Helpers for MAC drivers */
  2712. static void phylink_decode_c37_word(struct phylink_link_state *state,
  2713. uint16_t config_reg, int speed)
  2714. {
  2715. bool tx_pause, rx_pause;
  2716. int fd_bit;
  2717. if (speed == SPEED_2500)
  2718. fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
  2719. else
  2720. fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
  2721. mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
  2722. if (linkmode_test_bit(fd_bit, state->advertising) &&
  2723. linkmode_test_bit(fd_bit, state->lp_advertising)) {
  2724. state->speed = speed;
  2725. state->duplex = DUPLEX_FULL;
  2726. } else {
  2727. /* negotiation failure */
  2728. state->link = false;
  2729. }
  2730. linkmode_resolve_pause(state->advertising, state->lp_advertising,
  2731. &tx_pause, &rx_pause);
  2732. if (tx_pause)
  2733. state->pause |= MLO_PAUSE_TX;
  2734. if (rx_pause)
  2735. state->pause |= MLO_PAUSE_RX;
  2736. }
  2737. static void phylink_decode_sgmii_word(struct phylink_link_state *state,
  2738. uint16_t config_reg)
  2739. {
  2740. if (!(config_reg & LPA_SGMII_LINK)) {
  2741. state->link = false;
  2742. return;
  2743. }
  2744. switch (config_reg & LPA_SGMII_SPD_MASK) {
  2745. case LPA_SGMII_10:
  2746. state->speed = SPEED_10;
  2747. break;
  2748. case LPA_SGMII_100:
  2749. state->speed = SPEED_100;
  2750. break;
  2751. case LPA_SGMII_1000:
  2752. state->speed = SPEED_1000;
  2753. break;
  2754. default:
  2755. state->link = false;
  2756. return;
  2757. }
  2758. if (config_reg & LPA_SGMII_FULL_DUPLEX)
  2759. state->duplex = DUPLEX_FULL;
  2760. else
  2761. state->duplex = DUPLEX_HALF;
  2762. }
  2763. /**
  2764. * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
  2765. * @state: a pointer to a struct phylink_link_state.
  2766. * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
  2767. *
  2768. * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
  2769. * code word. Decode the USXGMII code word and populate the corresponding fields
  2770. * (speed, duplex) into the phylink_link_state structure.
  2771. */
  2772. void phylink_decode_usxgmii_word(struct phylink_link_state *state,
  2773. uint16_t lpa)
  2774. {
  2775. switch (lpa & MDIO_USXGMII_SPD_MASK) {
  2776. case MDIO_USXGMII_10:
  2777. state->speed = SPEED_10;
  2778. break;
  2779. case MDIO_USXGMII_100:
  2780. state->speed = SPEED_100;
  2781. break;
  2782. case MDIO_USXGMII_1000:
  2783. state->speed = SPEED_1000;
  2784. break;
  2785. case MDIO_USXGMII_2500:
  2786. state->speed = SPEED_2500;
  2787. break;
  2788. case MDIO_USXGMII_5000:
  2789. state->speed = SPEED_5000;
  2790. break;
  2791. case MDIO_USXGMII_10G:
  2792. state->speed = SPEED_10000;
  2793. break;
  2794. default:
  2795. state->link = false;
  2796. return;
  2797. }
  2798. if (lpa & MDIO_USXGMII_FULL_DUPLEX)
  2799. state->duplex = DUPLEX_FULL;
  2800. else
  2801. state->duplex = DUPLEX_HALF;
  2802. }
  2803. EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
  2804. /**
  2805. * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
  2806. * @state: a pointer to a struct phylink_link_state.
  2807. * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
  2808. *
  2809. * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
  2810. * code word. Decode the USGMII code word and populate the corresponding fields
  2811. * (speed, duplex) into the phylink_link_state structure. The structure for this
  2812. * word is the same as the USXGMII word, except it only supports speeds up to
  2813. * 1Gbps.
  2814. */
  2815. static void phylink_decode_usgmii_word(struct phylink_link_state *state,
  2816. uint16_t lpa)
  2817. {
  2818. switch (lpa & MDIO_USXGMII_SPD_MASK) {
  2819. case MDIO_USXGMII_10:
  2820. state->speed = SPEED_10;
  2821. break;
  2822. case MDIO_USXGMII_100:
  2823. state->speed = SPEED_100;
  2824. break;
  2825. case MDIO_USXGMII_1000:
  2826. state->speed = SPEED_1000;
  2827. break;
  2828. default:
  2829. state->link = false;
  2830. return;
  2831. }
  2832. if (lpa & MDIO_USXGMII_FULL_DUPLEX)
  2833. state->duplex = DUPLEX_FULL;
  2834. else
  2835. state->duplex = DUPLEX_HALF;
  2836. }
  2837. /**
  2838. * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
  2839. * @state: a pointer to a &struct phylink_link_state.
  2840. * @bmsr: The value of the %MII_BMSR register
  2841. * @lpa: The value of the %MII_LPA register
  2842. *
  2843. * Helper for MAC PCS supporting the 802.3 clause 22 register set for
  2844. * clause 37 negotiation and/or SGMII control.
  2845. *
  2846. * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
  2847. * the phylink @state structure. This is suitable to be used for implementing
  2848. * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
  2849. * accessing @bmsr and @lpa cannot be done with MDIO directly.
  2850. */
  2851. void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
  2852. u16 bmsr, u16 lpa)
  2853. {
  2854. state->link = !!(bmsr & BMSR_LSTATUS);
  2855. state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
  2856. /* If there is no link or autonegotiation is disabled, the LP advertisement
  2857. * data is not meaningful, so don't go any further.
  2858. */
  2859. if (!state->link || !state->an_enabled)
  2860. return;
  2861. switch (state->interface) {
  2862. case PHY_INTERFACE_MODE_1000BASEX:
  2863. phylink_decode_c37_word(state, lpa, SPEED_1000);
  2864. break;
  2865. case PHY_INTERFACE_MODE_2500BASEX:
  2866. phylink_decode_c37_word(state, lpa, SPEED_2500);
  2867. break;
  2868. case PHY_INTERFACE_MODE_SGMII:
  2869. case PHY_INTERFACE_MODE_QSGMII:
  2870. phylink_decode_sgmii_word(state, lpa);
  2871. break;
  2872. case PHY_INTERFACE_MODE_QUSGMII:
  2873. phylink_decode_usgmii_word(state, lpa);
  2874. break;
  2875. default:
  2876. state->link = false;
  2877. break;
  2878. }
  2879. }
  2880. EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
  2881. /**
  2882. * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
  2883. * @pcs: a pointer to a &struct mdio_device.
  2884. * @state: a pointer to a &struct phylink_link_state.
  2885. *
  2886. * Helper for MAC PCS supporting the 802.3 clause 22 register set for
  2887. * clause 37 negotiation and/or SGMII control.
  2888. *
  2889. * Read the MAC PCS state from the MII device configured in @config and
  2890. * parse the Clause 37 or Cisco SGMII link partner negotiation word into
  2891. * the phylink @state structure. This is suitable to be directly plugged
  2892. * into the mac_pcs_get_state() member of the struct phylink_mac_ops
  2893. * structure.
  2894. */
  2895. void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
  2896. struct phylink_link_state *state)
  2897. {
  2898. int bmsr, lpa;
  2899. bmsr = mdiodev_read(pcs, MII_BMSR);
  2900. lpa = mdiodev_read(pcs, MII_LPA);
  2901. if (bmsr < 0 || lpa < 0) {
  2902. state->link = false;
  2903. return;
  2904. }
  2905. phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
  2906. }
  2907. EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
  2908. /**
  2909. * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
  2910. * advertisement
  2911. * @interface: the PHY interface mode being configured
  2912. * @advertising: the ethtool advertisement mask
  2913. *
  2914. * Helper for MAC PCS supporting the 802.3 clause 22 register set for
  2915. * clause 37 negotiation and/or SGMII control.
  2916. *
  2917. * Encode the clause 37 PCS advertisement as specified by @interface and
  2918. * @advertising.
  2919. *
  2920. * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
  2921. */
  2922. int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
  2923. const unsigned long *advertising)
  2924. {
  2925. u16 adv;
  2926. switch (interface) {
  2927. case PHY_INTERFACE_MODE_1000BASEX:
  2928. case PHY_INTERFACE_MODE_2500BASEX:
  2929. adv = ADVERTISE_1000XFULL;
  2930. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  2931. advertising))
  2932. adv |= ADVERTISE_1000XPAUSE;
  2933. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  2934. advertising))
  2935. adv |= ADVERTISE_1000XPSE_ASYM;
  2936. return adv;
  2937. case PHY_INTERFACE_MODE_SGMII:
  2938. case PHY_INTERFACE_MODE_QSGMII:
  2939. return 0x0001;
  2940. default:
  2941. /* Nothing to do for other modes */
  2942. return -EINVAL;
  2943. }
  2944. }
  2945. EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
  2946. /**
  2947. * phylink_mii_c22_pcs_config() - configure clause 22 PCS
  2948. * @pcs: a pointer to a &struct mdio_device.
  2949. * @mode: link autonegotiation mode
  2950. * @interface: the PHY interface mode being configured
  2951. * @advertising: the ethtool advertisement mask
  2952. *
  2953. * Configure a Clause 22 PCS PHY with the appropriate negotiation
  2954. * parameters for the @mode, @interface and @advertising parameters.
  2955. * Returns negative error number on failure, zero if the advertisement
  2956. * has not changed, or positive if there is a change.
  2957. */
  2958. int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
  2959. phy_interface_t interface,
  2960. const unsigned long *advertising)
  2961. {
  2962. bool changed = 0;
  2963. u16 bmcr;
  2964. int ret, adv;
  2965. adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
  2966. if (adv >= 0) {
  2967. ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
  2968. MII_ADVERTISE, 0xffff, adv);
  2969. if (ret < 0)
  2970. return ret;
  2971. changed = ret;
  2972. }
  2973. /* Ensure ISOLATE bit is disabled */
  2974. if (mode == MLO_AN_INBAND &&
  2975. (interface == PHY_INTERFACE_MODE_SGMII ||
  2976. interface == PHY_INTERFACE_MODE_QSGMII ||
  2977. linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
  2978. bmcr = BMCR_ANENABLE;
  2979. else
  2980. bmcr = 0;
  2981. ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
  2982. if (ret < 0)
  2983. return ret;
  2984. return changed;
  2985. }
  2986. EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
  2987. /**
  2988. * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
  2989. * @pcs: a pointer to a &struct mdio_device.
  2990. *
  2991. * Helper for MAC PCS supporting the 802.3 clause 22 register set for
  2992. * clause 37 negotiation.
  2993. *
  2994. * Restart the clause 37 negotiation with the link partner. This is
  2995. * suitable to be directly plugged into the mac_pcs_get_state() member
  2996. * of the struct phylink_mac_ops structure.
  2997. */
  2998. void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
  2999. {
  3000. int val = mdiodev_read(pcs, MII_BMCR);
  3001. if (val >= 0) {
  3002. val |= BMCR_ANRESTART;
  3003. mdiodev_write(pcs, MII_BMCR, val);
  3004. }
  3005. }
  3006. EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
  3007. void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
  3008. struct phylink_link_state *state)
  3009. {
  3010. struct mii_bus *bus = pcs->bus;
  3011. int addr = pcs->addr;
  3012. int stat;
  3013. stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
  3014. if (stat < 0) {
  3015. state->link = false;
  3016. return;
  3017. }
  3018. state->link = !!(stat & MDIO_STAT1_LSTATUS);
  3019. if (!state->link)
  3020. return;
  3021. switch (state->interface) {
  3022. case PHY_INTERFACE_MODE_10GBASER:
  3023. state->speed = SPEED_10000;
  3024. state->duplex = DUPLEX_FULL;
  3025. break;
  3026. default:
  3027. break;
  3028. }
  3029. }
  3030. EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
  3031. static int __init phylink_init(void)
  3032. {
  3033. for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
  3034. __set_bit(phylink_sfp_interface_preference[i],
  3035. phylink_sfp_interfaces);
  3036. return 0;
  3037. }
  3038. module_init(phylink_init);
  3039. MODULE_LICENSE("GPL v2");