marvell.c 87 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/marvell.c
  4. *
  5. * Driver for Marvell PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. *
  11. * Copyright (c) 2013 Michael Stapelberg <[email protected]>
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/string.h>
  15. #include <linux/ctype.h>
  16. #include <linux/errno.h>
  17. #include <linux/unistd.h>
  18. #include <linux/hwmon.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/skbuff.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/module.h>
  28. #include <linux/mii.h>
  29. #include <linux/ethtool.h>
  30. #include <linux/ethtool_netlink.h>
  31. #include <linux/phy.h>
  32. #include <linux/marvell_phy.h>
  33. #include <linux/bitfield.h>
  34. #include <linux/of.h>
  35. #include <linux/sfp.h>
  36. #include <linux/io.h>
  37. #include <asm/irq.h>
  38. #include <linux/uaccess.h>
  39. #define MII_MARVELL_PHY_PAGE 22
  40. #define MII_MARVELL_COPPER_PAGE 0x00
  41. #define MII_MARVELL_FIBER_PAGE 0x01
  42. #define MII_MARVELL_MSCR_PAGE 0x02
  43. #define MII_MARVELL_LED_PAGE 0x03
  44. #define MII_MARVELL_VCT5_PAGE 0x05
  45. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  46. #define MII_MARVELL_VCT7_PAGE 0x07
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_MARVELL_MODE_PAGE 0x12
  49. #define MII_M1011_IEVENT 0x13
  50. #define MII_M1011_IEVENT_CLEAR 0x0000
  51. #define MII_M1011_IMASK 0x12
  52. #define MII_M1011_IMASK_INIT 0x6400
  53. #define MII_M1011_IMASK_CLEAR 0x0000
  54. #define MII_M1011_PHY_SCR 0x10
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  56. #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
  57. #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
  58. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  59. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  60. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  61. #define MII_M1011_PHY_SSR 0x11
  62. #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
  63. #define MII_M1111_PHY_LED_CONTROL 0x18
  64. #define MII_M1111_PHY_LED_DIRECT 0x4100
  65. #define MII_M1111_PHY_LED_COMBINE 0x411c
  66. #define MII_M1111_PHY_EXT_CR 0x14
  67. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
  68. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
  69. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
  70. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  71. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  72. #define MII_M1111_PHY_EXT_SR 0x1b
  73. #define MII_M1111_HWCFG_MODE_MASK 0xf
  74. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  75. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  76. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  77. #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
  78. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  79. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  80. #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
  81. #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
  82. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  83. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  84. #define MII_88E1121_PHY_MSCR_REG 21
  85. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  86. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  87. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  88. #define MII_88E1121_MISC_TEST 0x1a
  89. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  90. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  91. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  92. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  93. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  94. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  95. #define MII_88E1510_TEMP_SENSOR 0x1b
  96. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  97. #define MII_88E1540_COPPER_CTRL3 0x1a
  98. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
  99. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
  100. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
  101. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
  102. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
  103. #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
  104. #define MII_88E6390_MISC_TEST 0x1b
  105. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
  106. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
  107. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
  108. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
  109. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
  110. #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
  111. #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
  112. #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
  113. #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
  114. #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
  115. #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
  116. #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
  117. #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
  118. #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
  119. #define MII_88E6390_TEMP_SENSOR 0x1c
  120. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
  121. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
  122. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  123. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  124. #define MII_88E1318S_PHY_MSCR1_REG 16
  125. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  126. /* Copper Specific Interrupt Enable Register */
  127. #define MII_88E1318S_PHY_CSIER 0x12
  128. /* WOL Event Interrupt Enable */
  129. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  130. /* LED Timer Control Register */
  131. #define MII_88E1318S_PHY_LED_TCR 0x12
  132. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  133. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  134. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  135. /* Magic Packet MAC address registers */
  136. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  137. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  138. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  139. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  140. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  141. #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
  142. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  143. #define MII_PHY_LED_CTRL 16
  144. #define MII_88E1121_PHY_LED_DEF 0x0030
  145. #define MII_88E1510_PHY_LED_DEF 0x1177
  146. #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
  147. #define MII_M1011_PHY_STATUS 0x11
  148. #define MII_M1011_PHY_STATUS_1000 0x8000
  149. #define MII_M1011_PHY_STATUS_100 0x4000
  150. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  151. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  152. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  153. #define MII_M1011_PHY_STATUS_LINK 0x0400
  154. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  155. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  156. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  157. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  158. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  159. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
  160. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  161. /* RGMII to 1000BASE-X */
  162. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
  163. /* RGMII to 100BASE-FX */
  164. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
  165. /* RGMII to SGMII */
  166. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
  167. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  168. #define MII_88E1510_MSCR_2 0x15
  169. #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
  170. #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
  171. #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
  172. #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
  173. #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
  174. #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
  175. #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
  176. #define MII_VCT5_CTRL 0x17
  177. #define MII_VCT5_CTRL_ENABLE BIT(15)
  178. #define MII_VCT5_CTRL_COMPLETE BIT(14)
  179. #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
  180. #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
  181. #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
  182. #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
  183. #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
  184. #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
  185. #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
  186. #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
  187. #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
  188. #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
  189. #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
  190. #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
  191. #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
  192. #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
  193. #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
  194. #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
  195. #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
  196. #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
  197. #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
  198. #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
  199. #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
  200. #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
  201. #define MII_VCT5_TX_PULSE_CTRL 0x1c
  202. #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
  203. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
  204. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
  205. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
  206. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
  207. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
  208. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
  209. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
  210. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
  211. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
  212. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
  213. #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
  214. #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
  215. /* For TDR measurements less than 11 meters, a short pulse should be
  216. * used.
  217. */
  218. #define TDR_SHORT_CABLE_LENGTH 11
  219. #define MII_VCT7_PAIR_0_DISTANCE 0x10
  220. #define MII_VCT7_PAIR_1_DISTANCE 0x11
  221. #define MII_VCT7_PAIR_2_DISTANCE 0x12
  222. #define MII_VCT7_PAIR_3_DISTANCE 0x13
  223. #define MII_VCT7_RESULTS 0x14
  224. #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
  225. #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
  226. #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
  227. #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
  228. #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
  229. #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
  230. #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
  231. #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
  232. #define MII_VCT7_RESULTS_INVALID 0
  233. #define MII_VCT7_RESULTS_OK 1
  234. #define MII_VCT7_RESULTS_OPEN 2
  235. #define MII_VCT7_RESULTS_SAME_SHORT 3
  236. #define MII_VCT7_RESULTS_CROSS_SHORT 4
  237. #define MII_VCT7_RESULTS_BUSY 9
  238. #define MII_VCT7_CTRL 0x15
  239. #define MII_VCT7_CTRL_RUN_NOW BIT(15)
  240. #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
  241. #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
  242. #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
  243. #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
  244. #define MII_VCT7_CTRL_METERS BIT(10)
  245. #define MII_VCT7_CTRL_CENTIMETERS 0
  246. #define LPA_PAUSE_FIBER 0x180
  247. #define LPA_PAUSE_ASYM_FIBER 0x100
  248. #define NB_FIBER_STATS 1
  249. MODULE_DESCRIPTION("Marvell PHY driver");
  250. MODULE_AUTHOR("Andy Fleming");
  251. MODULE_LICENSE("GPL");
  252. struct marvell_hw_stat {
  253. const char *string;
  254. u8 page;
  255. u8 reg;
  256. u8 bits;
  257. };
  258. static struct marvell_hw_stat marvell_hw_stats[] = {
  259. { "phy_receive_errors_copper", 0, 21, 16},
  260. { "phy_idle_errors", 0, 10, 8 },
  261. { "phy_receive_errors_fiber", 1, 21, 16},
  262. };
  263. struct marvell_priv {
  264. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  265. char *hwmon_name;
  266. struct device *hwmon_dev;
  267. bool cable_test_tdr;
  268. u32 first;
  269. u32 last;
  270. u32 step;
  271. s8 pair;
  272. };
  273. static int marvell_read_page(struct phy_device *phydev)
  274. {
  275. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  276. }
  277. static int marvell_write_page(struct phy_device *phydev, int page)
  278. {
  279. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  280. }
  281. static int marvell_set_page(struct phy_device *phydev, int page)
  282. {
  283. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  284. }
  285. static int marvell_ack_interrupt(struct phy_device *phydev)
  286. {
  287. int err;
  288. /* Clear the interrupts by reading the reg */
  289. err = phy_read(phydev, MII_M1011_IEVENT);
  290. if (err < 0)
  291. return err;
  292. return 0;
  293. }
  294. static int marvell_config_intr(struct phy_device *phydev)
  295. {
  296. int err;
  297. if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
  298. err = marvell_ack_interrupt(phydev);
  299. if (err)
  300. return err;
  301. err = phy_write(phydev, MII_M1011_IMASK,
  302. MII_M1011_IMASK_INIT);
  303. } else {
  304. err = phy_write(phydev, MII_M1011_IMASK,
  305. MII_M1011_IMASK_CLEAR);
  306. if (err)
  307. return err;
  308. err = marvell_ack_interrupt(phydev);
  309. }
  310. return err;
  311. }
  312. static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
  313. {
  314. int irq_status;
  315. irq_status = phy_read(phydev, MII_M1011_IEVENT);
  316. if (irq_status < 0) {
  317. phy_error(phydev);
  318. return IRQ_NONE;
  319. }
  320. if (!(irq_status & MII_M1011_IMASK_INIT))
  321. return IRQ_NONE;
  322. phy_trigger_machine(phydev);
  323. return IRQ_HANDLED;
  324. }
  325. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  326. {
  327. u16 val;
  328. switch (polarity) {
  329. case ETH_TP_MDI:
  330. val = MII_M1011_PHY_SCR_MDI;
  331. break;
  332. case ETH_TP_MDI_X:
  333. val = MII_M1011_PHY_SCR_MDI_X;
  334. break;
  335. case ETH_TP_MDI_AUTO:
  336. case ETH_TP_MDI_INVALID:
  337. default:
  338. val = MII_M1011_PHY_SCR_AUTO_CROSS;
  339. break;
  340. }
  341. return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
  342. MII_M1011_PHY_SCR_AUTO_CROSS, val);
  343. }
  344. static int marvell_config_aneg(struct phy_device *phydev)
  345. {
  346. int changed = 0;
  347. int err;
  348. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  349. if (err < 0)
  350. return err;
  351. changed = err;
  352. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  353. MII_M1111_PHY_LED_DIRECT);
  354. if (err < 0)
  355. return err;
  356. err = genphy_config_aneg(phydev);
  357. if (err < 0)
  358. return err;
  359. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  360. /* A write to speed/duplex bits (that is performed by
  361. * genphy_config_aneg() call above) must be followed by
  362. * a software reset. Otherwise, the write has no effect.
  363. */
  364. err = genphy_soft_reset(phydev);
  365. if (err < 0)
  366. return err;
  367. }
  368. return 0;
  369. }
  370. static int m88e1101_config_aneg(struct phy_device *phydev)
  371. {
  372. int err;
  373. /* This Marvell PHY has an errata which requires
  374. * that certain registers get written in order
  375. * to restart autonegotiation
  376. */
  377. err = genphy_soft_reset(phydev);
  378. if (err < 0)
  379. return err;
  380. err = phy_write(phydev, 0x1d, 0x1f);
  381. if (err < 0)
  382. return err;
  383. err = phy_write(phydev, 0x1e, 0x200c);
  384. if (err < 0)
  385. return err;
  386. err = phy_write(phydev, 0x1d, 0x5);
  387. if (err < 0)
  388. return err;
  389. err = phy_write(phydev, 0x1e, 0);
  390. if (err < 0)
  391. return err;
  392. err = phy_write(phydev, 0x1e, 0x100);
  393. if (err < 0)
  394. return err;
  395. return marvell_config_aneg(phydev);
  396. }
  397. #if IS_ENABLED(CONFIG_OF_MDIO)
  398. /* Set and/or override some configuration registers based on the
  399. * marvell,reg-init property stored in the of_node for the phydev.
  400. *
  401. * marvell,reg-init = <reg-page reg mask value>,...;
  402. *
  403. * There may be one or more sets of <reg-page reg mask value>:
  404. *
  405. * reg-page: which register bank to use.
  406. * reg: the register.
  407. * mask: if non-zero, ANDed with existing register value.
  408. * value: ORed with the masked value and written to the regiser.
  409. *
  410. */
  411. static int marvell_of_reg_init(struct phy_device *phydev)
  412. {
  413. const __be32 *paddr;
  414. int len, i, saved_page, current_page, ret = 0;
  415. if (!phydev->mdio.dev.of_node)
  416. return 0;
  417. paddr = of_get_property(phydev->mdio.dev.of_node,
  418. "marvell,reg-init", &len);
  419. if (!paddr || len < (4 * sizeof(*paddr)))
  420. return 0;
  421. saved_page = phy_save_page(phydev);
  422. if (saved_page < 0)
  423. goto err;
  424. current_page = saved_page;
  425. len /= sizeof(*paddr);
  426. for (i = 0; i < len - 3; i += 4) {
  427. u16 page = be32_to_cpup(paddr + i);
  428. u16 reg = be32_to_cpup(paddr + i + 1);
  429. u16 mask = be32_to_cpup(paddr + i + 2);
  430. u16 val_bits = be32_to_cpup(paddr + i + 3);
  431. int val;
  432. if (page != current_page) {
  433. current_page = page;
  434. ret = marvell_write_page(phydev, page);
  435. if (ret < 0)
  436. goto err;
  437. }
  438. val = 0;
  439. if (mask) {
  440. val = __phy_read(phydev, reg);
  441. if (val < 0) {
  442. ret = val;
  443. goto err;
  444. }
  445. val &= mask;
  446. }
  447. val |= val_bits;
  448. ret = __phy_write(phydev, reg, val);
  449. if (ret < 0)
  450. goto err;
  451. }
  452. err:
  453. return phy_restore_page(phydev, saved_page, ret);
  454. }
  455. #else
  456. static int marvell_of_reg_init(struct phy_device *phydev)
  457. {
  458. return 0;
  459. }
  460. #endif /* CONFIG_OF_MDIO */
  461. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  462. {
  463. int mscr;
  464. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  465. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  466. MII_88E1121_PHY_MSCR_TX_DELAY;
  467. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  468. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  469. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  470. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  471. else
  472. mscr = 0;
  473. return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
  474. MII_88E1121_PHY_MSCR_REG,
  475. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  476. }
  477. static int m88e1121_config_aneg(struct phy_device *phydev)
  478. {
  479. int changed = 0;
  480. int err = 0;
  481. if (phy_interface_is_rgmii(phydev)) {
  482. err = m88e1121_config_aneg_rgmii_delays(phydev);
  483. if (err < 0)
  484. return err;
  485. }
  486. changed = err;
  487. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  488. if (err < 0)
  489. return err;
  490. changed |= err;
  491. err = genphy_config_aneg(phydev);
  492. if (err < 0)
  493. return err;
  494. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  495. /* A software reset is used to ensure a "commit" of the
  496. * changes is done.
  497. */
  498. err = genphy_soft_reset(phydev);
  499. if (err < 0)
  500. return err;
  501. }
  502. return 0;
  503. }
  504. static int m88e1318_config_aneg(struct phy_device *phydev)
  505. {
  506. int err;
  507. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  508. MII_88E1318S_PHY_MSCR1_REG,
  509. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  510. if (err < 0)
  511. return err;
  512. return m88e1121_config_aneg(phydev);
  513. }
  514. /**
  515. * linkmode_adv_to_fiber_adv_t
  516. * @advertise: the linkmode advertisement settings
  517. *
  518. * A small helper function that translates linkmode advertisement
  519. * settings to phy autonegotiation advertisements for the MII_ADV
  520. * register for fiber link.
  521. */
  522. static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
  523. {
  524. u32 result = 0;
  525. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
  526. result |= ADVERTISE_1000XHALF;
  527. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
  528. result |= ADVERTISE_1000XFULL;
  529. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
  530. linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  531. result |= ADVERTISE_1000XPSE_ASYM;
  532. else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  533. result |= ADVERTISE_1000XPAUSE;
  534. return result;
  535. }
  536. /**
  537. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  538. * @phydev: target phy_device struct
  539. *
  540. * Description: If auto-negotiation is enabled, we configure the
  541. * advertising, and then restart auto-negotiation. If it is not
  542. * enabled, then we write the BMCR. Adapted for fiber link in
  543. * some Marvell's devices.
  544. */
  545. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  546. {
  547. int changed = 0;
  548. int err;
  549. u16 adv;
  550. if (phydev->autoneg != AUTONEG_ENABLE)
  551. return genphy_setup_forced(phydev);
  552. /* Only allow advertising what this PHY supports */
  553. linkmode_and(phydev->advertising, phydev->advertising,
  554. phydev->supported);
  555. adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
  556. /* Setup fiber advertisement */
  557. err = phy_modify_changed(phydev, MII_ADVERTISE,
  558. ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
  559. ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
  560. adv);
  561. if (err < 0)
  562. return err;
  563. if (err > 0)
  564. changed = 1;
  565. return genphy_check_and_restart_aneg(phydev, changed);
  566. }
  567. static int m88e1111_config_aneg(struct phy_device *phydev)
  568. {
  569. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  570. int err;
  571. if (extsr < 0)
  572. return extsr;
  573. /* If not using SGMII or copper 1000BaseX modes, use normal process.
  574. * Steps below are only required for these modes.
  575. */
  576. if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
  577. (extsr & MII_M1111_HWCFG_MODE_MASK) !=
  578. MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
  579. return marvell_config_aneg(phydev);
  580. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  581. if (err < 0)
  582. goto error;
  583. /* Configure the copper link first */
  584. err = marvell_config_aneg(phydev);
  585. if (err < 0)
  586. goto error;
  587. /* Then the fiber link */
  588. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  589. if (err < 0)
  590. goto error;
  591. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  592. /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
  593. * Just ensure that SGMII-side autonegotiation is enabled.
  594. * If we switched from some other mode to SGMII it may not be.
  595. */
  596. err = genphy_check_and_restart_aneg(phydev, false);
  597. else
  598. err = marvell_config_aneg_fiber(phydev);
  599. if (err < 0)
  600. goto error;
  601. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  602. error:
  603. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  604. return err;
  605. }
  606. static int m88e1510_config_aneg(struct phy_device *phydev)
  607. {
  608. int err;
  609. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  610. if (err < 0)
  611. goto error;
  612. /* Configure the copper link first */
  613. err = m88e1318_config_aneg(phydev);
  614. if (err < 0)
  615. goto error;
  616. /* Do not touch the fiber page if we're in copper->sgmii mode */
  617. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  618. return 0;
  619. /* Then the fiber link */
  620. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  621. if (err < 0)
  622. goto error;
  623. err = marvell_config_aneg_fiber(phydev);
  624. if (err < 0)
  625. goto error;
  626. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  627. error:
  628. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  629. return err;
  630. }
  631. static void marvell_config_led(struct phy_device *phydev)
  632. {
  633. u16 def_config;
  634. int err;
  635. switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
  636. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  637. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
  638. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
  639. def_config = MII_88E1121_PHY_LED_DEF;
  640. break;
  641. /* Default PHY LED config:
  642. * LED[0] .. 1000Mbps Link
  643. * LED[1] .. 100Mbps Link
  644. * LED[2] .. Blink, Activity
  645. */
  646. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
  647. if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
  648. def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
  649. else
  650. def_config = MII_88E1510_PHY_LED_DEF;
  651. break;
  652. default:
  653. return;
  654. }
  655. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
  656. def_config);
  657. if (err < 0)
  658. phydev_warn(phydev, "Fail to config marvell phy LED.\n");
  659. }
  660. static int marvell_config_init(struct phy_device *phydev)
  661. {
  662. /* Set default LED */
  663. marvell_config_led(phydev);
  664. /* Set registers from marvell,reg-init DT property */
  665. return marvell_of_reg_init(phydev);
  666. }
  667. static int m88e3016_config_init(struct phy_device *phydev)
  668. {
  669. int ret;
  670. /* Enable Scrambler and Auto-Crossover */
  671. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  672. MII_88E3016_DISABLE_SCRAMBLER,
  673. MII_88E3016_AUTO_MDIX_CROSSOVER);
  674. if (ret < 0)
  675. return ret;
  676. return marvell_config_init(phydev);
  677. }
  678. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  679. u16 mode,
  680. int fibre_copper_auto)
  681. {
  682. if (fibre_copper_auto)
  683. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  684. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  685. MII_M1111_HWCFG_MODE_MASK |
  686. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  687. MII_M1111_HWCFG_FIBER_COPPER_RES,
  688. mode);
  689. }
  690. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  691. {
  692. int delay;
  693. switch (phydev->interface) {
  694. case PHY_INTERFACE_MODE_RGMII_ID:
  695. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  696. break;
  697. case PHY_INTERFACE_MODE_RGMII_RXID:
  698. delay = MII_M1111_RGMII_RX_DELAY;
  699. break;
  700. case PHY_INTERFACE_MODE_RGMII_TXID:
  701. delay = MII_M1111_RGMII_TX_DELAY;
  702. break;
  703. default:
  704. delay = 0;
  705. break;
  706. }
  707. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  708. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  709. delay);
  710. }
  711. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  712. {
  713. int temp;
  714. int err;
  715. err = m88e1111_config_init_rgmii_delays(phydev);
  716. if (err < 0)
  717. return err;
  718. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  719. if (temp < 0)
  720. return temp;
  721. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  722. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  723. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  724. else
  725. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  726. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  727. }
  728. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  729. {
  730. int err;
  731. err = m88e1111_config_init_hwcfg_mode(
  732. phydev,
  733. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  734. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  735. if (err < 0)
  736. return err;
  737. /* make sure copper is selected */
  738. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  739. }
  740. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  741. {
  742. int err;
  743. err = m88e1111_config_init_rgmii_delays(phydev);
  744. if (err < 0)
  745. return err;
  746. err = m88e1111_config_init_hwcfg_mode(
  747. phydev,
  748. MII_M1111_HWCFG_MODE_RTBI,
  749. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  750. if (err < 0)
  751. return err;
  752. /* soft reset */
  753. err = genphy_soft_reset(phydev);
  754. if (err < 0)
  755. return err;
  756. return m88e1111_config_init_hwcfg_mode(
  757. phydev,
  758. MII_M1111_HWCFG_MODE_RTBI,
  759. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  760. }
  761. static int m88e1111_config_init_1000basex(struct phy_device *phydev)
  762. {
  763. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  764. int err, mode;
  765. if (extsr < 0)
  766. return extsr;
  767. /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
  768. mode = extsr & MII_M1111_HWCFG_MODE_MASK;
  769. if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
  770. err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  771. MII_M1111_HWCFG_MODE_MASK |
  772. MII_M1111_HWCFG_SERIAL_AN_BYPASS,
  773. MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
  774. MII_M1111_HWCFG_SERIAL_AN_BYPASS);
  775. if (err < 0)
  776. return err;
  777. }
  778. return 0;
  779. }
  780. static int m88e1111_config_init(struct phy_device *phydev)
  781. {
  782. int err;
  783. if (phy_interface_is_rgmii(phydev)) {
  784. err = m88e1111_config_init_rgmii(phydev);
  785. if (err < 0)
  786. return err;
  787. }
  788. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  789. err = m88e1111_config_init_sgmii(phydev);
  790. if (err < 0)
  791. return err;
  792. }
  793. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  794. err = m88e1111_config_init_rtbi(phydev);
  795. if (err < 0)
  796. return err;
  797. }
  798. if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
  799. err = m88e1111_config_init_1000basex(phydev);
  800. if (err < 0)
  801. return err;
  802. }
  803. err = marvell_of_reg_init(phydev);
  804. if (err < 0)
  805. return err;
  806. err = genphy_soft_reset(phydev);
  807. if (err < 0)
  808. return err;
  809. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  810. /* If the HWCFG_MODE was changed from another mode (such as
  811. * 1000BaseX) to SGMII, the state of the support bits may have
  812. * also changed now that the PHY has been reset.
  813. * Update the PHY abilities accordingly.
  814. */
  815. err = genphy_read_abilities(phydev);
  816. linkmode_or(phydev->advertising, phydev->advertising,
  817. phydev->supported);
  818. }
  819. return err;
  820. }
  821. static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
  822. {
  823. int val, cnt, enable;
  824. val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  825. if (val < 0)
  826. return val;
  827. enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
  828. cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
  829. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  830. return 0;
  831. }
  832. static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
  833. {
  834. int val, err;
  835. if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
  836. return -E2BIG;
  837. if (!cnt) {
  838. err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
  839. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
  840. } else {
  841. val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
  842. val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
  843. err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  844. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
  845. MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
  846. val);
  847. }
  848. if (err < 0)
  849. return err;
  850. return genphy_soft_reset(phydev);
  851. }
  852. static int m88e1111_get_tunable(struct phy_device *phydev,
  853. struct ethtool_tunable *tuna, void *data)
  854. {
  855. switch (tuna->id) {
  856. case ETHTOOL_PHY_DOWNSHIFT:
  857. return m88e1111_get_downshift(phydev, data);
  858. default:
  859. return -EOPNOTSUPP;
  860. }
  861. }
  862. static int m88e1111_set_tunable(struct phy_device *phydev,
  863. struct ethtool_tunable *tuna, const void *data)
  864. {
  865. switch (tuna->id) {
  866. case ETHTOOL_PHY_DOWNSHIFT:
  867. return m88e1111_set_downshift(phydev, *(const u8 *)data);
  868. default:
  869. return -EOPNOTSUPP;
  870. }
  871. }
  872. static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
  873. {
  874. int val, cnt, enable;
  875. val = phy_read(phydev, MII_M1011_PHY_SCR);
  876. if (val < 0)
  877. return val;
  878. enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
  879. cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
  880. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  881. return 0;
  882. }
  883. static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
  884. {
  885. int val, err;
  886. if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
  887. return -E2BIG;
  888. if (!cnt) {
  889. err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
  890. MII_M1011_PHY_SCR_DOWNSHIFT_EN);
  891. } else {
  892. val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  893. val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
  894. err = phy_modify(phydev, MII_M1011_PHY_SCR,
  895. MII_M1011_PHY_SCR_DOWNSHIFT_EN |
  896. MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
  897. val);
  898. }
  899. if (err < 0)
  900. return err;
  901. return genphy_soft_reset(phydev);
  902. }
  903. static int m88e1011_get_tunable(struct phy_device *phydev,
  904. struct ethtool_tunable *tuna, void *data)
  905. {
  906. switch (tuna->id) {
  907. case ETHTOOL_PHY_DOWNSHIFT:
  908. return m88e1011_get_downshift(phydev, data);
  909. default:
  910. return -EOPNOTSUPP;
  911. }
  912. }
  913. static int m88e1011_set_tunable(struct phy_device *phydev,
  914. struct ethtool_tunable *tuna, const void *data)
  915. {
  916. switch (tuna->id) {
  917. case ETHTOOL_PHY_DOWNSHIFT:
  918. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  919. default:
  920. return -EOPNOTSUPP;
  921. }
  922. }
  923. static int m88e1112_config_init(struct phy_device *phydev)
  924. {
  925. int err;
  926. err = m88e1011_set_downshift(phydev, 3);
  927. if (err < 0)
  928. return err;
  929. return m88e1111_config_init(phydev);
  930. }
  931. static int m88e1111gbe_config_init(struct phy_device *phydev)
  932. {
  933. int err;
  934. err = m88e1111_set_downshift(phydev, 3);
  935. if (err < 0)
  936. return err;
  937. return m88e1111_config_init(phydev);
  938. }
  939. static int marvell_1011gbe_config_init(struct phy_device *phydev)
  940. {
  941. int err;
  942. err = m88e1011_set_downshift(phydev, 3);
  943. if (err < 0)
  944. return err;
  945. return marvell_config_init(phydev);
  946. }
  947. static int m88e1116r_config_init(struct phy_device *phydev)
  948. {
  949. int err;
  950. err = genphy_soft_reset(phydev);
  951. if (err < 0)
  952. return err;
  953. msleep(500);
  954. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  955. if (err < 0)
  956. return err;
  957. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  958. if (err < 0)
  959. return err;
  960. err = m88e1011_set_downshift(phydev, 8);
  961. if (err < 0)
  962. return err;
  963. if (phy_interface_is_rgmii(phydev)) {
  964. err = m88e1121_config_aneg_rgmii_delays(phydev);
  965. if (err < 0)
  966. return err;
  967. }
  968. err = genphy_soft_reset(phydev);
  969. if (err < 0)
  970. return err;
  971. return marvell_config_init(phydev);
  972. }
  973. static int m88e1318_config_init(struct phy_device *phydev)
  974. {
  975. if (phy_interrupt_is_valid(phydev)) {
  976. int err = phy_modify_paged(
  977. phydev, MII_MARVELL_LED_PAGE,
  978. MII_88E1318S_PHY_LED_TCR,
  979. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  980. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  981. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  982. if (err < 0)
  983. return err;
  984. }
  985. return marvell_config_init(phydev);
  986. }
  987. static int m88e1510_config_init(struct phy_device *phydev)
  988. {
  989. static const struct {
  990. u16 reg17, reg16;
  991. } errata_vals[] = {
  992. { 0x214b, 0x2144 },
  993. { 0x0c28, 0x2146 },
  994. { 0xb233, 0x214d },
  995. { 0xcc0c, 0x2159 },
  996. };
  997. int err;
  998. int i;
  999. /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
  1000. * 88E1514 Rev A0, Errata Section 5.1:
  1001. * If EEE is intended to be used, the following register writes
  1002. * must be done once after every hardware reset.
  1003. */
  1004. err = marvell_set_page(phydev, 0x00FF);
  1005. if (err < 0)
  1006. return err;
  1007. for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
  1008. err = phy_write(phydev, 17, errata_vals[i].reg17);
  1009. if (err)
  1010. return err;
  1011. err = phy_write(phydev, 16, errata_vals[i].reg16);
  1012. if (err)
  1013. return err;
  1014. }
  1015. err = marvell_set_page(phydev, 0x00FB);
  1016. if (err < 0)
  1017. return err;
  1018. err = phy_write(phydev, 07, 0xC00D);
  1019. if (err < 0)
  1020. return err;
  1021. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1022. if (err < 0)
  1023. return err;
  1024. /* SGMII-to-Copper mode initialization */
  1025. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1026. /* Select page 18 */
  1027. err = marvell_set_page(phydev, 18);
  1028. if (err < 0)
  1029. return err;
  1030. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  1031. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1032. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  1033. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  1034. if (err < 0)
  1035. return err;
  1036. /* PHY reset is necessary after changing MODE[2:0] */
  1037. err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1038. MII_88E1510_GEN_CTRL_REG_1_RESET);
  1039. if (err < 0)
  1040. return err;
  1041. /* Reset page selection */
  1042. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1043. if (err < 0)
  1044. return err;
  1045. }
  1046. err = m88e1011_set_downshift(phydev, 3);
  1047. if (err < 0)
  1048. return err;
  1049. return m88e1318_config_init(phydev);
  1050. }
  1051. static int m88e1118_config_aneg(struct phy_device *phydev)
  1052. {
  1053. int err;
  1054. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  1055. if (err < 0)
  1056. return err;
  1057. err = genphy_config_aneg(phydev);
  1058. if (err < 0)
  1059. return err;
  1060. return genphy_soft_reset(phydev);
  1061. }
  1062. static int m88e1118_config_init(struct phy_device *phydev)
  1063. {
  1064. u16 leds;
  1065. int err;
  1066. /* Enable 1000 Mbit */
  1067. err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1068. MII_88E1121_PHY_MSCR_REG, 0x1070);
  1069. if (err < 0)
  1070. return err;
  1071. if (phy_interface_is_rgmii(phydev)) {
  1072. err = m88e1121_config_aneg_rgmii_delays(phydev);
  1073. if (err < 0)
  1074. return err;
  1075. }
  1076. /* Adjust LED Control */
  1077. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  1078. leds = 0x1100;
  1079. else
  1080. leds = 0x021e;
  1081. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
  1082. if (err < 0)
  1083. return err;
  1084. err = marvell_of_reg_init(phydev);
  1085. if (err < 0)
  1086. return err;
  1087. /* Reset page register */
  1088. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1089. if (err < 0)
  1090. return err;
  1091. return genphy_soft_reset(phydev);
  1092. }
  1093. static int m88e1149_config_init(struct phy_device *phydev)
  1094. {
  1095. int err;
  1096. /* Change address */
  1097. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  1098. if (err < 0)
  1099. return err;
  1100. /* Enable 1000 Mbit */
  1101. err = phy_write(phydev, 0x15, 0x1048);
  1102. if (err < 0)
  1103. return err;
  1104. err = marvell_of_reg_init(phydev);
  1105. if (err < 0)
  1106. return err;
  1107. /* Reset address */
  1108. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1109. if (err < 0)
  1110. return err;
  1111. return genphy_soft_reset(phydev);
  1112. }
  1113. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  1114. {
  1115. int err;
  1116. err = m88e1111_config_init_rgmii_delays(phydev);
  1117. if (err < 0)
  1118. return err;
  1119. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  1120. err = phy_write(phydev, 0x1d, 0x0012);
  1121. if (err < 0)
  1122. return err;
  1123. err = phy_modify(phydev, 0x1e, 0x0fc0,
  1124. 2 << 9 | /* 36 ohm */
  1125. 2 << 6); /* 39 ohm */
  1126. if (err < 0)
  1127. return err;
  1128. err = phy_write(phydev, 0x1d, 0x3);
  1129. if (err < 0)
  1130. return err;
  1131. err = phy_write(phydev, 0x1e, 0x8000);
  1132. }
  1133. return err;
  1134. }
  1135. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  1136. {
  1137. return m88e1111_config_init_hwcfg_mode(
  1138. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  1139. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  1140. }
  1141. static int m88e1145_config_init(struct phy_device *phydev)
  1142. {
  1143. int err;
  1144. /* Take care of errata E0 & E1 */
  1145. err = phy_write(phydev, 0x1d, 0x001b);
  1146. if (err < 0)
  1147. return err;
  1148. err = phy_write(phydev, 0x1e, 0x418f);
  1149. if (err < 0)
  1150. return err;
  1151. err = phy_write(phydev, 0x1d, 0x0016);
  1152. if (err < 0)
  1153. return err;
  1154. err = phy_write(phydev, 0x1e, 0xa2da);
  1155. if (err < 0)
  1156. return err;
  1157. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  1158. err = m88e1145_config_init_rgmii(phydev);
  1159. if (err < 0)
  1160. return err;
  1161. }
  1162. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1163. err = m88e1145_config_init_sgmii(phydev);
  1164. if (err < 0)
  1165. return err;
  1166. }
  1167. err = m88e1111_set_downshift(phydev, 3);
  1168. if (err < 0)
  1169. return err;
  1170. err = marvell_of_reg_init(phydev);
  1171. if (err < 0)
  1172. return err;
  1173. return 0;
  1174. }
  1175. static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
  1176. {
  1177. int val;
  1178. val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
  1179. if (val < 0)
  1180. return val;
  1181. if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
  1182. *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
  1183. return 0;
  1184. }
  1185. val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1186. switch (val) {
  1187. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
  1188. *msecs = 0;
  1189. break;
  1190. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
  1191. *msecs = 10;
  1192. break;
  1193. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
  1194. *msecs = 20;
  1195. break;
  1196. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
  1197. *msecs = 40;
  1198. break;
  1199. default:
  1200. return -EINVAL;
  1201. }
  1202. return 0;
  1203. }
  1204. static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
  1205. {
  1206. struct ethtool_eee eee;
  1207. int val, ret;
  1208. if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
  1209. return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1210. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1211. /* According to the Marvell data sheet EEE must be disabled for
  1212. * Fast Link Down detection to work properly
  1213. */
  1214. ret = phy_ethtool_get_eee(phydev, &eee);
  1215. if (!ret && eee.eee_enabled) {
  1216. phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
  1217. return -EBUSY;
  1218. }
  1219. if (*msecs <= 5)
  1220. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
  1221. else if (*msecs <= 15)
  1222. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
  1223. else if (*msecs <= 30)
  1224. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
  1225. else
  1226. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
  1227. val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1228. ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
  1229. MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1230. if (ret)
  1231. return ret;
  1232. return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1233. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1234. }
  1235. static int m88e1540_get_tunable(struct phy_device *phydev,
  1236. struct ethtool_tunable *tuna, void *data)
  1237. {
  1238. switch (tuna->id) {
  1239. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1240. return m88e1540_get_fld(phydev, data);
  1241. case ETHTOOL_PHY_DOWNSHIFT:
  1242. return m88e1011_get_downshift(phydev, data);
  1243. default:
  1244. return -EOPNOTSUPP;
  1245. }
  1246. }
  1247. static int m88e1540_set_tunable(struct phy_device *phydev,
  1248. struct ethtool_tunable *tuna, const void *data)
  1249. {
  1250. switch (tuna->id) {
  1251. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1252. return m88e1540_set_fld(phydev, data);
  1253. case ETHTOOL_PHY_DOWNSHIFT:
  1254. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  1255. default:
  1256. return -EOPNOTSUPP;
  1257. }
  1258. }
  1259. /* The VOD can be out of specification on link up. Poke an
  1260. * undocumented register, in an undocumented page, with a magic value
  1261. * to fix this.
  1262. */
  1263. static int m88e6390_errata(struct phy_device *phydev)
  1264. {
  1265. int err;
  1266. err = phy_write(phydev, MII_BMCR,
  1267. BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
  1268. if (err)
  1269. return err;
  1270. usleep_range(300, 400);
  1271. err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
  1272. if (err)
  1273. return err;
  1274. return genphy_soft_reset(phydev);
  1275. }
  1276. static int m88e6390_config_aneg(struct phy_device *phydev)
  1277. {
  1278. int err;
  1279. err = m88e6390_errata(phydev);
  1280. if (err)
  1281. return err;
  1282. return m88e1510_config_aneg(phydev);
  1283. }
  1284. /**
  1285. * fiber_lpa_mod_linkmode_lpa_t
  1286. * @advertising: the linkmode advertisement settings
  1287. * @lpa: value of the MII_LPA register for fiber link
  1288. *
  1289. * A small helper function that translates MII_LPA bits to linkmode LP
  1290. * advertisement settings. Other bits in advertising are left
  1291. * unchanged.
  1292. */
  1293. static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
  1294. {
  1295. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
  1296. advertising, lpa & LPA_1000XHALF);
  1297. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
  1298. advertising, lpa & LPA_1000XFULL);
  1299. }
  1300. static int marvell_read_status_page_an(struct phy_device *phydev,
  1301. int fiber, int status)
  1302. {
  1303. int lpa;
  1304. int err;
  1305. if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
  1306. phydev->link = 0;
  1307. return 0;
  1308. }
  1309. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  1310. phydev->duplex = DUPLEX_FULL;
  1311. else
  1312. phydev->duplex = DUPLEX_HALF;
  1313. switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
  1314. case MII_M1011_PHY_STATUS_1000:
  1315. phydev->speed = SPEED_1000;
  1316. break;
  1317. case MII_M1011_PHY_STATUS_100:
  1318. phydev->speed = SPEED_100;
  1319. break;
  1320. default:
  1321. phydev->speed = SPEED_10;
  1322. break;
  1323. }
  1324. if (!fiber) {
  1325. err = genphy_read_lpa(phydev);
  1326. if (err < 0)
  1327. return err;
  1328. phy_resolve_aneg_pause(phydev);
  1329. } else {
  1330. lpa = phy_read(phydev, MII_LPA);
  1331. if (lpa < 0)
  1332. return lpa;
  1333. /* The fiber link is only 1000M capable */
  1334. fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
  1335. if (phydev->duplex == DUPLEX_FULL) {
  1336. if (!(lpa & LPA_PAUSE_FIBER)) {
  1337. phydev->pause = 0;
  1338. phydev->asym_pause = 0;
  1339. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  1340. phydev->pause = 1;
  1341. phydev->asym_pause = 1;
  1342. } else {
  1343. phydev->pause = 1;
  1344. phydev->asym_pause = 0;
  1345. }
  1346. }
  1347. }
  1348. return 0;
  1349. }
  1350. /* marvell_read_status_page
  1351. *
  1352. * Description:
  1353. * Check the link, then figure out the current state
  1354. * by comparing what we advertise with what the link partner
  1355. * advertises. Start by checking the gigabit possibilities,
  1356. * then move on to 10/100.
  1357. */
  1358. static int marvell_read_status_page(struct phy_device *phydev, int page)
  1359. {
  1360. int status;
  1361. int fiber;
  1362. int err;
  1363. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  1364. if (status < 0)
  1365. return status;
  1366. /* Use the generic register for copper link status,
  1367. * and the PHY status register for fiber link status.
  1368. */
  1369. if (page == MII_MARVELL_FIBER_PAGE) {
  1370. phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
  1371. } else {
  1372. err = genphy_update_link(phydev);
  1373. if (err)
  1374. return err;
  1375. }
  1376. if (page == MII_MARVELL_FIBER_PAGE)
  1377. fiber = 1;
  1378. else
  1379. fiber = 0;
  1380. linkmode_zero(phydev->lp_advertising);
  1381. phydev->pause = 0;
  1382. phydev->asym_pause = 0;
  1383. phydev->speed = SPEED_UNKNOWN;
  1384. phydev->duplex = DUPLEX_UNKNOWN;
  1385. phydev->port = fiber ? PORT_FIBRE : PORT_TP;
  1386. if (phydev->autoneg == AUTONEG_ENABLE)
  1387. err = marvell_read_status_page_an(phydev, fiber, status);
  1388. else
  1389. err = genphy_read_status_fixed(phydev);
  1390. return err;
  1391. }
  1392. /* marvell_read_status
  1393. *
  1394. * Some Marvell's phys have two modes: fiber and copper.
  1395. * Both need status checked.
  1396. * Description:
  1397. * First, check the fiber link and status.
  1398. * If the fiber link is down, check the copper link and status which
  1399. * will be the default value if both link are down.
  1400. */
  1401. static int marvell_read_status(struct phy_device *phydev)
  1402. {
  1403. int err;
  1404. /* Check the fiber mode first */
  1405. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1406. phydev->supported) &&
  1407. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1408. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1409. if (err < 0)
  1410. goto error;
  1411. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1412. if (err < 0)
  1413. goto error;
  1414. /* If the fiber link is up, it is the selected and
  1415. * used link. In this case, we need to stay in the
  1416. * fiber page. Please to be careful about that, avoid
  1417. * to restore Copper page in other functions which
  1418. * could break the behaviour for some fiber phy like
  1419. * 88E1512.
  1420. */
  1421. if (phydev->link)
  1422. return 0;
  1423. /* If fiber link is down, check and save copper mode state */
  1424. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1425. if (err < 0)
  1426. goto error;
  1427. }
  1428. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1429. error:
  1430. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1431. return err;
  1432. }
  1433. /* marvell_suspend
  1434. *
  1435. * Some Marvell's phys have two modes: fiber and copper.
  1436. * Both need to be suspended
  1437. */
  1438. static int marvell_suspend(struct phy_device *phydev)
  1439. {
  1440. int err;
  1441. /* Suspend the fiber mode first */
  1442. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1443. phydev->supported)) {
  1444. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1445. if (err < 0)
  1446. goto error;
  1447. /* With the page set, use the generic suspend */
  1448. err = genphy_suspend(phydev);
  1449. if (err < 0)
  1450. goto error;
  1451. /* Then, the copper link */
  1452. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1453. if (err < 0)
  1454. goto error;
  1455. }
  1456. /* With the page set, use the generic suspend */
  1457. return genphy_suspend(phydev);
  1458. error:
  1459. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1460. return err;
  1461. }
  1462. /* marvell_resume
  1463. *
  1464. * Some Marvell's phys have two modes: fiber and copper.
  1465. * Both need to be resumed
  1466. */
  1467. static int marvell_resume(struct phy_device *phydev)
  1468. {
  1469. int err;
  1470. /* Resume the fiber mode first */
  1471. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1472. phydev->supported)) {
  1473. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1474. if (err < 0)
  1475. goto error;
  1476. /* With the page set, use the generic resume */
  1477. err = genphy_resume(phydev);
  1478. if (err < 0)
  1479. goto error;
  1480. /* Then, the copper link */
  1481. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1482. if (err < 0)
  1483. goto error;
  1484. }
  1485. /* With the page set, use the generic resume */
  1486. return genphy_resume(phydev);
  1487. error:
  1488. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1489. return err;
  1490. }
  1491. static int marvell_aneg_done(struct phy_device *phydev)
  1492. {
  1493. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1494. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1495. }
  1496. static void m88e1318_get_wol(struct phy_device *phydev,
  1497. struct ethtool_wolinfo *wol)
  1498. {
  1499. int ret;
  1500. wol->supported = WAKE_MAGIC | WAKE_PHY;
  1501. wol->wolopts = 0;
  1502. ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
  1503. MII_88E1318S_PHY_WOL_CTRL);
  1504. if (ret < 0)
  1505. return;
  1506. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1507. wol->wolopts |= WAKE_MAGIC;
  1508. if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
  1509. wol->wolopts |= WAKE_PHY;
  1510. }
  1511. static int m88e1318_set_wol(struct phy_device *phydev,
  1512. struct ethtool_wolinfo *wol)
  1513. {
  1514. int err = 0, oldpage;
  1515. oldpage = phy_save_page(phydev);
  1516. if (oldpage < 0)
  1517. goto error;
  1518. if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
  1519. /* Explicitly switch to page 0x00, just to be sure */
  1520. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1521. if (err < 0)
  1522. goto error;
  1523. /* If WOL event happened once, the LED[2] interrupt pin
  1524. * will not be cleared unless we reading the interrupt status
  1525. * register. If interrupts are in use, the normal interrupt
  1526. * handling will clear the WOL event. Clear the WOL event
  1527. * before enabling it if !phy_interrupt_is_valid()
  1528. */
  1529. if (!phy_interrupt_is_valid(phydev))
  1530. __phy_read(phydev, MII_M1011_IEVENT);
  1531. /* Enable the WOL interrupt */
  1532. err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
  1533. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1534. if (err < 0)
  1535. goto error;
  1536. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1537. if (err < 0)
  1538. goto error;
  1539. /* Setup LED[2] as interrupt pin (active low) */
  1540. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1541. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1542. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1543. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1544. if (err < 0)
  1545. goto error;
  1546. }
  1547. if (wol->wolopts & WAKE_MAGIC) {
  1548. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1549. if (err < 0)
  1550. goto error;
  1551. /* Store the device address for the magic packet */
  1552. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1553. ((phydev->attached_dev->dev_addr[5] << 8) |
  1554. phydev->attached_dev->dev_addr[4]));
  1555. if (err < 0)
  1556. goto error;
  1557. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1558. ((phydev->attached_dev->dev_addr[3] << 8) |
  1559. phydev->attached_dev->dev_addr[2]));
  1560. if (err < 0)
  1561. goto error;
  1562. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1563. ((phydev->attached_dev->dev_addr[1] << 8) |
  1564. phydev->attached_dev->dev_addr[0]));
  1565. if (err < 0)
  1566. goto error;
  1567. /* Clear WOL status and enable magic packet matching */
  1568. err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1569. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1570. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1571. if (err < 0)
  1572. goto error;
  1573. } else {
  1574. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1575. if (err < 0)
  1576. goto error;
  1577. /* Clear WOL status and disable magic packet matching */
  1578. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1579. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1580. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1581. if (err < 0)
  1582. goto error;
  1583. }
  1584. if (wol->wolopts & WAKE_PHY) {
  1585. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1586. if (err < 0)
  1587. goto error;
  1588. /* Clear WOL status and enable link up event */
  1589. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1590. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1591. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
  1592. if (err < 0)
  1593. goto error;
  1594. } else {
  1595. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1596. if (err < 0)
  1597. goto error;
  1598. /* Clear WOL status and disable link up event */
  1599. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1600. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
  1601. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1602. if (err < 0)
  1603. goto error;
  1604. }
  1605. error:
  1606. return phy_restore_page(phydev, oldpage, err);
  1607. }
  1608. static int marvell_get_sset_count(struct phy_device *phydev)
  1609. {
  1610. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1611. phydev->supported))
  1612. return ARRAY_SIZE(marvell_hw_stats);
  1613. else
  1614. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1615. }
  1616. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1617. {
  1618. int count = marvell_get_sset_count(phydev);
  1619. int i;
  1620. for (i = 0; i < count; i++) {
  1621. strscpy(data + i * ETH_GSTRING_LEN,
  1622. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1623. }
  1624. }
  1625. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1626. {
  1627. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1628. struct marvell_priv *priv = phydev->priv;
  1629. int val;
  1630. u64 ret;
  1631. val = phy_read_paged(phydev, stat.page, stat.reg);
  1632. if (val < 0) {
  1633. ret = U64_MAX;
  1634. } else {
  1635. val = val & ((1 << stat.bits) - 1);
  1636. priv->stats[i] += val;
  1637. ret = priv->stats[i];
  1638. }
  1639. return ret;
  1640. }
  1641. static void marvell_get_stats(struct phy_device *phydev,
  1642. struct ethtool_stats *stats, u64 *data)
  1643. {
  1644. int count = marvell_get_sset_count(phydev);
  1645. int i;
  1646. for (i = 0; i < count; i++)
  1647. data[i] = marvell_get_stat(phydev, i);
  1648. }
  1649. static int m88e1510_loopback(struct phy_device *phydev, bool enable)
  1650. {
  1651. int err;
  1652. if (enable) {
  1653. u16 bmcr_ctl, mscr2_ctl = 0;
  1654. bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
  1655. err = phy_write(phydev, MII_BMCR, bmcr_ctl);
  1656. if (err < 0)
  1657. return err;
  1658. if (phydev->speed == SPEED_1000)
  1659. mscr2_ctl = BMCR_SPEED1000;
  1660. else if (phydev->speed == SPEED_100)
  1661. mscr2_ctl = BMCR_SPEED100;
  1662. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1663. MII_88E1510_MSCR_2, BMCR_SPEED1000 |
  1664. BMCR_SPEED100, mscr2_ctl);
  1665. if (err < 0)
  1666. return err;
  1667. /* Need soft reset to have speed configuration takes effect */
  1668. err = genphy_soft_reset(phydev);
  1669. if (err < 0)
  1670. return err;
  1671. err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
  1672. BMCR_LOOPBACK);
  1673. if (!err) {
  1674. /* It takes some time for PHY device to switch
  1675. * into/out-of loopback mode.
  1676. */
  1677. msleep(1000);
  1678. }
  1679. return err;
  1680. } else {
  1681. err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
  1682. if (err < 0)
  1683. return err;
  1684. return phy_config_aneg(phydev);
  1685. }
  1686. }
  1687. static int marvell_vct5_wait_complete(struct phy_device *phydev)
  1688. {
  1689. int i;
  1690. int val;
  1691. for (i = 0; i < 32; i++) {
  1692. val = __phy_read(phydev, MII_VCT5_CTRL);
  1693. if (val < 0)
  1694. return val;
  1695. if (val & MII_VCT5_CTRL_COMPLETE)
  1696. return 0;
  1697. }
  1698. phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
  1699. return -ETIMEDOUT;
  1700. }
  1701. static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
  1702. {
  1703. int amplitude;
  1704. int val;
  1705. int reg;
  1706. reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
  1707. val = __phy_read(phydev, reg);
  1708. if (val < 0)
  1709. return 0;
  1710. amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
  1711. MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
  1712. if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
  1713. amplitude = -amplitude;
  1714. return 1000 * amplitude / 128;
  1715. }
  1716. static u32 marvell_vct5_distance2cm(int distance)
  1717. {
  1718. return distance * 805 / 10;
  1719. }
  1720. static u32 marvell_vct5_cm2distance(int cm)
  1721. {
  1722. return cm * 10 / 805;
  1723. }
  1724. static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
  1725. int distance, int pair)
  1726. {
  1727. u16 reg;
  1728. int err;
  1729. int mV;
  1730. int i;
  1731. err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
  1732. distance);
  1733. if (err)
  1734. return err;
  1735. reg = MII_VCT5_CTRL_ENABLE |
  1736. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1737. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1738. MII_VCT5_CTRL_SAMPLE_POINT |
  1739. MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
  1740. err = __phy_write(phydev, MII_VCT5_CTRL, reg);
  1741. if (err)
  1742. return err;
  1743. err = marvell_vct5_wait_complete(phydev);
  1744. if (err)
  1745. return err;
  1746. for (i = 0; i < 4; i++) {
  1747. if (pair != PHY_PAIR_ALL && i != pair)
  1748. continue;
  1749. mV = marvell_vct5_amplitude(phydev, i);
  1750. ethnl_cable_test_amplitude(phydev, i, mV);
  1751. }
  1752. return 0;
  1753. }
  1754. static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
  1755. {
  1756. struct marvell_priv *priv = phydev->priv;
  1757. int distance;
  1758. u16 width;
  1759. int page;
  1760. int err;
  1761. u16 reg;
  1762. if (priv->first <= TDR_SHORT_CABLE_LENGTH)
  1763. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
  1764. else
  1765. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1766. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1767. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1768. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1769. err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1770. MII_VCT5_TX_PULSE_CTRL, reg);
  1771. if (err)
  1772. return err;
  1773. /* Reading the TDR data is very MDIO heavy. We need to optimize
  1774. * access to keep the time to a minimum. So lock the bus once,
  1775. * and don't release it until complete. We can then avoid having
  1776. * to change the page for every access, greatly speeding things
  1777. * up.
  1778. */
  1779. page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
  1780. if (page < 0)
  1781. goto restore_page;
  1782. for (distance = priv->first;
  1783. distance <= priv->last;
  1784. distance += priv->step) {
  1785. err = marvell_vct5_amplitude_distance(phydev, distance,
  1786. priv->pair);
  1787. if (err)
  1788. goto restore_page;
  1789. if (distance > TDR_SHORT_CABLE_LENGTH &&
  1790. width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
  1791. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1792. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1793. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1794. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1795. err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
  1796. if (err)
  1797. goto restore_page;
  1798. }
  1799. }
  1800. restore_page:
  1801. return phy_restore_page(phydev, page, err);
  1802. }
  1803. static int marvell_cable_test_start_common(struct phy_device *phydev)
  1804. {
  1805. int bmcr, bmsr, ret;
  1806. /* If auto-negotiation is enabled, but not complete, the cable
  1807. * test never completes. So disable auto-neg.
  1808. */
  1809. bmcr = phy_read(phydev, MII_BMCR);
  1810. if (bmcr < 0)
  1811. return bmcr;
  1812. bmsr = phy_read(phydev, MII_BMSR);
  1813. if (bmsr < 0)
  1814. return bmsr;
  1815. if (bmcr & BMCR_ANENABLE) {
  1816. ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
  1817. if (ret < 0)
  1818. return ret;
  1819. ret = genphy_soft_reset(phydev);
  1820. if (ret < 0)
  1821. return ret;
  1822. }
  1823. /* If the link is up, allow it some time to go down */
  1824. if (bmsr & BMSR_LSTATUS)
  1825. msleep(1500);
  1826. return 0;
  1827. }
  1828. static int marvell_vct7_cable_test_start(struct phy_device *phydev)
  1829. {
  1830. struct marvell_priv *priv = phydev->priv;
  1831. int ret;
  1832. ret = marvell_cable_test_start_common(phydev);
  1833. if (ret)
  1834. return ret;
  1835. priv->cable_test_tdr = false;
  1836. /* Reset the VCT5 API control to defaults, otherwise
  1837. * VCT7 does not work correctly.
  1838. */
  1839. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1840. MII_VCT5_CTRL,
  1841. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1842. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1843. MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
  1844. MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
  1845. if (ret)
  1846. return ret;
  1847. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1848. MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
  1849. if (ret)
  1850. return ret;
  1851. return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1852. MII_VCT7_CTRL,
  1853. MII_VCT7_CTRL_RUN_NOW |
  1854. MII_VCT7_CTRL_CENTIMETERS);
  1855. }
  1856. static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
  1857. const struct phy_tdr_config *cfg)
  1858. {
  1859. struct marvell_priv *priv = phydev->priv;
  1860. int ret;
  1861. priv->cable_test_tdr = true;
  1862. priv->first = marvell_vct5_cm2distance(cfg->first);
  1863. priv->last = marvell_vct5_cm2distance(cfg->last);
  1864. priv->step = marvell_vct5_cm2distance(cfg->step);
  1865. priv->pair = cfg->pair;
  1866. if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  1867. return -EINVAL;
  1868. if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  1869. return -EINVAL;
  1870. /* Disable VCT7 */
  1871. ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1872. MII_VCT7_CTRL, 0);
  1873. if (ret)
  1874. return ret;
  1875. ret = marvell_cable_test_start_common(phydev);
  1876. if (ret)
  1877. return ret;
  1878. ret = ethnl_cable_test_pulse(phydev, 1000);
  1879. if (ret)
  1880. return ret;
  1881. return ethnl_cable_test_step(phydev,
  1882. marvell_vct5_distance2cm(priv->first),
  1883. marvell_vct5_distance2cm(priv->last),
  1884. marvell_vct5_distance2cm(priv->step));
  1885. }
  1886. static int marvell_vct7_distance_to_length(int distance, bool meter)
  1887. {
  1888. if (meter)
  1889. distance *= 100;
  1890. return distance;
  1891. }
  1892. static bool marvell_vct7_distance_valid(int result)
  1893. {
  1894. switch (result) {
  1895. case MII_VCT7_RESULTS_OPEN:
  1896. case MII_VCT7_RESULTS_SAME_SHORT:
  1897. case MII_VCT7_RESULTS_CROSS_SHORT:
  1898. return true;
  1899. }
  1900. return false;
  1901. }
  1902. static int marvell_vct7_report_length(struct phy_device *phydev,
  1903. int pair, bool meter)
  1904. {
  1905. int length;
  1906. int ret;
  1907. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1908. MII_VCT7_PAIR_0_DISTANCE + pair);
  1909. if (ret < 0)
  1910. return ret;
  1911. length = marvell_vct7_distance_to_length(ret, meter);
  1912. ethnl_cable_test_fault_length(phydev, pair, length);
  1913. return 0;
  1914. }
  1915. static int marvell_vct7_cable_test_report_trans(int result)
  1916. {
  1917. switch (result) {
  1918. case MII_VCT7_RESULTS_OK:
  1919. return ETHTOOL_A_CABLE_RESULT_CODE_OK;
  1920. case MII_VCT7_RESULTS_OPEN:
  1921. return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
  1922. case MII_VCT7_RESULTS_SAME_SHORT:
  1923. return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
  1924. case MII_VCT7_RESULTS_CROSS_SHORT:
  1925. return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
  1926. default:
  1927. return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
  1928. }
  1929. }
  1930. static int marvell_vct7_cable_test_report(struct phy_device *phydev)
  1931. {
  1932. int pair0, pair1, pair2, pair3;
  1933. bool meter;
  1934. int ret;
  1935. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1936. MII_VCT7_RESULTS);
  1937. if (ret < 0)
  1938. return ret;
  1939. pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
  1940. MII_VCT7_RESULTS_PAIR3_SHIFT;
  1941. pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
  1942. MII_VCT7_RESULTS_PAIR2_SHIFT;
  1943. pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
  1944. MII_VCT7_RESULTS_PAIR1_SHIFT;
  1945. pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
  1946. MII_VCT7_RESULTS_PAIR0_SHIFT;
  1947. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
  1948. marvell_vct7_cable_test_report_trans(pair0));
  1949. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
  1950. marvell_vct7_cable_test_report_trans(pair1));
  1951. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
  1952. marvell_vct7_cable_test_report_trans(pair2));
  1953. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
  1954. marvell_vct7_cable_test_report_trans(pair3));
  1955. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
  1956. if (ret < 0)
  1957. return ret;
  1958. meter = ret & MII_VCT7_CTRL_METERS;
  1959. if (marvell_vct7_distance_valid(pair0))
  1960. marvell_vct7_report_length(phydev, 0, meter);
  1961. if (marvell_vct7_distance_valid(pair1))
  1962. marvell_vct7_report_length(phydev, 1, meter);
  1963. if (marvell_vct7_distance_valid(pair2))
  1964. marvell_vct7_report_length(phydev, 2, meter);
  1965. if (marvell_vct7_distance_valid(pair3))
  1966. marvell_vct7_report_length(phydev, 3, meter);
  1967. return 0;
  1968. }
  1969. static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
  1970. bool *finished)
  1971. {
  1972. struct marvell_priv *priv = phydev->priv;
  1973. int ret;
  1974. if (priv->cable_test_tdr) {
  1975. ret = marvell_vct5_amplitude_graph(phydev);
  1976. *finished = true;
  1977. return ret;
  1978. }
  1979. *finished = false;
  1980. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1981. MII_VCT7_CTRL);
  1982. if (ret < 0)
  1983. return ret;
  1984. if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
  1985. *finished = true;
  1986. return marvell_vct7_cable_test_report(phydev);
  1987. }
  1988. return 0;
  1989. }
  1990. #ifdef CONFIG_HWMON
  1991. struct marvell_hwmon_ops {
  1992. int (*config)(struct phy_device *phydev);
  1993. int (*get_temp)(struct phy_device *phydev, long *temp);
  1994. int (*get_temp_critical)(struct phy_device *phydev, long *temp);
  1995. int (*set_temp_critical)(struct phy_device *phydev, long temp);
  1996. int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
  1997. };
  1998. static const struct marvell_hwmon_ops *
  1999. to_marvell_hwmon_ops(const struct phy_device *phydev)
  2000. {
  2001. return phydev->drv->driver_data;
  2002. }
  2003. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  2004. {
  2005. int oldpage;
  2006. int ret = 0;
  2007. int val;
  2008. *temp = 0;
  2009. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2010. if (oldpage < 0)
  2011. goto error;
  2012. /* Enable temperature sensor */
  2013. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2014. if (ret < 0)
  2015. goto error;
  2016. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2017. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2018. if (ret < 0)
  2019. goto error;
  2020. /* Wait for temperature to stabilize */
  2021. usleep_range(10000, 12000);
  2022. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2023. if (val < 0) {
  2024. ret = val;
  2025. goto error;
  2026. }
  2027. /* Disable temperature sensor */
  2028. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2029. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2030. if (ret < 0)
  2031. goto error;
  2032. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  2033. error:
  2034. return phy_restore_page(phydev, oldpage, ret);
  2035. }
  2036. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  2037. {
  2038. int ret;
  2039. *temp = 0;
  2040. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2041. MII_88E1510_TEMP_SENSOR);
  2042. if (ret < 0)
  2043. return ret;
  2044. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  2045. return 0;
  2046. }
  2047. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  2048. {
  2049. int ret;
  2050. *temp = 0;
  2051. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2052. MII_88E1121_MISC_TEST);
  2053. if (ret < 0)
  2054. return ret;
  2055. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  2056. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  2057. /* convert to mC */
  2058. *temp *= 1000;
  2059. return 0;
  2060. }
  2061. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  2062. {
  2063. temp = temp / 1000;
  2064. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  2065. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2066. MII_88E1121_MISC_TEST,
  2067. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  2068. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  2069. }
  2070. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  2071. {
  2072. int ret;
  2073. *alarm = false;
  2074. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2075. MII_88E1121_MISC_TEST);
  2076. if (ret < 0)
  2077. return ret;
  2078. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  2079. return 0;
  2080. }
  2081. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  2082. {
  2083. int sum = 0;
  2084. int oldpage;
  2085. int ret = 0;
  2086. int i;
  2087. *temp = 0;
  2088. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2089. if (oldpage < 0)
  2090. goto error;
  2091. /* Enable temperature sensor */
  2092. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2093. if (ret < 0)
  2094. goto error;
  2095. ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2096. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
  2097. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2098. if (ret < 0)
  2099. goto error;
  2100. /* Wait for temperature to stabilize */
  2101. usleep_range(10000, 12000);
  2102. /* Reading the temperature sense has an errata. You need to read
  2103. * a number of times and take an average.
  2104. */
  2105. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  2106. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  2107. if (ret < 0)
  2108. goto error;
  2109. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  2110. }
  2111. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  2112. *temp = (sum - 75) * 1000;
  2113. /* Disable temperature sensor */
  2114. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2115. if (ret < 0)
  2116. goto error;
  2117. ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2118. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
  2119. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2120. error:
  2121. phy_restore_page(phydev, oldpage, ret);
  2122. return ret;
  2123. }
  2124. static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
  2125. {
  2126. int err;
  2127. err = m88e1510_get_temp(phydev, temp);
  2128. /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
  2129. * T + 75, so we have to subtract another 50
  2130. */
  2131. *temp -= 50000;
  2132. return err;
  2133. }
  2134. static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
  2135. {
  2136. int ret;
  2137. *temp = 0;
  2138. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2139. MII_88E6390_TEMP_SENSOR);
  2140. if (ret < 0)
  2141. return ret;
  2142. *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
  2143. MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
  2144. return 0;
  2145. }
  2146. static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
  2147. {
  2148. temp = (temp / 1000) + 75;
  2149. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2150. MII_88E6390_TEMP_SENSOR,
  2151. MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
  2152. temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
  2153. }
  2154. static int m88e6393_hwmon_config(struct phy_device *phydev)
  2155. {
  2156. int err;
  2157. err = m88e6393_set_temp_critical(phydev, 100000);
  2158. if (err)
  2159. return err;
  2160. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2161. MII_88E6390_MISC_TEST,
  2162. MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
  2163. MII_88E6393_MISC_TEST_SAMPLES_MASK |
  2164. MII_88E6393_MISC_TEST_RATE_MASK,
  2165. MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
  2166. MII_88E6393_MISC_TEST_SAMPLES_2048 |
  2167. MII_88E6393_MISC_TEST_RATE_2_3MS);
  2168. }
  2169. static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
  2170. u32 attr, int channel, long *temp)
  2171. {
  2172. struct phy_device *phydev = dev_get_drvdata(dev);
  2173. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2174. int err = -EOPNOTSUPP;
  2175. switch (attr) {
  2176. case hwmon_temp_input:
  2177. if (ops->get_temp)
  2178. err = ops->get_temp(phydev, temp);
  2179. break;
  2180. case hwmon_temp_crit:
  2181. if (ops->get_temp_critical)
  2182. err = ops->get_temp_critical(phydev, temp);
  2183. break;
  2184. case hwmon_temp_max_alarm:
  2185. if (ops->get_temp_alarm)
  2186. err = ops->get_temp_alarm(phydev, temp);
  2187. break;
  2188. }
  2189. return err;
  2190. }
  2191. static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
  2192. u32 attr, int channel, long temp)
  2193. {
  2194. struct phy_device *phydev = dev_get_drvdata(dev);
  2195. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2196. int err = -EOPNOTSUPP;
  2197. switch (attr) {
  2198. case hwmon_temp_crit:
  2199. if (ops->set_temp_critical)
  2200. err = ops->set_temp_critical(phydev, temp);
  2201. break;
  2202. }
  2203. return err;
  2204. }
  2205. static umode_t marvell_hwmon_is_visible(const void *data,
  2206. enum hwmon_sensor_types type,
  2207. u32 attr, int channel)
  2208. {
  2209. const struct phy_device *phydev = data;
  2210. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2211. if (type != hwmon_temp)
  2212. return 0;
  2213. switch (attr) {
  2214. case hwmon_temp_input:
  2215. return ops->get_temp ? 0444 : 0;
  2216. case hwmon_temp_max_alarm:
  2217. return ops->get_temp_alarm ? 0444 : 0;
  2218. case hwmon_temp_crit:
  2219. return (ops->get_temp_critical ? 0444 : 0) |
  2220. (ops->set_temp_critical ? 0200 : 0);
  2221. default:
  2222. return 0;
  2223. }
  2224. }
  2225. static u32 marvell_hwmon_chip_config[] = {
  2226. HWMON_C_REGISTER_TZ,
  2227. 0
  2228. };
  2229. static const struct hwmon_channel_info marvell_hwmon_chip = {
  2230. .type = hwmon_chip,
  2231. .config = marvell_hwmon_chip_config,
  2232. };
  2233. /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
  2234. * defined for all PHYs, because the hwmon code checks whether the attributes
  2235. * exists via the .is_visible method
  2236. */
  2237. static u32 marvell_hwmon_temp_config[] = {
  2238. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  2239. 0
  2240. };
  2241. static const struct hwmon_channel_info marvell_hwmon_temp = {
  2242. .type = hwmon_temp,
  2243. .config = marvell_hwmon_temp_config,
  2244. };
  2245. static const struct hwmon_channel_info *marvell_hwmon_info[] = {
  2246. &marvell_hwmon_chip,
  2247. &marvell_hwmon_temp,
  2248. NULL
  2249. };
  2250. static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
  2251. .is_visible = marvell_hwmon_is_visible,
  2252. .read = marvell_hwmon_read,
  2253. .write = marvell_hwmon_write,
  2254. };
  2255. static const struct hwmon_chip_info marvell_hwmon_chip_info = {
  2256. .ops = &marvell_hwmon_hwmon_ops,
  2257. .info = marvell_hwmon_info,
  2258. };
  2259. static int marvell_hwmon_name(struct phy_device *phydev)
  2260. {
  2261. struct marvell_priv *priv = phydev->priv;
  2262. struct device *dev = &phydev->mdio.dev;
  2263. const char *devname = dev_name(dev);
  2264. size_t len = strlen(devname);
  2265. int i, j;
  2266. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  2267. if (!priv->hwmon_name)
  2268. return -ENOMEM;
  2269. for (i = j = 0; i < len && devname[i]; i++) {
  2270. if (isalnum(devname[i]))
  2271. priv->hwmon_name[j++] = devname[i];
  2272. }
  2273. return 0;
  2274. }
  2275. static int marvell_hwmon_probe(struct phy_device *phydev)
  2276. {
  2277. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2278. struct marvell_priv *priv = phydev->priv;
  2279. struct device *dev = &phydev->mdio.dev;
  2280. int err;
  2281. if (!ops)
  2282. return 0;
  2283. err = marvell_hwmon_name(phydev);
  2284. if (err)
  2285. return err;
  2286. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  2287. dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
  2288. if (IS_ERR(priv->hwmon_dev))
  2289. return PTR_ERR(priv->hwmon_dev);
  2290. if (ops->config)
  2291. err = ops->config(phydev);
  2292. return err;
  2293. }
  2294. static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
  2295. .get_temp = m88e1121_get_temp,
  2296. };
  2297. static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
  2298. .get_temp = m88e1510_get_temp,
  2299. .get_temp_critical = m88e1510_get_temp_critical,
  2300. .set_temp_critical = m88e1510_set_temp_critical,
  2301. .get_temp_alarm = m88e1510_get_temp_alarm,
  2302. };
  2303. static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
  2304. .get_temp = m88e6390_get_temp,
  2305. };
  2306. static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
  2307. .config = m88e6393_hwmon_config,
  2308. .get_temp = m88e6393_get_temp,
  2309. .get_temp_critical = m88e6393_get_temp_critical,
  2310. .set_temp_critical = m88e6393_set_temp_critical,
  2311. .get_temp_alarm = m88e1510_get_temp_alarm,
  2312. };
  2313. #define DEF_MARVELL_HWMON_OPS(s) (&(s))
  2314. #else
  2315. #define DEF_MARVELL_HWMON_OPS(s) NULL
  2316. static int marvell_hwmon_probe(struct phy_device *phydev)
  2317. {
  2318. return 0;
  2319. }
  2320. #endif
  2321. static int marvell_probe(struct phy_device *phydev)
  2322. {
  2323. struct marvell_priv *priv;
  2324. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  2325. if (!priv)
  2326. return -ENOMEM;
  2327. phydev->priv = priv;
  2328. return marvell_hwmon_probe(phydev);
  2329. }
  2330. static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
  2331. {
  2332. DECLARE_PHY_INTERFACE_MASK(interfaces);
  2333. struct phy_device *phydev = upstream;
  2334. phy_interface_t interface;
  2335. struct device *dev;
  2336. int oldpage;
  2337. int ret = 0;
  2338. u16 mode;
  2339. __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
  2340. dev = &phydev->mdio.dev;
  2341. sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
  2342. interface = sfp_select_interface(phydev->sfp_bus, supported);
  2343. dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
  2344. switch (interface) {
  2345. case PHY_INTERFACE_MODE_1000BASEX:
  2346. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
  2347. break;
  2348. case PHY_INTERFACE_MODE_100BASEX:
  2349. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
  2350. break;
  2351. case PHY_INTERFACE_MODE_SGMII:
  2352. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
  2353. break;
  2354. default:
  2355. dev_err(dev, "Incompatible SFP module inserted\n");
  2356. return -EINVAL;
  2357. }
  2358. oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
  2359. if (oldpage < 0)
  2360. goto error;
  2361. ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2362. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
  2363. if (ret < 0)
  2364. goto error;
  2365. ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2366. MII_88E1510_GEN_CTRL_REG_1_RESET);
  2367. error:
  2368. return phy_restore_page(phydev, oldpage, ret);
  2369. }
  2370. static void m88e1510_sfp_remove(void *upstream)
  2371. {
  2372. struct phy_device *phydev = upstream;
  2373. int oldpage;
  2374. int ret = 0;
  2375. oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
  2376. if (oldpage < 0)
  2377. goto error;
  2378. ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2379. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  2380. MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
  2381. if (ret < 0)
  2382. goto error;
  2383. ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2384. MII_88E1510_GEN_CTRL_REG_1_RESET);
  2385. error:
  2386. phy_restore_page(phydev, oldpage, ret);
  2387. }
  2388. static const struct sfp_upstream_ops m88e1510_sfp_ops = {
  2389. .module_insert = m88e1510_sfp_insert,
  2390. .module_remove = m88e1510_sfp_remove,
  2391. .attach = phy_sfp_attach,
  2392. .detach = phy_sfp_detach,
  2393. };
  2394. static int m88e1510_probe(struct phy_device *phydev)
  2395. {
  2396. int err;
  2397. err = marvell_probe(phydev);
  2398. if (err)
  2399. return err;
  2400. return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
  2401. }
  2402. static struct phy_driver marvell_drivers[] = {
  2403. {
  2404. .phy_id = MARVELL_PHY_ID_88E1101,
  2405. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2406. .name = "Marvell 88E1101",
  2407. /* PHY_GBIT_FEATURES */
  2408. .probe = marvell_probe,
  2409. .config_init = marvell_config_init,
  2410. .config_aneg = m88e1101_config_aneg,
  2411. .config_intr = marvell_config_intr,
  2412. .handle_interrupt = marvell_handle_interrupt,
  2413. .resume = genphy_resume,
  2414. .suspend = genphy_suspend,
  2415. .read_page = marvell_read_page,
  2416. .write_page = marvell_write_page,
  2417. .get_sset_count = marvell_get_sset_count,
  2418. .get_strings = marvell_get_strings,
  2419. .get_stats = marvell_get_stats,
  2420. },
  2421. {
  2422. .phy_id = MARVELL_PHY_ID_88E1112,
  2423. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2424. .name = "Marvell 88E1112",
  2425. /* PHY_GBIT_FEATURES */
  2426. .probe = marvell_probe,
  2427. .config_init = m88e1112_config_init,
  2428. .config_aneg = marvell_config_aneg,
  2429. .config_intr = marvell_config_intr,
  2430. .handle_interrupt = marvell_handle_interrupt,
  2431. .resume = genphy_resume,
  2432. .suspend = genphy_suspend,
  2433. .read_page = marvell_read_page,
  2434. .write_page = marvell_write_page,
  2435. .get_sset_count = marvell_get_sset_count,
  2436. .get_strings = marvell_get_strings,
  2437. .get_stats = marvell_get_stats,
  2438. .get_tunable = m88e1011_get_tunable,
  2439. .set_tunable = m88e1011_set_tunable,
  2440. },
  2441. {
  2442. .phy_id = MARVELL_PHY_ID_88E1111,
  2443. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2444. .name = "Marvell 88E1111",
  2445. /* PHY_GBIT_FEATURES */
  2446. .probe = marvell_probe,
  2447. .config_init = m88e1111gbe_config_init,
  2448. .config_aneg = m88e1111_config_aneg,
  2449. .read_status = marvell_read_status,
  2450. .config_intr = marvell_config_intr,
  2451. .handle_interrupt = marvell_handle_interrupt,
  2452. .resume = genphy_resume,
  2453. .suspend = genphy_suspend,
  2454. .read_page = marvell_read_page,
  2455. .write_page = marvell_write_page,
  2456. .get_sset_count = marvell_get_sset_count,
  2457. .get_strings = marvell_get_strings,
  2458. .get_stats = marvell_get_stats,
  2459. .get_tunable = m88e1111_get_tunable,
  2460. .set_tunable = m88e1111_set_tunable,
  2461. },
  2462. {
  2463. .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
  2464. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2465. .name = "Marvell 88E1111 (Finisar)",
  2466. /* PHY_GBIT_FEATURES */
  2467. .probe = marvell_probe,
  2468. .config_init = m88e1111gbe_config_init,
  2469. .config_aneg = m88e1111_config_aneg,
  2470. .read_status = marvell_read_status,
  2471. .config_intr = marvell_config_intr,
  2472. .handle_interrupt = marvell_handle_interrupt,
  2473. .resume = genphy_resume,
  2474. .suspend = genphy_suspend,
  2475. .read_page = marvell_read_page,
  2476. .write_page = marvell_write_page,
  2477. .get_sset_count = marvell_get_sset_count,
  2478. .get_strings = marvell_get_strings,
  2479. .get_stats = marvell_get_stats,
  2480. .get_tunable = m88e1111_get_tunable,
  2481. .set_tunable = m88e1111_set_tunable,
  2482. },
  2483. {
  2484. .phy_id = MARVELL_PHY_ID_88E1118,
  2485. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2486. .name = "Marvell 88E1118",
  2487. /* PHY_GBIT_FEATURES */
  2488. .probe = marvell_probe,
  2489. .config_init = m88e1118_config_init,
  2490. .config_aneg = m88e1118_config_aneg,
  2491. .config_intr = marvell_config_intr,
  2492. .handle_interrupt = marvell_handle_interrupt,
  2493. .resume = genphy_resume,
  2494. .suspend = genphy_suspend,
  2495. .read_page = marvell_read_page,
  2496. .write_page = marvell_write_page,
  2497. .get_sset_count = marvell_get_sset_count,
  2498. .get_strings = marvell_get_strings,
  2499. .get_stats = marvell_get_stats,
  2500. },
  2501. {
  2502. .phy_id = MARVELL_PHY_ID_88E1121R,
  2503. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2504. .name = "Marvell 88E1121R",
  2505. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
  2506. /* PHY_GBIT_FEATURES */
  2507. .probe = marvell_probe,
  2508. .config_init = marvell_1011gbe_config_init,
  2509. .config_aneg = m88e1121_config_aneg,
  2510. .read_status = marvell_read_status,
  2511. .config_intr = marvell_config_intr,
  2512. .handle_interrupt = marvell_handle_interrupt,
  2513. .resume = genphy_resume,
  2514. .suspend = genphy_suspend,
  2515. .read_page = marvell_read_page,
  2516. .write_page = marvell_write_page,
  2517. .get_sset_count = marvell_get_sset_count,
  2518. .get_strings = marvell_get_strings,
  2519. .get_stats = marvell_get_stats,
  2520. .get_tunable = m88e1011_get_tunable,
  2521. .set_tunable = m88e1011_set_tunable,
  2522. },
  2523. {
  2524. .phy_id = MARVELL_PHY_ID_88E1318S,
  2525. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2526. .name = "Marvell 88E1318S",
  2527. /* PHY_GBIT_FEATURES */
  2528. .probe = marvell_probe,
  2529. .config_init = m88e1318_config_init,
  2530. .config_aneg = m88e1318_config_aneg,
  2531. .read_status = marvell_read_status,
  2532. .config_intr = marvell_config_intr,
  2533. .handle_interrupt = marvell_handle_interrupt,
  2534. .get_wol = m88e1318_get_wol,
  2535. .set_wol = m88e1318_set_wol,
  2536. .resume = genphy_resume,
  2537. .suspend = genphy_suspend,
  2538. .read_page = marvell_read_page,
  2539. .write_page = marvell_write_page,
  2540. .get_sset_count = marvell_get_sset_count,
  2541. .get_strings = marvell_get_strings,
  2542. .get_stats = marvell_get_stats,
  2543. },
  2544. {
  2545. .phy_id = MARVELL_PHY_ID_88E1145,
  2546. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2547. .name = "Marvell 88E1145",
  2548. /* PHY_GBIT_FEATURES */
  2549. .probe = marvell_probe,
  2550. .config_init = m88e1145_config_init,
  2551. .config_aneg = m88e1101_config_aneg,
  2552. .config_intr = marvell_config_intr,
  2553. .handle_interrupt = marvell_handle_interrupt,
  2554. .resume = genphy_resume,
  2555. .suspend = genphy_suspend,
  2556. .read_page = marvell_read_page,
  2557. .write_page = marvell_write_page,
  2558. .get_sset_count = marvell_get_sset_count,
  2559. .get_strings = marvell_get_strings,
  2560. .get_stats = marvell_get_stats,
  2561. .get_tunable = m88e1111_get_tunable,
  2562. .set_tunable = m88e1111_set_tunable,
  2563. },
  2564. {
  2565. .phy_id = MARVELL_PHY_ID_88E1149R,
  2566. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2567. .name = "Marvell 88E1149R",
  2568. /* PHY_GBIT_FEATURES */
  2569. .probe = marvell_probe,
  2570. .config_init = m88e1149_config_init,
  2571. .config_aneg = m88e1118_config_aneg,
  2572. .config_intr = marvell_config_intr,
  2573. .handle_interrupt = marvell_handle_interrupt,
  2574. .resume = genphy_resume,
  2575. .suspend = genphy_suspend,
  2576. .read_page = marvell_read_page,
  2577. .write_page = marvell_write_page,
  2578. .get_sset_count = marvell_get_sset_count,
  2579. .get_strings = marvell_get_strings,
  2580. .get_stats = marvell_get_stats,
  2581. },
  2582. {
  2583. .phy_id = MARVELL_PHY_ID_88E1240,
  2584. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2585. .name = "Marvell 88E1240",
  2586. /* PHY_GBIT_FEATURES */
  2587. .probe = marvell_probe,
  2588. .config_init = m88e1112_config_init,
  2589. .config_aneg = marvell_config_aneg,
  2590. .config_intr = marvell_config_intr,
  2591. .handle_interrupt = marvell_handle_interrupt,
  2592. .resume = genphy_resume,
  2593. .suspend = genphy_suspend,
  2594. .read_page = marvell_read_page,
  2595. .write_page = marvell_write_page,
  2596. .get_sset_count = marvell_get_sset_count,
  2597. .get_strings = marvell_get_strings,
  2598. .get_stats = marvell_get_stats,
  2599. .get_tunable = m88e1011_get_tunable,
  2600. .set_tunable = m88e1011_set_tunable,
  2601. },
  2602. {
  2603. .phy_id = MARVELL_PHY_ID_88E1116R,
  2604. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2605. .name = "Marvell 88E1116R",
  2606. /* PHY_GBIT_FEATURES */
  2607. .probe = marvell_probe,
  2608. .config_init = m88e1116r_config_init,
  2609. .config_intr = marvell_config_intr,
  2610. .handle_interrupt = marvell_handle_interrupt,
  2611. .resume = genphy_resume,
  2612. .suspend = genphy_suspend,
  2613. .read_page = marvell_read_page,
  2614. .write_page = marvell_write_page,
  2615. .get_sset_count = marvell_get_sset_count,
  2616. .get_strings = marvell_get_strings,
  2617. .get_stats = marvell_get_stats,
  2618. .get_tunable = m88e1011_get_tunable,
  2619. .set_tunable = m88e1011_set_tunable,
  2620. },
  2621. {
  2622. .phy_id = MARVELL_PHY_ID_88E1510,
  2623. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2624. .name = "Marvell 88E1510",
  2625. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2626. .features = PHY_GBIT_FIBRE_FEATURES,
  2627. .flags = PHY_POLL_CABLE_TEST,
  2628. .probe = m88e1510_probe,
  2629. .config_init = m88e1510_config_init,
  2630. .config_aneg = m88e1510_config_aneg,
  2631. .read_status = marvell_read_status,
  2632. .config_intr = marvell_config_intr,
  2633. .handle_interrupt = marvell_handle_interrupt,
  2634. .get_wol = m88e1318_get_wol,
  2635. .set_wol = m88e1318_set_wol,
  2636. .resume = marvell_resume,
  2637. .suspend = marvell_suspend,
  2638. .read_page = marvell_read_page,
  2639. .write_page = marvell_write_page,
  2640. .get_sset_count = marvell_get_sset_count,
  2641. .get_strings = marvell_get_strings,
  2642. .get_stats = marvell_get_stats,
  2643. .set_loopback = m88e1510_loopback,
  2644. .get_tunable = m88e1011_get_tunable,
  2645. .set_tunable = m88e1011_set_tunable,
  2646. .cable_test_start = marvell_vct7_cable_test_start,
  2647. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2648. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2649. },
  2650. {
  2651. .phy_id = MARVELL_PHY_ID_88E1540,
  2652. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2653. .name = "Marvell 88E1540",
  2654. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2655. /* PHY_GBIT_FEATURES */
  2656. .flags = PHY_POLL_CABLE_TEST,
  2657. .probe = marvell_probe,
  2658. .config_init = marvell_1011gbe_config_init,
  2659. .config_aneg = m88e1510_config_aneg,
  2660. .read_status = marvell_read_status,
  2661. .config_intr = marvell_config_intr,
  2662. .handle_interrupt = marvell_handle_interrupt,
  2663. .resume = genphy_resume,
  2664. .suspend = genphy_suspend,
  2665. .read_page = marvell_read_page,
  2666. .write_page = marvell_write_page,
  2667. .get_sset_count = marvell_get_sset_count,
  2668. .get_strings = marvell_get_strings,
  2669. .get_stats = marvell_get_stats,
  2670. .get_tunable = m88e1540_get_tunable,
  2671. .set_tunable = m88e1540_set_tunable,
  2672. .cable_test_start = marvell_vct7_cable_test_start,
  2673. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2674. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2675. },
  2676. {
  2677. .phy_id = MARVELL_PHY_ID_88E1545,
  2678. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2679. .name = "Marvell 88E1545",
  2680. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2681. .probe = marvell_probe,
  2682. /* PHY_GBIT_FEATURES */
  2683. .flags = PHY_POLL_CABLE_TEST,
  2684. .config_init = marvell_1011gbe_config_init,
  2685. .config_aneg = m88e1510_config_aneg,
  2686. .read_status = marvell_read_status,
  2687. .config_intr = marvell_config_intr,
  2688. .handle_interrupt = marvell_handle_interrupt,
  2689. .resume = genphy_resume,
  2690. .suspend = genphy_suspend,
  2691. .read_page = marvell_read_page,
  2692. .write_page = marvell_write_page,
  2693. .get_sset_count = marvell_get_sset_count,
  2694. .get_strings = marvell_get_strings,
  2695. .get_stats = marvell_get_stats,
  2696. .get_tunable = m88e1540_get_tunable,
  2697. .set_tunable = m88e1540_set_tunable,
  2698. .cable_test_start = marvell_vct7_cable_test_start,
  2699. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2700. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2701. },
  2702. {
  2703. .phy_id = MARVELL_PHY_ID_88E3016,
  2704. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2705. .name = "Marvell 88E3016",
  2706. /* PHY_BASIC_FEATURES */
  2707. .probe = marvell_probe,
  2708. .config_init = m88e3016_config_init,
  2709. .aneg_done = marvell_aneg_done,
  2710. .read_status = marvell_read_status,
  2711. .config_intr = marvell_config_intr,
  2712. .handle_interrupt = marvell_handle_interrupt,
  2713. .resume = genphy_resume,
  2714. .suspend = genphy_suspend,
  2715. .read_page = marvell_read_page,
  2716. .write_page = marvell_write_page,
  2717. .get_sset_count = marvell_get_sset_count,
  2718. .get_strings = marvell_get_strings,
  2719. .get_stats = marvell_get_stats,
  2720. },
  2721. {
  2722. .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
  2723. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2724. .name = "Marvell 88E6341 Family",
  2725. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2726. /* PHY_GBIT_FEATURES */
  2727. .flags = PHY_POLL_CABLE_TEST,
  2728. .probe = marvell_probe,
  2729. .config_init = marvell_1011gbe_config_init,
  2730. .config_aneg = m88e6390_config_aneg,
  2731. .read_status = marvell_read_status,
  2732. .config_intr = marvell_config_intr,
  2733. .handle_interrupt = marvell_handle_interrupt,
  2734. .resume = genphy_resume,
  2735. .suspend = genphy_suspend,
  2736. .read_page = marvell_read_page,
  2737. .write_page = marvell_write_page,
  2738. .get_sset_count = marvell_get_sset_count,
  2739. .get_strings = marvell_get_strings,
  2740. .get_stats = marvell_get_stats,
  2741. .get_tunable = m88e1540_get_tunable,
  2742. .set_tunable = m88e1540_set_tunable,
  2743. .cable_test_start = marvell_vct7_cable_test_start,
  2744. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2745. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2746. },
  2747. {
  2748. .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
  2749. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2750. .name = "Marvell 88E6390 Family",
  2751. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
  2752. /* PHY_GBIT_FEATURES */
  2753. .flags = PHY_POLL_CABLE_TEST,
  2754. .probe = marvell_probe,
  2755. .config_init = marvell_1011gbe_config_init,
  2756. .config_aneg = m88e6390_config_aneg,
  2757. .read_status = marvell_read_status,
  2758. .config_intr = marvell_config_intr,
  2759. .handle_interrupt = marvell_handle_interrupt,
  2760. .resume = genphy_resume,
  2761. .suspend = genphy_suspend,
  2762. .read_page = marvell_read_page,
  2763. .write_page = marvell_write_page,
  2764. .get_sset_count = marvell_get_sset_count,
  2765. .get_strings = marvell_get_strings,
  2766. .get_stats = marvell_get_stats,
  2767. .get_tunable = m88e1540_get_tunable,
  2768. .set_tunable = m88e1540_set_tunable,
  2769. .cable_test_start = marvell_vct7_cable_test_start,
  2770. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2771. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2772. },
  2773. {
  2774. .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
  2775. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2776. .name = "Marvell 88E6393 Family",
  2777. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
  2778. /* PHY_GBIT_FEATURES */
  2779. .flags = PHY_POLL_CABLE_TEST,
  2780. .probe = marvell_probe,
  2781. .config_init = marvell_1011gbe_config_init,
  2782. .config_aneg = m88e1510_config_aneg,
  2783. .read_status = marvell_read_status,
  2784. .config_intr = marvell_config_intr,
  2785. .handle_interrupt = marvell_handle_interrupt,
  2786. .resume = genphy_resume,
  2787. .suspend = genphy_suspend,
  2788. .read_page = marvell_read_page,
  2789. .write_page = marvell_write_page,
  2790. .get_sset_count = marvell_get_sset_count,
  2791. .get_strings = marvell_get_strings,
  2792. .get_stats = marvell_get_stats,
  2793. .get_tunable = m88e1540_get_tunable,
  2794. .set_tunable = m88e1540_set_tunable,
  2795. .cable_test_start = marvell_vct7_cable_test_start,
  2796. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  2797. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  2798. },
  2799. {
  2800. .phy_id = MARVELL_PHY_ID_88E1340S,
  2801. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2802. .name = "Marvell 88E1340S",
  2803. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2804. .probe = marvell_probe,
  2805. /* PHY_GBIT_FEATURES */
  2806. .config_init = marvell_1011gbe_config_init,
  2807. .config_aneg = m88e1510_config_aneg,
  2808. .read_status = marvell_read_status,
  2809. .config_intr = marvell_config_intr,
  2810. .handle_interrupt = marvell_handle_interrupt,
  2811. .resume = genphy_resume,
  2812. .suspend = genphy_suspend,
  2813. .read_page = marvell_read_page,
  2814. .write_page = marvell_write_page,
  2815. .get_sset_count = marvell_get_sset_count,
  2816. .get_strings = marvell_get_strings,
  2817. .get_stats = marvell_get_stats,
  2818. .get_tunable = m88e1540_get_tunable,
  2819. .set_tunable = m88e1540_set_tunable,
  2820. },
  2821. {
  2822. .phy_id = MARVELL_PHY_ID_88E1548P,
  2823. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2824. .name = "Marvell 88E1548P",
  2825. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  2826. .probe = marvell_probe,
  2827. .features = PHY_GBIT_FIBRE_FEATURES,
  2828. .config_init = marvell_1011gbe_config_init,
  2829. .config_aneg = m88e1510_config_aneg,
  2830. .read_status = marvell_read_status,
  2831. .config_intr = marvell_config_intr,
  2832. .handle_interrupt = marvell_handle_interrupt,
  2833. .resume = genphy_resume,
  2834. .suspend = genphy_suspend,
  2835. .read_page = marvell_read_page,
  2836. .write_page = marvell_write_page,
  2837. .get_sset_count = marvell_get_sset_count,
  2838. .get_strings = marvell_get_strings,
  2839. .get_stats = marvell_get_stats,
  2840. .get_tunable = m88e1540_get_tunable,
  2841. .set_tunable = m88e1540_set_tunable,
  2842. },
  2843. };
  2844. module_phy_driver(marvell_drivers);
  2845. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  2846. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  2847. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  2848. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  2849. { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
  2850. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  2851. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  2852. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  2853. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  2854. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  2855. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  2856. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  2857. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  2858. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  2859. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  2860. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  2861. { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
  2862. { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
  2863. { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
  2864. { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
  2865. { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
  2866. { }
  2867. };
  2868. MODULE_DEVICE_TABLE(mdio, marvell_tbl);