et1011c.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/et1011c.c
  4. *
  5. * Driver for LSI ET1011C PHYs
  6. *
  7. * Author: Chaithrika U S
  8. *
  9. * Copyright (c) 2008 Texas Instruments
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/unistd.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/netdevice.h>
  19. #include <linux/etherdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/mii.h>
  25. #include <linux/ethtool.h>
  26. #include <linux/phy.h>
  27. #include <linux/io.h>
  28. #include <linux/uaccess.h>
  29. #include <asm/irq.h>
  30. #define ET1011C_STATUS_REG (0x1A)
  31. #define ET1011C_CONFIG_REG (0x16)
  32. #define ET1011C_SPEED_MASK (0x0300)
  33. #define ET1011C_GIGABIT_SPEED (0x0200)
  34. #define ET1011C_TX_FIFO_MASK (0x3000)
  35. #define ET1011C_TX_FIFO_DEPTH_8 (0x0000)
  36. #define ET1011C_TX_FIFO_DEPTH_16 (0x1000)
  37. #define ET1011C_INTERFACE_MASK (0x0007)
  38. #define ET1011C_GMII_INTERFACE (0x0002)
  39. #define ET1011C_SYS_CLK_EN (0x01 << 4)
  40. MODULE_DESCRIPTION("LSI ET1011C PHY driver");
  41. MODULE_AUTHOR("Chaithrika U S");
  42. MODULE_LICENSE("GPL");
  43. static int et1011c_config_aneg(struct phy_device *phydev)
  44. {
  45. int ctl = phy_read(phydev, MII_BMCR);
  46. if (ctl < 0)
  47. return ctl;
  48. ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
  49. BMCR_ANENABLE);
  50. /* First clear the PHY */
  51. phy_write(phydev, MII_BMCR, ctl | BMCR_RESET);
  52. return genphy_config_aneg(phydev);
  53. }
  54. static int et1011c_read_status(struct phy_device *phydev)
  55. {
  56. static int speed;
  57. int ret;
  58. u32 val;
  59. ret = genphy_read_status(phydev);
  60. if (speed != phydev->speed) {
  61. speed = phydev->speed;
  62. val = phy_read(phydev, ET1011C_STATUS_REG);
  63. if ((val & ET1011C_SPEED_MASK) ==
  64. ET1011C_GIGABIT_SPEED) {
  65. val = phy_read(phydev, ET1011C_CONFIG_REG);
  66. val &= ~ET1011C_TX_FIFO_MASK;
  67. phy_write(phydev, ET1011C_CONFIG_REG, val |
  68. ET1011C_GMII_INTERFACE |
  69. ET1011C_SYS_CLK_EN |
  70. ET1011C_TX_FIFO_DEPTH_16);
  71. }
  72. }
  73. return ret;
  74. }
  75. static struct phy_driver et1011c_driver[] = { {
  76. .phy_id = 0x0282f014,
  77. .name = "ET1011C",
  78. .phy_id_mask = 0xfffffff0,
  79. /* PHY_GBIT_FEATURES */
  80. .config_aneg = et1011c_config_aneg,
  81. .read_status = et1011c_read_status,
  82. } };
  83. module_phy_driver(et1011c_driver);
  84. static struct mdio_device_id __maybe_unused et1011c_tbl[] = {
  85. { 0x0282f014, 0xfffffff0 },
  86. { }
  87. };
  88. MODULE_DEVICE_TABLE(mdio, et1011c_tbl);