rrunner.c 41 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  4. *
  5. * Copyright (C) 1998-2002 by Jes Sorensen, <[email protected]>.
  6. *
  7. * Thanks to Essential Communication for providing us with hardware
  8. * and very comprehensive documentation without which I would not have
  9. * been able to write this driver. A special thank you to John Gibbon
  10. * for sorting out the legal issues, with the NDA, allowing the code to
  11. * be released under the GPL.
  12. *
  13. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  14. * stupid bugs in my code.
  15. *
  16. * Softnet support and various other patches from Val Henson of
  17. * ODS/Essential.
  18. *
  19. * PCI DMA mapping code partly based on work by Francois Romieu.
  20. */
  21. #define DEBUG 1
  22. #define RX_DMA_SKBUFF 1
  23. #define PKT_COPY_THRESHOLD 512
  24. #include <linux/module.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/ioport.h>
  28. #include <linux/pci.h>
  29. #include <linux/kernel.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/hippidevice.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/delay.h>
  34. #include <linux/mm.h>
  35. #include <linux/slab.h>
  36. #include <net/sock.h>
  37. #include <asm/cache.h>
  38. #include <asm/byteorder.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <linux/uaccess.h>
  42. #define rr_if_busy(dev) netif_queue_stopped(dev)
  43. #define rr_if_running(dev) netif_running(dev)
  44. #include "rrunner.h"
  45. #define RUN_AT(x) (jiffies + (x))
  46. MODULE_AUTHOR("Jes Sorensen <[email protected]>");
  47. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  48. MODULE_LICENSE("GPL");
  49. static const char version[] =
  50. "rrunner.c: v0.50 11/11/2002 Jes Sorensen ([email protected])\n";
  51. static const struct net_device_ops rr_netdev_ops = {
  52. .ndo_open = rr_open,
  53. .ndo_stop = rr_close,
  54. .ndo_siocdevprivate = rr_siocdevprivate,
  55. .ndo_start_xmit = rr_start_xmit,
  56. .ndo_set_mac_address = hippi_mac_addr,
  57. };
  58. /*
  59. * Implementation notes:
  60. *
  61. * The DMA engine only allows for DMA within physical 64KB chunks of
  62. * memory. The current approach of the driver (and stack) is to use
  63. * linear blocks of memory for the skbuffs. However, as the data block
  64. * is always the first part of the skb and skbs are 2^n aligned so we
  65. * are guarantted to get the whole block within one 64KB align 64KB
  66. * chunk.
  67. *
  68. * On the long term, relying on being able to allocate 64KB linear
  69. * chunks of memory is not feasible and the skb handling code and the
  70. * stack will need to know about I/O vectors or something similar.
  71. */
  72. static int rr_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  73. {
  74. struct net_device *dev;
  75. static int version_disp;
  76. u8 pci_latency;
  77. struct rr_private *rrpriv;
  78. void *tmpptr;
  79. dma_addr_t ring_dma;
  80. int ret = -ENOMEM;
  81. dev = alloc_hippi_dev(sizeof(struct rr_private));
  82. if (!dev)
  83. goto out3;
  84. ret = pci_enable_device(pdev);
  85. if (ret) {
  86. ret = -ENODEV;
  87. goto out2;
  88. }
  89. rrpriv = netdev_priv(dev);
  90. SET_NETDEV_DEV(dev, &pdev->dev);
  91. ret = pci_request_regions(pdev, "rrunner");
  92. if (ret < 0)
  93. goto out;
  94. pci_set_drvdata(pdev, dev);
  95. rrpriv->pci_dev = pdev;
  96. spin_lock_init(&rrpriv->lock);
  97. dev->netdev_ops = &rr_netdev_ops;
  98. /* display version info if adapter is found */
  99. if (!version_disp) {
  100. /* set display flag to TRUE so that */
  101. /* we only display this string ONCE */
  102. version_disp = 1;
  103. printk(version);
  104. }
  105. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  106. if (pci_latency <= 0x58){
  107. pci_latency = 0x58;
  108. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  109. }
  110. pci_set_master(pdev);
  111. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  112. "at 0x%llx, irq %i, PCI latency %i\n", dev->name,
  113. (unsigned long long)pci_resource_start(pdev, 0),
  114. pdev->irq, pci_latency);
  115. /*
  116. * Remap the MMIO regs into kernel space.
  117. */
  118. rrpriv->regs = pci_iomap(pdev, 0, 0x1000);
  119. if (!rrpriv->regs) {
  120. printk(KERN_ERR "%s: Unable to map I/O register, "
  121. "RoadRunner will be disabled.\n", dev->name);
  122. ret = -EIO;
  123. goto out;
  124. }
  125. tmpptr = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma,
  126. GFP_KERNEL);
  127. rrpriv->tx_ring = tmpptr;
  128. rrpriv->tx_ring_dma = ring_dma;
  129. if (!tmpptr) {
  130. ret = -ENOMEM;
  131. goto out;
  132. }
  133. tmpptr = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma,
  134. GFP_KERNEL);
  135. rrpriv->rx_ring = tmpptr;
  136. rrpriv->rx_ring_dma = ring_dma;
  137. if (!tmpptr) {
  138. ret = -ENOMEM;
  139. goto out;
  140. }
  141. tmpptr = dma_alloc_coherent(&pdev->dev, EVT_RING_SIZE, &ring_dma,
  142. GFP_KERNEL);
  143. rrpriv->evt_ring = tmpptr;
  144. rrpriv->evt_ring_dma = ring_dma;
  145. if (!tmpptr) {
  146. ret = -ENOMEM;
  147. goto out;
  148. }
  149. /*
  150. * Don't access any register before this point!
  151. */
  152. #ifdef __BIG_ENDIAN
  153. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  154. &rrpriv->regs->HostCtrl);
  155. #endif
  156. /*
  157. * Need to add a case for little-endian 64-bit hosts here.
  158. */
  159. rr_init(dev);
  160. ret = register_netdev(dev);
  161. if (ret)
  162. goto out;
  163. return 0;
  164. out:
  165. if (rrpriv->evt_ring)
  166. dma_free_coherent(&pdev->dev, EVT_RING_SIZE, rrpriv->evt_ring,
  167. rrpriv->evt_ring_dma);
  168. if (rrpriv->rx_ring)
  169. dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  170. rrpriv->rx_ring_dma);
  171. if (rrpriv->tx_ring)
  172. dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  173. rrpriv->tx_ring_dma);
  174. if (rrpriv->regs)
  175. pci_iounmap(pdev, rrpriv->regs);
  176. if (pdev)
  177. pci_release_regions(pdev);
  178. pci_disable_device(pdev);
  179. out2:
  180. free_netdev(dev);
  181. out3:
  182. return ret;
  183. }
  184. static void rr_remove_one(struct pci_dev *pdev)
  185. {
  186. struct net_device *dev = pci_get_drvdata(pdev);
  187. struct rr_private *rr = netdev_priv(dev);
  188. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) {
  189. printk(KERN_ERR "%s: trying to unload running NIC\n",
  190. dev->name);
  191. writel(HALT_NIC, &rr->regs->HostCtrl);
  192. }
  193. unregister_netdev(dev);
  194. dma_free_coherent(&pdev->dev, EVT_RING_SIZE, rr->evt_ring,
  195. rr->evt_ring_dma);
  196. dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, rr->rx_ring,
  197. rr->rx_ring_dma);
  198. dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, rr->tx_ring,
  199. rr->tx_ring_dma);
  200. pci_iounmap(pdev, rr->regs);
  201. pci_release_regions(pdev);
  202. pci_disable_device(pdev);
  203. free_netdev(dev);
  204. }
  205. /*
  206. * Commands are considered to be slow, thus there is no reason to
  207. * inline this.
  208. */
  209. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  210. {
  211. struct rr_regs __iomem *regs;
  212. u32 idx;
  213. regs = rrpriv->regs;
  214. /*
  215. * This is temporary - it will go away in the final version.
  216. * We probably also want to make this function inline.
  217. */
  218. if (readl(&regs->HostCtrl) & NIC_HALTED){
  219. printk("issuing command for halted NIC, code 0x%x, "
  220. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  221. if (readl(&regs->Mode) & FATAL_ERR)
  222. printk("error codes Fail1 %02x, Fail2 %02x\n",
  223. readl(&regs->Fail1), readl(&regs->Fail2));
  224. }
  225. idx = rrpriv->info->cmd_ctrl.pi;
  226. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  227. wmb();
  228. idx = (idx - 1) % CMD_RING_ENTRIES;
  229. rrpriv->info->cmd_ctrl.pi = idx;
  230. wmb();
  231. if (readl(&regs->Mode) & FATAL_ERR)
  232. printk("error code %02x\n", readl(&regs->Fail1));
  233. }
  234. /*
  235. * Reset the board in a sensible manner. The NIC is already halted
  236. * when we get here and a spin-lock is held.
  237. */
  238. static int rr_reset(struct net_device *dev)
  239. {
  240. struct rr_private *rrpriv;
  241. struct rr_regs __iomem *regs;
  242. u32 start_pc;
  243. int i;
  244. rrpriv = netdev_priv(dev);
  245. regs = rrpriv->regs;
  246. rr_load_firmware(dev);
  247. writel(0x01000000, &regs->TX_state);
  248. writel(0xff800000, &regs->RX_state);
  249. writel(0, &regs->AssistState);
  250. writel(CLEAR_INTA, &regs->LocalCtrl);
  251. writel(0x01, &regs->BrkPt);
  252. writel(0, &regs->Timer);
  253. writel(0, &regs->TimerRef);
  254. writel(RESET_DMA, &regs->DmaReadState);
  255. writel(RESET_DMA, &regs->DmaWriteState);
  256. writel(0, &regs->DmaWriteHostHi);
  257. writel(0, &regs->DmaWriteHostLo);
  258. writel(0, &regs->DmaReadHostHi);
  259. writel(0, &regs->DmaReadHostLo);
  260. writel(0, &regs->DmaReadLen);
  261. writel(0, &regs->DmaWriteLen);
  262. writel(0, &regs->DmaWriteLcl);
  263. writel(0, &regs->DmaWriteIPchecksum);
  264. writel(0, &regs->DmaReadLcl);
  265. writel(0, &regs->DmaReadIPchecksum);
  266. writel(0, &regs->PciState);
  267. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  268. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  269. #elif (BITS_PER_LONG == 64)
  270. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  271. #else
  272. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  273. #endif
  274. #if 0
  275. /*
  276. * Don't worry, this is just black magic.
  277. */
  278. writel(0xdf000, &regs->RxBase);
  279. writel(0xdf000, &regs->RxPrd);
  280. writel(0xdf000, &regs->RxCon);
  281. writel(0xce000, &regs->TxBase);
  282. writel(0xce000, &regs->TxPrd);
  283. writel(0xce000, &regs->TxCon);
  284. writel(0, &regs->RxIndPro);
  285. writel(0, &regs->RxIndCon);
  286. writel(0, &regs->RxIndRef);
  287. writel(0, &regs->TxIndPro);
  288. writel(0, &regs->TxIndCon);
  289. writel(0, &regs->TxIndRef);
  290. writel(0xcc000, &regs->pad10[0]);
  291. writel(0, &regs->DrCmndPro);
  292. writel(0, &regs->DrCmndCon);
  293. writel(0, &regs->DwCmndPro);
  294. writel(0, &regs->DwCmndCon);
  295. writel(0, &regs->DwCmndRef);
  296. writel(0, &regs->DrDataPro);
  297. writel(0, &regs->DrDataCon);
  298. writel(0, &regs->DrDataRef);
  299. writel(0, &regs->DwDataPro);
  300. writel(0, &regs->DwDataCon);
  301. writel(0, &regs->DwDataRef);
  302. #endif
  303. writel(0xffffffff, &regs->MbEvent);
  304. writel(0, &regs->Event);
  305. writel(0, &regs->TxPi);
  306. writel(0, &regs->IpRxPi);
  307. writel(0, &regs->EvtCon);
  308. writel(0, &regs->EvtPrd);
  309. rrpriv->info->evt_ctrl.pi = 0;
  310. for (i = 0; i < CMD_RING_ENTRIES; i++)
  311. writel(0, &regs->CmdRing[i]);
  312. /*
  313. * Why 32 ? is this not cache line size dependent?
  314. */
  315. writel(RBURST_64|WBURST_64, &regs->PciState);
  316. wmb();
  317. start_pc = rr_read_eeprom_word(rrpriv,
  318. offsetof(struct eeprom, rncd_info.FwStart));
  319. #if (DEBUG > 1)
  320. printk("%s: Executing firmware at address 0x%06x\n",
  321. dev->name, start_pc);
  322. #endif
  323. writel(start_pc + 0x800, &regs->Pc);
  324. wmb();
  325. udelay(5);
  326. writel(start_pc, &regs->Pc);
  327. wmb();
  328. return 0;
  329. }
  330. /*
  331. * Read a string from the EEPROM.
  332. */
  333. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  334. unsigned long offset,
  335. unsigned char *buf,
  336. unsigned long length)
  337. {
  338. struct rr_regs __iomem *regs = rrpriv->regs;
  339. u32 misc, io, host, i;
  340. io = readl(&regs->ExtIo);
  341. writel(0, &regs->ExtIo);
  342. misc = readl(&regs->LocalCtrl);
  343. writel(0, &regs->LocalCtrl);
  344. host = readl(&regs->HostCtrl);
  345. writel(host | HALT_NIC, &regs->HostCtrl);
  346. mb();
  347. for (i = 0; i < length; i++){
  348. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  349. mb();
  350. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  351. mb();
  352. }
  353. writel(host, &regs->HostCtrl);
  354. writel(misc, &regs->LocalCtrl);
  355. writel(io, &regs->ExtIo);
  356. mb();
  357. return i;
  358. }
  359. /*
  360. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  361. * it to our CPU byte-order.
  362. */
  363. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  364. size_t offset)
  365. {
  366. __be32 word;
  367. if ((rr_read_eeprom(rrpriv, offset,
  368. (unsigned char *)&word, 4) == 4))
  369. return be32_to_cpu(word);
  370. return 0;
  371. }
  372. /*
  373. * Write a string to the EEPROM.
  374. *
  375. * This is only called when the firmware is not running.
  376. */
  377. static unsigned int write_eeprom(struct rr_private *rrpriv,
  378. unsigned long offset,
  379. unsigned char *buf,
  380. unsigned long length)
  381. {
  382. struct rr_regs __iomem *regs = rrpriv->regs;
  383. u32 misc, io, data, i, j, ready, error = 0;
  384. io = readl(&regs->ExtIo);
  385. writel(0, &regs->ExtIo);
  386. misc = readl(&regs->LocalCtrl);
  387. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  388. mb();
  389. for (i = 0; i < length; i++){
  390. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  391. mb();
  392. data = buf[i] << 24;
  393. /*
  394. * Only try to write the data if it is not the same
  395. * value already.
  396. */
  397. if ((readl(&regs->WinData) & 0xff000000) != data){
  398. writel(data, &regs->WinData);
  399. ready = 0;
  400. j = 0;
  401. mb();
  402. while(!ready){
  403. udelay(20);
  404. if ((readl(&regs->WinData) & 0xff000000) ==
  405. data)
  406. ready = 1;
  407. mb();
  408. if (j++ > 5000){
  409. printk("data mismatch: %08x, "
  410. "WinData %08x\n", data,
  411. readl(&regs->WinData));
  412. ready = 1;
  413. error = 1;
  414. }
  415. }
  416. }
  417. }
  418. writel(misc, &regs->LocalCtrl);
  419. writel(io, &regs->ExtIo);
  420. mb();
  421. return error;
  422. }
  423. static int rr_init(struct net_device *dev)
  424. {
  425. u8 addr[HIPPI_ALEN] __aligned(4);
  426. struct rr_private *rrpriv;
  427. struct rr_regs __iomem *regs;
  428. u32 sram_size, rev;
  429. rrpriv = netdev_priv(dev);
  430. regs = rrpriv->regs;
  431. rev = readl(&regs->FwRev);
  432. rrpriv->fw_rev = rev;
  433. if (rev > 0x00020024)
  434. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  435. ((rev >> 8) & 0xff), (rev & 0xff));
  436. else if (rev >= 0x00020000) {
  437. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  438. "later is recommended)\n", (rev >> 16),
  439. ((rev >> 8) & 0xff), (rev & 0xff));
  440. }else{
  441. printk(" Firmware revision too old: %i.%i.%i, please "
  442. "upgrade to 2.0.37 or later.\n",
  443. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  444. }
  445. #if (DEBUG > 2)
  446. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  447. #endif
  448. /*
  449. * Read the hardware address from the eeprom. The HW address
  450. * is not really necessary for HIPPI but awfully convenient.
  451. * The pointer arithmetic to put it in dev_addr is ugly, but
  452. * Donald Becker does it this way for the GigE version of this
  453. * card and it's shorter and more portable than any
  454. * other method I've seen. -VAL
  455. */
  456. *(__be16 *)(addr) =
  457. htons(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA)));
  458. *(__be32 *)(addr+2) =
  459. htonl(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA[4])));
  460. dev_addr_set(dev, addr);
  461. printk(" MAC: %pM\n", dev->dev_addr);
  462. sram_size = rr_read_eeprom_word(rrpriv, 8);
  463. printk(" SRAM size 0x%06x\n", sram_size);
  464. return 0;
  465. }
  466. static int rr_init1(struct net_device *dev)
  467. {
  468. struct rr_private *rrpriv;
  469. struct rr_regs __iomem *regs;
  470. unsigned long myjif, flags;
  471. struct cmd cmd;
  472. u32 hostctrl;
  473. int ecode = 0;
  474. short i;
  475. rrpriv = netdev_priv(dev);
  476. regs = rrpriv->regs;
  477. spin_lock_irqsave(&rrpriv->lock, flags);
  478. hostctrl = readl(&regs->HostCtrl);
  479. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  480. wmb();
  481. if (hostctrl & PARITY_ERR){
  482. printk("%s: Parity error halting NIC - this is serious!\n",
  483. dev->name);
  484. spin_unlock_irqrestore(&rrpriv->lock, flags);
  485. ecode = -EFAULT;
  486. goto error;
  487. }
  488. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  489. set_infoaddr(regs, rrpriv->info_dma);
  490. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  491. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  492. rrpriv->info->evt_ctrl.mode = 0;
  493. rrpriv->info->evt_ctrl.pi = 0;
  494. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  495. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  496. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  497. rrpriv->info->cmd_ctrl.mode = 0;
  498. rrpriv->info->cmd_ctrl.pi = 15;
  499. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  500. writel(0, &regs->CmdRing[i]);
  501. }
  502. for (i = 0; i < TX_RING_ENTRIES; i++) {
  503. rrpriv->tx_ring[i].size = 0;
  504. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  505. rrpriv->tx_skbuff[i] = NULL;
  506. }
  507. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  508. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  509. rrpriv->info->tx_ctrl.mode = 0;
  510. rrpriv->info->tx_ctrl.pi = 0;
  511. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  512. /*
  513. * Set dirty_tx before we start receiving interrupts, otherwise
  514. * the interrupt handler might think it is supposed to process
  515. * tx ints before we are up and running, which may cause a null
  516. * pointer access in the int handler.
  517. */
  518. rrpriv->tx_full = 0;
  519. rrpriv->cur_rx = 0;
  520. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  521. rr_reset(dev);
  522. /* Tuning values */
  523. writel(0x5000, &regs->ConRetry);
  524. writel(0x100, &regs->ConRetryTmr);
  525. writel(0x500000, &regs->ConTmout);
  526. writel(0x60, &regs->IntrTmr);
  527. writel(0x500000, &regs->TxDataMvTimeout);
  528. writel(0x200000, &regs->RxDataMvTimeout);
  529. writel(0x80, &regs->WriteDmaThresh);
  530. writel(0x80, &regs->ReadDmaThresh);
  531. rrpriv->fw_running = 0;
  532. wmb();
  533. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  534. writel(hostctrl, &regs->HostCtrl);
  535. wmb();
  536. spin_unlock_irqrestore(&rrpriv->lock, flags);
  537. for (i = 0; i < RX_RING_ENTRIES; i++) {
  538. struct sk_buff *skb;
  539. dma_addr_t addr;
  540. rrpriv->rx_ring[i].mode = 0;
  541. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  542. if (!skb) {
  543. printk(KERN_WARNING "%s: Unable to allocate memory "
  544. "for receive ring - halting NIC\n", dev->name);
  545. ecode = -ENOMEM;
  546. goto error;
  547. }
  548. rrpriv->rx_skbuff[i] = skb;
  549. addr = dma_map_single(&rrpriv->pci_dev->dev, skb->data,
  550. dev->mtu + HIPPI_HLEN, DMA_FROM_DEVICE);
  551. /*
  552. * Sanity test to see if we conflict with the DMA
  553. * limitations of the Roadrunner.
  554. */
  555. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  556. printk("skb alloc error\n");
  557. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  558. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  559. }
  560. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  561. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  562. rrpriv->rx_ctrl[4].mode = 8;
  563. rrpriv->rx_ctrl[4].pi = 0;
  564. wmb();
  565. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  566. udelay(1000);
  567. /*
  568. * Now start the FirmWare.
  569. */
  570. cmd.code = C_START_FW;
  571. cmd.ring = 0;
  572. cmd.index = 0;
  573. rr_issue_cmd(rrpriv, &cmd);
  574. /*
  575. * Give the FirmWare time to chew on the `get running' command.
  576. */
  577. myjif = jiffies + 5 * HZ;
  578. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  579. cpu_relax();
  580. netif_start_queue(dev);
  581. return ecode;
  582. error:
  583. /*
  584. * We might have gotten here because we are out of memory,
  585. * make sure we release everything we allocated before failing
  586. */
  587. for (i = 0; i < RX_RING_ENTRIES; i++) {
  588. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  589. if (skb) {
  590. dma_unmap_single(&rrpriv->pci_dev->dev,
  591. rrpriv->rx_ring[i].addr.addrlo,
  592. dev->mtu + HIPPI_HLEN,
  593. DMA_FROM_DEVICE);
  594. rrpriv->rx_ring[i].size = 0;
  595. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  596. dev_kfree_skb(skb);
  597. rrpriv->rx_skbuff[i] = NULL;
  598. }
  599. }
  600. return ecode;
  601. }
  602. /*
  603. * All events are considered to be slow (RX/TX ints do not generate
  604. * events) and are handled here, outside the main interrupt handler,
  605. * to reduce the size of the handler.
  606. */
  607. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  608. {
  609. struct rr_private *rrpriv;
  610. struct rr_regs __iomem *regs;
  611. u32 tmp;
  612. rrpriv = netdev_priv(dev);
  613. regs = rrpriv->regs;
  614. while (prodidx != eidx){
  615. switch (rrpriv->evt_ring[eidx].code){
  616. case E_NIC_UP:
  617. tmp = readl(&regs->FwRev);
  618. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  619. "up and running\n", dev->name,
  620. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  621. rrpriv->fw_running = 1;
  622. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  623. wmb();
  624. break;
  625. case E_LINK_ON:
  626. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  627. break;
  628. case E_LINK_OFF:
  629. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  630. break;
  631. case E_RX_IDLE:
  632. printk(KERN_WARNING "%s: RX data not moving\n",
  633. dev->name);
  634. goto drop;
  635. case E_WATCHDOG:
  636. printk(KERN_INFO "%s: The watchdog is here to see "
  637. "us\n", dev->name);
  638. break;
  639. case E_INTERN_ERR:
  640. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  641. dev->name);
  642. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  643. &regs->HostCtrl);
  644. wmb();
  645. break;
  646. case E_HOST_ERR:
  647. printk(KERN_ERR "%s: Host software error\n",
  648. dev->name);
  649. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  650. &regs->HostCtrl);
  651. wmb();
  652. break;
  653. /*
  654. * TX events.
  655. */
  656. case E_CON_REJ:
  657. printk(KERN_WARNING "%s: Connection rejected\n",
  658. dev->name);
  659. dev->stats.tx_aborted_errors++;
  660. break;
  661. case E_CON_TMOUT:
  662. printk(KERN_WARNING "%s: Connection timeout\n",
  663. dev->name);
  664. break;
  665. case E_DISC_ERR:
  666. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  667. dev->name);
  668. dev->stats.tx_aborted_errors++;
  669. break;
  670. case E_INT_PRTY:
  671. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  672. dev->name);
  673. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  674. &regs->HostCtrl);
  675. wmb();
  676. break;
  677. case E_TX_IDLE:
  678. printk(KERN_WARNING "%s: Transmitter idle\n",
  679. dev->name);
  680. break;
  681. case E_TX_LINK_DROP:
  682. printk(KERN_WARNING "%s: Link lost during transmit\n",
  683. dev->name);
  684. dev->stats.tx_aborted_errors++;
  685. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  686. &regs->HostCtrl);
  687. wmb();
  688. break;
  689. case E_TX_INV_RNG:
  690. printk(KERN_ERR "%s: Invalid send ring block\n",
  691. dev->name);
  692. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  693. &regs->HostCtrl);
  694. wmb();
  695. break;
  696. case E_TX_INV_BUF:
  697. printk(KERN_ERR "%s: Invalid send buffer address\n",
  698. dev->name);
  699. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  700. &regs->HostCtrl);
  701. wmb();
  702. break;
  703. case E_TX_INV_DSC:
  704. printk(KERN_ERR "%s: Invalid descriptor address\n",
  705. dev->name);
  706. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  707. &regs->HostCtrl);
  708. wmb();
  709. break;
  710. /*
  711. * RX events.
  712. */
  713. case E_RX_RNG_OUT:
  714. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  715. break;
  716. case E_RX_PAR_ERR:
  717. printk(KERN_WARNING "%s: Receive parity error\n",
  718. dev->name);
  719. goto drop;
  720. case E_RX_LLRC_ERR:
  721. printk(KERN_WARNING "%s: Receive LLRC error\n",
  722. dev->name);
  723. goto drop;
  724. case E_PKT_LN_ERR:
  725. printk(KERN_WARNING "%s: Receive packet length "
  726. "error\n", dev->name);
  727. goto drop;
  728. case E_DTA_CKSM_ERR:
  729. printk(KERN_WARNING "%s: Data checksum error\n",
  730. dev->name);
  731. goto drop;
  732. case E_SHT_BST:
  733. printk(KERN_WARNING "%s: Unexpected short burst "
  734. "error\n", dev->name);
  735. goto drop;
  736. case E_STATE_ERR:
  737. printk(KERN_WARNING "%s: Recv. state transition"
  738. " error\n", dev->name);
  739. goto drop;
  740. case E_UNEXP_DATA:
  741. printk(KERN_WARNING "%s: Unexpected data error\n",
  742. dev->name);
  743. goto drop;
  744. case E_LST_LNK_ERR:
  745. printk(KERN_WARNING "%s: Link lost error\n",
  746. dev->name);
  747. goto drop;
  748. case E_FRM_ERR:
  749. printk(KERN_WARNING "%s: Framing Error\n",
  750. dev->name);
  751. goto drop;
  752. case E_FLG_SYN_ERR:
  753. printk(KERN_WARNING "%s: Flag sync. lost during "
  754. "packet\n", dev->name);
  755. goto drop;
  756. case E_RX_INV_BUF:
  757. printk(KERN_ERR "%s: Invalid receive buffer "
  758. "address\n", dev->name);
  759. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  760. &regs->HostCtrl);
  761. wmb();
  762. break;
  763. case E_RX_INV_DSC:
  764. printk(KERN_ERR "%s: Invalid receive descriptor "
  765. "address\n", dev->name);
  766. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  767. &regs->HostCtrl);
  768. wmb();
  769. break;
  770. case E_RNG_BLK:
  771. printk(KERN_ERR "%s: Invalid ring block\n",
  772. dev->name);
  773. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  774. &regs->HostCtrl);
  775. wmb();
  776. break;
  777. drop:
  778. /* Label packet to be dropped.
  779. * Actual dropping occurs in rx
  780. * handling.
  781. *
  782. * The index of packet we get to drop is
  783. * the index of the packet following
  784. * the bad packet. -kbf
  785. */
  786. {
  787. u16 index = rrpriv->evt_ring[eidx].index;
  788. index = (index + (RX_RING_ENTRIES - 1)) %
  789. RX_RING_ENTRIES;
  790. rrpriv->rx_ring[index].mode |=
  791. (PACKET_BAD | PACKET_END);
  792. }
  793. break;
  794. default:
  795. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  796. dev->name, rrpriv->evt_ring[eidx].code);
  797. }
  798. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  799. }
  800. rrpriv->info->evt_ctrl.pi = eidx;
  801. wmb();
  802. return eidx;
  803. }
  804. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  805. {
  806. struct rr_private *rrpriv = netdev_priv(dev);
  807. struct rr_regs __iomem *regs = rrpriv->regs;
  808. do {
  809. struct rx_desc *desc;
  810. u32 pkt_len;
  811. desc = &(rrpriv->rx_ring[index]);
  812. pkt_len = desc->size;
  813. #if (DEBUG > 2)
  814. printk("index %i, rxlimit %i\n", index, rxlimit);
  815. printk("len %x, mode %x\n", pkt_len, desc->mode);
  816. #endif
  817. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  818. dev->stats.rx_dropped++;
  819. goto defer;
  820. }
  821. if (pkt_len > 0){
  822. struct sk_buff *skb, *rx_skb;
  823. rx_skb = rrpriv->rx_skbuff[index];
  824. if (pkt_len < PKT_COPY_THRESHOLD) {
  825. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  826. if (skb == NULL){
  827. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  828. dev->stats.rx_dropped++;
  829. goto defer;
  830. } else {
  831. dma_sync_single_for_cpu(&rrpriv->pci_dev->dev,
  832. desc->addr.addrlo,
  833. pkt_len,
  834. DMA_FROM_DEVICE);
  835. skb_put_data(skb, rx_skb->data,
  836. pkt_len);
  837. dma_sync_single_for_device(&rrpriv->pci_dev->dev,
  838. desc->addr.addrlo,
  839. pkt_len,
  840. DMA_FROM_DEVICE);
  841. }
  842. }else{
  843. struct sk_buff *newskb;
  844. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  845. GFP_ATOMIC);
  846. if (newskb){
  847. dma_addr_t addr;
  848. dma_unmap_single(&rrpriv->pci_dev->dev,
  849. desc->addr.addrlo,
  850. dev->mtu + HIPPI_HLEN,
  851. DMA_FROM_DEVICE);
  852. skb = rx_skb;
  853. skb_put(skb, pkt_len);
  854. rrpriv->rx_skbuff[index] = newskb;
  855. addr = dma_map_single(&rrpriv->pci_dev->dev,
  856. newskb->data,
  857. dev->mtu + HIPPI_HLEN,
  858. DMA_FROM_DEVICE);
  859. set_rraddr(&desc->addr, addr);
  860. } else {
  861. printk("%s: Out of memory, deferring "
  862. "packet\n", dev->name);
  863. dev->stats.rx_dropped++;
  864. goto defer;
  865. }
  866. }
  867. skb->protocol = hippi_type_trans(skb, dev);
  868. netif_rx(skb); /* send it up */
  869. dev->stats.rx_packets++;
  870. dev->stats.rx_bytes += pkt_len;
  871. }
  872. defer:
  873. desc->mode = 0;
  874. desc->size = dev->mtu + HIPPI_HLEN;
  875. if ((index & 7) == 7)
  876. writel(index, &regs->IpRxPi);
  877. index = (index + 1) % RX_RING_ENTRIES;
  878. } while(index != rxlimit);
  879. rrpriv->cur_rx = index;
  880. wmb();
  881. }
  882. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  883. {
  884. struct rr_private *rrpriv;
  885. struct rr_regs __iomem *regs;
  886. struct net_device *dev = (struct net_device *)dev_id;
  887. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  888. rrpriv = netdev_priv(dev);
  889. regs = rrpriv->regs;
  890. if (!(readl(&regs->HostCtrl) & RR_INT))
  891. return IRQ_NONE;
  892. spin_lock(&rrpriv->lock);
  893. prodidx = readl(&regs->EvtPrd);
  894. txcsmr = (prodidx >> 8) & 0xff;
  895. rxlimit = (prodidx >> 16) & 0xff;
  896. prodidx &= 0xff;
  897. #if (DEBUG > 2)
  898. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  899. prodidx, rrpriv->info->evt_ctrl.pi);
  900. #endif
  901. /*
  902. * Order here is important. We must handle events
  903. * before doing anything else in order to catch
  904. * such things as LLRC errors, etc -kbf
  905. */
  906. eidx = rrpriv->info->evt_ctrl.pi;
  907. if (prodidx != eidx)
  908. eidx = rr_handle_event(dev, prodidx, eidx);
  909. rxindex = rrpriv->cur_rx;
  910. if (rxindex != rxlimit)
  911. rx_int(dev, rxlimit, rxindex);
  912. txcon = rrpriv->dirty_tx;
  913. if (txcsmr != txcon) {
  914. do {
  915. /* Due to occational firmware TX producer/consumer out
  916. * of sync. error need to check entry in ring -kbf
  917. */
  918. if(rrpriv->tx_skbuff[txcon]){
  919. struct tx_desc *desc;
  920. struct sk_buff *skb;
  921. desc = &(rrpriv->tx_ring[txcon]);
  922. skb = rrpriv->tx_skbuff[txcon];
  923. dev->stats.tx_packets++;
  924. dev->stats.tx_bytes += skb->len;
  925. dma_unmap_single(&rrpriv->pci_dev->dev,
  926. desc->addr.addrlo, skb->len,
  927. DMA_TO_DEVICE);
  928. dev_kfree_skb_irq(skb);
  929. rrpriv->tx_skbuff[txcon] = NULL;
  930. desc->size = 0;
  931. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  932. desc->mode = 0;
  933. }
  934. txcon = (txcon + 1) % TX_RING_ENTRIES;
  935. } while (txcsmr != txcon);
  936. wmb();
  937. rrpriv->dirty_tx = txcon;
  938. if (rrpriv->tx_full && rr_if_busy(dev) &&
  939. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  940. != rrpriv->dirty_tx)){
  941. rrpriv->tx_full = 0;
  942. netif_wake_queue(dev);
  943. }
  944. }
  945. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  946. writel(eidx, &regs->EvtCon);
  947. wmb();
  948. spin_unlock(&rrpriv->lock);
  949. return IRQ_HANDLED;
  950. }
  951. static inline void rr_raz_tx(struct rr_private *rrpriv,
  952. struct net_device *dev)
  953. {
  954. int i;
  955. for (i = 0; i < TX_RING_ENTRIES; i++) {
  956. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  957. if (skb) {
  958. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  959. dma_unmap_single(&rrpriv->pci_dev->dev,
  960. desc->addr.addrlo, skb->len,
  961. DMA_TO_DEVICE);
  962. desc->size = 0;
  963. set_rraddr(&desc->addr, 0);
  964. dev_kfree_skb(skb);
  965. rrpriv->tx_skbuff[i] = NULL;
  966. }
  967. }
  968. }
  969. static inline void rr_raz_rx(struct rr_private *rrpriv,
  970. struct net_device *dev)
  971. {
  972. int i;
  973. for (i = 0; i < RX_RING_ENTRIES; i++) {
  974. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  975. if (skb) {
  976. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  977. dma_unmap_single(&rrpriv->pci_dev->dev,
  978. desc->addr.addrlo,
  979. dev->mtu + HIPPI_HLEN,
  980. DMA_FROM_DEVICE);
  981. desc->size = 0;
  982. set_rraddr(&desc->addr, 0);
  983. dev_kfree_skb(skb);
  984. rrpriv->rx_skbuff[i] = NULL;
  985. }
  986. }
  987. }
  988. static void rr_timer(struct timer_list *t)
  989. {
  990. struct rr_private *rrpriv = from_timer(rrpriv, t, timer);
  991. struct net_device *dev = pci_get_drvdata(rrpriv->pci_dev);
  992. struct rr_regs __iomem *regs = rrpriv->regs;
  993. unsigned long flags;
  994. if (readl(&regs->HostCtrl) & NIC_HALTED){
  995. printk("%s: Restarting nic\n", dev->name);
  996. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  997. memset(rrpriv->info, 0, sizeof(struct rr_info));
  998. wmb();
  999. rr_raz_tx(rrpriv, dev);
  1000. rr_raz_rx(rrpriv, dev);
  1001. if (rr_init1(dev)) {
  1002. spin_lock_irqsave(&rrpriv->lock, flags);
  1003. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1004. &regs->HostCtrl);
  1005. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1006. }
  1007. }
  1008. rrpriv->timer.expires = RUN_AT(5*HZ);
  1009. add_timer(&rrpriv->timer);
  1010. }
  1011. static int rr_open(struct net_device *dev)
  1012. {
  1013. struct rr_private *rrpriv = netdev_priv(dev);
  1014. struct pci_dev *pdev = rrpriv->pci_dev;
  1015. struct rr_regs __iomem *regs;
  1016. int ecode = 0;
  1017. unsigned long flags;
  1018. dma_addr_t dma_addr;
  1019. regs = rrpriv->regs;
  1020. if (rrpriv->fw_rev < 0x00020000) {
  1021. printk(KERN_WARNING "%s: trying to configure device with "
  1022. "obsolete firmware\n", dev->name);
  1023. ecode = -EBUSY;
  1024. goto error;
  1025. }
  1026. rrpriv->rx_ctrl = dma_alloc_coherent(&pdev->dev,
  1027. 256 * sizeof(struct ring_ctrl),
  1028. &dma_addr, GFP_KERNEL);
  1029. if (!rrpriv->rx_ctrl) {
  1030. ecode = -ENOMEM;
  1031. goto error;
  1032. }
  1033. rrpriv->rx_ctrl_dma = dma_addr;
  1034. rrpriv->info = dma_alloc_coherent(&pdev->dev, sizeof(struct rr_info),
  1035. &dma_addr, GFP_KERNEL);
  1036. if (!rrpriv->info) {
  1037. ecode = -ENOMEM;
  1038. goto error;
  1039. }
  1040. rrpriv->info_dma = dma_addr;
  1041. wmb();
  1042. spin_lock_irqsave(&rrpriv->lock, flags);
  1043. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1044. readl(&regs->HostCtrl);
  1045. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1046. if (request_irq(pdev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1047. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1048. dev->name, pdev->irq);
  1049. ecode = -EAGAIN;
  1050. goto error;
  1051. }
  1052. if ((ecode = rr_init1(dev)))
  1053. goto error;
  1054. /* Set the timer to switch to check for link beat and perhaps switch
  1055. to an alternate media type. */
  1056. timer_setup(&rrpriv->timer, rr_timer, 0);
  1057. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1058. add_timer(&rrpriv->timer);
  1059. netif_start_queue(dev);
  1060. return ecode;
  1061. error:
  1062. spin_lock_irqsave(&rrpriv->lock, flags);
  1063. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1064. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1065. if (rrpriv->info) {
  1066. dma_free_coherent(&pdev->dev, sizeof(struct rr_info),
  1067. rrpriv->info, rrpriv->info_dma);
  1068. rrpriv->info = NULL;
  1069. }
  1070. if (rrpriv->rx_ctrl) {
  1071. dma_free_coherent(&pdev->dev, 256 * sizeof(struct ring_ctrl),
  1072. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1073. rrpriv->rx_ctrl = NULL;
  1074. }
  1075. netif_stop_queue(dev);
  1076. return ecode;
  1077. }
  1078. static void rr_dump(struct net_device *dev)
  1079. {
  1080. struct rr_private *rrpriv;
  1081. struct rr_regs __iomem *regs;
  1082. u32 index, cons;
  1083. short i;
  1084. int len;
  1085. rrpriv = netdev_priv(dev);
  1086. regs = rrpriv->regs;
  1087. printk("%s: dumping NIC TX rings\n", dev->name);
  1088. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1089. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1090. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1091. rrpriv->info->tx_ctrl.pi);
  1092. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1093. index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
  1094. cons = rrpriv->dirty_tx;
  1095. printk("TX ring index %i, TX consumer %i\n",
  1096. index, cons);
  1097. if (rrpriv->tx_skbuff[index]){
  1098. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1099. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1100. for (i = 0; i < len; i++){
  1101. if (!(i & 7))
  1102. printk("\n");
  1103. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1104. }
  1105. printk("\n");
  1106. }
  1107. if (rrpriv->tx_skbuff[cons]){
  1108. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1109. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1110. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %p, truesize 0x%x\n",
  1111. rrpriv->tx_ring[cons].mode,
  1112. rrpriv->tx_ring[cons].size,
  1113. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1114. rrpriv->tx_skbuff[cons]->data,
  1115. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1116. for (i = 0; i < len; i++){
  1117. if (!(i & 7))
  1118. printk("\n");
  1119. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1120. }
  1121. printk("\n");
  1122. }
  1123. printk("dumping TX ring info:\n");
  1124. for (i = 0; i < TX_RING_ENTRIES; i++)
  1125. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1126. rrpriv->tx_ring[i].mode,
  1127. rrpriv->tx_ring[i].size,
  1128. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1129. }
  1130. static int rr_close(struct net_device *dev)
  1131. {
  1132. struct rr_private *rrpriv = netdev_priv(dev);
  1133. struct rr_regs __iomem *regs = rrpriv->regs;
  1134. struct pci_dev *pdev = rrpriv->pci_dev;
  1135. unsigned long flags;
  1136. u32 tmp;
  1137. short i;
  1138. netif_stop_queue(dev);
  1139. /*
  1140. * Lock to make sure we are not cleaning up while another CPU
  1141. * is handling interrupts.
  1142. */
  1143. spin_lock_irqsave(&rrpriv->lock, flags);
  1144. tmp = readl(&regs->HostCtrl);
  1145. if (tmp & NIC_HALTED){
  1146. printk("%s: NIC already halted\n", dev->name);
  1147. rr_dump(dev);
  1148. }else{
  1149. tmp |= HALT_NIC | RR_CLEAR_INT;
  1150. writel(tmp, &regs->HostCtrl);
  1151. readl(&regs->HostCtrl);
  1152. }
  1153. rrpriv->fw_running = 0;
  1154. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1155. del_timer_sync(&rrpriv->timer);
  1156. spin_lock_irqsave(&rrpriv->lock, flags);
  1157. writel(0, &regs->TxPi);
  1158. writel(0, &regs->IpRxPi);
  1159. writel(0, &regs->EvtCon);
  1160. writel(0, &regs->EvtPrd);
  1161. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1162. writel(0, &regs->CmdRing[i]);
  1163. rrpriv->info->tx_ctrl.entries = 0;
  1164. rrpriv->info->cmd_ctrl.pi = 0;
  1165. rrpriv->info->evt_ctrl.pi = 0;
  1166. rrpriv->rx_ctrl[4].entries = 0;
  1167. rr_raz_tx(rrpriv, dev);
  1168. rr_raz_rx(rrpriv, dev);
  1169. dma_free_coherent(&pdev->dev, 256 * sizeof(struct ring_ctrl),
  1170. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1171. rrpriv->rx_ctrl = NULL;
  1172. dma_free_coherent(&pdev->dev, sizeof(struct rr_info), rrpriv->info,
  1173. rrpriv->info_dma);
  1174. rrpriv->info = NULL;
  1175. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1176. free_irq(pdev->irq, dev);
  1177. return 0;
  1178. }
  1179. static netdev_tx_t rr_start_xmit(struct sk_buff *skb,
  1180. struct net_device *dev)
  1181. {
  1182. struct rr_private *rrpriv = netdev_priv(dev);
  1183. struct rr_regs __iomem *regs = rrpriv->regs;
  1184. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1185. struct ring_ctrl *txctrl;
  1186. unsigned long flags;
  1187. u32 index, len = skb->len;
  1188. u32 *ifield;
  1189. struct sk_buff *new_skb;
  1190. if (readl(&regs->Mode) & FATAL_ERR)
  1191. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1192. readl(&regs->Fail1), readl(&regs->Fail2));
  1193. /*
  1194. * We probably need to deal with tbusy here to prevent overruns.
  1195. */
  1196. if (skb_headroom(skb) < 8){
  1197. printk("incoming skb too small - reallocating\n");
  1198. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1199. dev_kfree_skb(skb);
  1200. netif_wake_queue(dev);
  1201. return NETDEV_TX_OK;
  1202. }
  1203. skb_reserve(new_skb, 8);
  1204. skb_put(new_skb, len);
  1205. skb_copy_from_linear_data(skb, new_skb->data, len);
  1206. dev_kfree_skb(skb);
  1207. skb = new_skb;
  1208. }
  1209. ifield = skb_push(skb, 8);
  1210. ifield[0] = 0;
  1211. ifield[1] = hcb->ifield;
  1212. /*
  1213. * We don't need the lock before we are actually going to start
  1214. * fiddling with the control blocks.
  1215. */
  1216. spin_lock_irqsave(&rrpriv->lock, flags);
  1217. txctrl = &rrpriv->info->tx_ctrl;
  1218. index = txctrl->pi;
  1219. rrpriv->tx_skbuff[index] = skb;
  1220. set_rraddr(&rrpriv->tx_ring[index].addr,
  1221. dma_map_single(&rrpriv->pci_dev->dev, skb->data, len + 8, DMA_TO_DEVICE));
  1222. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1223. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1224. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1225. wmb();
  1226. writel(txctrl->pi, &regs->TxPi);
  1227. if (txctrl->pi == rrpriv->dirty_tx){
  1228. rrpriv->tx_full = 1;
  1229. netif_stop_queue(dev);
  1230. }
  1231. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1232. return NETDEV_TX_OK;
  1233. }
  1234. /*
  1235. * Read the firmware out of the EEPROM and put it into the SRAM
  1236. * (or from user space - later)
  1237. *
  1238. * This operation requires the NIC to be halted and is performed with
  1239. * interrupts disabled and with the spinlock hold.
  1240. */
  1241. static int rr_load_firmware(struct net_device *dev)
  1242. {
  1243. struct rr_private *rrpriv;
  1244. struct rr_regs __iomem *regs;
  1245. size_t eptr, segptr;
  1246. int i, j;
  1247. u32 localctrl, sptr, len, tmp;
  1248. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1249. rrpriv = netdev_priv(dev);
  1250. regs = rrpriv->regs;
  1251. if (dev->flags & IFF_UP)
  1252. return -EBUSY;
  1253. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1254. printk("%s: Trying to load firmware to a running NIC.\n",
  1255. dev->name);
  1256. return -EBUSY;
  1257. }
  1258. localctrl = readl(&regs->LocalCtrl);
  1259. writel(0, &regs->LocalCtrl);
  1260. writel(0, &regs->EvtPrd);
  1261. writel(0, &regs->RxPrd);
  1262. writel(0, &regs->TxPrd);
  1263. /*
  1264. * First wipe the entire SRAM, otherwise we might run into all
  1265. * kinds of trouble ... sigh, this took almost all afternoon
  1266. * to track down ;-(
  1267. */
  1268. io = readl(&regs->ExtIo);
  1269. writel(0, &regs->ExtIo);
  1270. sram_size = rr_read_eeprom_word(rrpriv, 8);
  1271. for (i = 200; i < sram_size / 4; i++){
  1272. writel(i * 4, &regs->WinBase);
  1273. mb();
  1274. writel(0, &regs->WinData);
  1275. mb();
  1276. }
  1277. writel(io, &regs->ExtIo);
  1278. mb();
  1279. eptr = rr_read_eeprom_word(rrpriv,
  1280. offsetof(struct eeprom, rncd_info.AddrRunCodeSegs));
  1281. eptr = ((eptr & 0x1fffff) >> 3);
  1282. p2len = rr_read_eeprom_word(rrpriv, 0x83*4);
  1283. p2len = (p2len << 2);
  1284. p2size = rr_read_eeprom_word(rrpriv, 0x84*4);
  1285. p2size = ((p2size & 0x1fffff) >> 3);
  1286. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1287. printk("%s: eptr is invalid\n", dev->name);
  1288. goto out;
  1289. }
  1290. revision = rr_read_eeprom_word(rrpriv,
  1291. offsetof(struct eeprom, manf.HeaderFmt));
  1292. if (revision != 1){
  1293. printk("%s: invalid firmware format (%i)\n",
  1294. dev->name, revision);
  1295. goto out;
  1296. }
  1297. nr_seg = rr_read_eeprom_word(rrpriv, eptr);
  1298. eptr +=4;
  1299. #if (DEBUG > 1)
  1300. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1301. #endif
  1302. for (i = 0; i < nr_seg; i++){
  1303. sptr = rr_read_eeprom_word(rrpriv, eptr);
  1304. eptr += 4;
  1305. len = rr_read_eeprom_word(rrpriv, eptr);
  1306. eptr += 4;
  1307. segptr = rr_read_eeprom_word(rrpriv, eptr);
  1308. segptr = ((segptr & 0x1fffff) >> 3);
  1309. eptr += 4;
  1310. #if (DEBUG > 1)
  1311. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1312. dev->name, i, sptr, len, segptr);
  1313. #endif
  1314. for (j = 0; j < len; j++){
  1315. tmp = rr_read_eeprom_word(rrpriv, segptr);
  1316. writel(sptr, &regs->WinBase);
  1317. mb();
  1318. writel(tmp, &regs->WinData);
  1319. mb();
  1320. segptr += 4;
  1321. sptr += 4;
  1322. }
  1323. }
  1324. out:
  1325. writel(localctrl, &regs->LocalCtrl);
  1326. mb();
  1327. return 0;
  1328. }
  1329. static int rr_siocdevprivate(struct net_device *dev, struct ifreq *rq,
  1330. void __user *data, int cmd)
  1331. {
  1332. struct rr_private *rrpriv;
  1333. unsigned char *image, *oldimage;
  1334. unsigned long flags;
  1335. unsigned int i;
  1336. int error = -EOPNOTSUPP;
  1337. rrpriv = netdev_priv(dev);
  1338. switch(cmd){
  1339. case SIOCRRGFW:
  1340. if (!capable(CAP_SYS_RAWIO)){
  1341. return -EPERM;
  1342. }
  1343. image = kmalloc_array(EEPROM_WORDS, sizeof(u32), GFP_KERNEL);
  1344. if (!image)
  1345. return -ENOMEM;
  1346. if (rrpriv->fw_running){
  1347. printk("%s: Firmware already running\n", dev->name);
  1348. error = -EPERM;
  1349. goto gf_out;
  1350. }
  1351. spin_lock_irqsave(&rrpriv->lock, flags);
  1352. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1353. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1354. if (i != EEPROM_BYTES){
  1355. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1356. dev->name);
  1357. error = -EFAULT;
  1358. goto gf_out;
  1359. }
  1360. error = copy_to_user(data, image, EEPROM_BYTES);
  1361. if (error)
  1362. error = -EFAULT;
  1363. gf_out:
  1364. kfree(image);
  1365. return error;
  1366. case SIOCRRPFW:
  1367. if (!capable(CAP_SYS_RAWIO)){
  1368. return -EPERM;
  1369. }
  1370. image = memdup_user(data, EEPROM_BYTES);
  1371. if (IS_ERR(image))
  1372. return PTR_ERR(image);
  1373. oldimage = kmalloc(EEPROM_BYTES, GFP_KERNEL);
  1374. if (!oldimage) {
  1375. kfree(image);
  1376. return -ENOMEM;
  1377. }
  1378. if (rrpriv->fw_running){
  1379. printk("%s: Firmware already running\n", dev->name);
  1380. error = -EPERM;
  1381. goto wf_out;
  1382. }
  1383. printk("%s: Updating EEPROM firmware\n", dev->name);
  1384. spin_lock_irqsave(&rrpriv->lock, flags);
  1385. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1386. if (error)
  1387. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1388. dev->name);
  1389. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1390. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1391. if (i != EEPROM_BYTES)
  1392. printk(KERN_ERR "%s: Error reading back EEPROM "
  1393. "image\n", dev->name);
  1394. error = memcmp(image, oldimage, EEPROM_BYTES);
  1395. if (error){
  1396. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1397. dev->name);
  1398. error = -EFAULT;
  1399. }
  1400. wf_out:
  1401. kfree(oldimage);
  1402. kfree(image);
  1403. return error;
  1404. case SIOCRRID:
  1405. return put_user(0x52523032, (int __user *)data);
  1406. default:
  1407. return error;
  1408. }
  1409. }
  1410. static const struct pci_device_id rr_pci_tbl[] = {
  1411. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1412. PCI_ANY_ID, PCI_ANY_ID, },
  1413. { 0,}
  1414. };
  1415. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1416. static struct pci_driver rr_driver = {
  1417. .name = "rrunner",
  1418. .id_table = rr_pci_tbl,
  1419. .probe = rr_init_one,
  1420. .remove = rr_remove_one,
  1421. };
  1422. module_pci_driver(rr_driver);