ixgbevf.h 15 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright(c) 1999 - 2018 Intel Corporation. */
  3. #ifndef _IXGBEVF_H_
  4. #define _IXGBEVF_H_
  5. #include <linux/types.h>
  6. #include <linux/bitops.h>
  7. #include <linux/timer.h>
  8. #include <linux/io.h>
  9. #include <linux/netdevice.h>
  10. #include <linux/if_vlan.h>
  11. #include <linux/u64_stats_sync.h>
  12. #include <net/xdp.h>
  13. #include "vf.h"
  14. #include "ipsec.h"
  15. #define IXGBE_MAX_TXD_PWR 14
  16. #define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR)
  17. /* Tx Descriptors needed, worst case */
  18. #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
  19. #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
  20. /* wrapper around a pointer to a socket buffer,
  21. * so a DMA handle can be stored along with the buffer
  22. */
  23. struct ixgbevf_tx_buffer {
  24. union ixgbe_adv_tx_desc *next_to_watch;
  25. unsigned long time_stamp;
  26. union {
  27. struct sk_buff *skb;
  28. /* XDP uses address ptr on irq_clean */
  29. void *data;
  30. };
  31. unsigned int bytecount;
  32. unsigned short gso_segs;
  33. __be16 protocol;
  34. DEFINE_DMA_UNMAP_ADDR(dma);
  35. DEFINE_DMA_UNMAP_LEN(len);
  36. u32 tx_flags;
  37. };
  38. struct ixgbevf_rx_buffer {
  39. dma_addr_t dma;
  40. struct page *page;
  41. #if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536)
  42. __u32 page_offset;
  43. #else
  44. __u16 page_offset;
  45. #endif
  46. __u16 pagecnt_bias;
  47. };
  48. struct ixgbevf_stats {
  49. u64 packets;
  50. u64 bytes;
  51. };
  52. struct ixgbevf_tx_queue_stats {
  53. u64 restart_queue;
  54. u64 tx_busy;
  55. u64 tx_done_old;
  56. };
  57. struct ixgbevf_rx_queue_stats {
  58. u64 alloc_rx_page_failed;
  59. u64 alloc_rx_buff_failed;
  60. u64 alloc_rx_page;
  61. u64 csum_err;
  62. };
  63. enum ixgbevf_ring_state_t {
  64. __IXGBEVF_RX_3K_BUFFER,
  65. __IXGBEVF_RX_BUILD_SKB_ENABLED,
  66. __IXGBEVF_TX_DETECT_HANG,
  67. __IXGBEVF_HANG_CHECK_ARMED,
  68. __IXGBEVF_TX_XDP_RING,
  69. __IXGBEVF_TX_XDP_RING_PRIMED,
  70. };
  71. #define ring_is_xdp(ring) \
  72. test_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state)
  73. #define set_ring_xdp(ring) \
  74. set_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state)
  75. #define clear_ring_xdp(ring) \
  76. clear_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state)
  77. struct ixgbevf_ring {
  78. struct ixgbevf_ring *next;
  79. struct ixgbevf_q_vector *q_vector; /* backpointer to q_vector */
  80. struct net_device *netdev;
  81. struct bpf_prog *xdp_prog;
  82. struct device *dev;
  83. void *desc; /* descriptor ring memory */
  84. dma_addr_t dma; /* phys. address of descriptor ring */
  85. unsigned int size; /* length in bytes */
  86. u16 count; /* amount of descriptors */
  87. u16 next_to_use;
  88. u16 next_to_clean;
  89. u16 next_to_alloc;
  90. union {
  91. struct ixgbevf_tx_buffer *tx_buffer_info;
  92. struct ixgbevf_rx_buffer *rx_buffer_info;
  93. };
  94. unsigned long state;
  95. struct ixgbevf_stats stats;
  96. struct u64_stats_sync syncp;
  97. union {
  98. struct ixgbevf_tx_queue_stats tx_stats;
  99. struct ixgbevf_rx_queue_stats rx_stats;
  100. };
  101. struct xdp_rxq_info xdp_rxq;
  102. u64 hw_csum_rx_error;
  103. u8 __iomem *tail;
  104. struct sk_buff *skb;
  105. /* holds the special value that gets the hardware register offset
  106. * associated with this ring, which is different for DCB and RSS modes
  107. */
  108. u16 reg_idx;
  109. int queue_index; /* needed for multiqueue queue management */
  110. } ____cacheline_internodealigned_in_smp;
  111. /* How many Rx Buffers do we bundle into one write to the hardware ? */
  112. #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
  113. #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
  114. #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
  115. #define MAX_XDP_QUEUES IXGBE_VF_MAX_TX_QUEUES
  116. #define IXGBEVF_MAX_RSS_QUEUES 2
  117. #define IXGBEVF_82599_RETA_SIZE 128 /* 128 entries */
  118. #define IXGBEVF_X550_VFRETA_SIZE 64 /* 64 entries */
  119. #define IXGBEVF_RSS_HASH_KEY_SIZE 40
  120. #define IXGBEVF_VFRSSRK_REGS 10 /* 10 registers for RSS key */
  121. #define IXGBEVF_DEFAULT_TXD 1024
  122. #define IXGBEVF_DEFAULT_RXD 512
  123. #define IXGBEVF_MAX_TXD 4096
  124. #define IXGBEVF_MIN_TXD 64
  125. #define IXGBEVF_MAX_RXD 4096
  126. #define IXGBEVF_MIN_RXD 64
  127. /* Supported Rx Buffer Sizes */
  128. #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
  129. #define IXGBEVF_RXBUFFER_2048 2048
  130. #define IXGBEVF_RXBUFFER_3072 3072
  131. #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
  132. #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
  133. #define IXGBEVF_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)
  134. #if (PAGE_SIZE < 8192)
  135. #define IXGBEVF_MAX_FRAME_BUILD_SKB \
  136. (SKB_WITH_OVERHEAD(IXGBEVF_RXBUFFER_2048) - IXGBEVF_SKB_PAD)
  137. #else
  138. #define IXGBEVF_MAX_FRAME_BUILD_SKB IXGBEVF_RXBUFFER_2048
  139. #endif
  140. #define IXGBE_TX_FLAGS_CSUM BIT(0)
  141. #define IXGBE_TX_FLAGS_VLAN BIT(1)
  142. #define IXGBE_TX_FLAGS_TSO BIT(2)
  143. #define IXGBE_TX_FLAGS_IPV4 BIT(3)
  144. #define IXGBE_TX_FLAGS_IPSEC BIT(4)
  145. #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
  146. #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
  147. #define IXGBE_TX_FLAGS_VLAN_SHIFT 16
  148. #define ring_uses_large_buffer(ring) \
  149. test_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state)
  150. #define set_ring_uses_large_buffer(ring) \
  151. set_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state)
  152. #define clear_ring_uses_large_buffer(ring) \
  153. clear_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state)
  154. #define ring_uses_build_skb(ring) \
  155. test_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state)
  156. #define set_ring_build_skb_enabled(ring) \
  157. set_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state)
  158. #define clear_ring_build_skb_enabled(ring) \
  159. clear_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state)
  160. static inline unsigned int ixgbevf_rx_bufsz(struct ixgbevf_ring *ring)
  161. {
  162. #if (PAGE_SIZE < 8192)
  163. if (ring_uses_large_buffer(ring))
  164. return IXGBEVF_RXBUFFER_3072;
  165. if (ring_uses_build_skb(ring))
  166. return IXGBEVF_MAX_FRAME_BUILD_SKB;
  167. #endif
  168. return IXGBEVF_RXBUFFER_2048;
  169. }
  170. static inline unsigned int ixgbevf_rx_pg_order(struct ixgbevf_ring *ring)
  171. {
  172. #if (PAGE_SIZE < 8192)
  173. if (ring_uses_large_buffer(ring))
  174. return 1;
  175. #endif
  176. return 0;
  177. }
  178. #define ixgbevf_rx_pg_size(_ring) (PAGE_SIZE << ixgbevf_rx_pg_order(_ring))
  179. #define check_for_tx_hang(ring) \
  180. test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  181. #define set_check_for_tx_hang(ring) \
  182. set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  183. #define clear_check_for_tx_hang(ring) \
  184. clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  185. struct ixgbevf_ring_container {
  186. struct ixgbevf_ring *ring; /* pointer to linked list of rings */
  187. unsigned int total_bytes; /* total bytes processed this int */
  188. unsigned int total_packets; /* total packets processed this int */
  189. u8 count; /* total number of rings in vector */
  190. u8 itr; /* current ITR setting for ring */
  191. };
  192. /* iterator for handling rings in ring container */
  193. #define ixgbevf_for_each_ring(pos, head) \
  194. for (pos = (head).ring; pos != NULL; pos = pos->next)
  195. /* MAX_MSIX_Q_VECTORS of these are allocated,
  196. * but we only use one per queue-specific vector.
  197. */
  198. struct ixgbevf_q_vector {
  199. struct ixgbevf_adapter *adapter;
  200. /* index of q_vector within array, also used for finding the bit in
  201. * EICR and friends that represents the vector for this ring
  202. */
  203. u16 v_idx;
  204. u16 itr; /* Interrupt throttle rate written to EITR */
  205. struct napi_struct napi;
  206. struct ixgbevf_ring_container rx, tx;
  207. struct rcu_head rcu; /* to avoid race with update stats on free */
  208. char name[IFNAMSIZ + 9];
  209. /* for dynamic allocation of rings associated with this q_vector */
  210. struct ixgbevf_ring ring[0] ____cacheline_internodealigned_in_smp;
  211. #ifdef CONFIG_NET_RX_BUSY_POLL
  212. unsigned int state;
  213. #define IXGBEVF_QV_STATE_IDLE 0
  214. #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */
  215. #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */
  216. #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */
  217. #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
  218. #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
  219. #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */
  220. #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */
  221. #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \
  222. IXGBEVF_QV_STATE_POLL_YIELD)
  223. #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \
  224. IXGBEVF_QV_STATE_POLL_YIELD)
  225. spinlock_t lock;
  226. #endif /* CONFIG_NET_RX_BUSY_POLL */
  227. };
  228. /* microsecond values for various ITR rates shifted by 2 to fit itr register
  229. * with the first 3 bits reserved 0
  230. */
  231. #define IXGBE_MIN_RSC_ITR 24
  232. #define IXGBE_100K_ITR 40
  233. #define IXGBE_20K_ITR 200
  234. #define IXGBE_12K_ITR 336
  235. /* Helper macros to switch between ints/sec and what the register uses.
  236. * And yes, it's the same math going both ways. The lowest value
  237. * supported by all of the ixgbe hardware is 8.
  238. */
  239. #define EITR_INTS_PER_SEC_TO_REG(_eitr) \
  240. ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
  241. #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
  242. /* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */
  243. static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
  244. const u32 stat_err_bits)
  245. {
  246. return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
  247. }
  248. static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring)
  249. {
  250. u16 ntc = ring->next_to_clean;
  251. u16 ntu = ring->next_to_use;
  252. return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
  253. }
  254. static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value)
  255. {
  256. writel(value, ring->tail);
  257. }
  258. #define IXGBEVF_RX_DESC(R, i) \
  259. (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
  260. #define IXGBEVF_TX_DESC(R, i) \
  261. (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
  262. #define IXGBEVF_TX_CTXTDESC(R, i) \
  263. (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
  264. #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */
  265. #define OTHER_VECTOR 1
  266. #define NON_Q_VECTORS (OTHER_VECTOR)
  267. #define MAX_MSIX_Q_VECTORS 2
  268. #define MIN_MSIX_Q_VECTORS 1
  269. #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
  270. #define IXGBEVF_RX_DMA_ATTR \
  271. (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
  272. /* board specific private data structure */
  273. struct ixgbevf_adapter {
  274. /* this field must be first, see ixgbevf_process_skb_fields */
  275. unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
  276. struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
  277. /* Interrupt Throttle Rate */
  278. u16 rx_itr_setting;
  279. u16 tx_itr_setting;
  280. /* interrupt masks */
  281. u32 eims_enable_mask;
  282. u32 eims_other;
  283. /* XDP */
  284. int num_xdp_queues;
  285. struct ixgbevf_ring *xdp_ring[MAX_XDP_QUEUES];
  286. /* TX */
  287. int num_tx_queues;
  288. struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */
  289. u64 restart_queue;
  290. u32 tx_timeout_count;
  291. u64 tx_ipsec;
  292. /* RX */
  293. int num_rx_queues;
  294. struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
  295. u64 hw_csum_rx_error;
  296. u64 hw_rx_no_dma_resources;
  297. int num_msix_vectors;
  298. u64 alloc_rx_page_failed;
  299. u64 alloc_rx_buff_failed;
  300. u64 alloc_rx_page;
  301. u64 rx_ipsec;
  302. struct msix_entry *msix_entries;
  303. /* OS defined structs */
  304. struct net_device *netdev;
  305. struct bpf_prog *xdp_prog;
  306. struct pci_dev *pdev;
  307. /* structs defined in ixgbe_vf.h */
  308. struct ixgbe_hw hw;
  309. u16 msg_enable;
  310. /* Interrupt Throttle Rate */
  311. u32 eitr_param;
  312. struct ixgbevf_hw_stats stats;
  313. unsigned long state;
  314. u64 tx_busy;
  315. unsigned int tx_ring_count;
  316. unsigned int xdp_ring_count;
  317. unsigned int rx_ring_count;
  318. u8 __iomem *io_addr; /* Mainly for iounmap use */
  319. u32 link_speed;
  320. bool link_up;
  321. struct timer_list service_timer;
  322. struct work_struct service_task;
  323. spinlock_t mbx_lock;
  324. unsigned long last_reset;
  325. u32 *rss_key;
  326. u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE];
  327. u32 flags;
  328. bool link_state;
  329. #define IXGBEVF_FLAGS_LEGACY_RX BIT(1)
  330. #ifdef CONFIG_XFRM
  331. struct ixgbevf_ipsec *ipsec;
  332. #endif /* CONFIG_XFRM */
  333. };
  334. enum ixbgevf_state_t {
  335. __IXGBEVF_TESTING,
  336. __IXGBEVF_RESETTING,
  337. __IXGBEVF_DOWN,
  338. __IXGBEVF_DISABLED,
  339. __IXGBEVF_REMOVING,
  340. __IXGBEVF_SERVICE_SCHED,
  341. __IXGBEVF_SERVICE_INITED,
  342. __IXGBEVF_RESET_REQUESTED,
  343. __IXGBEVF_QUEUE_RESET_REQUESTED,
  344. };
  345. enum ixgbevf_boards {
  346. board_82599_vf,
  347. board_82599_vf_hv,
  348. board_X540_vf,
  349. board_X540_vf_hv,
  350. board_X550_vf,
  351. board_X550_vf_hv,
  352. board_X550EM_x_vf,
  353. board_X550EM_x_vf_hv,
  354. board_x550em_a_vf,
  355. };
  356. enum ixgbevf_xcast_modes {
  357. IXGBEVF_XCAST_MODE_NONE = 0,
  358. IXGBEVF_XCAST_MODE_MULTI,
  359. IXGBEVF_XCAST_MODE_ALLMULTI,
  360. IXGBEVF_XCAST_MODE_PROMISC,
  361. };
  362. extern const struct ixgbevf_info ixgbevf_82599_vf_info;
  363. extern const struct ixgbevf_info ixgbevf_X540_vf_info;
  364. extern const struct ixgbevf_info ixgbevf_X550_vf_info;
  365. extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info;
  366. extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
  367. extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops_legacy;
  368. extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info;
  369. extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info;
  370. extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info;
  371. extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info;
  372. extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info;
  373. extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops;
  374. /* needed by ethtool.c */
  375. extern const char ixgbevf_driver_name[];
  376. int ixgbevf_open(struct net_device *netdev);
  377. int ixgbevf_close(struct net_device *netdev);
  378. void ixgbevf_up(struct ixgbevf_adapter *adapter);
  379. void ixgbevf_down(struct ixgbevf_adapter *adapter);
  380. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
  381. void ixgbevf_reset(struct ixgbevf_adapter *adapter);
  382. void ixgbevf_set_ethtool_ops(struct net_device *netdev);
  383. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  384. struct ixgbevf_ring *rx_ring);
  385. int ixgbevf_setup_tx_resources(struct ixgbevf_ring *);
  386. void ixgbevf_free_rx_resources(struct ixgbevf_ring *);
  387. void ixgbevf_free_tx_resources(struct ixgbevf_ring *);
  388. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
  389. int ethtool_ioctl(struct ifreq *ifr);
  390. extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
  391. #ifdef CONFIG_IXGBEVF_IPSEC
  392. void ixgbevf_init_ipsec_offload(struct ixgbevf_adapter *adapter);
  393. void ixgbevf_stop_ipsec_offload(struct ixgbevf_adapter *adapter);
  394. void ixgbevf_ipsec_restore(struct ixgbevf_adapter *adapter);
  395. void ixgbevf_ipsec_rx(struct ixgbevf_ring *rx_ring,
  396. union ixgbe_adv_rx_desc *rx_desc,
  397. struct sk_buff *skb);
  398. int ixgbevf_ipsec_tx(struct ixgbevf_ring *tx_ring,
  399. struct ixgbevf_tx_buffer *first,
  400. struct ixgbevf_ipsec_tx_data *itd);
  401. #else
  402. static inline void ixgbevf_init_ipsec_offload(struct ixgbevf_adapter *adapter)
  403. { }
  404. static inline void ixgbevf_stop_ipsec_offload(struct ixgbevf_adapter *adapter)
  405. { }
  406. static inline void ixgbevf_ipsec_restore(struct ixgbevf_adapter *adapter) { }
  407. static inline void ixgbevf_ipsec_rx(struct ixgbevf_ring *rx_ring,
  408. union ixgbe_adv_rx_desc *rx_desc,
  409. struct sk_buff *skb) { }
  410. static inline int ixgbevf_ipsec_tx(struct ixgbevf_ring *tx_ring,
  411. struct ixgbevf_tx_buffer *first,
  412. struct ixgbevf_ipsec_tx_data *itd)
  413. { return 0; }
  414. #endif /* CONFIG_IXGBEVF_IPSEC */
  415. void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
  416. void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
  417. #define ixgbevf_hw_to_netdev(hw) \
  418. (((struct ixgbevf_adapter *)(hw)->back)->netdev)
  419. #define hw_dbg(hw, format, arg...) \
  420. netdev_dbg(ixgbevf_hw_to_netdev(hw), format, ## arg)
  421. s32 ixgbevf_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size);
  422. s32 ixgbevf_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size);
  423. #endif /* _IXGBEVF_H_ */