phy.c 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Marvell 88e6xxx Ethernet switch PHY and PPU support
  4. *
  5. * Copyright (c) 2008 Marvell Semiconductor
  6. *
  7. * Copyright (c) 2017 Andrew Lunn <[email protected]>
  8. */
  9. #include <linux/mdio.h>
  10. #include <linux/module.h>
  11. #include "chip.h"
  12. #include "phy.h"
  13. int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  14. int addr, int reg, u16 *val)
  15. {
  16. return mv88e6xxx_read(chip, addr, reg, val);
  17. }
  18. int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  19. int addr, int reg, u16 val)
  20. {
  21. return mv88e6xxx_write(chip, addr, reg, val);
  22. }
  23. int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
  24. {
  25. int addr = phy; /* PHY devices addresses start at 0x0 */
  26. struct mii_bus *bus;
  27. bus = mv88e6xxx_default_mdio_bus(chip);
  28. if (!bus)
  29. return -EOPNOTSUPP;
  30. if (!chip->info->ops->phy_read)
  31. return -EOPNOTSUPP;
  32. return chip->info->ops->phy_read(chip, bus, addr, reg, val);
  33. }
  34. int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
  35. {
  36. int addr = phy; /* PHY devices addresses start at 0x0 */
  37. struct mii_bus *bus;
  38. bus = mv88e6xxx_default_mdio_bus(chip);
  39. if (!bus)
  40. return -EOPNOTSUPP;
  41. if (!chip->info->ops->phy_write)
  42. return -EOPNOTSUPP;
  43. return chip->info->ops->phy_write(chip, bus, addr, reg, val);
  44. }
  45. static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
  46. {
  47. return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
  48. }
  49. static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
  50. {
  51. int err;
  52. /* Restore PHY page Copper 0x0 for access via the registered
  53. * MDIO bus
  54. */
  55. err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
  56. MV88E6XXX_PHY_PAGE_COPPER);
  57. if (unlikely(err)) {
  58. dev_err(chip->dev,
  59. "failed to restore PHY %d page Copper (%d)\n",
  60. phy, err);
  61. }
  62. }
  63. int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
  64. u8 page, int reg, u16 *val)
  65. {
  66. int err;
  67. /* There is no paging for registers 22 */
  68. if (reg == MV88E6XXX_PHY_PAGE)
  69. return -EINVAL;
  70. err = mv88e6xxx_phy_page_get(chip, phy, page);
  71. if (!err) {
  72. err = mv88e6xxx_phy_read(chip, phy, reg, val);
  73. mv88e6xxx_phy_page_put(chip, phy);
  74. }
  75. return err;
  76. }
  77. int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
  78. u8 page, int reg, u16 val)
  79. {
  80. int err;
  81. /* There is no paging for registers 22 */
  82. if (reg == MV88E6XXX_PHY_PAGE)
  83. return -EINVAL;
  84. err = mv88e6xxx_phy_page_get(chip, phy, page);
  85. if (!err) {
  86. err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
  87. if (!err)
  88. err = mv88e6xxx_phy_write(chip, phy, reg, val);
  89. mv88e6xxx_phy_page_put(chip, phy);
  90. }
  91. return err;
  92. }
  93. static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
  94. {
  95. if (!chip->info->ops->ppu_disable)
  96. return 0;
  97. return chip->info->ops->ppu_disable(chip);
  98. }
  99. static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
  100. {
  101. if (!chip->info->ops->ppu_enable)
  102. return 0;
  103. return chip->info->ops->ppu_enable(chip);
  104. }
  105. static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
  106. {
  107. struct mv88e6xxx_chip *chip;
  108. chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
  109. mv88e6xxx_reg_lock(chip);
  110. if (mutex_trylock(&chip->ppu_mutex)) {
  111. if (mv88e6xxx_phy_ppu_enable(chip) == 0)
  112. chip->ppu_disabled = 0;
  113. mutex_unlock(&chip->ppu_mutex);
  114. }
  115. mv88e6xxx_reg_unlock(chip);
  116. }
  117. static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
  118. {
  119. struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
  120. schedule_work(&chip->ppu_work);
  121. }
  122. static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
  123. {
  124. int ret;
  125. mutex_lock(&chip->ppu_mutex);
  126. /* If the PHY polling unit is enabled, disable it so that
  127. * we can access the PHY registers. If it was already
  128. * disabled, cancel the timer that is going to re-enable
  129. * it.
  130. */
  131. if (!chip->ppu_disabled) {
  132. ret = mv88e6xxx_phy_ppu_disable(chip);
  133. if (ret < 0) {
  134. mutex_unlock(&chip->ppu_mutex);
  135. return ret;
  136. }
  137. chip->ppu_disabled = 1;
  138. } else {
  139. del_timer(&chip->ppu_timer);
  140. ret = 0;
  141. }
  142. return ret;
  143. }
  144. static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
  145. {
  146. /* Schedule a timer to re-enable the PHY polling unit. */
  147. mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
  148. mutex_unlock(&chip->ppu_mutex);
  149. }
  150. static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
  151. {
  152. mutex_init(&chip->ppu_mutex);
  153. INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
  154. timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
  155. }
  156. static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
  157. {
  158. del_timer_sync(&chip->ppu_timer);
  159. }
  160. int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  161. int addr, int reg, u16 *val)
  162. {
  163. int err;
  164. err = mv88e6xxx_phy_ppu_access_get(chip);
  165. if (!err) {
  166. err = mv88e6xxx_read(chip, addr, reg, val);
  167. mv88e6xxx_phy_ppu_access_put(chip);
  168. }
  169. return err;
  170. }
  171. int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  172. int addr, int reg, u16 val)
  173. {
  174. int err;
  175. err = mv88e6xxx_phy_ppu_access_get(chip);
  176. if (!err) {
  177. err = mv88e6xxx_write(chip, addr, reg, val);
  178. mv88e6xxx_phy_ppu_access_put(chip);
  179. }
  180. return err;
  181. }
  182. void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
  183. {
  184. if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
  185. mv88e6xxx_phy_ppu_state_init(chip);
  186. }
  187. void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
  188. {
  189. if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
  190. mv88e6xxx_phy_ppu_state_destroy(chip);
  191. }
  192. int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
  193. {
  194. return mv88e6xxx_phy_ppu_enable(chip);
  195. }