janz-ican3.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
  4. *
  5. * Copyright (c) 2010 Ira W. Snyder <[email protected]>
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/delay.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/netdevice.h>
  14. #include <linux/can.h>
  15. #include <linux/can/dev.h>
  16. #include <linux/can/skb.h>
  17. #include <linux/can/error.h>
  18. #include <linux/mfd/janz.h>
  19. #include <asm/io.h>
  20. /* the DPM has 64k of memory, organized into 256x 256 byte pages */
  21. #define DPM_NUM_PAGES 256
  22. #define DPM_PAGE_SIZE 256
  23. #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
  24. /* JANZ ICAN3 "old-style" host interface queue page numbers */
  25. #define QUEUE_OLD_CONTROL 0
  26. #define QUEUE_OLD_RB0 1
  27. #define QUEUE_OLD_RB1 2
  28. #define QUEUE_OLD_WB0 3
  29. #define QUEUE_OLD_WB1 4
  30. /* Janz ICAN3 "old-style" host interface control registers */
  31. #define MSYNC_PEER 0x00 /* ICAN only */
  32. #define MSYNC_LOCL 0x01 /* host only */
  33. #define TARGET_RUNNING 0x02
  34. #define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
  35. #define MSYNC_RB0 0x01
  36. #define MSYNC_RB1 0x02
  37. #define MSYNC_RBLW 0x04
  38. #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
  39. #define MSYNC_WB0 0x10
  40. #define MSYNC_WB1 0x20
  41. #define MSYNC_WBLW 0x40
  42. #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
  43. /* Janz ICAN3 "new-style" host interface queue page numbers */
  44. #define QUEUE_TOHOST 5
  45. #define QUEUE_FROMHOST_MID 6
  46. #define QUEUE_FROMHOST_HIGH 7
  47. #define QUEUE_FROMHOST_LOW 8
  48. /* The first free page in the DPM is #9 */
  49. #define DPM_FREE_START 9
  50. /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
  51. #define DESC_VALID 0x80
  52. #define DESC_WRAP 0x40
  53. #define DESC_INTERRUPT 0x20
  54. #define DESC_IVALID 0x10
  55. #define DESC_LEN(len) (len)
  56. /* Janz ICAN3 Firmware Messages */
  57. #define MSG_CONNECTI 0x02
  58. #define MSG_DISCONNECT 0x03
  59. #define MSG_IDVERS 0x04
  60. #define MSG_MSGLOST 0x05
  61. #define MSG_NEWHOSTIF 0x08
  62. #define MSG_INQUIRY 0x0a
  63. #define MSG_SETAFILMASK 0x10
  64. #define MSG_INITFDPMQUEUE 0x11
  65. #define MSG_HWCONF 0x12
  66. #define MSG_FMSGLOST 0x15
  67. #define MSG_CEVTIND 0x37
  68. #define MSG_CBTRREQ 0x41
  69. #define MSG_COFFREQ 0x42
  70. #define MSG_CONREQ 0x43
  71. #define MSG_CCONFREQ 0x47
  72. #define MSG_NMTS 0xb0
  73. #define MSG_LMTS 0xb4
  74. /*
  75. * Janz ICAN3 CAN Inquiry Message Types
  76. *
  77. * NOTE: there appears to be a firmware bug here. You must send
  78. * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
  79. * NOTE: response. The controller never responds to a message with
  80. * NOTE: the INQUIRY_EXTENDED subspec :(
  81. */
  82. #define INQUIRY_STATUS 0x00
  83. #define INQUIRY_TERMINATION 0x01
  84. #define INQUIRY_EXTENDED 0x04
  85. /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
  86. #define SETAFILMASK_REJECT 0x00
  87. #define SETAFILMASK_FASTIF 0x02
  88. /* Janz ICAN3 CAN Hardware Configuration Message Types */
  89. #define HWCONF_TERMINATE_ON 0x01
  90. #define HWCONF_TERMINATE_OFF 0x00
  91. /* Janz ICAN3 CAN Event Indication Message Types */
  92. #define CEVTIND_EI 0x01
  93. #define CEVTIND_DOI 0x02
  94. #define CEVTIND_LOST 0x04
  95. #define CEVTIND_FULL 0x08
  96. #define CEVTIND_BEI 0x10
  97. #define CEVTIND_CHIP_SJA1000 0x02
  98. #define ICAN3_BUSERR_QUOTA_MAX 255
  99. /* Janz ICAN3 CAN Frame Conversion */
  100. #define ICAN3_SNGL 0x02
  101. #define ICAN3_ECHO 0x10
  102. #define ICAN3_EFF_RTR 0x40
  103. #define ICAN3_SFF_RTR 0x10
  104. #define ICAN3_EFF 0x80
  105. #define ICAN3_CAN_TYPE_MASK 0x0f
  106. #define ICAN3_CAN_TYPE_SFF 0x00
  107. #define ICAN3_CAN_TYPE_EFF 0x01
  108. #define ICAN3_CAN_DLC_MASK 0x0f
  109. /* Janz ICAN3 NMTS subtypes */
  110. #define NMTS_CREATE_NODE_REQ 0x0
  111. #define NMTS_SLAVE_STATE_IND 0x8
  112. #define NMTS_SLAVE_EVENT_IND 0x9
  113. /* Janz ICAN3 LMTS subtypes */
  114. #define LMTS_BUSON_REQ 0x0
  115. #define LMTS_BUSOFF_REQ 0x1
  116. #define LMTS_CAN_CONF_REQ 0x2
  117. /* Janz ICAN3 NMTS Event indications */
  118. #define NE_LOCAL_OCCURRED 0x3
  119. #define NE_LOCAL_RESOLVED 0x2
  120. #define NE_REMOTE_OCCURRED 0xc
  121. #define NE_REMOTE_RESOLVED 0x8
  122. /*
  123. * SJA1000 Status and Error Register Definitions
  124. *
  125. * Copied from drivers/net/can/sja1000/sja1000.h
  126. */
  127. /* status register content */
  128. #define SR_BS 0x80
  129. #define SR_ES 0x40
  130. #define SR_TS 0x20
  131. #define SR_RS 0x10
  132. #define SR_TCS 0x08
  133. #define SR_TBS 0x04
  134. #define SR_DOS 0x02
  135. #define SR_RBS 0x01
  136. #define SR_CRIT (SR_BS|SR_ES)
  137. /* ECC register */
  138. #define ECC_SEG 0x1F
  139. #define ECC_DIR 0x20
  140. #define ECC_ERR 6
  141. #define ECC_BIT 0x00
  142. #define ECC_FORM 0x40
  143. #define ECC_STUFF 0x80
  144. #define ECC_MASK 0xc0
  145. /* Number of buffers for use in the "new-style" host interface */
  146. #define ICAN3_NEW_BUFFERS 16
  147. /* Number of buffers for use in the "fast" host interface */
  148. #define ICAN3_TX_BUFFERS 512
  149. #define ICAN3_RX_BUFFERS 1024
  150. /* SJA1000 Clock Input */
  151. #define ICAN3_CAN_CLOCK 8000000
  152. /* Janz ICAN3 firmware types */
  153. enum ican3_fwtype {
  154. ICAN3_FWTYPE_ICANOS,
  155. ICAN3_FWTYPE_CAL_CANOPEN,
  156. };
  157. /* Driver Name */
  158. #define DRV_NAME "janz-ican3"
  159. /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
  160. struct ican3_dpm_control {
  161. /* window address register */
  162. u8 window_address;
  163. u8 unused1;
  164. /*
  165. * Read access: clear interrupt from microcontroller
  166. * Write access: send interrupt to microcontroller
  167. */
  168. u8 interrupt;
  169. u8 unused2;
  170. /* write-only: reset all hardware on the module */
  171. u8 hwreset;
  172. u8 unused3;
  173. /* write-only: generate an interrupt to the TPU */
  174. u8 tpuinterrupt;
  175. };
  176. struct ican3_dev {
  177. /* must be the first member */
  178. struct can_priv can;
  179. /* CAN network device */
  180. struct net_device *ndev;
  181. struct napi_struct napi;
  182. /* module number */
  183. unsigned int num;
  184. /* base address of registers and IRQ */
  185. struct janz_cmodio_onboard_regs __iomem *ctrl;
  186. struct ican3_dpm_control __iomem *dpmctrl;
  187. void __iomem *dpm;
  188. int irq;
  189. /* CAN bus termination status */
  190. struct completion termination_comp;
  191. bool termination_enabled;
  192. /* CAN bus error status registers */
  193. struct completion buserror_comp;
  194. struct can_berr_counter bec;
  195. /* firmware type */
  196. enum ican3_fwtype fwtype;
  197. char fwinfo[32];
  198. /* old and new style host interface */
  199. unsigned int iftype;
  200. /* queue for echo packets */
  201. struct sk_buff_head echoq;
  202. /*
  203. * Any function which changes the current DPM page must hold this
  204. * lock while it is performing data accesses. This ensures that the
  205. * function will not be preempted and end up reading data from a
  206. * different DPM page than it expects.
  207. */
  208. spinlock_t lock;
  209. /* new host interface */
  210. unsigned int rx_int;
  211. unsigned int rx_num;
  212. unsigned int tx_num;
  213. /* fast host interface */
  214. unsigned int fastrx_start;
  215. unsigned int fastrx_num;
  216. unsigned int fasttx_start;
  217. unsigned int fasttx_num;
  218. /* first free DPM page */
  219. unsigned int free_page;
  220. };
  221. struct ican3_msg {
  222. u8 control;
  223. u8 spec;
  224. __le16 len;
  225. u8 data[252];
  226. };
  227. struct ican3_new_desc {
  228. u8 control;
  229. u8 pointer;
  230. };
  231. struct ican3_fast_desc {
  232. u8 control;
  233. u8 command;
  234. u8 data[14];
  235. };
  236. /* write to the window basic address register */
  237. static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
  238. {
  239. BUG_ON(page >= DPM_NUM_PAGES);
  240. iowrite8(page, &mod->dpmctrl->window_address);
  241. }
  242. /*
  243. * ICAN3 "old-style" host interface
  244. */
  245. /*
  246. * Receive a message from the ICAN3 "old-style" firmware interface
  247. *
  248. * LOCKING: must hold mod->lock
  249. *
  250. * returns 0 on success, -ENOMEM when no message exists
  251. */
  252. static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  253. {
  254. unsigned int mbox, mbox_page;
  255. u8 locl, peer, xord;
  256. /* get the MSYNC registers */
  257. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  258. peer = ioread8(mod->dpm + MSYNC_PEER);
  259. locl = ioread8(mod->dpm + MSYNC_LOCL);
  260. xord = locl ^ peer;
  261. if ((xord & MSYNC_RB_MASK) == 0x00) {
  262. netdev_dbg(mod->ndev, "no mbox for reading\n");
  263. return -ENOMEM;
  264. }
  265. /* find the first free mbox to read */
  266. if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
  267. mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
  268. else
  269. mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
  270. /* copy the message */
  271. mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
  272. ican3_set_page(mod, mbox_page);
  273. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  274. /*
  275. * notify the firmware that the read buffer is available
  276. * for it to fill again
  277. */
  278. locl ^= mbox;
  279. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  280. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  281. return 0;
  282. }
  283. /*
  284. * Send a message through the "old-style" firmware interface
  285. *
  286. * LOCKING: must hold mod->lock
  287. *
  288. * returns 0 on success, -ENOMEM when no free space exists
  289. */
  290. static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  291. {
  292. unsigned int mbox, mbox_page;
  293. u8 locl, peer, xord;
  294. /* get the MSYNC registers */
  295. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  296. peer = ioread8(mod->dpm + MSYNC_PEER);
  297. locl = ioread8(mod->dpm + MSYNC_LOCL);
  298. xord = locl ^ peer;
  299. if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
  300. netdev_err(mod->ndev, "no mbox for writing\n");
  301. return -ENOMEM;
  302. }
  303. /* calculate a free mbox to use */
  304. mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
  305. /* copy the message to the DPM */
  306. mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
  307. ican3_set_page(mod, mbox_page);
  308. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  309. locl ^= mbox;
  310. if (mbox == MSYNC_WB1)
  311. locl |= MSYNC_WBLW;
  312. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  313. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  314. return 0;
  315. }
  316. /*
  317. * ICAN3 "new-style" Host Interface Setup
  318. */
  319. static void ican3_init_new_host_interface(struct ican3_dev *mod)
  320. {
  321. struct ican3_new_desc desc;
  322. unsigned long flags;
  323. void __iomem *dst;
  324. int i;
  325. spin_lock_irqsave(&mod->lock, flags);
  326. /* setup the internal datastructures for RX */
  327. mod->rx_num = 0;
  328. mod->rx_int = 0;
  329. /* tohost queue descriptors are in page 5 */
  330. ican3_set_page(mod, QUEUE_TOHOST);
  331. dst = mod->dpm;
  332. /* initialize the tohost (rx) queue descriptors: pages 9-24 */
  333. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  334. desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
  335. desc.pointer = mod->free_page;
  336. /* set wrap flag on last buffer */
  337. if (i == ICAN3_NEW_BUFFERS - 1)
  338. desc.control |= DESC_WRAP;
  339. memcpy_toio(dst, &desc, sizeof(desc));
  340. dst += sizeof(desc);
  341. mod->free_page++;
  342. }
  343. /* fromhost (tx) mid queue descriptors are in page 6 */
  344. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  345. dst = mod->dpm;
  346. /* setup the internal datastructures for TX */
  347. mod->tx_num = 0;
  348. /* initialize the fromhost mid queue descriptors: pages 25-40 */
  349. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  350. desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
  351. desc.pointer = mod->free_page;
  352. /* set wrap flag on last buffer */
  353. if (i == ICAN3_NEW_BUFFERS - 1)
  354. desc.control |= DESC_WRAP;
  355. memcpy_toio(dst, &desc, sizeof(desc));
  356. dst += sizeof(desc);
  357. mod->free_page++;
  358. }
  359. /* fromhost hi queue descriptors are in page 7 */
  360. ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
  361. dst = mod->dpm;
  362. /* initialize only a single buffer in the fromhost hi queue (unused) */
  363. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  364. desc.pointer = mod->free_page;
  365. memcpy_toio(dst, &desc, sizeof(desc));
  366. mod->free_page++;
  367. /* fromhost low queue descriptors are in page 8 */
  368. ican3_set_page(mod, QUEUE_FROMHOST_LOW);
  369. dst = mod->dpm;
  370. /* initialize only a single buffer in the fromhost low queue (unused) */
  371. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  372. desc.pointer = mod->free_page;
  373. memcpy_toio(dst, &desc, sizeof(desc));
  374. mod->free_page++;
  375. spin_unlock_irqrestore(&mod->lock, flags);
  376. }
  377. /*
  378. * ICAN3 Fast Host Interface Setup
  379. */
  380. static void ican3_init_fast_host_interface(struct ican3_dev *mod)
  381. {
  382. struct ican3_fast_desc desc;
  383. unsigned long flags;
  384. unsigned int addr;
  385. void __iomem *dst;
  386. int i;
  387. spin_lock_irqsave(&mod->lock, flags);
  388. /* save the start recv page */
  389. mod->fastrx_start = mod->free_page;
  390. mod->fastrx_num = 0;
  391. /* build a single fast tohost queue descriptor */
  392. memset(&desc, 0, sizeof(desc));
  393. desc.control = 0x00;
  394. desc.command = 1;
  395. /* build the tohost queue descriptor ring in memory */
  396. addr = 0;
  397. for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
  398. /* set the wrap bit on the last buffer */
  399. if (i == ICAN3_RX_BUFFERS - 1)
  400. desc.control |= DESC_WRAP;
  401. /* switch to the correct page */
  402. ican3_set_page(mod, mod->free_page);
  403. /* copy the descriptor to the DPM */
  404. dst = mod->dpm + addr;
  405. memcpy_toio(dst, &desc, sizeof(desc));
  406. addr += sizeof(desc);
  407. /* move to the next page if necessary */
  408. if (addr >= DPM_PAGE_SIZE) {
  409. addr = 0;
  410. mod->free_page++;
  411. }
  412. }
  413. /* make sure we page-align the next queue */
  414. if (addr != 0)
  415. mod->free_page++;
  416. /* save the start xmit page */
  417. mod->fasttx_start = mod->free_page;
  418. mod->fasttx_num = 0;
  419. /* build a single fast fromhost queue descriptor */
  420. memset(&desc, 0, sizeof(desc));
  421. desc.control = DESC_VALID;
  422. desc.command = 1;
  423. /* build the fromhost queue descriptor ring in memory */
  424. addr = 0;
  425. for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
  426. /* set the wrap bit on the last buffer */
  427. if (i == ICAN3_TX_BUFFERS - 1)
  428. desc.control |= DESC_WRAP;
  429. /* switch to the correct page */
  430. ican3_set_page(mod, mod->free_page);
  431. /* copy the descriptor to the DPM */
  432. dst = mod->dpm + addr;
  433. memcpy_toio(dst, &desc, sizeof(desc));
  434. addr += sizeof(desc);
  435. /* move to the next page if necessary */
  436. if (addr >= DPM_PAGE_SIZE) {
  437. addr = 0;
  438. mod->free_page++;
  439. }
  440. }
  441. spin_unlock_irqrestore(&mod->lock, flags);
  442. }
  443. /*
  444. * ICAN3 "new-style" Host Interface Message Helpers
  445. */
  446. /*
  447. * LOCKING: must hold mod->lock
  448. */
  449. static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  450. {
  451. struct ican3_new_desc desc;
  452. void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
  453. /* switch to the fromhost mid queue, and read the buffer descriptor */
  454. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  455. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  456. if (!(desc.control & DESC_VALID)) {
  457. netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
  458. return -ENOMEM;
  459. }
  460. /* switch to the data page, copy the data */
  461. ican3_set_page(mod, desc.pointer);
  462. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  463. /* switch back to the descriptor, set the valid bit, write it back */
  464. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  465. desc.control ^= DESC_VALID;
  466. memcpy_toio(desc_addr, &desc, sizeof(desc));
  467. /* update the tx number */
  468. mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
  469. return 0;
  470. }
  471. /*
  472. * LOCKING: must hold mod->lock
  473. */
  474. static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  475. {
  476. struct ican3_new_desc desc;
  477. void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
  478. /* switch to the tohost queue, and read the buffer descriptor */
  479. ican3_set_page(mod, QUEUE_TOHOST);
  480. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  481. if (!(desc.control & DESC_VALID)) {
  482. netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
  483. return -ENOMEM;
  484. }
  485. /* switch to the data page, copy the data */
  486. ican3_set_page(mod, desc.pointer);
  487. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  488. /* switch back to the descriptor, toggle the valid bit, write it back */
  489. ican3_set_page(mod, QUEUE_TOHOST);
  490. desc.control ^= DESC_VALID;
  491. memcpy_toio(desc_addr, &desc, sizeof(desc));
  492. /* update the rx number */
  493. mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
  494. return 0;
  495. }
  496. /*
  497. * Message Send / Recv Helpers
  498. */
  499. static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  500. {
  501. unsigned long flags;
  502. int ret;
  503. spin_lock_irqsave(&mod->lock, flags);
  504. if (mod->iftype == 0)
  505. ret = ican3_old_send_msg(mod, msg);
  506. else
  507. ret = ican3_new_send_msg(mod, msg);
  508. spin_unlock_irqrestore(&mod->lock, flags);
  509. return ret;
  510. }
  511. static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  512. {
  513. unsigned long flags;
  514. int ret;
  515. spin_lock_irqsave(&mod->lock, flags);
  516. if (mod->iftype == 0)
  517. ret = ican3_old_recv_msg(mod, msg);
  518. else
  519. ret = ican3_new_recv_msg(mod, msg);
  520. spin_unlock_irqrestore(&mod->lock, flags);
  521. return ret;
  522. }
  523. /*
  524. * Quick Pre-constructed Messages
  525. */
  526. static int ican3_msg_connect(struct ican3_dev *mod)
  527. {
  528. struct ican3_msg msg;
  529. memset(&msg, 0, sizeof(msg));
  530. msg.spec = MSG_CONNECTI;
  531. msg.len = cpu_to_le16(0);
  532. return ican3_send_msg(mod, &msg);
  533. }
  534. static int ican3_msg_disconnect(struct ican3_dev *mod)
  535. {
  536. struct ican3_msg msg;
  537. memset(&msg, 0, sizeof(msg));
  538. msg.spec = MSG_DISCONNECT;
  539. msg.len = cpu_to_le16(0);
  540. return ican3_send_msg(mod, &msg);
  541. }
  542. static int ican3_msg_newhostif(struct ican3_dev *mod)
  543. {
  544. struct ican3_msg msg;
  545. int ret;
  546. memset(&msg, 0, sizeof(msg));
  547. msg.spec = MSG_NEWHOSTIF;
  548. msg.len = cpu_to_le16(0);
  549. /* If we're not using the old interface, switching seems bogus */
  550. WARN_ON(mod->iftype != 0);
  551. ret = ican3_send_msg(mod, &msg);
  552. if (ret)
  553. return ret;
  554. /* mark the module as using the new host interface */
  555. mod->iftype = 1;
  556. return 0;
  557. }
  558. static int ican3_msg_fasthostif(struct ican3_dev *mod)
  559. {
  560. struct ican3_msg msg;
  561. unsigned int addr;
  562. memset(&msg, 0, sizeof(msg));
  563. msg.spec = MSG_INITFDPMQUEUE;
  564. msg.len = cpu_to_le16(8);
  565. /* write the tohost queue start address */
  566. addr = DPM_PAGE_ADDR(mod->fastrx_start);
  567. msg.data[0] = addr & 0xff;
  568. msg.data[1] = (addr >> 8) & 0xff;
  569. msg.data[2] = (addr >> 16) & 0xff;
  570. msg.data[3] = (addr >> 24) & 0xff;
  571. /* write the fromhost queue start address */
  572. addr = DPM_PAGE_ADDR(mod->fasttx_start);
  573. msg.data[4] = addr & 0xff;
  574. msg.data[5] = (addr >> 8) & 0xff;
  575. msg.data[6] = (addr >> 16) & 0xff;
  576. msg.data[7] = (addr >> 24) & 0xff;
  577. /* If we're not using the new interface yet, we cannot do this */
  578. WARN_ON(mod->iftype != 1);
  579. return ican3_send_msg(mod, &msg);
  580. }
  581. /*
  582. * Setup the CAN filter to either accept or reject all
  583. * messages from the CAN bus.
  584. */
  585. static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
  586. {
  587. struct ican3_msg msg;
  588. int ret;
  589. /* Standard Frame Format */
  590. memset(&msg, 0, sizeof(msg));
  591. msg.spec = MSG_SETAFILMASK;
  592. msg.len = cpu_to_le16(5);
  593. msg.data[0] = 0x00; /* IDLo LSB */
  594. msg.data[1] = 0x00; /* IDLo MSB */
  595. msg.data[2] = 0xff; /* IDHi LSB */
  596. msg.data[3] = 0x07; /* IDHi MSB */
  597. /* accept all frames for fast host if, or reject all frames */
  598. msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  599. ret = ican3_send_msg(mod, &msg);
  600. if (ret)
  601. return ret;
  602. /* Extended Frame Format */
  603. memset(&msg, 0, sizeof(msg));
  604. msg.spec = MSG_SETAFILMASK;
  605. msg.len = cpu_to_le16(13);
  606. msg.data[0] = 0; /* MUX = 0 */
  607. msg.data[1] = 0x00; /* IDLo LSB */
  608. msg.data[2] = 0x00;
  609. msg.data[3] = 0x00;
  610. msg.data[4] = 0x20; /* IDLo MSB */
  611. msg.data[5] = 0xff; /* IDHi LSB */
  612. msg.data[6] = 0xff;
  613. msg.data[7] = 0xff;
  614. msg.data[8] = 0x3f; /* IDHi MSB */
  615. /* accept all frames for fast host if, or reject all frames */
  616. msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  617. return ican3_send_msg(mod, &msg);
  618. }
  619. /*
  620. * Bring the CAN bus online or offline
  621. */
  622. static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
  623. {
  624. struct can_bittiming *bt = &mod->can.bittiming;
  625. struct ican3_msg msg;
  626. u8 btr0, btr1;
  627. int res;
  628. /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
  629. /* The bittiming register command for the ICAN3 just sets the bit timing */
  630. /* registers on the SJA1000 chip directly */
  631. btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
  632. btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
  633. (((bt->phase_seg2 - 1) & 0x7) << 4);
  634. if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
  635. btr1 |= 0x80;
  636. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  637. if (on) {
  638. /* set bittiming */
  639. memset(&msg, 0, sizeof(msg));
  640. msg.spec = MSG_CBTRREQ;
  641. msg.len = cpu_to_le16(4);
  642. msg.data[0] = 0x00;
  643. msg.data[1] = 0x00;
  644. msg.data[2] = btr0;
  645. msg.data[3] = btr1;
  646. res = ican3_send_msg(mod, &msg);
  647. if (res)
  648. return res;
  649. }
  650. /* can-on/off request */
  651. memset(&msg, 0, sizeof(msg));
  652. msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
  653. msg.len = cpu_to_le16(0);
  654. return ican3_send_msg(mod, &msg);
  655. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  656. /* bittiming + can-on/off request */
  657. memset(&msg, 0, sizeof(msg));
  658. msg.spec = MSG_LMTS;
  659. if (on) {
  660. msg.len = cpu_to_le16(4);
  661. msg.data[0] = LMTS_BUSON_REQ;
  662. msg.data[1] = 0;
  663. msg.data[2] = btr0;
  664. msg.data[3] = btr1;
  665. } else {
  666. msg.len = cpu_to_le16(2);
  667. msg.data[0] = LMTS_BUSOFF_REQ;
  668. msg.data[1] = 0;
  669. }
  670. res = ican3_send_msg(mod, &msg);
  671. if (res)
  672. return res;
  673. if (on) {
  674. /* create NMT Slave Node for error processing
  675. * class 2 (with error capability, see CiA/DS203-1)
  676. * id 1
  677. * name locnod1 (must be exactly 7 bytes)
  678. */
  679. memset(&msg, 0, sizeof(msg));
  680. msg.spec = MSG_NMTS;
  681. msg.len = cpu_to_le16(11);
  682. msg.data[0] = NMTS_CREATE_NODE_REQ;
  683. msg.data[1] = 0;
  684. msg.data[2] = 2; /* node class */
  685. msg.data[3] = 1; /* node id */
  686. strcpy(msg.data + 4, "locnod1"); /* node name */
  687. return ican3_send_msg(mod, &msg);
  688. }
  689. return 0;
  690. }
  691. return -ENOTSUPP;
  692. }
  693. static int ican3_set_termination(struct ican3_dev *mod, bool on)
  694. {
  695. struct ican3_msg msg;
  696. memset(&msg, 0, sizeof(msg));
  697. msg.spec = MSG_HWCONF;
  698. msg.len = cpu_to_le16(2);
  699. msg.data[0] = 0x00;
  700. msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
  701. return ican3_send_msg(mod, &msg);
  702. }
  703. static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
  704. {
  705. struct ican3_msg msg;
  706. memset(&msg, 0, sizeof(msg));
  707. msg.spec = MSG_INQUIRY;
  708. msg.len = cpu_to_le16(2);
  709. msg.data[0] = subspec;
  710. msg.data[1] = 0x00;
  711. return ican3_send_msg(mod, &msg);
  712. }
  713. static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
  714. {
  715. struct ican3_msg msg;
  716. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  717. memset(&msg, 0, sizeof(msg));
  718. msg.spec = MSG_CCONFREQ;
  719. msg.len = cpu_to_le16(2);
  720. msg.data[0] = 0x00;
  721. msg.data[1] = quota;
  722. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  723. memset(&msg, 0, sizeof(msg));
  724. msg.spec = MSG_LMTS;
  725. msg.len = cpu_to_le16(4);
  726. msg.data[0] = LMTS_CAN_CONF_REQ;
  727. msg.data[1] = 0x00;
  728. msg.data[2] = 0x00;
  729. msg.data[3] = quota;
  730. } else {
  731. return -ENOTSUPP;
  732. }
  733. return ican3_send_msg(mod, &msg);
  734. }
  735. /*
  736. * ICAN3 to Linux CAN Frame Conversion
  737. */
  738. static void ican3_to_can_frame(struct ican3_dev *mod,
  739. struct ican3_fast_desc *desc,
  740. struct can_frame *cf)
  741. {
  742. if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
  743. if (desc->data[1] & ICAN3_SFF_RTR)
  744. cf->can_id |= CAN_RTR_FLAG;
  745. cf->can_id |= desc->data[0] << 3;
  746. cf->can_id |= (desc->data[1] & 0xe0) >> 5;
  747. cf->len = can_cc_dlc2len(desc->data[1] & ICAN3_CAN_DLC_MASK);
  748. memcpy(cf->data, &desc->data[2], cf->len);
  749. } else {
  750. cf->len = can_cc_dlc2len(desc->data[0] & ICAN3_CAN_DLC_MASK);
  751. if (desc->data[0] & ICAN3_EFF_RTR)
  752. cf->can_id |= CAN_RTR_FLAG;
  753. if (desc->data[0] & ICAN3_EFF) {
  754. cf->can_id |= CAN_EFF_FLAG;
  755. cf->can_id |= desc->data[2] << 21; /* 28-21 */
  756. cf->can_id |= desc->data[3] << 13; /* 20-13 */
  757. cf->can_id |= desc->data[4] << 5; /* 12-5 */
  758. cf->can_id |= (desc->data[5] & 0xf8) >> 3;
  759. } else {
  760. cf->can_id |= desc->data[2] << 3; /* 10-3 */
  761. cf->can_id |= desc->data[3] >> 5; /* 2-0 */
  762. }
  763. memcpy(cf->data, &desc->data[6], cf->len);
  764. }
  765. }
  766. static void can_frame_to_ican3(struct ican3_dev *mod,
  767. struct can_frame *cf,
  768. struct ican3_fast_desc *desc)
  769. {
  770. /* clear out any stale data in the descriptor */
  771. memset(desc->data, 0, sizeof(desc->data));
  772. /* we always use the extended format, with the ECHO flag set */
  773. desc->command = ICAN3_CAN_TYPE_EFF;
  774. desc->data[0] |= cf->len;
  775. desc->data[1] |= ICAN3_ECHO;
  776. /* support single transmission (no retries) mode */
  777. if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
  778. desc->data[1] |= ICAN3_SNGL;
  779. if (cf->can_id & CAN_RTR_FLAG)
  780. desc->data[0] |= ICAN3_EFF_RTR;
  781. /* pack the id into the correct places */
  782. if (cf->can_id & CAN_EFF_FLAG) {
  783. desc->data[0] |= ICAN3_EFF;
  784. desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
  785. desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
  786. desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
  787. desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
  788. } else {
  789. desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
  790. desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
  791. }
  792. /* copy the data bits into the descriptor */
  793. memcpy(&desc->data[6], cf->data, cf->len);
  794. }
  795. /*
  796. * Interrupt Handling
  797. */
  798. /*
  799. * Handle an ID + Version message response from the firmware. We never generate
  800. * this message in production code, but it is very useful when debugging to be
  801. * able to display this message.
  802. */
  803. static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
  804. {
  805. netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
  806. }
  807. static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
  808. {
  809. struct net_device *dev = mod->ndev;
  810. struct net_device_stats *stats = &dev->stats;
  811. struct can_frame *cf;
  812. struct sk_buff *skb;
  813. /*
  814. * Report that communication messages with the microcontroller firmware
  815. * are being lost. These are never CAN frames, so we do not generate an
  816. * error frame for userspace
  817. */
  818. if (msg->spec == MSG_MSGLOST) {
  819. netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
  820. return;
  821. }
  822. /*
  823. * Oops, this indicates that we have lost messages in the fast queue,
  824. * which are exclusively CAN messages. Our driver isn't reading CAN
  825. * frames fast enough.
  826. *
  827. * We'll pretend that the SJA1000 told us that it ran out of buffer
  828. * space, because there is not a better message for this.
  829. */
  830. skb = alloc_can_err_skb(dev, &cf);
  831. if (skb) {
  832. cf->can_id |= CAN_ERR_CRTL;
  833. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  834. stats->rx_over_errors++;
  835. stats->rx_errors++;
  836. netif_rx(skb);
  837. }
  838. }
  839. /*
  840. * Handle CAN Event Indication Messages from the firmware
  841. *
  842. * The ICAN3 firmware provides the values of some SJA1000 registers when it
  843. * generates this message. The code below is largely copied from the
  844. * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
  845. */
  846. static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
  847. {
  848. struct net_device *dev = mod->ndev;
  849. struct net_device_stats *stats = &dev->stats;
  850. enum can_state state = mod->can.state;
  851. u8 isrc, ecc, status, rxerr, txerr;
  852. struct can_frame *cf;
  853. struct sk_buff *skb;
  854. /* we can only handle the SJA1000 part */
  855. if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
  856. netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
  857. return -ENODEV;
  858. }
  859. /* check the message length for sanity */
  860. if (le16_to_cpu(msg->len) < 6) {
  861. netdev_err(mod->ndev, "error message too short\n");
  862. return -EINVAL;
  863. }
  864. isrc = msg->data[0];
  865. ecc = msg->data[2];
  866. status = msg->data[3];
  867. rxerr = msg->data[4];
  868. txerr = msg->data[5];
  869. /*
  870. * This hardware lacks any support other than bus error messages to
  871. * determine if packet transmission has failed.
  872. *
  873. * When TX errors happen, one echo skb needs to be dropped from the
  874. * front of the queue.
  875. *
  876. * A small bit of code is duplicated here and below, to avoid error
  877. * skb allocation when it will just be freed immediately.
  878. */
  879. if (isrc == CEVTIND_BEI) {
  880. int ret;
  881. netdev_dbg(mod->ndev, "bus error interrupt\n");
  882. /* TX error */
  883. if (!(ecc & ECC_DIR)) {
  884. kfree_skb(skb_dequeue(&mod->echoq));
  885. stats->tx_errors++;
  886. } else {
  887. stats->rx_errors++;
  888. }
  889. /*
  890. * The controller automatically disables bus-error interrupts
  891. * and therefore we must re-enable them.
  892. */
  893. ret = ican3_set_buserror(mod, 1);
  894. if (ret) {
  895. netdev_err(mod->ndev, "unable to re-enable bus-error\n");
  896. return ret;
  897. }
  898. /* bus error reporting is off, return immediately */
  899. if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
  900. return 0;
  901. }
  902. skb = alloc_can_err_skb(dev, &cf);
  903. if (skb == NULL)
  904. return -ENOMEM;
  905. /* data overrun interrupt */
  906. if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
  907. netdev_dbg(mod->ndev, "data overrun interrupt\n");
  908. cf->can_id |= CAN_ERR_CRTL;
  909. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  910. stats->rx_over_errors++;
  911. stats->rx_errors++;
  912. }
  913. /* error warning + passive interrupt */
  914. if (isrc == CEVTIND_EI) {
  915. netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
  916. if (status & SR_BS) {
  917. state = CAN_STATE_BUS_OFF;
  918. cf->can_id |= CAN_ERR_BUSOFF;
  919. mod->can.can_stats.bus_off++;
  920. can_bus_off(dev);
  921. } else if (status & SR_ES) {
  922. if (rxerr >= 128 || txerr >= 128)
  923. state = CAN_STATE_ERROR_PASSIVE;
  924. else
  925. state = CAN_STATE_ERROR_WARNING;
  926. } else {
  927. state = CAN_STATE_ERROR_ACTIVE;
  928. }
  929. }
  930. /* bus error interrupt */
  931. if (isrc == CEVTIND_BEI) {
  932. mod->can.can_stats.bus_error++;
  933. cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;
  934. switch (ecc & ECC_MASK) {
  935. case ECC_BIT:
  936. cf->data[2] |= CAN_ERR_PROT_BIT;
  937. break;
  938. case ECC_FORM:
  939. cf->data[2] |= CAN_ERR_PROT_FORM;
  940. break;
  941. case ECC_STUFF:
  942. cf->data[2] |= CAN_ERR_PROT_STUFF;
  943. break;
  944. default:
  945. cf->data[3] = ecc & ECC_SEG;
  946. break;
  947. }
  948. if (!(ecc & ECC_DIR))
  949. cf->data[2] |= CAN_ERR_PROT_TX;
  950. cf->data[6] = txerr;
  951. cf->data[7] = rxerr;
  952. }
  953. if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
  954. state == CAN_STATE_ERROR_PASSIVE)) {
  955. cf->can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;
  956. if (state == CAN_STATE_ERROR_WARNING) {
  957. mod->can.can_stats.error_warning++;
  958. cf->data[1] = (txerr > rxerr) ?
  959. CAN_ERR_CRTL_TX_WARNING :
  960. CAN_ERR_CRTL_RX_WARNING;
  961. } else {
  962. mod->can.can_stats.error_passive++;
  963. cf->data[1] = (txerr > rxerr) ?
  964. CAN_ERR_CRTL_TX_PASSIVE :
  965. CAN_ERR_CRTL_RX_PASSIVE;
  966. }
  967. cf->data[6] = txerr;
  968. cf->data[7] = rxerr;
  969. }
  970. mod->can.state = state;
  971. netif_rx(skb);
  972. return 0;
  973. }
  974. static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
  975. {
  976. switch (msg->data[0]) {
  977. case INQUIRY_STATUS:
  978. case INQUIRY_EXTENDED:
  979. mod->bec.rxerr = msg->data[5];
  980. mod->bec.txerr = msg->data[6];
  981. complete(&mod->buserror_comp);
  982. break;
  983. case INQUIRY_TERMINATION:
  984. mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
  985. complete(&mod->termination_comp);
  986. break;
  987. default:
  988. netdev_err(mod->ndev, "received an unknown inquiry response\n");
  989. break;
  990. }
  991. }
  992. /* Handle NMTS Slave Event Indication Messages from the firmware */
  993. static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
  994. {
  995. u16 subspec;
  996. subspec = msg->data[0] + msg->data[1] * 0x100;
  997. if (subspec == NMTS_SLAVE_EVENT_IND) {
  998. switch (msg->data[2]) {
  999. case NE_LOCAL_OCCURRED:
  1000. case NE_LOCAL_RESOLVED:
  1001. /* now follows the same message as Raw ICANOS CEVTIND
  1002. * shift the data at the same place and call this method
  1003. */
  1004. le16_add_cpu(&msg->len, -3);
  1005. memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
  1006. ican3_handle_cevtind(mod, msg);
  1007. break;
  1008. case NE_REMOTE_OCCURRED:
  1009. case NE_REMOTE_RESOLVED:
  1010. /* should not occurre, ignore */
  1011. break;
  1012. default:
  1013. netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
  1014. msg->data[2]);
  1015. break;
  1016. }
  1017. } else if (subspec == NMTS_SLAVE_STATE_IND) {
  1018. /* ignore state indications */
  1019. } else {
  1020. netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
  1021. subspec);
  1022. return;
  1023. }
  1024. }
  1025. static void ican3_handle_unknown_message(struct ican3_dev *mod,
  1026. struct ican3_msg *msg)
  1027. {
  1028. netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
  1029. msg->spec, le16_to_cpu(msg->len));
  1030. }
  1031. /*
  1032. * Handle a control message from the firmware
  1033. */
  1034. static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
  1035. {
  1036. netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
  1037. mod->num, msg->spec, le16_to_cpu(msg->len));
  1038. switch (msg->spec) {
  1039. case MSG_IDVERS:
  1040. ican3_handle_idvers(mod, msg);
  1041. break;
  1042. case MSG_MSGLOST:
  1043. case MSG_FMSGLOST:
  1044. ican3_handle_msglost(mod, msg);
  1045. break;
  1046. case MSG_CEVTIND:
  1047. ican3_handle_cevtind(mod, msg);
  1048. break;
  1049. case MSG_INQUIRY:
  1050. ican3_handle_inquiry(mod, msg);
  1051. break;
  1052. case MSG_NMTS:
  1053. ican3_handle_nmtsind(mod, msg);
  1054. break;
  1055. default:
  1056. ican3_handle_unknown_message(mod, msg);
  1057. break;
  1058. }
  1059. }
  1060. /*
  1061. * The ican3 needs to store all echo skbs, and therefore cannot
  1062. * use the generic infrastructure for this.
  1063. */
  1064. static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
  1065. {
  1066. skb = can_create_echo_skb(skb);
  1067. if (!skb)
  1068. return;
  1069. skb_tx_timestamp(skb);
  1070. /* save this skb for tx interrupt echo handling */
  1071. skb_queue_tail(&mod->echoq, skb);
  1072. }
  1073. static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
  1074. {
  1075. struct sk_buff *skb = skb_dequeue(&mod->echoq);
  1076. struct can_frame *cf;
  1077. u8 dlc = 0;
  1078. /* this should never trigger unless there is a driver bug */
  1079. if (!skb) {
  1080. netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
  1081. return 0;
  1082. }
  1083. cf = (struct can_frame *)skb->data;
  1084. if (!(cf->can_id & CAN_RTR_FLAG))
  1085. dlc = cf->len;
  1086. /* check flag whether this packet has to be looped back */
  1087. if (skb->pkt_type != PACKET_LOOPBACK) {
  1088. kfree_skb(skb);
  1089. return dlc;
  1090. }
  1091. skb->protocol = htons(ETH_P_CAN);
  1092. skb->pkt_type = PACKET_BROADCAST;
  1093. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1094. skb->dev = mod->ndev;
  1095. netif_receive_skb(skb);
  1096. return dlc;
  1097. }
  1098. /*
  1099. * Compare an skb with an existing echo skb
  1100. *
  1101. * This function will be used on devices which have a hardware loopback.
  1102. * On these devices, this function can be used to compare a received skb
  1103. * with the saved echo skbs so that the hardware echo skb can be dropped.
  1104. *
  1105. * Returns true if the skb's are identical, false otherwise.
  1106. */
  1107. static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
  1108. {
  1109. struct can_frame *cf = (struct can_frame *)skb->data;
  1110. struct sk_buff *echo_skb = skb_peek(&mod->echoq);
  1111. struct can_frame *echo_cf;
  1112. if (!echo_skb)
  1113. return false;
  1114. echo_cf = (struct can_frame *)echo_skb->data;
  1115. if (cf->can_id != echo_cf->can_id)
  1116. return false;
  1117. if (cf->len != echo_cf->len)
  1118. return false;
  1119. return memcmp(cf->data, echo_cf->data, cf->len) == 0;
  1120. }
  1121. /*
  1122. * Check that there is room in the TX ring to transmit another skb
  1123. *
  1124. * LOCKING: must hold mod->lock
  1125. */
  1126. static bool ican3_txok(struct ican3_dev *mod)
  1127. {
  1128. struct ican3_fast_desc __iomem *desc;
  1129. u8 control;
  1130. /* check that we have echo queue space */
  1131. if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
  1132. return false;
  1133. /* copy the control bits of the descriptor */
  1134. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1135. desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
  1136. control = ioread8(&desc->control);
  1137. /* if the control bits are not valid, then we have no more space */
  1138. if (!(control & DESC_VALID))
  1139. return false;
  1140. return true;
  1141. }
  1142. /*
  1143. * Receive one CAN frame from the hardware
  1144. *
  1145. * CONTEXT: must be called from user context
  1146. */
  1147. static int ican3_recv_skb(struct ican3_dev *mod)
  1148. {
  1149. struct net_device *ndev = mod->ndev;
  1150. struct net_device_stats *stats = &ndev->stats;
  1151. struct ican3_fast_desc desc;
  1152. void __iomem *desc_addr;
  1153. struct can_frame *cf;
  1154. struct sk_buff *skb;
  1155. unsigned long flags;
  1156. spin_lock_irqsave(&mod->lock, flags);
  1157. /* copy the whole descriptor */
  1158. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1159. desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
  1160. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  1161. spin_unlock_irqrestore(&mod->lock, flags);
  1162. /* check that we actually have a CAN frame */
  1163. if (!(desc.control & DESC_VALID))
  1164. return -ENOBUFS;
  1165. /* allocate an skb */
  1166. skb = alloc_can_skb(ndev, &cf);
  1167. if (unlikely(skb == NULL)) {
  1168. stats->rx_dropped++;
  1169. goto err_noalloc;
  1170. }
  1171. /* convert the ICAN3 frame into Linux CAN format */
  1172. ican3_to_can_frame(mod, &desc, cf);
  1173. /*
  1174. * If this is an ECHO frame received from the hardware loopback
  1175. * feature, use the skb saved in the ECHO stack instead. This allows
  1176. * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
  1177. *
  1178. * Since this is a confirmation of a successfully transmitted packet
  1179. * sent from this host, update the transmit statistics.
  1180. *
  1181. * Also, the netdevice queue needs to be allowed to send packets again.
  1182. */
  1183. if (ican3_echo_skb_matches(mod, skb)) {
  1184. stats->tx_packets++;
  1185. stats->tx_bytes += ican3_get_echo_skb(mod);
  1186. kfree_skb(skb);
  1187. goto err_noalloc;
  1188. }
  1189. /* update statistics, receive the skb */
  1190. stats->rx_packets++;
  1191. if (!(cf->can_id & CAN_RTR_FLAG))
  1192. stats->rx_bytes += cf->len;
  1193. netif_receive_skb(skb);
  1194. err_noalloc:
  1195. /* toggle the valid bit and return the descriptor to the ring */
  1196. desc.control ^= DESC_VALID;
  1197. spin_lock_irqsave(&mod->lock, flags);
  1198. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1199. memcpy_toio(desc_addr, &desc, 1);
  1200. /* update the next buffer pointer */
  1201. mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
  1202. : (mod->fastrx_num + 1);
  1203. /* there are still more buffers to process */
  1204. spin_unlock_irqrestore(&mod->lock, flags);
  1205. return 0;
  1206. }
  1207. static int ican3_napi(struct napi_struct *napi, int budget)
  1208. {
  1209. struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
  1210. unsigned long flags;
  1211. int received = 0;
  1212. int ret;
  1213. /* process all communication messages */
  1214. while (true) {
  1215. struct ican3_msg msg;
  1216. ret = ican3_recv_msg(mod, &msg);
  1217. if (ret)
  1218. break;
  1219. ican3_handle_message(mod, &msg);
  1220. }
  1221. /* process all CAN frames from the fast interface */
  1222. while (received < budget) {
  1223. ret = ican3_recv_skb(mod);
  1224. if (ret)
  1225. break;
  1226. received++;
  1227. }
  1228. /* We have processed all packets that the adapter had, but it
  1229. * was less than our budget, stop polling */
  1230. if (received < budget)
  1231. napi_complete_done(napi, received);
  1232. spin_lock_irqsave(&mod->lock, flags);
  1233. /* Wake up the transmit queue if necessary */
  1234. if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
  1235. netif_wake_queue(mod->ndev);
  1236. spin_unlock_irqrestore(&mod->lock, flags);
  1237. /* re-enable interrupt generation */
  1238. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1239. return received;
  1240. }
  1241. static irqreturn_t ican3_irq(int irq, void *dev_id)
  1242. {
  1243. struct ican3_dev *mod = dev_id;
  1244. u8 stat;
  1245. /*
  1246. * The interrupt status register on this device reports interrupts
  1247. * as zeroes instead of using ones like most other devices
  1248. */
  1249. stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
  1250. if (stat == (1 << mod->num))
  1251. return IRQ_NONE;
  1252. /* clear the MODULbus interrupt from the microcontroller */
  1253. ioread8(&mod->dpmctrl->interrupt);
  1254. /* disable interrupt generation, schedule the NAPI poller */
  1255. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1256. napi_schedule(&mod->napi);
  1257. return IRQ_HANDLED;
  1258. }
  1259. /*
  1260. * Firmware reset, startup, and shutdown
  1261. */
  1262. /*
  1263. * Reset an ICAN module to its power-on state
  1264. *
  1265. * CONTEXT: no network device registered
  1266. */
  1267. static int ican3_reset_module(struct ican3_dev *mod)
  1268. {
  1269. unsigned long start;
  1270. u8 runold, runnew;
  1271. /* disable interrupts so no more work is scheduled */
  1272. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1273. /* the first unallocated page in the DPM is #9 */
  1274. mod->free_page = DPM_FREE_START;
  1275. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1276. runold = ioread8(mod->dpm + TARGET_RUNNING);
  1277. /* reset the module */
  1278. iowrite8(0x00, &mod->dpmctrl->hwreset);
  1279. /* wait until the module has finished resetting and is running */
  1280. start = jiffies;
  1281. do {
  1282. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1283. runnew = ioread8(mod->dpm + TARGET_RUNNING);
  1284. if (runnew == (runold ^ 0xff))
  1285. return 0;
  1286. msleep(10);
  1287. } while (time_before(jiffies, start + HZ / 2));
  1288. netdev_err(mod->ndev, "failed to reset CAN module\n");
  1289. return -ETIMEDOUT;
  1290. }
  1291. static void ican3_shutdown_module(struct ican3_dev *mod)
  1292. {
  1293. ican3_msg_disconnect(mod);
  1294. ican3_reset_module(mod);
  1295. }
  1296. /*
  1297. * Startup an ICAN module, bringing it into fast mode
  1298. */
  1299. static int ican3_startup_module(struct ican3_dev *mod)
  1300. {
  1301. int ret;
  1302. ret = ican3_reset_module(mod);
  1303. if (ret) {
  1304. netdev_err(mod->ndev, "unable to reset module\n");
  1305. return ret;
  1306. }
  1307. /* detect firmware */
  1308. memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
  1309. if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
  1310. netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
  1311. return -ENODEV;
  1312. }
  1313. if (strstr(mod->fwinfo, "CAL/CANopen"))
  1314. mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
  1315. else
  1316. mod->fwtype = ICAN3_FWTYPE_ICANOS;
  1317. /* re-enable interrupts so we can send messages */
  1318. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1319. ret = ican3_msg_connect(mod);
  1320. if (ret) {
  1321. netdev_err(mod->ndev, "unable to connect to module\n");
  1322. return ret;
  1323. }
  1324. ican3_init_new_host_interface(mod);
  1325. ret = ican3_msg_newhostif(mod);
  1326. if (ret) {
  1327. netdev_err(mod->ndev, "unable to switch to new-style interface\n");
  1328. return ret;
  1329. }
  1330. /* default to "termination on" */
  1331. ret = ican3_set_termination(mod, true);
  1332. if (ret) {
  1333. netdev_err(mod->ndev, "unable to enable termination\n");
  1334. return ret;
  1335. }
  1336. /* default to "bus errors enabled" */
  1337. ret = ican3_set_buserror(mod, 1);
  1338. if (ret) {
  1339. netdev_err(mod->ndev, "unable to set bus-error\n");
  1340. return ret;
  1341. }
  1342. ican3_init_fast_host_interface(mod);
  1343. ret = ican3_msg_fasthostif(mod);
  1344. if (ret) {
  1345. netdev_err(mod->ndev, "unable to switch to fast host interface\n");
  1346. return ret;
  1347. }
  1348. ret = ican3_set_id_filter(mod, true);
  1349. if (ret) {
  1350. netdev_err(mod->ndev, "unable to set acceptance filter\n");
  1351. return ret;
  1352. }
  1353. return 0;
  1354. }
  1355. /*
  1356. * CAN Network Device
  1357. */
  1358. static int ican3_open(struct net_device *ndev)
  1359. {
  1360. struct ican3_dev *mod = netdev_priv(ndev);
  1361. int ret;
  1362. /* open the CAN layer */
  1363. ret = open_candev(ndev);
  1364. if (ret) {
  1365. netdev_err(mod->ndev, "unable to start CAN layer\n");
  1366. return ret;
  1367. }
  1368. /* bring the bus online */
  1369. ret = ican3_set_bus_state(mod, true);
  1370. if (ret) {
  1371. netdev_err(mod->ndev, "unable to set bus-on\n");
  1372. close_candev(ndev);
  1373. return ret;
  1374. }
  1375. /* start up the network device */
  1376. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1377. netif_start_queue(ndev);
  1378. return 0;
  1379. }
  1380. static int ican3_stop(struct net_device *ndev)
  1381. {
  1382. struct ican3_dev *mod = netdev_priv(ndev);
  1383. int ret;
  1384. /* stop the network device xmit routine */
  1385. netif_stop_queue(ndev);
  1386. mod->can.state = CAN_STATE_STOPPED;
  1387. /* bring the bus offline, stop receiving packets */
  1388. ret = ican3_set_bus_state(mod, false);
  1389. if (ret) {
  1390. netdev_err(mod->ndev, "unable to set bus-off\n");
  1391. return ret;
  1392. }
  1393. /* drop all outstanding echo skbs */
  1394. skb_queue_purge(&mod->echoq);
  1395. /* close the CAN layer */
  1396. close_candev(ndev);
  1397. return 0;
  1398. }
  1399. static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
  1400. {
  1401. struct ican3_dev *mod = netdev_priv(ndev);
  1402. struct can_frame *cf = (struct can_frame *)skb->data;
  1403. struct ican3_fast_desc desc;
  1404. void __iomem *desc_addr;
  1405. unsigned long flags;
  1406. if (can_dev_dropped_skb(ndev, skb))
  1407. return NETDEV_TX_OK;
  1408. spin_lock_irqsave(&mod->lock, flags);
  1409. /* check that we can actually transmit */
  1410. if (!ican3_txok(mod)) {
  1411. netdev_err(mod->ndev, "BUG: no free descriptors\n");
  1412. spin_unlock_irqrestore(&mod->lock, flags);
  1413. return NETDEV_TX_BUSY;
  1414. }
  1415. /* copy the control bits of the descriptor */
  1416. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1417. desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
  1418. memset(&desc, 0, sizeof(desc));
  1419. memcpy_fromio(&desc, desc_addr, 1);
  1420. /* convert the Linux CAN frame into ICAN3 format */
  1421. can_frame_to_ican3(mod, cf, &desc);
  1422. /*
  1423. * This hardware doesn't have TX-done notifications, so we'll try and
  1424. * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
  1425. * stack. Upon packet reception, check if the ECHO skb and received
  1426. * skb match, and use that to wake the queue.
  1427. */
  1428. ican3_put_echo_skb(mod, skb);
  1429. /*
  1430. * the programming manual says that you must set the IVALID bit, then
  1431. * interrupt, then set the valid bit. Quite weird, but it seems to be
  1432. * required for this to work
  1433. */
  1434. desc.control |= DESC_IVALID;
  1435. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1436. /* generate a MODULbus interrupt to the microcontroller */
  1437. iowrite8(0x01, &mod->dpmctrl->interrupt);
  1438. desc.control ^= DESC_VALID;
  1439. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1440. /* update the next buffer pointer */
  1441. mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
  1442. : (mod->fasttx_num + 1);
  1443. /* if there is no free descriptor space, stop the transmit queue */
  1444. if (!ican3_txok(mod))
  1445. netif_stop_queue(ndev);
  1446. spin_unlock_irqrestore(&mod->lock, flags);
  1447. return NETDEV_TX_OK;
  1448. }
  1449. static const struct net_device_ops ican3_netdev_ops = {
  1450. .ndo_open = ican3_open,
  1451. .ndo_stop = ican3_stop,
  1452. .ndo_start_xmit = ican3_xmit,
  1453. .ndo_change_mtu = can_change_mtu,
  1454. };
  1455. static const struct ethtool_ops ican3_ethtool_ops = {
  1456. .get_ts_info = ethtool_op_get_ts_info,
  1457. };
  1458. /*
  1459. * Low-level CAN Device
  1460. */
  1461. /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
  1462. static const struct can_bittiming_const ican3_bittiming_const = {
  1463. .name = DRV_NAME,
  1464. .tseg1_min = 1,
  1465. .tseg1_max = 16,
  1466. .tseg2_min = 1,
  1467. .tseg2_max = 8,
  1468. .sjw_max = 4,
  1469. .brp_min = 1,
  1470. .brp_max = 64,
  1471. .brp_inc = 1,
  1472. };
  1473. static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
  1474. {
  1475. struct ican3_dev *mod = netdev_priv(ndev);
  1476. int ret;
  1477. if (mode != CAN_MODE_START)
  1478. return -ENOTSUPP;
  1479. /* bring the bus online */
  1480. ret = ican3_set_bus_state(mod, true);
  1481. if (ret) {
  1482. netdev_err(ndev, "unable to set bus-on\n");
  1483. return ret;
  1484. }
  1485. /* start up the network device */
  1486. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1487. if (netif_queue_stopped(ndev))
  1488. netif_wake_queue(ndev);
  1489. return 0;
  1490. }
  1491. static int ican3_get_berr_counter(const struct net_device *ndev,
  1492. struct can_berr_counter *bec)
  1493. {
  1494. struct ican3_dev *mod = netdev_priv(ndev);
  1495. int ret;
  1496. ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
  1497. if (ret)
  1498. return ret;
  1499. if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
  1500. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1501. return -ETIMEDOUT;
  1502. }
  1503. bec->rxerr = mod->bec.rxerr;
  1504. bec->txerr = mod->bec.txerr;
  1505. return 0;
  1506. }
  1507. /*
  1508. * Sysfs Attributes
  1509. */
  1510. static ssize_t termination_show(struct device *dev,
  1511. struct device_attribute *attr,
  1512. char *buf)
  1513. {
  1514. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1515. int ret;
  1516. ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
  1517. if (ret)
  1518. return ret;
  1519. if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
  1520. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1521. return -ETIMEDOUT;
  1522. }
  1523. return sysfs_emit(buf, "%u\n", mod->termination_enabled);
  1524. }
  1525. static ssize_t termination_store(struct device *dev,
  1526. struct device_attribute *attr,
  1527. const char *buf, size_t count)
  1528. {
  1529. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1530. unsigned long enable;
  1531. int ret;
  1532. if (kstrtoul(buf, 0, &enable))
  1533. return -EINVAL;
  1534. ret = ican3_set_termination(mod, enable);
  1535. if (ret)
  1536. return ret;
  1537. return count;
  1538. }
  1539. static ssize_t fwinfo_show(struct device *dev,
  1540. struct device_attribute *attr,
  1541. char *buf)
  1542. {
  1543. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1544. return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
  1545. }
  1546. static DEVICE_ATTR_RW(termination);
  1547. static DEVICE_ATTR_RO(fwinfo);
  1548. static struct attribute *ican3_sysfs_attrs[] = {
  1549. &dev_attr_termination.attr,
  1550. &dev_attr_fwinfo.attr,
  1551. NULL,
  1552. };
  1553. static const struct attribute_group ican3_sysfs_attr_group = {
  1554. .attrs = ican3_sysfs_attrs,
  1555. };
  1556. /*
  1557. * PCI Subsystem
  1558. */
  1559. static int ican3_probe(struct platform_device *pdev)
  1560. {
  1561. struct janz_platform_data *pdata;
  1562. struct net_device *ndev;
  1563. struct ican3_dev *mod;
  1564. struct resource *res;
  1565. struct device *dev;
  1566. int ret;
  1567. pdata = dev_get_platdata(&pdev->dev);
  1568. if (!pdata)
  1569. return -ENXIO;
  1570. dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
  1571. /* save the struct device for printing */
  1572. dev = &pdev->dev;
  1573. /* allocate the CAN device and private data */
  1574. ndev = alloc_candev(sizeof(*mod), 0);
  1575. if (!ndev) {
  1576. dev_err(dev, "unable to allocate CANdev\n");
  1577. ret = -ENOMEM;
  1578. goto out_return;
  1579. }
  1580. platform_set_drvdata(pdev, ndev);
  1581. mod = netdev_priv(ndev);
  1582. mod->ndev = ndev;
  1583. mod->num = pdata->modno;
  1584. netif_napi_add_weight(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
  1585. skb_queue_head_init(&mod->echoq);
  1586. spin_lock_init(&mod->lock);
  1587. init_completion(&mod->termination_comp);
  1588. init_completion(&mod->buserror_comp);
  1589. /* setup device-specific sysfs attributes */
  1590. ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
  1591. /* the first unallocated page in the DPM is 9 */
  1592. mod->free_page = DPM_FREE_START;
  1593. ndev->netdev_ops = &ican3_netdev_ops;
  1594. ndev->ethtool_ops = &ican3_ethtool_ops;
  1595. ndev->flags |= IFF_ECHO;
  1596. SET_NETDEV_DEV(ndev, &pdev->dev);
  1597. mod->can.clock.freq = ICAN3_CAN_CLOCK;
  1598. mod->can.bittiming_const = &ican3_bittiming_const;
  1599. mod->can.do_set_mode = ican3_set_mode;
  1600. mod->can.do_get_berr_counter = ican3_get_berr_counter;
  1601. mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
  1602. | CAN_CTRLMODE_BERR_REPORTING
  1603. | CAN_CTRLMODE_ONE_SHOT;
  1604. /* find our IRQ number */
  1605. mod->irq = platform_get_irq(pdev, 0);
  1606. if (mod->irq < 0) {
  1607. ret = -ENODEV;
  1608. goto out_free_ndev;
  1609. }
  1610. ndev->irq = mod->irq;
  1611. /* get access to the MODULbus registers for this module */
  1612. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1613. if (!res) {
  1614. dev_err(dev, "MODULbus registers not found\n");
  1615. ret = -ENODEV;
  1616. goto out_free_ndev;
  1617. }
  1618. mod->dpm = ioremap(res->start, resource_size(res));
  1619. if (!mod->dpm) {
  1620. dev_err(dev, "MODULbus registers not ioremap\n");
  1621. ret = -ENOMEM;
  1622. goto out_free_ndev;
  1623. }
  1624. mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
  1625. /* get access to the control registers for this module */
  1626. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1627. if (!res) {
  1628. dev_err(dev, "CONTROL registers not found\n");
  1629. ret = -ENODEV;
  1630. goto out_iounmap_dpm;
  1631. }
  1632. mod->ctrl = ioremap(res->start, resource_size(res));
  1633. if (!mod->ctrl) {
  1634. dev_err(dev, "CONTROL registers not ioremap\n");
  1635. ret = -ENOMEM;
  1636. goto out_iounmap_dpm;
  1637. }
  1638. /* disable our IRQ, then hookup the IRQ handler */
  1639. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1640. ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
  1641. if (ret) {
  1642. dev_err(dev, "unable to request IRQ\n");
  1643. goto out_iounmap_ctrl;
  1644. }
  1645. /* reset and initialize the CAN controller into fast mode */
  1646. napi_enable(&mod->napi);
  1647. ret = ican3_startup_module(mod);
  1648. if (ret) {
  1649. dev_err(dev, "%s: unable to start CANdev\n", __func__);
  1650. goto out_free_irq;
  1651. }
  1652. /* register with the Linux CAN layer */
  1653. ret = register_candev(ndev);
  1654. if (ret) {
  1655. dev_err(dev, "%s: unable to register CANdev\n", __func__);
  1656. goto out_free_irq;
  1657. }
  1658. netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
  1659. return 0;
  1660. out_free_irq:
  1661. napi_disable(&mod->napi);
  1662. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1663. free_irq(mod->irq, mod);
  1664. out_iounmap_ctrl:
  1665. iounmap(mod->ctrl);
  1666. out_iounmap_dpm:
  1667. iounmap(mod->dpm);
  1668. out_free_ndev:
  1669. free_candev(ndev);
  1670. out_return:
  1671. return ret;
  1672. }
  1673. static int ican3_remove(struct platform_device *pdev)
  1674. {
  1675. struct net_device *ndev = platform_get_drvdata(pdev);
  1676. struct ican3_dev *mod = netdev_priv(ndev);
  1677. /* unregister the netdevice, stop interrupts */
  1678. unregister_netdev(ndev);
  1679. napi_disable(&mod->napi);
  1680. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1681. free_irq(mod->irq, mod);
  1682. /* put the module into reset */
  1683. ican3_shutdown_module(mod);
  1684. /* unmap all registers */
  1685. iounmap(mod->ctrl);
  1686. iounmap(mod->dpm);
  1687. free_candev(ndev);
  1688. return 0;
  1689. }
  1690. static struct platform_driver ican3_driver = {
  1691. .driver = {
  1692. .name = DRV_NAME,
  1693. },
  1694. .probe = ican3_probe,
  1695. .remove = ican3_remove,
  1696. };
  1697. module_platform_driver(ican3_driver);
  1698. MODULE_AUTHOR("Ira W. Snyder <[email protected]>");
  1699. MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
  1700. MODULE_LICENSE("GPL");
  1701. MODULE_ALIAS("platform:janz-ican3");