bch-regs.h 3.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Freescale GPMI NAND Flash Driver
  4. *
  5. * Copyright 2008-2011 Freescale Semiconductor, Inc.
  6. * Copyright 2008 Embedded Alley Solutions, Inc.
  7. */
  8. #ifndef __GPMI_NAND_BCH_REGS_H
  9. #define __GPMI_NAND_BCH_REGS_H
  10. #define HW_BCH_CTRL 0x00000000
  11. #define HW_BCH_CTRL_SET 0x00000004
  12. #define HW_BCH_CTRL_CLR 0x00000008
  13. #define HW_BCH_CTRL_TOG 0x0000000c
  14. #define BM_BCH_CTRL_COMPLETE_IRQ_EN (1 << 8)
  15. #define BM_BCH_CTRL_COMPLETE_IRQ (1 << 0)
  16. #define HW_BCH_STATUS0 0x00000010
  17. #define HW_BCH_MODE 0x00000020
  18. #define HW_BCH_ENCODEPTR 0x00000030
  19. #define HW_BCH_DATAPTR 0x00000040
  20. #define HW_BCH_METAPTR 0x00000050
  21. #define HW_BCH_LAYOUTSELECT 0x00000070
  22. #define HW_BCH_FLASH0LAYOUT0 0x00000080
  23. #define BP_BCH_FLASH0LAYOUT0_NBLOCKS 24
  24. #define BM_BCH_FLASH0LAYOUT0_NBLOCKS (0xff << BP_BCH_FLASH0LAYOUT0_NBLOCKS)
  25. #define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v) \
  26. (((v) << BP_BCH_FLASH0LAYOUT0_NBLOCKS) & BM_BCH_FLASH0LAYOUT0_NBLOCKS)
  27. #define BP_BCH_FLASH0LAYOUT0_META_SIZE 16
  28. #define BM_BCH_FLASH0LAYOUT0_META_SIZE (0xff << BP_BCH_FLASH0LAYOUT0_META_SIZE)
  29. #define BF_BCH_FLASH0LAYOUT0_META_SIZE(v) \
  30. (((v) << BP_BCH_FLASH0LAYOUT0_META_SIZE)\
  31. & BM_BCH_FLASH0LAYOUT0_META_SIZE)
  32. #define BP_BCH_FLASH0LAYOUT0_ECC0 12
  33. #define BM_BCH_FLASH0LAYOUT0_ECC0 (0xf << BP_BCH_FLASH0LAYOUT0_ECC0)
  34. #define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0 11
  35. #define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0 (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
  36. #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \
  37. (GPMI_IS_MX6(x) \
  38. ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) \
  39. & MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0) \
  40. : (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) \
  41. & BM_BCH_FLASH0LAYOUT0_ECC0) \
  42. )
  43. #define MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14 10
  44. #define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14 \
  45. (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)
  46. #define BF_BCH_FLASH0LAYOUT0_GF(v, x) \
  47. ((GPMI_IS_MX6(x) && ((v) == 14)) \
  48. ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) \
  49. & MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14) \
  50. : 0 \
  51. )
  52. #define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0
  53. #define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
  54. (0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
  55. #define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
  56. (0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
  57. #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \
  58. (GPMI_IS_MX6(x) \
  59. ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
  60. : ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
  61. )
  62. #define HW_BCH_FLASH0LAYOUT1 0x00000090
  63. #define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE 16
  64. #define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE \
  65. (0xffff << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE)
  66. #define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v) \
  67. (((v) << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE) \
  68. & BM_BCH_FLASH0LAYOUT1_PAGE_SIZE)
  69. #define BP_BCH_FLASH0LAYOUT1_ECCN 12
  70. #define BM_BCH_FLASH0LAYOUT1_ECCN (0xf << BP_BCH_FLASH0LAYOUT1_ECCN)
  71. #define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN 11
  72. #define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
  73. #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \
  74. (GPMI_IS_MX6(x) \
  75. ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) \
  76. & MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN) \
  77. : (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) \
  78. & BM_BCH_FLASH0LAYOUT1_ECCN) \
  79. )
  80. #define MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14 10
  81. #define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14 \
  82. (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)
  83. #define BF_BCH_FLASH0LAYOUT1_GF(v, x) \
  84. ((GPMI_IS_MX6(x) && ((v) == 14)) \
  85. ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) \
  86. & MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14) \
  87. : 0 \
  88. )
  89. #define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0
  90. #define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
  91. (0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
  92. #define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
  93. (0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
  94. #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \
  95. (GPMI_IS_MX6(x) \
  96. ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
  97. : ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
  98. )
  99. #define HW_BCH_VERSION 0x00000160
  100. #endif