pmecc.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2017 ATMEL
  4. * Copyright 2017 Free Electrons
  5. *
  6. * Author: Boris Brezillon <[email protected]>
  7. *
  8. * Derived from the atmel_nand.c driver which contained the following
  9. * copyrights:
  10. *
  11. * Copyright 2003 Rick Bronson
  12. *
  13. * Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
  14. * Copyright 2001 Thomas Gleixner ([email protected])
  15. *
  16. * Derived from drivers/mtd/spia.c (removed in v3.8)
  17. * Copyright 2000 Steven J. Hill ([email protected])
  18. *
  19. * Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
  20. * Richard Genoud ([email protected]), Adeneo Copyright 2007
  21. *
  22. * Derived from Das U-Boot source code
  23. * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
  24. * Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
  25. *
  26. * Add Programmable Multibit ECC support for various AT91 SoC
  27. * Copyright 2012 ATMEL, Hong Xu
  28. *
  29. * Add Nand Flash Controller support for SAMA5 SoC
  30. * Copyright 2013 ATMEL, Josh Wu ([email protected])
  31. *
  32. * The PMECC is an hardware assisted BCH engine, which means part of the
  33. * ECC algorithm is left to the software. The hardware/software repartition
  34. * is explained in the "PMECC Controller Functional Description" chapter in
  35. * Atmel datasheets, and some of the functions in this file are directly
  36. * implementing the algorithms described in the "Software Implementation"
  37. * sub-section.
  38. *
  39. * TODO: it seems that the software BCH implementation in lib/bch.c is already
  40. * providing some of the logic we are implementing here. It would be smart
  41. * to expose the needed lib/bch.c helpers/functions and re-use them here.
  42. */
  43. #include <linux/genalloc.h>
  44. #include <linux/iopoll.h>
  45. #include <linux/module.h>
  46. #include <linux/mtd/rawnand.h>
  47. #include <linux/of_irq.h>
  48. #include <linux/of_platform.h>
  49. #include <linux/platform_device.h>
  50. #include <linux/slab.h>
  51. #include "pmecc.h"
  52. /* Galois field dimension */
  53. #define PMECC_GF_DIMENSION_13 13
  54. #define PMECC_GF_DIMENSION_14 14
  55. /* Primitive Polynomial used by PMECC */
  56. #define PMECC_GF_13_PRIMITIVE_POLY 0x201b
  57. #define PMECC_GF_14_PRIMITIVE_POLY 0x4443
  58. #define PMECC_LOOKUP_TABLE_SIZE_512 0x2000
  59. #define PMECC_LOOKUP_TABLE_SIZE_1024 0x4000
  60. /* Time out value for reading PMECC status register */
  61. #define PMECC_MAX_TIMEOUT_MS 100
  62. /* PMECC Register Definitions */
  63. #define ATMEL_PMECC_CFG 0x0
  64. #define PMECC_CFG_BCH_STRENGTH(x) (x)
  65. #define PMECC_CFG_BCH_STRENGTH_MASK GENMASK(2, 0)
  66. #define PMECC_CFG_SECTOR512 (0 << 4)
  67. #define PMECC_CFG_SECTOR1024 (1 << 4)
  68. #define PMECC_CFG_NSECTORS(x) ((fls(x) - 1) << 8)
  69. #define PMECC_CFG_READ_OP (0 << 12)
  70. #define PMECC_CFG_WRITE_OP (1 << 12)
  71. #define PMECC_CFG_SPARE_ENABLE BIT(16)
  72. #define PMECC_CFG_AUTO_ENABLE BIT(20)
  73. #define ATMEL_PMECC_SAREA 0x4
  74. #define ATMEL_PMECC_SADDR 0x8
  75. #define ATMEL_PMECC_EADDR 0xc
  76. #define ATMEL_PMECC_CLK 0x10
  77. #define PMECC_CLK_133MHZ (2 << 0)
  78. #define ATMEL_PMECC_CTRL 0x14
  79. #define PMECC_CTRL_RST BIT(0)
  80. #define PMECC_CTRL_DATA BIT(1)
  81. #define PMECC_CTRL_USER BIT(2)
  82. #define PMECC_CTRL_ENABLE BIT(4)
  83. #define PMECC_CTRL_DISABLE BIT(5)
  84. #define ATMEL_PMECC_SR 0x18
  85. #define PMECC_SR_BUSY BIT(0)
  86. #define PMECC_SR_ENABLE BIT(4)
  87. #define ATMEL_PMECC_IER 0x1c
  88. #define ATMEL_PMECC_IDR 0x20
  89. #define ATMEL_PMECC_IMR 0x24
  90. #define ATMEL_PMECC_ISR 0x28
  91. #define PMECC_ERROR_INT BIT(0)
  92. #define ATMEL_PMECC_ECC(sector, n) \
  93. ((((sector) + 1) * 0x40) + (n))
  94. #define ATMEL_PMECC_REM(sector, n) \
  95. ((((sector) + 1) * 0x40) + ((n) * 4) + 0x200)
  96. /* PMERRLOC Register Definitions */
  97. #define ATMEL_PMERRLOC_ELCFG 0x0
  98. #define PMERRLOC_ELCFG_SECTOR_512 (0 << 0)
  99. #define PMERRLOC_ELCFG_SECTOR_1024 (1 << 0)
  100. #define PMERRLOC_ELCFG_NUM_ERRORS(n) ((n) << 16)
  101. #define ATMEL_PMERRLOC_ELPRIM 0x4
  102. #define ATMEL_PMERRLOC_ELEN 0x8
  103. #define ATMEL_PMERRLOC_ELDIS 0xc
  104. #define PMERRLOC_DISABLE BIT(0)
  105. #define ATMEL_PMERRLOC_ELSR 0x10
  106. #define PMERRLOC_ELSR_BUSY BIT(0)
  107. #define ATMEL_PMERRLOC_ELIER 0x14
  108. #define ATMEL_PMERRLOC_ELIDR 0x18
  109. #define ATMEL_PMERRLOC_ELIMR 0x1c
  110. #define ATMEL_PMERRLOC_ELISR 0x20
  111. #define PMERRLOC_ERR_NUM_MASK GENMASK(12, 8)
  112. #define PMERRLOC_CALC_DONE BIT(0)
  113. #define ATMEL_PMERRLOC_SIGMA(x) (((x) * 0x4) + 0x28)
  114. #define ATMEL_PMERRLOC_EL(offs, x) (((x) * 0x4) + (offs))
  115. struct atmel_pmecc_gf_tables {
  116. u16 *alpha_to;
  117. u16 *index_of;
  118. };
  119. struct atmel_pmecc_caps {
  120. const int *strengths;
  121. int nstrengths;
  122. int el_offset;
  123. bool correct_erased_chunks;
  124. };
  125. struct atmel_pmecc {
  126. struct device *dev;
  127. const struct atmel_pmecc_caps *caps;
  128. struct {
  129. void __iomem *base;
  130. void __iomem *errloc;
  131. } regs;
  132. struct mutex lock;
  133. };
  134. struct atmel_pmecc_user_conf_cache {
  135. u32 cfg;
  136. u32 sarea;
  137. u32 saddr;
  138. u32 eaddr;
  139. };
  140. struct atmel_pmecc_user {
  141. struct atmel_pmecc_user_conf_cache cache;
  142. struct atmel_pmecc *pmecc;
  143. const struct atmel_pmecc_gf_tables *gf_tables;
  144. int eccbytes;
  145. s16 *partial_syn;
  146. s16 *si;
  147. s16 *lmu;
  148. s16 *smu;
  149. s32 *mu;
  150. s32 *dmu;
  151. s32 *delta;
  152. u32 isr;
  153. };
  154. static DEFINE_MUTEX(pmecc_gf_tables_lock);
  155. static const struct atmel_pmecc_gf_tables *pmecc_gf_tables_512;
  156. static const struct atmel_pmecc_gf_tables *pmecc_gf_tables_1024;
  157. static inline int deg(unsigned int poly)
  158. {
  159. /* polynomial degree is the most-significant bit index */
  160. return fls(poly) - 1;
  161. }
  162. static int atmel_pmecc_build_gf_tables(int mm, unsigned int poly,
  163. struct atmel_pmecc_gf_tables *gf_tables)
  164. {
  165. unsigned int i, x = 1;
  166. const unsigned int k = BIT(deg(poly));
  167. unsigned int nn = BIT(mm) - 1;
  168. /* primitive polynomial must be of degree m */
  169. if (k != (1u << mm))
  170. return -EINVAL;
  171. for (i = 0; i < nn; i++) {
  172. gf_tables->alpha_to[i] = x;
  173. gf_tables->index_of[x] = i;
  174. if (i && (x == 1))
  175. /* polynomial is not primitive (a^i=1 with 0<i<2^m-1) */
  176. return -EINVAL;
  177. x <<= 1;
  178. if (x & k)
  179. x ^= poly;
  180. }
  181. gf_tables->alpha_to[nn] = 1;
  182. gf_tables->index_of[0] = 0;
  183. return 0;
  184. }
  185. static const struct atmel_pmecc_gf_tables *
  186. atmel_pmecc_create_gf_tables(const struct atmel_pmecc_user_req *req)
  187. {
  188. struct atmel_pmecc_gf_tables *gf_tables;
  189. unsigned int poly, degree, table_size;
  190. int ret;
  191. if (req->ecc.sectorsize == 512) {
  192. degree = PMECC_GF_DIMENSION_13;
  193. poly = PMECC_GF_13_PRIMITIVE_POLY;
  194. table_size = PMECC_LOOKUP_TABLE_SIZE_512;
  195. } else {
  196. degree = PMECC_GF_DIMENSION_14;
  197. poly = PMECC_GF_14_PRIMITIVE_POLY;
  198. table_size = PMECC_LOOKUP_TABLE_SIZE_1024;
  199. }
  200. gf_tables = kzalloc(sizeof(*gf_tables) +
  201. (2 * table_size * sizeof(u16)),
  202. GFP_KERNEL);
  203. if (!gf_tables)
  204. return ERR_PTR(-ENOMEM);
  205. gf_tables->alpha_to = (void *)(gf_tables + 1);
  206. gf_tables->index_of = gf_tables->alpha_to + table_size;
  207. ret = atmel_pmecc_build_gf_tables(degree, poly, gf_tables);
  208. if (ret) {
  209. kfree(gf_tables);
  210. return ERR_PTR(ret);
  211. }
  212. return gf_tables;
  213. }
  214. static const struct atmel_pmecc_gf_tables *
  215. atmel_pmecc_get_gf_tables(const struct atmel_pmecc_user_req *req)
  216. {
  217. const struct atmel_pmecc_gf_tables **gf_tables, *ret;
  218. mutex_lock(&pmecc_gf_tables_lock);
  219. if (req->ecc.sectorsize == 512)
  220. gf_tables = &pmecc_gf_tables_512;
  221. else
  222. gf_tables = &pmecc_gf_tables_1024;
  223. ret = *gf_tables;
  224. if (!ret) {
  225. ret = atmel_pmecc_create_gf_tables(req);
  226. if (!IS_ERR(ret))
  227. *gf_tables = ret;
  228. }
  229. mutex_unlock(&pmecc_gf_tables_lock);
  230. return ret;
  231. }
  232. static int atmel_pmecc_prepare_user_req(struct atmel_pmecc *pmecc,
  233. struct atmel_pmecc_user_req *req)
  234. {
  235. int i, max_eccbytes, eccbytes = 0, eccstrength = 0;
  236. if (req->pagesize <= 0 || req->oobsize <= 0 || req->ecc.bytes <= 0)
  237. return -EINVAL;
  238. if (req->ecc.ooboffset >= 0 &&
  239. req->ecc.ooboffset + req->ecc.bytes > req->oobsize)
  240. return -EINVAL;
  241. if (req->ecc.sectorsize == ATMEL_PMECC_SECTOR_SIZE_AUTO) {
  242. if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH)
  243. return -EINVAL;
  244. if (req->pagesize > 512)
  245. req->ecc.sectorsize = 1024;
  246. else
  247. req->ecc.sectorsize = 512;
  248. }
  249. if (req->ecc.sectorsize != 512 && req->ecc.sectorsize != 1024)
  250. return -EINVAL;
  251. if (req->pagesize % req->ecc.sectorsize)
  252. return -EINVAL;
  253. req->ecc.nsectors = req->pagesize / req->ecc.sectorsize;
  254. max_eccbytes = req->ecc.bytes;
  255. for (i = 0; i < pmecc->caps->nstrengths; i++) {
  256. int nbytes, strength = pmecc->caps->strengths[i];
  257. if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH &&
  258. strength < req->ecc.strength)
  259. continue;
  260. nbytes = DIV_ROUND_UP(strength * fls(8 * req->ecc.sectorsize),
  261. 8);
  262. nbytes *= req->ecc.nsectors;
  263. if (nbytes > max_eccbytes)
  264. break;
  265. eccstrength = strength;
  266. eccbytes = nbytes;
  267. if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH)
  268. break;
  269. }
  270. if (!eccstrength)
  271. return -EINVAL;
  272. req->ecc.bytes = eccbytes;
  273. req->ecc.strength = eccstrength;
  274. if (req->ecc.ooboffset < 0)
  275. req->ecc.ooboffset = req->oobsize - eccbytes;
  276. return 0;
  277. }
  278. struct atmel_pmecc_user *
  279. atmel_pmecc_create_user(struct atmel_pmecc *pmecc,
  280. struct atmel_pmecc_user_req *req)
  281. {
  282. struct atmel_pmecc_user *user;
  283. const struct atmel_pmecc_gf_tables *gf_tables;
  284. int strength, size, ret;
  285. ret = atmel_pmecc_prepare_user_req(pmecc, req);
  286. if (ret)
  287. return ERR_PTR(ret);
  288. size = sizeof(*user);
  289. size = ALIGN(size, sizeof(u16));
  290. /* Reserve space for partial_syn, si and smu */
  291. size += ((2 * req->ecc.strength) + 1) * sizeof(u16) *
  292. (2 + req->ecc.strength + 2);
  293. /* Reserve space for lmu. */
  294. size += (req->ecc.strength + 1) * sizeof(u16);
  295. /* Reserve space for mu, dmu and delta. */
  296. size = ALIGN(size, sizeof(s32));
  297. size += (req->ecc.strength + 1) * sizeof(s32) * 3;
  298. user = kzalloc(size, GFP_KERNEL);
  299. if (!user)
  300. return ERR_PTR(-ENOMEM);
  301. user->pmecc = pmecc;
  302. user->partial_syn = (s16 *)PTR_ALIGN(user + 1, sizeof(u16));
  303. user->si = user->partial_syn + ((2 * req->ecc.strength) + 1);
  304. user->lmu = user->si + ((2 * req->ecc.strength) + 1);
  305. user->smu = user->lmu + (req->ecc.strength + 1);
  306. user->mu = (s32 *)PTR_ALIGN(user->smu +
  307. (((2 * req->ecc.strength) + 1) *
  308. (req->ecc.strength + 2)),
  309. sizeof(s32));
  310. user->dmu = user->mu + req->ecc.strength + 1;
  311. user->delta = user->dmu + req->ecc.strength + 1;
  312. gf_tables = atmel_pmecc_get_gf_tables(req);
  313. if (IS_ERR(gf_tables)) {
  314. kfree(user);
  315. return ERR_CAST(gf_tables);
  316. }
  317. user->gf_tables = gf_tables;
  318. user->eccbytes = req->ecc.bytes / req->ecc.nsectors;
  319. for (strength = 0; strength < pmecc->caps->nstrengths; strength++) {
  320. if (pmecc->caps->strengths[strength] == req->ecc.strength)
  321. break;
  322. }
  323. user->cache.cfg = PMECC_CFG_BCH_STRENGTH(strength) |
  324. PMECC_CFG_NSECTORS(req->ecc.nsectors);
  325. if (req->ecc.sectorsize == 1024)
  326. user->cache.cfg |= PMECC_CFG_SECTOR1024;
  327. user->cache.sarea = req->oobsize - 1;
  328. user->cache.saddr = req->ecc.ooboffset;
  329. user->cache.eaddr = req->ecc.ooboffset + req->ecc.bytes - 1;
  330. return user;
  331. }
  332. EXPORT_SYMBOL_GPL(atmel_pmecc_create_user);
  333. void atmel_pmecc_destroy_user(struct atmel_pmecc_user *user)
  334. {
  335. kfree(user);
  336. }
  337. EXPORT_SYMBOL_GPL(atmel_pmecc_destroy_user);
  338. static int get_strength(struct atmel_pmecc_user *user)
  339. {
  340. const int *strengths = user->pmecc->caps->strengths;
  341. return strengths[user->cache.cfg & PMECC_CFG_BCH_STRENGTH_MASK];
  342. }
  343. static int get_sectorsize(struct atmel_pmecc_user *user)
  344. {
  345. return user->cache.cfg & PMECC_CFG_SECTOR1024 ? 1024 : 512;
  346. }
  347. static void atmel_pmecc_gen_syndrome(struct atmel_pmecc_user *user, int sector)
  348. {
  349. int strength = get_strength(user);
  350. u32 value;
  351. int i;
  352. /* Fill odd syndromes */
  353. for (i = 0; i < strength; i++) {
  354. value = readl_relaxed(user->pmecc->regs.base +
  355. ATMEL_PMECC_REM(sector, i / 2));
  356. if (i & 1)
  357. value >>= 16;
  358. user->partial_syn[(2 * i) + 1] = value;
  359. }
  360. }
  361. static void atmel_pmecc_substitute(struct atmel_pmecc_user *user)
  362. {
  363. int degree = get_sectorsize(user) == 512 ? 13 : 14;
  364. int cw_len = BIT(degree) - 1;
  365. int strength = get_strength(user);
  366. s16 *alpha_to = user->gf_tables->alpha_to;
  367. s16 *index_of = user->gf_tables->index_of;
  368. s16 *partial_syn = user->partial_syn;
  369. s16 *si;
  370. int i, j;
  371. /*
  372. * si[] is a table that holds the current syndrome value,
  373. * an element of that table belongs to the field
  374. */
  375. si = user->si;
  376. memset(&si[1], 0, sizeof(s16) * ((2 * strength) - 1));
  377. /* Computation 2t syndromes based on S(x) */
  378. /* Odd syndromes */
  379. for (i = 1; i < 2 * strength; i += 2) {
  380. for (j = 0; j < degree; j++) {
  381. if (partial_syn[i] & BIT(j))
  382. si[i] = alpha_to[i * j] ^ si[i];
  383. }
  384. }
  385. /* Even syndrome = (Odd syndrome) ** 2 */
  386. for (i = 2, j = 1; j <= strength; i = ++j << 1) {
  387. if (si[j] == 0) {
  388. si[i] = 0;
  389. } else {
  390. s16 tmp;
  391. tmp = index_of[si[j]];
  392. tmp = (tmp * 2) % cw_len;
  393. si[i] = alpha_to[tmp];
  394. }
  395. }
  396. }
  397. static void atmel_pmecc_get_sigma(struct atmel_pmecc_user *user)
  398. {
  399. s16 *lmu = user->lmu;
  400. s16 *si = user->si;
  401. s32 *mu = user->mu;
  402. s32 *dmu = user->dmu;
  403. s32 *delta = user->delta;
  404. int degree = get_sectorsize(user) == 512 ? 13 : 14;
  405. int cw_len = BIT(degree) - 1;
  406. int strength = get_strength(user);
  407. int num = 2 * strength + 1;
  408. s16 *index_of = user->gf_tables->index_of;
  409. s16 *alpha_to = user->gf_tables->alpha_to;
  410. int i, j, k;
  411. u32 dmu_0_count, tmp;
  412. s16 *smu = user->smu;
  413. /* index of largest delta */
  414. int ro;
  415. int largest;
  416. int diff;
  417. dmu_0_count = 0;
  418. /* First Row */
  419. /* Mu */
  420. mu[0] = -1;
  421. memset(smu, 0, sizeof(s16) * num);
  422. smu[0] = 1;
  423. /* discrepancy set to 1 */
  424. dmu[0] = 1;
  425. /* polynom order set to 0 */
  426. lmu[0] = 0;
  427. delta[0] = (mu[0] * 2 - lmu[0]) >> 1;
  428. /* Second Row */
  429. /* Mu */
  430. mu[1] = 0;
  431. /* Sigma(x) set to 1 */
  432. memset(&smu[num], 0, sizeof(s16) * num);
  433. smu[num] = 1;
  434. /* discrepancy set to S1 */
  435. dmu[1] = si[1];
  436. /* polynom order set to 0 */
  437. lmu[1] = 0;
  438. delta[1] = (mu[1] * 2 - lmu[1]) >> 1;
  439. /* Init the Sigma(x) last row */
  440. memset(&smu[(strength + 1) * num], 0, sizeof(s16) * num);
  441. for (i = 1; i <= strength; i++) {
  442. mu[i + 1] = i << 1;
  443. /* Begin Computing Sigma (Mu+1) and L(mu) */
  444. /* check if discrepancy is set to 0 */
  445. if (dmu[i] == 0) {
  446. dmu_0_count++;
  447. tmp = ((strength - (lmu[i] >> 1) - 1) / 2);
  448. if ((strength - (lmu[i] >> 1) - 1) & 0x1)
  449. tmp += 2;
  450. else
  451. tmp += 1;
  452. if (dmu_0_count == tmp) {
  453. for (j = 0; j <= (lmu[i] >> 1) + 1; j++)
  454. smu[(strength + 1) * num + j] =
  455. smu[i * num + j];
  456. lmu[strength + 1] = lmu[i];
  457. return;
  458. }
  459. /* copy polynom */
  460. for (j = 0; j <= lmu[i] >> 1; j++)
  461. smu[(i + 1) * num + j] = smu[i * num + j];
  462. /* copy previous polynom order to the next */
  463. lmu[i + 1] = lmu[i];
  464. } else {
  465. ro = 0;
  466. largest = -1;
  467. /* find largest delta with dmu != 0 */
  468. for (j = 0; j < i; j++) {
  469. if ((dmu[j]) && (delta[j] > largest)) {
  470. largest = delta[j];
  471. ro = j;
  472. }
  473. }
  474. /* compute difference */
  475. diff = (mu[i] - mu[ro]);
  476. /* Compute degree of the new smu polynomial */
  477. if ((lmu[i] >> 1) > ((lmu[ro] >> 1) + diff))
  478. lmu[i + 1] = lmu[i];
  479. else
  480. lmu[i + 1] = ((lmu[ro] >> 1) + diff) * 2;
  481. /* Init smu[i+1] with 0 */
  482. for (k = 0; k < num; k++)
  483. smu[(i + 1) * num + k] = 0;
  484. /* Compute smu[i+1] */
  485. for (k = 0; k <= lmu[ro] >> 1; k++) {
  486. s16 a, b, c;
  487. if (!(smu[ro * num + k] && dmu[i]))
  488. continue;
  489. a = index_of[dmu[i]];
  490. b = index_of[dmu[ro]];
  491. c = index_of[smu[ro * num + k]];
  492. tmp = a + (cw_len - b) + c;
  493. a = alpha_to[tmp % cw_len];
  494. smu[(i + 1) * num + (k + diff)] = a;
  495. }
  496. for (k = 0; k <= lmu[i] >> 1; k++)
  497. smu[(i + 1) * num + k] ^= smu[i * num + k];
  498. }
  499. /* End Computing Sigma (Mu+1) and L(mu) */
  500. /* In either case compute delta */
  501. delta[i + 1] = (mu[i + 1] * 2 - lmu[i + 1]) >> 1;
  502. /* Do not compute discrepancy for the last iteration */
  503. if (i >= strength)
  504. continue;
  505. for (k = 0; k <= (lmu[i + 1] >> 1); k++) {
  506. tmp = 2 * (i - 1);
  507. if (k == 0) {
  508. dmu[i + 1] = si[tmp + 3];
  509. } else if (smu[(i + 1) * num + k] && si[tmp + 3 - k]) {
  510. s16 a, b, c;
  511. a = index_of[smu[(i + 1) * num + k]];
  512. b = si[2 * (i - 1) + 3 - k];
  513. c = index_of[b];
  514. tmp = a + c;
  515. tmp %= cw_len;
  516. dmu[i + 1] = alpha_to[tmp] ^ dmu[i + 1];
  517. }
  518. }
  519. }
  520. }
  521. static int atmel_pmecc_err_location(struct atmel_pmecc_user *user)
  522. {
  523. int sector_size = get_sectorsize(user);
  524. int degree = sector_size == 512 ? 13 : 14;
  525. struct atmel_pmecc *pmecc = user->pmecc;
  526. int strength = get_strength(user);
  527. int ret, roots_nbr, i, err_nbr = 0;
  528. int num = (2 * strength) + 1;
  529. s16 *smu = user->smu;
  530. u32 val;
  531. writel(PMERRLOC_DISABLE, pmecc->regs.errloc + ATMEL_PMERRLOC_ELDIS);
  532. for (i = 0; i <= user->lmu[strength + 1] >> 1; i++) {
  533. writel_relaxed(smu[(strength + 1) * num + i],
  534. pmecc->regs.errloc + ATMEL_PMERRLOC_SIGMA(i));
  535. err_nbr++;
  536. }
  537. val = (err_nbr - 1) << 16;
  538. if (sector_size == 1024)
  539. val |= 1;
  540. writel(val, pmecc->regs.errloc + ATMEL_PMERRLOC_ELCFG);
  541. writel((sector_size * 8) + (degree * strength),
  542. pmecc->regs.errloc + ATMEL_PMERRLOC_ELEN);
  543. ret = readl_relaxed_poll_timeout(pmecc->regs.errloc +
  544. ATMEL_PMERRLOC_ELISR,
  545. val, val & PMERRLOC_CALC_DONE, 0,
  546. PMECC_MAX_TIMEOUT_MS * 1000);
  547. if (ret) {
  548. dev_err(pmecc->dev,
  549. "PMECC: Timeout to calculate error location.\n");
  550. return ret;
  551. }
  552. roots_nbr = (val & PMERRLOC_ERR_NUM_MASK) >> 8;
  553. /* Number of roots == degree of smu hence <= cap */
  554. if (roots_nbr == user->lmu[strength + 1] >> 1)
  555. return err_nbr - 1;
  556. /*
  557. * Number of roots does not match the degree of smu
  558. * unable to correct error.
  559. */
  560. return -EBADMSG;
  561. }
  562. int atmel_pmecc_correct_sector(struct atmel_pmecc_user *user, int sector,
  563. void *data, void *ecc)
  564. {
  565. struct atmel_pmecc *pmecc = user->pmecc;
  566. int sectorsize = get_sectorsize(user);
  567. int eccbytes = user->eccbytes;
  568. int i, nerrors;
  569. if (!(user->isr & BIT(sector)))
  570. return 0;
  571. atmel_pmecc_gen_syndrome(user, sector);
  572. atmel_pmecc_substitute(user);
  573. atmel_pmecc_get_sigma(user);
  574. nerrors = atmel_pmecc_err_location(user);
  575. if (nerrors < 0)
  576. return nerrors;
  577. for (i = 0; i < nerrors; i++) {
  578. const char *area;
  579. int byte, bit;
  580. u32 errpos;
  581. u8 *ptr;
  582. errpos = readl_relaxed(pmecc->regs.errloc +
  583. ATMEL_PMERRLOC_EL(pmecc->caps->el_offset, i));
  584. errpos--;
  585. byte = errpos / 8;
  586. bit = errpos % 8;
  587. if (byte < sectorsize) {
  588. ptr = data + byte;
  589. area = "data";
  590. } else if (byte < sectorsize + eccbytes) {
  591. ptr = ecc + byte - sectorsize;
  592. area = "ECC";
  593. } else {
  594. dev_dbg(pmecc->dev,
  595. "Invalid errpos value (%d, max is %d)\n",
  596. errpos, (sectorsize + eccbytes) * 8);
  597. return -EINVAL;
  598. }
  599. dev_dbg(pmecc->dev,
  600. "Bit flip in %s area, byte %d: 0x%02x -> 0x%02x\n",
  601. area, byte, *ptr, (unsigned int)(*ptr ^ BIT(bit)));
  602. *ptr ^= BIT(bit);
  603. }
  604. return nerrors;
  605. }
  606. EXPORT_SYMBOL_GPL(atmel_pmecc_correct_sector);
  607. bool atmel_pmecc_correct_erased_chunks(struct atmel_pmecc_user *user)
  608. {
  609. return user->pmecc->caps->correct_erased_chunks;
  610. }
  611. EXPORT_SYMBOL_GPL(atmel_pmecc_correct_erased_chunks);
  612. void atmel_pmecc_get_generated_eccbytes(struct atmel_pmecc_user *user,
  613. int sector, void *ecc)
  614. {
  615. struct atmel_pmecc *pmecc = user->pmecc;
  616. u8 *ptr = ecc;
  617. int i;
  618. for (i = 0; i < user->eccbytes; i++)
  619. ptr[i] = readb_relaxed(pmecc->regs.base +
  620. ATMEL_PMECC_ECC(sector, i));
  621. }
  622. EXPORT_SYMBOL_GPL(atmel_pmecc_get_generated_eccbytes);
  623. void atmel_pmecc_reset(struct atmel_pmecc *pmecc)
  624. {
  625. writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL);
  626. writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
  627. }
  628. EXPORT_SYMBOL_GPL(atmel_pmecc_reset);
  629. int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op)
  630. {
  631. struct atmel_pmecc *pmecc = user->pmecc;
  632. u32 cfg;
  633. if (op != NAND_ECC_READ && op != NAND_ECC_WRITE) {
  634. dev_err(pmecc->dev, "Bad ECC operation!");
  635. return -EINVAL;
  636. }
  637. mutex_lock(&user->pmecc->lock);
  638. cfg = user->cache.cfg;
  639. if (op == NAND_ECC_WRITE)
  640. cfg |= PMECC_CFG_WRITE_OP;
  641. else
  642. cfg |= PMECC_CFG_AUTO_ENABLE;
  643. writel(cfg, pmecc->regs.base + ATMEL_PMECC_CFG);
  644. writel(user->cache.sarea, pmecc->regs.base + ATMEL_PMECC_SAREA);
  645. writel(user->cache.saddr, pmecc->regs.base + ATMEL_PMECC_SADDR);
  646. writel(user->cache.eaddr, pmecc->regs.base + ATMEL_PMECC_EADDR);
  647. writel(PMECC_CTRL_ENABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
  648. writel(PMECC_CTRL_DATA, pmecc->regs.base + ATMEL_PMECC_CTRL);
  649. return 0;
  650. }
  651. EXPORT_SYMBOL_GPL(atmel_pmecc_enable);
  652. void atmel_pmecc_disable(struct atmel_pmecc_user *user)
  653. {
  654. atmel_pmecc_reset(user->pmecc);
  655. mutex_unlock(&user->pmecc->lock);
  656. }
  657. EXPORT_SYMBOL_GPL(atmel_pmecc_disable);
  658. int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
  659. {
  660. struct atmel_pmecc *pmecc = user->pmecc;
  661. u32 status;
  662. int ret;
  663. ret = readl_relaxed_poll_timeout(pmecc->regs.base +
  664. ATMEL_PMECC_SR,
  665. status, !(status & PMECC_SR_BUSY), 0,
  666. PMECC_MAX_TIMEOUT_MS * 1000);
  667. if (ret) {
  668. dev_err(pmecc->dev,
  669. "Timeout while waiting for PMECC ready.\n");
  670. return ret;
  671. }
  672. user->isr = readl_relaxed(pmecc->regs.base + ATMEL_PMECC_ISR);
  673. return 0;
  674. }
  675. EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
  676. static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev,
  677. const struct atmel_pmecc_caps *caps,
  678. int pmecc_res_idx, int errloc_res_idx)
  679. {
  680. struct device *dev = &pdev->dev;
  681. struct atmel_pmecc *pmecc;
  682. pmecc = devm_kzalloc(dev, sizeof(*pmecc), GFP_KERNEL);
  683. if (!pmecc)
  684. return ERR_PTR(-ENOMEM);
  685. pmecc->caps = caps;
  686. pmecc->dev = dev;
  687. mutex_init(&pmecc->lock);
  688. pmecc->regs.base = devm_platform_ioremap_resource(pdev, pmecc_res_idx);
  689. if (IS_ERR(pmecc->regs.base))
  690. return ERR_CAST(pmecc->regs.base);
  691. pmecc->regs.errloc = devm_platform_ioremap_resource(pdev, errloc_res_idx);
  692. if (IS_ERR(pmecc->regs.errloc))
  693. return ERR_CAST(pmecc->regs.errloc);
  694. /* Disable all interrupts before registering the PMECC handler. */
  695. writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR);
  696. atmel_pmecc_reset(pmecc);
  697. return pmecc;
  698. }
  699. static void devm_atmel_pmecc_put(struct device *dev, void *res)
  700. {
  701. struct atmel_pmecc **pmecc = res;
  702. put_device((*pmecc)->dev);
  703. }
  704. static struct atmel_pmecc *atmel_pmecc_get_by_node(struct device *userdev,
  705. struct device_node *np)
  706. {
  707. struct platform_device *pdev;
  708. struct atmel_pmecc *pmecc, **ptr;
  709. int ret;
  710. pdev = of_find_device_by_node(np);
  711. if (!pdev)
  712. return ERR_PTR(-EPROBE_DEFER);
  713. pmecc = platform_get_drvdata(pdev);
  714. if (!pmecc) {
  715. ret = -EPROBE_DEFER;
  716. goto err_put_device;
  717. }
  718. ptr = devres_alloc(devm_atmel_pmecc_put, sizeof(*ptr), GFP_KERNEL);
  719. if (!ptr) {
  720. ret = -ENOMEM;
  721. goto err_put_device;
  722. }
  723. *ptr = pmecc;
  724. devres_add(userdev, ptr);
  725. return pmecc;
  726. err_put_device:
  727. put_device(&pdev->dev);
  728. return ERR_PTR(ret);
  729. }
  730. static const int atmel_pmecc_strengths[] = { 2, 4, 8, 12, 24, 32 };
  731. static struct atmel_pmecc_caps at91sam9g45_caps = {
  732. .strengths = atmel_pmecc_strengths,
  733. .nstrengths = 5,
  734. .el_offset = 0x8c,
  735. };
  736. static struct atmel_pmecc_caps sama5d4_caps = {
  737. .strengths = atmel_pmecc_strengths,
  738. .nstrengths = 5,
  739. .el_offset = 0x8c,
  740. .correct_erased_chunks = true,
  741. };
  742. static struct atmel_pmecc_caps sama5d2_caps = {
  743. .strengths = atmel_pmecc_strengths,
  744. .nstrengths = 6,
  745. .el_offset = 0xac,
  746. .correct_erased_chunks = true,
  747. };
  748. static const struct of_device_id __maybe_unused atmel_pmecc_legacy_match[] = {
  749. { .compatible = "atmel,sama5d4-nand", &sama5d4_caps },
  750. { .compatible = "atmel,sama5d2-nand", &sama5d2_caps },
  751. { /* sentinel */ }
  752. };
  753. struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
  754. {
  755. struct atmel_pmecc *pmecc;
  756. struct device_node *np;
  757. if (!userdev)
  758. return ERR_PTR(-EINVAL);
  759. if (!userdev->of_node)
  760. return NULL;
  761. np = of_parse_phandle(userdev->of_node, "ecc-engine", 0);
  762. if (np) {
  763. pmecc = atmel_pmecc_get_by_node(userdev, np);
  764. of_node_put(np);
  765. } else {
  766. /*
  767. * Support old DT bindings: in this case the PMECC iomem
  768. * resources are directly defined in the user pdev at position
  769. * 1 and 2. Extract all relevant information from there.
  770. */
  771. struct platform_device *pdev = to_platform_device(userdev);
  772. const struct atmel_pmecc_caps *caps;
  773. const struct of_device_id *match;
  774. /* No PMECC engine available. */
  775. if (!of_property_read_bool(userdev->of_node,
  776. "atmel,has-pmecc"))
  777. return NULL;
  778. caps = &at91sam9g45_caps;
  779. /* Find the caps associated to the NAND dev node. */
  780. match = of_match_node(atmel_pmecc_legacy_match,
  781. userdev->of_node);
  782. if (match && match->data)
  783. caps = match->data;
  784. pmecc = atmel_pmecc_create(pdev, caps, 1, 2);
  785. }
  786. return pmecc;
  787. }
  788. EXPORT_SYMBOL(devm_atmel_pmecc_get);
  789. static const struct of_device_id atmel_pmecc_match[] = {
  790. { .compatible = "atmel,at91sam9g45-pmecc", &at91sam9g45_caps },
  791. { .compatible = "atmel,sama5d4-pmecc", &sama5d4_caps },
  792. { .compatible = "atmel,sama5d2-pmecc", &sama5d2_caps },
  793. { /* sentinel */ }
  794. };
  795. MODULE_DEVICE_TABLE(of, atmel_pmecc_match);
  796. static int atmel_pmecc_probe(struct platform_device *pdev)
  797. {
  798. struct device *dev = &pdev->dev;
  799. const struct atmel_pmecc_caps *caps;
  800. struct atmel_pmecc *pmecc;
  801. caps = of_device_get_match_data(&pdev->dev);
  802. if (!caps) {
  803. dev_err(dev, "Invalid caps\n");
  804. return -EINVAL;
  805. }
  806. pmecc = atmel_pmecc_create(pdev, caps, 0, 1);
  807. if (IS_ERR(pmecc))
  808. return PTR_ERR(pmecc);
  809. platform_set_drvdata(pdev, pmecc);
  810. return 0;
  811. }
  812. static struct platform_driver atmel_pmecc_driver = {
  813. .driver = {
  814. .name = "atmel-pmecc",
  815. .of_match_table = atmel_pmecc_match,
  816. },
  817. .probe = atmel_pmecc_probe,
  818. };
  819. module_platform_driver(atmel_pmecc_driver);
  820. MODULE_LICENSE("GPL");
  821. MODULE_AUTHOR("Boris Brezillon <[email protected]>");
  822. MODULE_DESCRIPTION("PMECC engine driver");
  823. MODULE_ALIAS("platform:atmel_pmecc");