mchp48l640.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for Microchip 48L640 64 Kb SPI Serial EERAM
  4. *
  5. * Copyright Heiko Schocher <[email protected]>
  6. *
  7. * datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/20006055B.pdf
  8. *
  9. * we set continuous mode but reading/writing more bytes than
  10. * pagesize seems to bring chip into state where readden values
  11. * are wrong ... no idea why.
  12. *
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/module.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/mutex.h>
  21. #include <linux/sched.h>
  22. #include <linux/sizes.h>
  23. #include <linux/spi/flash.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/of_device.h>
  26. struct mchp48_caps {
  27. unsigned int size;
  28. unsigned int page_size;
  29. };
  30. struct mchp48l640_flash {
  31. struct spi_device *spi;
  32. struct mutex lock;
  33. struct mtd_info mtd;
  34. const struct mchp48_caps *caps;
  35. };
  36. #define MCHP48L640_CMD_WREN 0x06
  37. #define MCHP48L640_CMD_WRDI 0x04
  38. #define MCHP48L640_CMD_WRITE 0x02
  39. #define MCHP48L640_CMD_READ 0x03
  40. #define MCHP48L640_CMD_WRSR 0x01
  41. #define MCHP48L640_CMD_RDSR 0x05
  42. #define MCHP48L640_STATUS_RDY 0x01
  43. #define MCHP48L640_STATUS_WEL 0x02
  44. #define MCHP48L640_STATUS_BP0 0x04
  45. #define MCHP48L640_STATUS_BP1 0x08
  46. #define MCHP48L640_STATUS_SWM 0x10
  47. #define MCHP48L640_STATUS_PRO 0x20
  48. #define MCHP48L640_STATUS_ASE 0x40
  49. #define MCHP48L640_TIMEOUT 100
  50. #define MAX_CMD_SIZE 0x10
  51. #define to_mchp48l640_flash(x) container_of(x, struct mchp48l640_flash, mtd)
  52. static int mchp48l640_mkcmd(struct mchp48l640_flash *flash, u8 cmd, loff_t addr, char *buf)
  53. {
  54. buf[0] = cmd;
  55. buf[1] = addr >> 8;
  56. buf[2] = addr;
  57. return 3;
  58. }
  59. static int mchp48l640_read_status(struct mchp48l640_flash *flash, int *status)
  60. {
  61. unsigned char cmd[2];
  62. int ret;
  63. cmd[0] = MCHP48L640_CMD_RDSR;
  64. cmd[1] = 0x00;
  65. mutex_lock(&flash->lock);
  66. ret = spi_write_then_read(flash->spi, &cmd[0], 1, &cmd[1], 1);
  67. mutex_unlock(&flash->lock);
  68. if (!ret)
  69. *status = cmd[1];
  70. dev_dbg(&flash->spi->dev, "read status ret: %d status: %x", ret, *status);
  71. return ret;
  72. }
  73. static int mchp48l640_waitforbit(struct mchp48l640_flash *flash, int bit, bool set)
  74. {
  75. int ret, status;
  76. unsigned long deadline;
  77. deadline = jiffies + msecs_to_jiffies(MCHP48L640_TIMEOUT);
  78. do {
  79. ret = mchp48l640_read_status(flash, &status);
  80. dev_dbg(&flash->spi->dev, "read status ret: %d bit: %x %sset status: %x",
  81. ret, bit, (set ? "" : "not"), status);
  82. if (ret)
  83. return ret;
  84. if (set) {
  85. if ((status & bit) == bit)
  86. return 0;
  87. } else {
  88. if ((status & bit) == 0)
  89. return 0;
  90. }
  91. usleep_range(1000, 2000);
  92. } while (!time_after_eq(jiffies, deadline));
  93. dev_err(&flash->spi->dev, "Timeout waiting for bit %x %s set in status register.",
  94. bit, (set ? "" : "not"));
  95. return -ETIMEDOUT;
  96. }
  97. static int mchp48l640_write_prepare(struct mchp48l640_flash *flash, bool enable)
  98. {
  99. unsigned char cmd[2];
  100. int ret;
  101. if (enable)
  102. cmd[0] = MCHP48L640_CMD_WREN;
  103. else
  104. cmd[0] = MCHP48L640_CMD_WRDI;
  105. mutex_lock(&flash->lock);
  106. ret = spi_write(flash->spi, cmd, 1);
  107. mutex_unlock(&flash->lock);
  108. if (ret)
  109. dev_err(&flash->spi->dev, "write %sable failed ret: %d",
  110. (enable ? "en" : "dis"), ret);
  111. dev_dbg(&flash->spi->dev, "write %sable success ret: %d",
  112. (enable ? "en" : "dis"), ret);
  113. if (enable)
  114. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_WEL, true);
  115. return ret;
  116. }
  117. static int mchp48l640_set_mode(struct mchp48l640_flash *flash)
  118. {
  119. unsigned char cmd[2];
  120. int ret;
  121. ret = mchp48l640_write_prepare(flash, true);
  122. if (ret)
  123. return ret;
  124. cmd[0] = MCHP48L640_CMD_WRSR;
  125. cmd[1] = MCHP48L640_STATUS_PRO;
  126. mutex_lock(&flash->lock);
  127. ret = spi_write(flash->spi, cmd, 2);
  128. mutex_unlock(&flash->lock);
  129. if (ret)
  130. dev_err(&flash->spi->dev, "Could not set continuous mode ret: %d", ret);
  131. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_PRO, true);
  132. }
  133. static int mchp48l640_wait_rdy(struct mchp48l640_flash *flash)
  134. {
  135. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_RDY, false);
  136. };
  137. static int mchp48l640_write_page(struct mtd_info *mtd, loff_t to, size_t len,
  138. size_t *retlen, const unsigned char *buf)
  139. {
  140. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  141. unsigned char *cmd;
  142. int ret;
  143. int cmdlen;
  144. cmd = kmalloc((3 + len), GFP_KERNEL | GFP_DMA);
  145. if (!cmd)
  146. return -ENOMEM;
  147. ret = mchp48l640_wait_rdy(flash);
  148. if (ret)
  149. goto fail;
  150. ret = mchp48l640_write_prepare(flash, true);
  151. if (ret)
  152. goto fail;
  153. mutex_lock(&flash->lock);
  154. cmdlen = mchp48l640_mkcmd(flash, MCHP48L640_CMD_WRITE, to, cmd);
  155. memcpy(&cmd[cmdlen], buf, len);
  156. ret = spi_write(flash->spi, cmd, cmdlen + len);
  157. mutex_unlock(&flash->lock);
  158. if (!ret)
  159. *retlen += len;
  160. else
  161. goto fail;
  162. ret = mchp48l640_waitforbit(flash, MCHP48L640_STATUS_WEL, false);
  163. if (ret)
  164. goto fail;
  165. kfree(cmd);
  166. return 0;
  167. fail:
  168. kfree(cmd);
  169. dev_err(&flash->spi->dev, "write fail with: %d", ret);
  170. return ret;
  171. };
  172. static int mchp48l640_write(struct mtd_info *mtd, loff_t to, size_t len,
  173. size_t *retlen, const unsigned char *buf)
  174. {
  175. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  176. int ret;
  177. size_t wlen = 0;
  178. loff_t woff = to;
  179. size_t ws;
  180. size_t page_sz = flash->caps->page_size;
  181. /*
  182. * we set PRO bit (page rollover), but writing length > page size
  183. * does result in total chaos, so write in 32 byte chunks.
  184. */
  185. while (wlen < len) {
  186. ws = min((len - wlen), page_sz);
  187. ret = mchp48l640_write_page(mtd, woff, ws, retlen, &buf[wlen]);
  188. if (ret)
  189. return ret;
  190. wlen += ws;
  191. woff += ws;
  192. }
  193. return 0;
  194. }
  195. static int mchp48l640_read_page(struct mtd_info *mtd, loff_t from, size_t len,
  196. size_t *retlen, unsigned char *buf)
  197. {
  198. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  199. unsigned char *cmd;
  200. int ret;
  201. int cmdlen;
  202. cmd = kmalloc((3 + len), GFP_KERNEL | GFP_DMA);
  203. if (!cmd)
  204. return -ENOMEM;
  205. ret = mchp48l640_wait_rdy(flash);
  206. if (ret)
  207. goto fail;
  208. mutex_lock(&flash->lock);
  209. cmdlen = mchp48l640_mkcmd(flash, MCHP48L640_CMD_READ, from, cmd);
  210. ret = spi_write_then_read(flash->spi, cmd, cmdlen, buf, len);
  211. mutex_unlock(&flash->lock);
  212. if (!ret)
  213. *retlen += len;
  214. kfree(cmd);
  215. return ret;
  216. fail:
  217. kfree(cmd);
  218. dev_err(&flash->spi->dev, "read fail with: %d", ret);
  219. return ret;
  220. }
  221. static int mchp48l640_read(struct mtd_info *mtd, loff_t from, size_t len,
  222. size_t *retlen, unsigned char *buf)
  223. {
  224. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  225. int ret;
  226. size_t wlen = 0;
  227. loff_t woff = from;
  228. size_t ws;
  229. size_t page_sz = flash->caps->page_size;
  230. /*
  231. * we set PRO bit (page rollover), but if read length > page size
  232. * does result in total chaos in result ...
  233. */
  234. while (wlen < len) {
  235. ws = min((len - wlen), page_sz);
  236. ret = mchp48l640_read_page(mtd, woff, ws, retlen, &buf[wlen]);
  237. if (ret)
  238. return ret;
  239. wlen += ws;
  240. woff += ws;
  241. }
  242. return 0;
  243. };
  244. static const struct mchp48_caps mchp48l640_caps = {
  245. .size = SZ_8K,
  246. .page_size = 32,
  247. };
  248. static int mchp48l640_probe(struct spi_device *spi)
  249. {
  250. struct mchp48l640_flash *flash;
  251. struct flash_platform_data *data;
  252. int err;
  253. int status;
  254. flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
  255. if (!flash)
  256. return -ENOMEM;
  257. flash->spi = spi;
  258. mutex_init(&flash->lock);
  259. spi_set_drvdata(spi, flash);
  260. err = mchp48l640_read_status(flash, &status);
  261. if (err)
  262. return err;
  263. err = mchp48l640_set_mode(flash);
  264. if (err)
  265. return err;
  266. data = dev_get_platdata(&spi->dev);
  267. flash->caps = of_device_get_match_data(&spi->dev);
  268. if (!flash->caps)
  269. flash->caps = &mchp48l640_caps;
  270. mtd_set_of_node(&flash->mtd, spi->dev.of_node);
  271. flash->mtd.dev.parent = &spi->dev;
  272. flash->mtd.type = MTD_RAM;
  273. flash->mtd.flags = MTD_CAP_RAM;
  274. flash->mtd.writesize = flash->caps->page_size;
  275. flash->mtd.size = flash->caps->size;
  276. flash->mtd._read = mchp48l640_read;
  277. flash->mtd._write = mchp48l640_write;
  278. err = mtd_device_register(&flash->mtd, data ? data->parts : NULL,
  279. data ? data->nr_parts : 0);
  280. if (err)
  281. return err;
  282. return 0;
  283. }
  284. static void mchp48l640_remove(struct spi_device *spi)
  285. {
  286. struct mchp48l640_flash *flash = spi_get_drvdata(spi);
  287. WARN_ON(mtd_device_unregister(&flash->mtd));
  288. }
  289. static const struct of_device_id mchp48l640_of_table[] = {
  290. {
  291. .compatible = "microchip,48l640",
  292. .data = &mchp48l640_caps,
  293. },
  294. {}
  295. };
  296. MODULE_DEVICE_TABLE(of, mchp48l640_of_table);
  297. static const struct spi_device_id mchp48l640_spi_ids[] = {
  298. {
  299. .name = "48l640",
  300. .driver_data = (kernel_ulong_t)&mchp48l640_caps,
  301. },
  302. {}
  303. };
  304. MODULE_DEVICE_TABLE(spi, mchp48l640_spi_ids);
  305. static struct spi_driver mchp48l640_driver = {
  306. .driver = {
  307. .name = "mchp48l640",
  308. .of_match_table = mchp48l640_of_table,
  309. },
  310. .probe = mchp48l640_probe,
  311. .remove = mchp48l640_remove,
  312. .id_table = mchp48l640_spi_ids,
  313. };
  314. module_spi_driver(mchp48l640_driver);
  315. MODULE_DESCRIPTION("MTD SPI driver for Microchip 48l640 EERAM chips");
  316. MODULE_AUTHOR("Heiko Schocher <[email protected]>");
  317. MODULE_LICENSE("GPL v2");
  318. MODULE_ALIAS("spi:mchp48l640");